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dt-bindings: reset: meson8b: fix duplicate reset IDs
commit4881873f4c
upstream. According to the public S805 datasheet the RESET2 register uses the following bits for the PIC_DC, PSC and NAND reset lines: - PIC_DC is at bit 3 (meaning: RESET_VD_RMEM + 3) - PSC is at bit 4 (meaning: RESET_VD_RMEM + 4) - NAND is at bit 5 (meaning: RESET_VD_RMEM + 4) Update the reset IDs of these three reset lines so they don't conflict with PIC_DC and map to the actual hardware reset lines. Fixes:79795e20a1
("dt-bindings: reset: Add bindings for the Meson SoC Reset Controller") Signed-off-by: Martin Blumenstingl <martin.blumenstingl@googlemail.com> Signed-off-by: Kevin Hilman <khilman@baylibre.com> Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
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1 changed files with 3 additions and 3 deletions
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#define RESET_VD_RMEM 64
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#define RESET_AUDIN 65
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#define RESET_DBLK 66
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#define RESET_PIC_DC 66
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#define RESET_PSC 66
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#define RESET_NAND 66
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#define RESET_PIC_DC 67
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#define RESET_PSC 68
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#define RESET_NAND 69
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#define RESET_GE2D 70
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#define RESET_PARSER_REG 71
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#define RESET_PARSER_FETCH 72
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