phy: qcom-qmp-combo: fix memleak on probe deferral

commit 2de8a325b1 upstream.

Switch to using the device-managed of_iomap helper to avoid leaking
memory on probe deferral and driver unbind.

Note that this helper checks for already reserved regions and may fail
if there are multiple devices claiming the same memory.

Fixes: e78f3d15e1 ("phy: qcom-qmp: new qmp phy driver for qcom-chipsets")
Signed-off-by: Johan Hovold <johan+linaro@kernel.org>
Link: https://lore.kernel.org/r/20220916102340.11520-5-johan+linaro@kernel.org
Signed-off-by: Vinod Koul <vkoul@kernel.org>
Signed-off-by: Stephen Boyd <swboyd@chromium.org>
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
This commit is contained in:
Johan Hovold 2023-02-03 14:26:13 -08:00 committed by Greg Kroah-Hartman
parent 0cb10ddab7
commit 2f27d3811a

View file

@ -5410,17 +5410,17 @@ int qcom_qmp_phy_create(struct device *dev, struct device_node *np, int id,
* For dual lane PHYs: tx2 -> 3, rx2 -> 4, pcs_misc (optional) -> 5
* For single lane PHYs: pcs_misc (optional) -> 3.
*/
qphy->tx = of_iomap(np, 0);
if (!qphy->tx)
return -ENOMEM;
qphy->tx = devm_of_iomap(dev, np, 0, NULL);
if (IS_ERR(qphy->tx))
return PTR_ERR(qphy->tx);
qphy->rx = of_iomap(np, 1);
if (!qphy->rx)
return -ENOMEM;
qphy->rx = devm_of_iomap(dev, np, 1, NULL);
if (IS_ERR(qphy->rx))
return PTR_ERR(qphy->rx);
qphy->pcs = of_iomap(np, 2);
if (!qphy->pcs)
return -ENOMEM;
qphy->pcs = devm_of_iomap(dev, np, 2, NULL);
if (IS_ERR(qphy->pcs))
return PTR_ERR(qphy->pcs);
/*
* If this is a dual-lane PHY, then there should be registers for the
@ -5429,9 +5429,9 @@ int qcom_qmp_phy_create(struct device *dev, struct device_node *np, int id,
* offset from the first lane.
*/
if (cfg->is_dual_lane_phy) {
qphy->tx2 = of_iomap(np, 3);
qphy->rx2 = of_iomap(np, 4);
if (!qphy->tx2 || !qphy->rx2) {
qphy->tx2 = devm_of_iomap(dev, np, 3, NULL);
qphy->rx2 = devm_of_iomap(dev, np, 4, NULL);
if (IS_ERR(qphy->tx2) || IS_ERR(qphy->rx2)) {
dev_warn(dev,
"Underspecified device tree, falling back to legacy register regions\n");
@ -5441,15 +5441,17 @@ int qcom_qmp_phy_create(struct device *dev, struct device_node *np, int id,
qphy->rx2 = qphy->rx + QMP_PHY_LEGACY_LANE_STRIDE;
} else {
qphy->pcs_misc = of_iomap(np, 5);
qphy->pcs_misc = devm_of_iomap(dev, np, 5, NULL);
}
} else {
qphy->pcs_misc = of_iomap(np, 3);
qphy->pcs_misc = devm_of_iomap(dev, np, 3, NULL);
}
if (!qphy->pcs_misc)
if (IS_ERR(qphy->pcs_misc)) {
dev_vdbg(dev, "PHY pcs_misc-reg not used\n");
qphy->pcs_misc = NULL;
}
/*
* Get PHY's Pipe clock, if any. USB3 and PCIe are PIPE3