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ASoC: rl6231: avoid using divisible by 3 for DMIC clk
Few codecs will meet no DMIC clock output issue when select a divided number which is divisible by 3. To prevent this issue, the patch ignore the numbers when calculating the DMIC clock divider. Signed-off-by: Bard Liao <bardliao@realtek.com> Signed-off-by: Mark Brown <broonie@kernel.org>
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@ -80,6 +80,8 @@ int rl6231_calc_dmic_clk(int rate)
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}
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for (i = 0; i < ARRAY_SIZE(div); i++) {
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if ((div[i] % 3) == 0)
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continue;
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/* find divider that gives DMIC frequency below 3MHz */
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if (3000000 * div[i] >= rate)
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return i;
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