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MIPS: ath79: Change number of available IRQs
The status register of the miscellaneous interrupt controller is 32 bits wide, but the actual value of NR_IRQS covers only 8 of them. Change NR_IRQS in order to make all of those interrupt lines usable. Signed-off-by: Gabor Juhos <juhosg@openwrt.org> Cc: linux-mips@linux-mips.org Patchwork: https://patchwork.linux-mips.org/patch/2441/ Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
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1 changed files with 2 additions and 2 deletions
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#define __ASM_MACH_ATH79_IRQ_H
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#define __ASM_MACH_ATH79_IRQ_H
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#define MIPS_CPU_IRQ_BASE 0
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#define MIPS_CPU_IRQ_BASE 0
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#define NR_IRQS 16
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#define NR_IRQS 40
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#define ATH79_MISC_IRQ_BASE 8
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#define ATH79_MISC_IRQ_BASE 8
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#define ATH79_MISC_IRQ_COUNT 8
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#define ATH79_MISC_IRQ_COUNT 32
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#define ATH79_CPU_IRQ_IP2 (MIPS_CPU_IRQ_BASE + 2)
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#define ATH79_CPU_IRQ_IP2 (MIPS_CPU_IRQ_BASE + 2)
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#define ATH79_CPU_IRQ_USB (MIPS_CPU_IRQ_BASE + 3)
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#define ATH79_CPU_IRQ_USB (MIPS_CPU_IRQ_BASE + 3)
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