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scsi: ufs: Add a quirk to permit overriding UniPro defaults
[ Upstream commit b1d0d2eb89
]
The UniPro specification states that attribute IDs of the following
parameters are vendor-specific so some SoCs could have no regions at the
defined addresses:
- DME_LocalFC0ProtectionTimeOutVal
- DME_LocalTC0ReplayTimeOutVal
- DME_LocalAFC0ReqTimeOutVal
In addition, the following parameters should be set considering the
compatibility between host and device.
- PA_PWRMODEUSERDATA0
- PA_PWRMODEUSERDATA1
- PA_PWRMODEUSERDATA2
- PA_PWRMODEUSERDATA3
- PA_PWRMODEUSERDATA4
- PA_PWRMODEUSERDATA5
Introduce a quirk to allow vendor drivers to override the UniPro defaults.
Link: https://lore.kernel.org/r/1fedd3dea0ccc980913a5995a10510d86a5b01b9.1608513782.git.kwmad.kim@samsung.com
Acked-by: Avri Altman <Avri.Altman@wdc.com>
Signed-off-by: Kiwoong Kim <kwmad.kim@samsung.com>
Signed-off-by: Martin K. Petersen <martin.petersen@oracle.com>
Signed-off-by: Sasha Levin <sashal@kernel.org>
This commit is contained in:
parent
dbaa266751
commit
2fc01226c2
2 changed files with 26 additions and 18 deletions
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@ -4153,25 +4153,27 @@ static int ufshcd_change_power_mode(struct ufs_hba *hba,
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ufshcd_dme_set(hba, UIC_ARG_MIB(PA_HSSERIES),
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pwr_mode->hs_rate);
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ufshcd_dme_set(hba, UIC_ARG_MIB(PA_PWRMODEUSERDATA0),
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DL_FC0ProtectionTimeOutVal_Default);
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ufshcd_dme_set(hba, UIC_ARG_MIB(PA_PWRMODEUSERDATA1),
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DL_TC0ReplayTimeOutVal_Default);
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ufshcd_dme_set(hba, UIC_ARG_MIB(PA_PWRMODEUSERDATA2),
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DL_AFC0ReqTimeOutVal_Default);
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ufshcd_dme_set(hba, UIC_ARG_MIB(PA_PWRMODEUSERDATA3),
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DL_FC1ProtectionTimeOutVal_Default);
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ufshcd_dme_set(hba, UIC_ARG_MIB(PA_PWRMODEUSERDATA4),
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DL_TC1ReplayTimeOutVal_Default);
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ufshcd_dme_set(hba, UIC_ARG_MIB(PA_PWRMODEUSERDATA5),
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DL_AFC1ReqTimeOutVal_Default);
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if (!(hba->quirks & UFSHCD_QUIRK_SKIP_DEF_UNIPRO_TIMEOUT_SETTING)) {
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ufshcd_dme_set(hba, UIC_ARG_MIB(PA_PWRMODEUSERDATA0),
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DL_FC0ProtectionTimeOutVal_Default);
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ufshcd_dme_set(hba, UIC_ARG_MIB(PA_PWRMODEUSERDATA1),
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DL_TC0ReplayTimeOutVal_Default);
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ufshcd_dme_set(hba, UIC_ARG_MIB(PA_PWRMODEUSERDATA2),
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DL_AFC0ReqTimeOutVal_Default);
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ufshcd_dme_set(hba, UIC_ARG_MIB(PA_PWRMODEUSERDATA3),
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DL_FC1ProtectionTimeOutVal_Default);
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ufshcd_dme_set(hba, UIC_ARG_MIB(PA_PWRMODEUSERDATA4),
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DL_TC1ReplayTimeOutVal_Default);
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ufshcd_dme_set(hba, UIC_ARG_MIB(PA_PWRMODEUSERDATA5),
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DL_AFC1ReqTimeOutVal_Default);
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ufshcd_dme_set(hba, UIC_ARG_MIB(DME_LocalFC0ProtectionTimeOutVal),
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DL_FC0ProtectionTimeOutVal_Default);
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ufshcd_dme_set(hba, UIC_ARG_MIB(DME_LocalTC0ReplayTimeOutVal),
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DL_TC0ReplayTimeOutVal_Default);
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ufshcd_dme_set(hba, UIC_ARG_MIB(DME_LocalAFC0ReqTimeOutVal),
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DL_AFC0ReqTimeOutVal_Default);
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ufshcd_dme_set(hba, UIC_ARG_MIB(DME_LocalFC0ProtectionTimeOutVal),
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DL_FC0ProtectionTimeOutVal_Default);
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ufshcd_dme_set(hba, UIC_ARG_MIB(DME_LocalTC0ReplayTimeOutVal),
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DL_TC0ReplayTimeOutVal_Default);
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ufshcd_dme_set(hba, UIC_ARG_MIB(DME_LocalAFC0ReqTimeOutVal),
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DL_AFC0ReqTimeOutVal_Default);
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}
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ret = ufshcd_uic_change_pwr_mode(hba, pwr_mode->pwr_rx << 4
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| pwr_mode->pwr_tx);
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@ -544,6 +544,12 @@ enum ufshcd_quirks {
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*/
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UFSHCI_QUIRK_SKIP_MANUAL_WB_FLUSH_CTRL = 1 << 12,
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/*
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* This quirk needs to disable unipro timeout values
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* before power mode change
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*/
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UFSHCD_QUIRK_SKIP_DEF_UNIPRO_TIMEOUT_SETTING = 1 << 13,
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};
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enum ufshcd_caps {
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