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drm/amd/powerplay: refine pwm1_enable callback functions for vi.
Use the new enums for setting and getting the fan control mode. Fixes problems due to previous inconsistencies between enums. Signed-off-by: Rex Zhu <Rex.Zhu@amd.com> Reviewed-by: Alex Deucher <alexander.deucher@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
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parent
7522ffc41b
commit
2fde9ab218
4 changed files with 27 additions and 20 deletions
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@ -4334,26 +4334,31 @@ static int smu7_print_clock_levels(struct pp_hwmgr *hwmgr,
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static int smu7_set_fan_control_mode(struct pp_hwmgr *hwmgr, uint32_t mode)
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{
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if (mode) {
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/* stop auto-manage */
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if (phm_cap_enabled(hwmgr->platform_descriptor.platformCaps,
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PHM_PlatformCaps_MicrocodeFanControl))
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smu7_fan_ctrl_stop_smc_fan_control(hwmgr);
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smu7_fan_ctrl_set_static_mode(hwmgr, mode);
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} else
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/* restart auto-manage */
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smu7_fan_ctrl_reset_fan_speed_to_default(hwmgr);
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int result = 0;
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return 0;
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switch (mode) {
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case AMD_FAN_CTRL_NONE:
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result = smu7_fan_ctrl_set_fan_speed_percent(hwmgr, 100);
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break;
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case AMD_FAN_CTRL_MANUAL:
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if (phm_cap_enabled(hwmgr->platform_descriptor.platformCaps,
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PHM_PlatformCaps_MicrocodeFanControl))
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result = smu7_fan_ctrl_stop_smc_fan_control(hwmgr);
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break;
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case AMD_FAN_CTRL_AUTO:
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result = smu7_fan_ctrl_set_static_mode(hwmgr, mode);
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if (!result)
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result = smu7_fan_ctrl_start_smc_fan_control(hwmgr);
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break;
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default:
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break;
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}
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return result;
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}
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static int smu7_get_fan_control_mode(struct pp_hwmgr *hwmgr)
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{
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if (hwmgr->fan_ctrl_is_in_default_mode)
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return hwmgr->fan_ctrl_default_mode;
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else
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return PHM_READ_VFPF_INDIRECT_FIELD(hwmgr->device, CGS_IND_REG__SMC,
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CG_FDO_CTRL2, FDO_PWM_MODE);
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return hwmgr->fan_ctrl_enabled ? AMD_FAN_CTRL_AUTO : AMD_FAN_CTRL_MANUAL;
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}
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static int smu7_get_sclk_od(struct pp_hwmgr *hwmgr)
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@ -112,10 +112,9 @@ int smu7_fan_ctrl_get_fan_speed_rpm(struct pp_hwmgr *hwmgr, uint32_t *speed)
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*/
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int smu7_fan_ctrl_set_static_mode(struct pp_hwmgr *hwmgr, uint32_t mode)
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{
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if (hwmgr->fan_ctrl_is_in_default_mode) {
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hwmgr->fan_ctrl_default_mode =
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PHM_READ_VFPF_INDIRECT_FIELD(hwmgr->device, CGS_IND_REG__SMC,
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PHM_READ_VFPF_INDIRECT_FIELD(hwmgr->device, CGS_IND_REG__SMC,
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CG_FDO_CTRL2, FDO_PWM_MODE);
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hwmgr->tmin =
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PHM_READ_VFPF_INDIRECT_FIELD(hwmgr->device, CGS_IND_REG__SMC,
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@ -149,7 +148,7 @@ int smu7_fan_ctrl_set_default_mode(struct pp_hwmgr *hwmgr)
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return 0;
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}
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static int smu7_fan_ctrl_start_smc_fan_control(struct pp_hwmgr *hwmgr)
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int smu7_fan_ctrl_start_smc_fan_control(struct pp_hwmgr *hwmgr)
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{
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int result;
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@ -179,6 +178,7 @@ static int smu7_fan_ctrl_start_smc_fan_control(struct pp_hwmgr *hwmgr)
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PPSMC_MSG_SetFanTemperatureTarget,
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hwmgr->thermal_controller.
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advanceFanControlParameters.ucTargetTemperature);
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hwmgr->fan_ctrl_enabled = true;
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return result;
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}
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@ -186,6 +186,7 @@ static int smu7_fan_ctrl_start_smc_fan_control(struct pp_hwmgr *hwmgr)
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int smu7_fan_ctrl_stop_smc_fan_control(struct pp_hwmgr *hwmgr)
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{
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hwmgr->fan_ctrl_enabled = false;
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return smum_send_msg_to_smc(hwmgr->smumgr, PPSMC_StopFanControl);
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}
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@ -280,7 +281,7 @@ int smu7_fan_ctrl_set_fan_speed_rpm(struct pp_hwmgr *hwmgr, uint32_t speed)
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PHM_WRITE_VFPF_INDIRECT_FIELD(hwmgr->device, CGS_IND_REG__SMC,
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CG_TACH_STATUS, TACH_PERIOD, tach_period);
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return smu7_fan_ctrl_set_static_mode(hwmgr, FDO_PWM_MODE_STATIC);
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return smu7_fan_ctrl_set_static_mode(hwmgr, FDO_PWM_MODE_STATIC_RPM);
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}
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/**
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@ -54,6 +54,6 @@ extern int smu7_fan_ctrl_get_fan_speed_rpm(struct pp_hwmgr *hwmgr, uint32_t *spe
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extern int smu7_fan_ctrl_stop_smc_fan_control(struct pp_hwmgr *hwmgr);
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extern int smu7_thermal_enable_alert(struct pp_hwmgr *hwmgr);
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extern int smu7_thermal_disable_alert(struct pp_hwmgr *hwmgr);
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extern int smu7_fan_ctrl_start_smc_fan_control(struct pp_hwmgr *hwmgr);
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#endif
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@ -764,6 +764,7 @@ struct pp_hwmgr {
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struct pp_thermal_controller_info thermal_controller;
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bool fan_ctrl_is_in_default_mode;
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uint32_t fan_ctrl_default_mode;
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bool fan_ctrl_enabled;
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uint32_t tmin;
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struct phm_microcode_version_info microcode_version_info;
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uint32_t ps_size;
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