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Blackfin arch: Finalize the generic gpio support - add gpio_to_irq and irq_to_gpio
Signed-off-by: Michael Hennerich <michael.hennerich@analog.com> Signed-off-by: Bryan Wu <bryan.wu@analog.com>
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5 changed files with 21 additions and 0 deletions
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@ -421,6 +421,19 @@ unsigned short gpio_get_value(unsigned short gpio);
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void gpio_direction_input(unsigned short gpio);
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void gpio_direction_output(unsigned short gpio);
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#include <asm-generic/gpio.h> /* cansleep wrappers */
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#include <asm/irq.h>
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static inline int gpio_to_irq(unsigned gpio)
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{
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return (gpio + GPIO_IRQ_BASE);
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}
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static inline int irq_to_gpio(unsigned irq)
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{
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return (irq - GPIO_IRQ_BASE);
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}
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#endif /* __ASSEMBLY__ */
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#endif /* __ARCH_BLACKFIN_GPIO_H__ */
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@ -128,6 +128,8 @@ Core Emulation **
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#define IRQ_PF14 47
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#define IRQ_PF15 48
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#define GPIO_IRQ_BASE IRQ_PF0
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#ifdef CONFIG_IRQCHIP_DEMUX_GPIO
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#define NR_IRQS (IRQ_PF15+1)
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#else
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@ -160,6 +160,8 @@ Core Emulation **
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#define IRQ_PH14 96
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#define IRQ_PH15 97
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#define GPIO_IRQ_BASE IRQ_PF0
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#ifdef CONFIG_IRQCHIP_DEMUX_GPIO
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#define NR_IRQS (IRQ_PH15+1)
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#else
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@ -337,6 +337,8 @@ Events (highest priority) EMU 0
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#define IRQ_PJ14 BFIN_PJ_IRQ(14) /* N/A */
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#define IRQ_PJ15 BFIN_PJ_IRQ(15) /* N/A */
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#define GPIO_IRQ_BASE IRQ_PA0
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#ifdef CONFIG_IRQCHIP_DEMUX_GPIO
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#define NR_IRQS (IRQ_PJ15+1)
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#else
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@ -289,6 +289,8 @@
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#define IRQ_PF46 119
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#define IRQ_PF47 120
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#define GPIO_IRQ_BASE IRQ_PF0
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#ifdef CONFIG_IRQCHIP_DEMUX_GPIO
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#define NR_IRQS (IRQ_PF47 + 1)
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#else
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