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iommu/amd: Return the pte page-size in fetch_pte
Extend the fetch_pte function to also return the page-size that is mapped by the returned pte. Tested-by: Suravee Suthikulpanit <Suravee.Suthikulpanit@amd.com> Signed-off-by: Joerg Roedel <jroedel@suse.de>
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parent
3b839a5799
commit
3039ca1b1c
2 changed files with 36 additions and 22 deletions
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@ -1322,7 +1322,9 @@ static u64 *alloc_pte(struct protection_domain *domain,
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* This function checks if there is a PTE for a given dma address. If
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* there is one, it returns the pointer to it.
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*/
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static u64 *fetch_pte(struct protection_domain *domain, unsigned long address)
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static u64 *fetch_pte(struct protection_domain *domain,
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unsigned long address,
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unsigned long *page_size)
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{
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int level;
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u64 *pte;
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@ -1330,8 +1332,9 @@ static u64 *fetch_pte(struct protection_domain *domain, unsigned long address)
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if (address > PM_LEVEL_SIZE(domain->mode))
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return NULL;
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level = domain->mode - 1;
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pte = &domain->pt_root[PM_LEVEL_INDEX(level, address)];
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level = domain->mode - 1;
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pte = &domain->pt_root[PM_LEVEL_INDEX(level, address)];
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*page_size = PTE_LEVEL_PAGE_SIZE(level);
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while (level > 0) {
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@ -1340,19 +1343,9 @@ static u64 *fetch_pte(struct protection_domain *domain, unsigned long address)
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return NULL;
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/* Large PTE */
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if (PM_PTE_LEVEL(*pte) == 0x07) {
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unsigned long pte_mask, __pte;
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/*
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* If we have a series of large PTEs, make
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* sure to return a pointer to the first one.
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*/
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pte_mask = PTE_PAGE_SIZE(*pte);
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pte_mask = ~((PAGE_SIZE_PTE_COUNT(pte_mask) << 3) - 1);
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__pte = ((unsigned long)pte) & pte_mask;
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return (u64 *)__pte;
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}
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if (PM_PTE_LEVEL(*pte) == 7 ||
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PM_PTE_LEVEL(*pte) == 0)
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break;
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/* No level skipping support yet */
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if (PM_PTE_LEVEL(*pte) != level)
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@ -1361,8 +1354,21 @@ static u64 *fetch_pte(struct protection_domain *domain, unsigned long address)
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level -= 1;
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/* Walk to the next level */
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pte = IOMMU_PTE_PAGE(*pte);
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pte = &pte[PM_LEVEL_INDEX(level, address)];
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pte = IOMMU_PTE_PAGE(*pte);
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pte = &pte[PM_LEVEL_INDEX(level, address)];
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*page_size = PTE_LEVEL_PAGE_SIZE(level);
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}
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if (PM_PTE_LEVEL(*pte) == 0x07) {
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unsigned long pte_mask;
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/*
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* If we have a series of large PTEs, make
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* sure to return a pointer to the first one.
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*/
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*page_size = pte_mask = PTE_PAGE_SIZE(*pte);
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pte_mask = ~((PAGE_SIZE_PTE_COUNT(pte_mask) << 3) - 1);
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pte = (u64 *)(((unsigned long)pte) & pte_mask);
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}
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return pte;
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@ -1423,6 +1429,7 @@ static unsigned long iommu_unmap_page(struct protection_domain *dom,
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unsigned long page_size)
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{
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unsigned long long unmap_size, unmapped;
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unsigned long pte_pgsize;
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u64 *pte;
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BUG_ON(!is_power_of_2(page_size));
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@ -1431,7 +1438,7 @@ static unsigned long iommu_unmap_page(struct protection_domain *dom,
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while (unmapped < page_size) {
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pte = fetch_pte(dom, bus_addr);
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pte = fetch_pte(dom, bus_addr, &pte_pgsize);
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if (!pte) {
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/*
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@ -1674,7 +1681,8 @@ static int alloc_new_range(struct dma_ops_domain *dma_dom,
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for (i = dma_dom->aperture[index]->offset;
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i < dma_dom->aperture_size;
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i += PAGE_SIZE) {
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u64 *pte = fetch_pte(&dma_dom->domain, i);
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unsigned long pte_pgsize;
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u64 *pte = fetch_pte(&dma_dom->domain, i, &pte_pgsize);
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if (!pte || !IOMMU_PTE_PRESENT(*pte))
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continue;
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@ -3382,14 +3390,14 @@ static phys_addr_t amd_iommu_iova_to_phys(struct iommu_domain *dom,
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dma_addr_t iova)
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{
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struct protection_domain *domain = dom->priv;
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unsigned long offset_mask;
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unsigned long offset_mask, pte_pgsize;
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phys_addr_t paddr;
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u64 *pte, __pte;
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if (domain->mode == PAGE_MODE_NONE)
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return iova;
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pte = fetch_pte(domain, iova);
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pte = fetch_pte(domain, iova, &pte_pgsize);
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if (!pte || !IOMMU_PTE_PRESENT(*pte))
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return 0;
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@ -282,6 +282,12 @@
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#define PTE_PAGE_SIZE(pte) \
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(1ULL << (1 + ffz(((pte) | 0xfffULL))))
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/*
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* Takes a page-table level and returns the default page-size for this level
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*/
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#define PTE_LEVEL_PAGE_SIZE(level) \
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(1ULL << (12 + (9 * (level))))
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#define IOMMU_PTE_P (1ULL << 0)
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#define IOMMU_PTE_TV (1ULL << 1)
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#define IOMMU_PTE_U (1ULL << 59)
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