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drm/amd/pm: disable cstate feature for gpu reset scenario
Suggested by PMFW team and same as what did for gfxoff feature. This can address some Mode1Reset failures observed on SMU13.0.0. Signed-off-by: Evan Quan <evan.quan@amd.com> Reviewed-by: Hawking Zhang <Hawking.Zhang@amd.com> Reviewed-by: Lijo Lazar <lijo.lazar@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com> Cc: stable@vger.kernel.org # 6.0.x Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
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3 changed files with 25 additions and 0 deletions
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@ -2928,6 +2928,14 @@ static int amdgpu_device_ip_suspend_phase1(struct amdgpu_device *adev)
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amdgpu_device_set_pg_state(adev, AMD_PG_STATE_UNGATE);
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amdgpu_device_set_pg_state(adev, AMD_PG_STATE_UNGATE);
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amdgpu_device_set_cg_state(adev, AMD_CG_STATE_UNGATE);
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amdgpu_device_set_cg_state(adev, AMD_CG_STATE_UNGATE);
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/*
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* Per PMFW team's suggestion, driver needs to handle gfxoff
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* and df cstate features disablement for gpu reset(e.g. Mode1Reset)
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* scenario. Add the missing df cstate disablement here.
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*/
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if (amdgpu_dpm_set_df_cstate(adev, DF_CSTATE_DISALLOW))
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dev_warn(adev->dev, "Failed to disallow df cstate");
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for (i = adev->num_ip_blocks - 1; i >= 0; i--) {
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for (i = adev->num_ip_blocks - 1; i >= 0; i--) {
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if (!adev->ip_blocks[i].status.valid)
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if (!adev->ip_blocks[i].status.valid)
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continue;
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continue;
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@ -2242,9 +2242,17 @@ static void arcturus_get_unique_id(struct smu_context *smu)
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static int arcturus_set_df_cstate(struct smu_context *smu,
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static int arcturus_set_df_cstate(struct smu_context *smu,
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enum pp_df_cstate state)
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enum pp_df_cstate state)
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{
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{
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struct amdgpu_device *adev = smu->adev;
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uint32_t smu_version;
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uint32_t smu_version;
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int ret;
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int ret;
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/*
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* Arcturus does not need the cstate disablement
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* prerequisite for gpu reset.
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*/
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if (amdgpu_in_reset(adev) || adev->in_suspend)
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return 0;
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ret = smu_cmn_get_smc_version(smu, NULL, &smu_version);
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ret = smu_cmn_get_smc_version(smu, NULL, &smu_version);
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if (ret) {
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if (ret) {
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dev_err(smu->adev->dev, "Failed to get smu version!\n");
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dev_err(smu->adev->dev, "Failed to get smu version!\n");
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@ -1640,6 +1640,15 @@ static bool aldebaran_is_baco_supported(struct smu_context *smu)
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static int aldebaran_set_df_cstate(struct smu_context *smu,
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static int aldebaran_set_df_cstate(struct smu_context *smu,
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enum pp_df_cstate state)
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enum pp_df_cstate state)
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{
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{
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struct amdgpu_device *adev = smu->adev;
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/*
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* Aldebaran does not need the cstate disablement
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* prerequisite for gpu reset.
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*/
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if (amdgpu_in_reset(adev) || adev->in_suspend)
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return 0;
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return smu_cmn_send_smc_msg_with_param(smu, SMU_MSG_DFCstateControl, state, NULL);
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return smu_cmn_send_smc_msg_with_param(smu, SMU_MSG_DFCstateControl, state, NULL);
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}
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}
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