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arm64: bpf: add 'load 64-bit immediate' instruction
Commit02ab695bb3
(net: filter: add "load 64-bit immediate" eBPF instruction) introduced a new eBPF instruction. Let's add support for this for arm64 as well. Our arm64 eBPF JIT compiler now passes the new "load 64-bit immediate" test case introduced in the same commit02ab695bb3
. Signed-off-by: Zi Shen Lim <zlim.lnx@gmail.com> Cc: Will Deacon <will.deacon@arm.com> Cc: David S. Miller <davem@davemloft.net> Cc: Alexei Starovoitov <ast@plumgrid.com> Signed-off-by: Catalin Marinas <catalin.marinas@arm.com>
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1 changed files with 31 additions and 0 deletions
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@ -205,6 +205,12 @@ static void build_epilogue(struct jit_ctx *ctx)
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emit(A64_RET(A64_LR), ctx);
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}
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/* JITs an eBPF instruction.
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* Returns:
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* 0 - successfully JITed an 8-byte eBPF instruction.
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* >0 - successfully JITed a 16-byte eBPF instruction.
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* <0 - failed to JIT.
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*/
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static int build_insn(const struct bpf_insn *insn, struct jit_ctx *ctx)
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{
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const u8 code = insn->code;
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@ -464,6 +470,27 @@ static int build_insn(const struct bpf_insn *insn, struct jit_ctx *ctx)
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emit(A64_B(jmp_offset), ctx);
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break;
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/* dst = imm64 */
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case BPF_LD | BPF_IMM | BPF_DW:
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{
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const struct bpf_insn insn1 = insn[1];
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u64 imm64;
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if (insn1.code != 0 || insn1.src_reg != 0 ||
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insn1.dst_reg != 0 || insn1.off != 0) {
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/* Note: verifier in BPF core must catch invalid
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* instructions.
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*/
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pr_err_once("Invalid BPF_LD_IMM64 instruction\n");
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return -EINVAL;
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}
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imm64 = (u64)insn1.imm << 32 | imm;
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emit_a64_mov_i64(dst, imm64, ctx);
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return 1;
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}
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/* LDX: dst = *(size *)(src + off) */
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case BPF_LDX | BPF_MEM | BPF_W:
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case BPF_LDX | BPF_MEM | BPF_H:
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@ -615,6 +642,10 @@ static int build_body(struct jit_ctx *ctx)
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ctx->offset[i] = ctx->idx;
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ret = build_insn(insn, ctx);
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if (ret > 0) {
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i++;
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continue;
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}
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if (ret)
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return ret;
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}
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