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sh-pfc: r8a7790: Remove GPIO data
GPIOs are now handled by a separate driver, remove GPIO data from the SoC information structure. Signed-off-by: Laurent Pinchart <laurent.pinchart+renesas@ideasonboard.com> Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
This commit is contained in:
Laurent Pinchart
Simon Horman
parent
45c6c85d13
commit
30e4247e5b
1 changed files with 1 additions and 132 deletions
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@ -52,32 +52,12 @@
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CPU_32_PORT(fn, pfx##_5_, sfx) \
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#define _GP_GPIO(pfx, sfx) PINMUX_GPIO(GPIO_GP##pfx, GP##pfx##_DATA)
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#define _GP_DATA(pfx, sfx) PINMUX_DATA(GP##pfx##_DATA, GP##pfx##_FN, \
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GP##pfx##_IN, GP##pfx##_OUT)
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#define _GP_INOUTSEL(pfx, sfx) GP##pfx##_IN, GP##pfx##_OUT
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#define _GP_INDT(pfx, sfx) GP##pfx##_DATA
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#define _GP_DATA(pfx, sfx) PINMUX_DATA(GP##pfx##_DATA, GP##pfx##_FN)
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#define GP_ALL(str) CPU_ALL_PORT(_PORT_ALL, GP, str)
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#define PINMUX_GPIO_GP_ALL() CPU_ALL_PORT(_GP_GPIO, , unused)
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#define PINMUX_DATA_GP_ALL() CPU_ALL_PORT(_GP_DATA, , unused)
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#define PORT_10_REV(fn, pfx, sfx) \
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PORT_1(fn, pfx##9, sfx), PORT_1(fn, pfx##8, sfx), \
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PORT_1(fn, pfx##7, sfx), PORT_1(fn, pfx##6, sfx), \
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PORT_1(fn, pfx##5, sfx), PORT_1(fn, pfx##4, sfx), \
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PORT_1(fn, pfx##3, sfx), PORT_1(fn, pfx##2, sfx), \
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PORT_1(fn, pfx##1, sfx), PORT_1(fn, pfx##0, sfx)
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#define CPU_32_PORT_REV(fn, pfx, sfx) \
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PORT_1(fn, pfx##31, sfx), PORT_1(fn, pfx##30, sfx), \
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PORT_10_REV(fn, pfx##2, sfx), PORT_10_REV(fn, pfx##1, sfx), \
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PORT_10_REV(fn, pfx, sfx)
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#define GP_INOUTSEL(bank) CPU_32_PORT_REV(_GP_INOUTSEL, _##bank##_, unused)
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#define GP_INDT(bank) CPU_32_PORT_REV(_GP_INDT, _##bank##_, unused)
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#define PINMUX_IPSR_DATA(ipsr, fn) PINMUX_DATA(fn##_MARK, FN_##ipsr, FN_##fn)
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#define PINMUX_IPSR_MODSEL_DATA(ipsr, fn, ms) PINMUX_DATA(fn##_MARK, FN_##ms, \
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FN_##ipsr, FN_##fn)
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@ -89,14 +69,6 @@ enum {
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GP_ALL(DATA),
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PINMUX_DATA_END,
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PINMUX_INPUT_BEGIN,
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GP_ALL(IN),
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PINMUX_INPUT_END,
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PINMUX_OUTPUT_BEGIN,
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GP_ALL(OUT),
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PINMUX_OUTPUT_END,
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PINMUX_FUNCTION_BEGIN,
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GP_ALL(FN),
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@ -3824,106 +3796,6 @@ static struct pinmux_cfg_reg pinmux_config_regs[] = {
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/* SEL_I2C1 [2] */
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FN_SEL_I2C1_0, FN_SEL_I2C1_1, FN_SEL_I2C1_2, 0, }
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},
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{ PINMUX_CFG_REG("INOUTSEL0", 0xE6050004, 32, 1) { GP_INOUTSEL(0) } },
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{ PINMUX_CFG_REG("INOUTSEL1", 0xE6051004, 32, 1) {
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0, 0,
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0, 0,
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GP_1_29_IN, GP_1_29_OUT,
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GP_1_28_IN, GP_1_28_OUT,
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GP_1_27_IN, GP_1_27_OUT,
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GP_1_26_IN, GP_1_26_OUT,
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GP_1_25_IN, GP_1_25_OUT,
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GP_1_24_IN, GP_1_24_OUT,
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GP_1_23_IN, GP_1_23_OUT,
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GP_1_22_IN, GP_1_22_OUT,
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GP_1_21_IN, GP_1_21_OUT,
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GP_1_20_IN, GP_1_20_OUT,
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GP_1_19_IN, GP_1_19_OUT,
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GP_1_18_IN, GP_1_18_OUT,
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GP_1_17_IN, GP_1_17_OUT,
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GP_1_16_IN, GP_1_16_OUT,
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GP_1_15_IN, GP_1_15_OUT,
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GP_1_14_IN, GP_1_14_OUT,
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GP_1_13_IN, GP_1_13_OUT,
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GP_1_12_IN, GP_1_12_OUT,
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GP_1_11_IN, GP_1_11_OUT,
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GP_1_10_IN, GP_1_10_OUT,
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GP_1_9_IN, GP_1_9_OUT,
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GP_1_8_IN, GP_1_8_OUT,
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GP_1_7_IN, GP_1_7_OUT,
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GP_1_6_IN, GP_1_6_OUT,
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GP_1_5_IN, GP_1_5_OUT,
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GP_1_4_IN, GP_1_4_OUT,
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GP_1_3_IN, GP_1_3_OUT,
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GP_1_2_IN, GP_1_2_OUT,
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GP_1_1_IN, GP_1_1_OUT,
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GP_1_0_IN, GP_1_0_OUT, }
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},
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{ PINMUX_CFG_REG("INOUTSEL2", 0xE6052004, 32, 1) {
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0, 0,
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0, 0,
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GP_2_29_IN, GP_2_29_OUT,
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GP_2_28_IN, GP_2_28_OUT,
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GP_2_27_IN, GP_2_27_OUT,
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GP_2_26_IN, GP_2_26_OUT,
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GP_2_25_IN, GP_2_25_OUT,
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GP_2_24_IN, GP_2_24_OUT,
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GP_2_23_IN, GP_2_23_OUT,
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GP_2_22_IN, GP_2_22_OUT,
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GP_2_21_IN, GP_2_21_OUT,
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GP_2_20_IN, GP_2_20_OUT,
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GP_2_19_IN, GP_2_19_OUT,
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GP_2_18_IN, GP_2_18_OUT,
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GP_2_17_IN, GP_2_17_OUT,
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GP_2_16_IN, GP_2_16_OUT,
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GP_2_15_IN, GP_2_15_OUT,
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GP_2_14_IN, GP_2_14_OUT,
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GP_2_13_IN, GP_2_13_OUT,
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GP_2_12_IN, GP_2_12_OUT,
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GP_2_11_IN, GP_2_11_OUT,
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GP_2_10_IN, GP_2_10_OUT,
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GP_2_9_IN, GP_2_9_OUT,
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GP_2_8_IN, GP_2_8_OUT,
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GP_2_7_IN, GP_2_7_OUT,
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GP_2_6_IN, GP_2_6_OUT,
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GP_2_5_IN, GP_2_5_OUT,
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GP_2_4_IN, GP_2_4_OUT,
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GP_2_3_IN, GP_2_3_OUT,
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GP_2_2_IN, GP_2_2_OUT,
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GP_2_1_IN, GP_2_1_OUT,
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GP_2_0_IN, GP_2_0_OUT, }
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},
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{ PINMUX_CFG_REG("INOUTSEL3", 0xE6053004, 32, 1) { GP_INOUTSEL(3) } },
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{ PINMUX_CFG_REG("INOUTSEL4", 0xE6054004, 32, 1) { GP_INOUTSEL(4) } },
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{ PINMUX_CFG_REG("INOUTSEL5", 0xE6055004, 32, 1) { GP_INOUTSEL(5) } },
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{ },
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};
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static const struct pinmux_data_reg pinmux_data_regs[] = {
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{ PINMUX_DATA_REG("INDT0", 0xE605000C, 32) { GP_INDT(0) } },
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{ PINMUX_DATA_REG("INDT1", 0xE605100C, 32) {
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0, 0, GP_1_29_DATA, GP_1_28_DATA,
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GP_1_27_DATA, GP_1_26_DATA, GP_1_25_DATA, GP_1_24_DATA,
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GP_1_23_DATA, GP_1_22_DATA, GP_1_21_DATA, GP_1_20_DATA,
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GP_1_19_DATA, GP_1_18_DATA, GP_1_17_DATA, GP_1_16_DATA,
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GP_1_15_DATA, GP_1_14_DATA, GP_1_13_DATA, GP_1_12_DATA,
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GP_1_11_DATA, GP_1_10_DATA, GP_1_9_DATA, GP_1_8_DATA,
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GP_1_7_DATA, GP_1_6_DATA, GP_1_5_DATA, GP_1_4_DATA,
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GP_1_3_DATA, GP_1_2_DATA, GP_1_1_DATA, GP_1_0_DATA }
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},
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{ PINMUX_DATA_REG("INDT2", 0xE605200C, 32) {
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0, 0, GP_2_29_DATA, GP_2_28_DATA,
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GP_2_27_DATA, GP_2_26_DATA, GP_2_25_DATA, GP_2_24_DATA,
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GP_2_23_DATA, GP_2_22_DATA, GP_2_21_DATA, GP_2_20_DATA,
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GP_2_19_DATA, GP_2_18_DATA, GP_2_17_DATA, GP_2_16_DATA,
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GP_2_15_DATA, GP_2_14_DATA, GP_2_13_DATA, GP_2_12_DATA,
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GP_2_11_DATA, GP_2_10_DATA, GP_2_9_DATA, GP_2_8_DATA,
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GP_2_7_DATA, GP_2_6_DATA, GP_2_5_DATA, GP_2_4_DATA,
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GP_2_3_DATA, GP_2_2_DATA, GP_2_1_DATA, GP_2_0_DATA }
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},
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{ PINMUX_DATA_REG("INDT3", 0xE605300C, 32) { GP_INDT(3) } },
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{ PINMUX_DATA_REG("INDT4", 0xE605400C, 32) { GP_INDT(4) } },
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{ PINMUX_DATA_REG("INDT5", 0xE605500C, 32) { GP_INDT(5) } },
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{ },
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};
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@ -3931,8 +3803,6 @@ const struct sh_pfc_soc_info r8a7790_pinmux_info = {
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.name = "r8a77900_pfc",
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.unlock_reg = 0xe6060000, /* PMMR */
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.input = { PINMUX_INPUT_BEGIN, PINMUX_INPUT_END },
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.output = { PINMUX_OUTPUT_BEGIN, PINMUX_OUTPUT_END },
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.function = { PINMUX_FUNCTION_BEGIN, PINMUX_FUNCTION_END },
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.pins = pinmux_pins,
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@ -3946,7 +3816,6 @@ const struct sh_pfc_soc_info r8a7790_pinmux_info = {
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.nr_func_gpios = ARRAY_SIZE(pinmux_func_gpios),
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.cfg_regs = pinmux_config_regs,
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.data_regs = pinmux_data_regs,
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.gpio_data = pinmux_data,
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.gpio_data_size = ARRAY_SIZE(pinmux_data),
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