This pull request contains Broadcom ARM-based SoCs Device Tree changes

for 6.5, please pull the following:
 
 - Krzysztof adds missing cache properties for the BCM63xx DSL routers
 
 - Rafal relicenses a number of the BCM5301X DTS files to the GPL 2.0+ / MIT license,
   and he fixes a number of Device Tree nodes warnings, adds MAC address
   for all Luxul routers and adds Netgear R8000 Wi-Fi regulatory
   information to the DTS
 
 - Stanislav updates the "BCM mobile" SoCs DTS files to fix various
   warnings
 
 - Aurelien enables the BCM283x DTS files to be built with relocation
   information to make them usable with DT overlays
 
 - Christian fixes the Meraki DTS to have correct NAND ECC properties,
   correct partition numbers and fixed-link node(s) properties
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Merge tag 'arm-soc/for-6.5/devicetree' of https://github.com/Broadcom/stblinux into soc/dt

This pull request contains Broadcom ARM-based SoCs Device Tree changes
for 6.5, please pull the following:

- Krzysztof adds missing cache properties for the BCM63xx DSL routers

- Rafal relicenses a number of the BCM5301X DTS files to the GPL 2.0+ / MIT license,
  and he fixes a number of Device Tree nodes warnings, adds MAC address
  for all Luxul routers and adds Netgear R8000 Wi-Fi regulatory
  information to the DTS

- Stanislav updates the "BCM mobile" SoCs DTS files to fix various
  warnings

- Aurelien enables the BCM283x DTS files to be built with relocation
  information to make them usable with DT overlays

- Christian fixes the Meraki DTS to have correct NAND ECC properties,
  correct partition numbers and fixed-link node(s) properties

* tag 'arm-soc/for-6.5/devicetree' of https://github.com/Broadcom/stblinux: (33 commits)
  ARM: dts: BCM5301X: Add cells sizes to PCIe nodes
  dt-bindings: firmware: brcm,kona-smc: convert to YAML
  ARM: dts: BCM5301X: Add Netgear R8000 WiFi regulator mappings
  dt-bindings: net: wireless: brcm,bcm4329-fmac: allow generic properties
  dt-bindings: net: wireless: brcm,bcm4329-fmac: add BCM4366 binding
  ARM: dts: BCM5301X: fix duplex-full => full-duplex
  ARM: dts: BCM5301X: MR32: remove partition index numbers
  ARM: dts: BCM5301X: MR26: MR32: remove bogus nand-ecc-algo property
  dt-bindings: power: reset: bcm21664-resetmgr: convert to YAML
  ARM: dts: bcm21664-garnet: use node labels
  ARM: dts: bcm11351/21664: add UART, I2C node labels
  ARM: dts: bcm-mobile: move status properties to the end of nodes
  ARM: dts: bcm21664/23550: use CCU compatibles directly
  ARM: dts: bcm-mobile: change "" includes to <> where applicable
  ARM: dts: BCM5301X: Describe switch ports in the main DTS
  ARM: dts: BCM5301X: Relicense Christian's code to the GPL 2.0+ / MIT
  ARM: dts: BCM5301X: Drop invalid properties from Meraki MR32 keys
  ARM: dts: BCM5301X: Drop invalid #usb-cells
  dt-bindings: arm: bcm: Add bindings for Buffalo WZR-1166DHP(2)
  ARM: dts: BCM5301X: Use updated "spi-gpio" binding properties
  ...

Link: https://lore.kernel.org/r/20230619134920.3384844-1-florian.fainelli@broadcom.com
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
This commit is contained in:
Arnd Bergmann 2023-06-20 23:04:37 +02:00
commit 313c22bb31
47 changed files with 859 additions and 729 deletions

View file

@ -25,13 +25,15 @@ properties:
- enum:
- asus,rt-ac56u
- asus,rt-ac68u
- buffalo,wzr-1166dhp
- buffalo,wzr-1166dhp2
- buffalo,wzr-1750dhp
- linksys,ea6300-v1
- linksys,ea6500-v2
- luxul,xap-1510v1
- luxul,xap-1510-v1
- luxul,xwc-1000
- netgear,r6250v1
- netgear,r6300v2
- netgear,r6250-v1
- netgear,r6300-v2
- smartrg,sr400ac
- brcm,bcm94708
- const: brcm,bcm4708
@ -42,8 +44,8 @@ properties:
- asus,rt-n18u
- buffalo,wzr-600dhp2
- buffalo,wzr-900dhp
- luxul,xap-1410v1
- luxul,xwr-1200v1
- luxul,xap-1410-v1
- luxul,xwr-1200-v1
- tplink,archer-c5-v2
- const: brcm,bcm47081
- const: brcm,bcm4708
@ -72,7 +74,7 @@ properties:
- luxul,xap-1610-v1
- luxul,xbr-4500-v1
- luxul,xwc-2000-v1
- luxul,xwr-3100v1
- luxul,xwr-3100-v1
- luxul,xwr-3150-v1
- netgear,r8500
- phicomm,k3

View file

@ -0,0 +1,39 @@
# SPDX-License-Identifier: GPL-2.0-only OR BSD-2-Clause
%YAML 1.2
---
$id: http://devicetree.org/schemas/firmware/brcm,kona-smc.yaml#
$schema: http://devicetree.org/meta-schemas/core.yaml#
title: Broadcom Kona family Secure Monitor bounce buffer
description:
A bounce buffer used for non-secure to secure communications.
maintainers:
- Florian Fainelli <f.fainelli@gmail.com>
properties:
compatible:
items:
- enum:
- brcm,bcm11351-smc
- brcm,bcm21664-smc
- brcm,bcm23550-smc
- const: brcm,kona-smc
reg:
maxItems: 1
required:
- compatible
- reg
additionalProperties: false
examples:
- |
smc@3404c000 {
compatible = "brcm,bcm11351-smc", "brcm,kona-smc";
reg = <0x3404c000 0x400>; /* 1 KiB in SRAM */
};
...

View file

@ -1,15 +0,0 @@
Broadcom Secure Monitor Bounce buffer
-----------------------------------------------------
This binding defines the location of the bounce buffer
used for non-secure to secure communications.
Required properties:
- compatible : "brcm,kona-smc"
- DEPRECATED: compatible : "bcm,kona-smc"
- reg : Location and size of bounce buffer
Example:
smc@3404c000 {
compatible = "brcm,bcm11351-smc", "brcm,kona-smc";
reg = <0x3404c000 0x400>; //1 KiB in SRAM
};

View file

@ -15,6 +15,9 @@ description:
These chips also have a Bluetooth portion described in a separate
binding.
allOf:
- $ref: ieee80211.yaml#
properties:
compatible:
oneOf:
@ -38,6 +41,7 @@ properties:
- brcm,bcm4354-fmac
- brcm,bcm4356-fmac
- brcm,bcm4359-fmac
- brcm,bcm4366-fmac
- cypress,cyw4373-fmac
- cypress,cyw43012-fmac
- const: brcm,bcm4329-fmac
@ -120,7 +124,7 @@ required:
- compatible
- reg
additionalProperties: false
unevaluatedProperties: false
examples:
- |

View file

@ -1,14 +0,0 @@
Broadcom Kona Family Reset Manager
----------------------------------
The reset manager is used on the Broadcom BCM21664 SoC.
Required properties:
- compatible: brcm,bcm21664-resetmgr
- reg: memory address & range
Example:
brcm,resetmgr@35001f00 {
compatible = "brcm,bcm21664-resetmgr";
reg = <0x35001f00 0x24>;
};

View file

@ -0,0 +1,31 @@
# SPDX-License-Identifier: GPL-2.0-only OR BSD-2-Clause
%YAML 1.2
---
$id: http://devicetree.org/schemas/power/reset/brcm,bcm21664-resetmgr.yaml#
$schema: http://devicetree.org/meta-schemas/core.yaml#
title: Broadcom Kona family reset manager
maintainers:
- Florian Fainelli <f.fainelli@gmail.com>
properties:
compatible:
const: brcm,bcm21664-resetmgr
reg:
maxItems: 1
required:
- compatible
- reg
additionalProperties: false
examples:
- |
reset-controller@35001f00 {
compatible = "brcm,bcm21664-resetmgr";
reg = <0x35001f00 0x24>;
};
...

View file

@ -0,0 +1,35 @@
# SPDX-License-Identifier: GPL-2.0-only OR BSD-2-Clause
%YAML 1.2
---
$id: http://devicetree.org/schemas/soc/bcm/brcm,bcm23550-cdc.yaml#
$schema: http://devicetree.org/meta-schemas/core.yaml#
title: Broadcom BCM23550 Cluster Dormant Control
description:
The Cluster Dormant Control block keeps the CPU in idle state. A command
needs to be sent to this block to bring the CPU into running state.
maintainers:
- Florian Fainelli <f.fainelli@gmail.com>
properties:
compatible:
const: brcm,bcm23550-cdc
reg:
maxItems: 1
required:
- compatible
- reg
additionalProperties: false
examples:
- |
cdc@3fe0e000 {
compatible = "brcm,bcm23550-cdc";
reg = <0x3fe0e000 0x78>;
};
...

View file

@ -3961,6 +3961,7 @@ M: Rafał Miłecki <zajec5@gmail.com>
R: Broadcom internal kernel review list <bcm-kernel-feedback-list@broadcom.com>
L: linux-arm-kernel@lists.infradead.org (moderated for non-subscribers)
S: Maintained
F: arch/arm/boot/dts/bcm-ns.dtsi
F: arch/arm/boot/dts/bcm470*
F: arch/arm/boot/dts/bcm5301*
F: arch/arm/boot/dts/bcm953012*

View file

@ -99,6 +99,24 @@ dtb-$(CONFIG_SOC_SP7021) += \
sunplus-sp7021-demo-v3.dtb
dtb-$(CONFIG_ARCH_AXXIA) += \
axm5516-amarillo.dtb
# Enables support for device-tree overlays
DTC_FLAGS_bcm2835-rpi-b := -@
DTC_FLAGS_bcm2835-rpi-a := -@
DTC_FLAGS_bcm2835-rpi-b-rev2 := -@
DTC_FLAGS_bcm2835-rpi-b-plus := -@
DTC_FLAGS_bcm2835-rpi-a-plus := -@
DTC_FLAGS_bcm2835-rpi-cm1-io1 := -@
DTC_FLAGS_bcm2836-rpi-2-b := -@
DTC_FLAGS_bcm2837-rpi-3-a-plus := -@
DTC_FLAGS_bcm2837-rpi-3-b := -@
DTC_FLAGS_bcm2837-rpi-3-b-plus := -@
DTC_FLAGS_bcm2837-rpi-cm3-io3 := -@
DTC_FLAGS_bcm2837-rpi-zero-2-w := -@
DTC_FLAGS_bcm2711-rpi-400 := -@
DTC_FLAGS_bcm2711-rpi-4-b := -@
DTC_FLAGS_bcm2711-rpi-cm4-io := -@
DTC_FLAGS_bcm2835-rpi-zero := -@
DTC_FLAGS_bcm2835-rpi-zero-w := -@
dtb-$(CONFIG_ARCH_BCM2835) += \
bcm2835-rpi-b.dtb \
bcm2835-rpi-a.dtb \

View file

@ -0,0 +1,464 @@
// SPDX-License-Identifier: GPL-2.0-or-later OR MIT
/*
* Copyright 2013-2014 Hauke Mehrtens <hauke@hauke-m.de>
*/
#include <dt-bindings/clock/bcm-nsp.h>
#include <dt-bindings/gpio/gpio.h>
#include <dt-bindings/input/input.h>
#include <dt-bindings/interrupt-controller/irq.h>
#include <dt-bindings/interrupt-controller/arm-gic.h>
/ {
interrupt-parent = <&gic>;
#address-cells = <1>;
#size-cells = <1>;
chipcommon-a-bus@18000000 {
compatible = "simple-bus";
ranges = <0x00000000 0x18000000 0x00001000>;
#address-cells = <1>;
#size-cells = <1>;
uart0: serial@300 {
compatible = "ns16550";
reg = <0x0300 0x100>;
interrupts = <GIC_SPI 85 IRQ_TYPE_LEVEL_HIGH>;
clocks = <&iprocslow>;
status = "disabled";
};
uart1: serial@400 {
compatible = "ns16550";
reg = <0x0400 0x100>;
interrupts = <GIC_SPI 85 IRQ_TYPE_LEVEL_HIGH>;
clocks = <&iprocslow>;
pinctrl-names = "default";
pinctrl-0 = <&pinmux_uart1>;
status = "disabled";
};
};
mpcore-bus@19000000 {
compatible = "simple-bus";
ranges = <0x00000000 0x19000000 0x00023000>;
#address-cells = <1>;
#size-cells = <1>;
scu@20000 {
compatible = "arm,cortex-a9-scu";
reg = <0x20000 0x100>;
};
timer@20200 {
compatible = "arm,cortex-a9-global-timer";
reg = <0x20200 0x100>;
interrupts = <GIC_PPI 11 IRQ_TYPE_EDGE_RISING>;
clocks = <&periph_clk>;
};
timer@20600 {
compatible = "arm,cortex-a9-twd-timer";
reg = <0x20600 0x20>;
interrupts = <GIC_PPI 13 (GIC_CPU_MASK_SIMPLE(2) |
IRQ_TYPE_EDGE_RISING)>;
clocks = <&periph_clk>;
};
gic: interrupt-controller@21000 {
compatible = "arm,cortex-a9-gic";
#interrupt-cells = <3>;
#address-cells = <0>;
interrupt-controller;
reg = <0x21000 0x1000>,
<0x20100 0x100>;
};
L2: cache-controller@22000 {
compatible = "arm,pl310-cache";
reg = <0x22000 0x1000>;
cache-unified;
arm,shared-override;
prefetch-data = <1>;
prefetch-instr = <1>;
cache-level = <2>;
};
};
axi@18000000 {
compatible = "brcm,bus-axi";
reg = <0x18000000 0x1000>;
ranges = <0x00000000 0x18000000 0x00100000>;
#address-cells = <1>;
#size-cells = <1>;
#interrupt-cells = <1>;
interrupt-map-mask = <0x000fffff 0xffff>;
interrupt-map =
/* ChipCommon */
<0x00000000 0 &gic GIC_SPI 85 IRQ_TYPE_LEVEL_HIGH>,
/* Switch Register Access Block */
<0x00007000 0 &gic GIC_SPI 95 IRQ_TYPE_LEVEL_HIGH>,
<0x00007000 1 &gic GIC_SPI 96 IRQ_TYPE_LEVEL_HIGH>,
<0x00007000 2 &gic GIC_SPI 97 IRQ_TYPE_LEVEL_HIGH>,
<0x00007000 3 &gic GIC_SPI 98 IRQ_TYPE_LEVEL_HIGH>,
<0x00007000 4 &gic GIC_SPI 99 IRQ_TYPE_LEVEL_HIGH>,
<0x00007000 5 &gic GIC_SPI 100 IRQ_TYPE_LEVEL_HIGH>,
<0x00007000 6 &gic GIC_SPI 101 IRQ_TYPE_LEVEL_HIGH>,
<0x00007000 7 &gic GIC_SPI 102 IRQ_TYPE_LEVEL_HIGH>,
<0x00007000 8 &gic GIC_SPI 103 IRQ_TYPE_LEVEL_HIGH>,
<0x00007000 9 &gic GIC_SPI 104 IRQ_TYPE_LEVEL_HIGH>,
<0x00007000 10 &gic GIC_SPI 105 IRQ_TYPE_LEVEL_HIGH>,
<0x00007000 11 &gic GIC_SPI 106 IRQ_TYPE_LEVEL_HIGH>,
<0x00007000 12 &gic GIC_SPI 107 IRQ_TYPE_LEVEL_HIGH>,
/* PCIe Controller 0 */
<0x00012000 0 &gic GIC_SPI 126 IRQ_TYPE_LEVEL_HIGH>,
<0x00012000 1 &gic GIC_SPI 127 IRQ_TYPE_LEVEL_HIGH>,
<0x00012000 2 &gic GIC_SPI 128 IRQ_TYPE_LEVEL_HIGH>,
<0x00012000 3 &gic GIC_SPI 129 IRQ_TYPE_LEVEL_HIGH>,
<0x00012000 4 &gic GIC_SPI 130 IRQ_TYPE_LEVEL_HIGH>,
<0x00012000 5 &gic GIC_SPI 131 IRQ_TYPE_LEVEL_HIGH>,
/* PCIe Controller 1 */
<0x00013000 0 &gic GIC_SPI 132 IRQ_TYPE_LEVEL_HIGH>,
<0x00013000 1 &gic GIC_SPI 133 IRQ_TYPE_LEVEL_HIGH>,
<0x00013000 2 &gic GIC_SPI 134 IRQ_TYPE_LEVEL_HIGH>,
<0x00013000 3 &gic GIC_SPI 135 IRQ_TYPE_LEVEL_HIGH>,
<0x00013000 4 &gic GIC_SPI 136 IRQ_TYPE_LEVEL_HIGH>,
<0x00013000 5 &gic GIC_SPI 137 IRQ_TYPE_LEVEL_HIGH>,
/* PCIe Controller 2 */
<0x00014000 0 &gic GIC_SPI 138 IRQ_TYPE_LEVEL_HIGH>,
<0x00014000 1 &gic GIC_SPI 138 IRQ_TYPE_LEVEL_HIGH>,
<0x00014000 2 &gic GIC_SPI 140 IRQ_TYPE_LEVEL_HIGH>,
<0x00014000 3 &gic GIC_SPI 141 IRQ_TYPE_LEVEL_HIGH>,
<0x00014000 4 &gic GIC_SPI 142 IRQ_TYPE_LEVEL_HIGH>,
<0x00014000 5 &gic GIC_SPI 143 IRQ_TYPE_LEVEL_HIGH>,
/* USB 2.0 Controller */
<0x00021000 0 &gic GIC_SPI 79 IRQ_TYPE_LEVEL_HIGH>,
/* USB 3.0 Controller */
<0x00023000 0 &gic GIC_SPI 80 IRQ_TYPE_LEVEL_HIGH>,
/* Ethernet Controller 0 */
<0x00024000 0 &gic GIC_SPI 147 IRQ_TYPE_LEVEL_HIGH>,
/* Ethernet Controller 1 */
<0x00025000 0 &gic GIC_SPI 148 IRQ_TYPE_LEVEL_HIGH>,
/* Ethernet Controller 2 */
<0x00026000 0 &gic GIC_SPI 149 IRQ_TYPE_LEVEL_HIGH>,
/* Ethernet Controller 3 */
<0x00027000 0 &gic GIC_SPI 150 IRQ_TYPE_LEVEL_HIGH>,
/* NAND Controller */
<0x00028000 0 &gic GIC_SPI 64 IRQ_TYPE_LEVEL_HIGH>,
<0x00028000 1 &gic GIC_SPI 65 IRQ_TYPE_LEVEL_HIGH>,
<0x00028000 2 &gic GIC_SPI 66 IRQ_TYPE_LEVEL_HIGH>,
<0x00028000 3 &gic GIC_SPI 67 IRQ_TYPE_LEVEL_HIGH>,
<0x00028000 4 &gic GIC_SPI 68 IRQ_TYPE_LEVEL_HIGH>,
<0x00028000 5 &gic GIC_SPI 69 IRQ_TYPE_LEVEL_HIGH>,
<0x00028000 6 &gic GIC_SPI 70 IRQ_TYPE_LEVEL_HIGH>,
<0x00028000 7 &gic GIC_SPI 71 IRQ_TYPE_LEVEL_HIGH>;
chipcommon: chipcommon@0 {
reg = <0x00000000 0x1000>;
gpio-controller;
#gpio-cells = <2>;
interrupt-controller;
#interrupt-cells = <2>;
};
pcie0: pcie@12000 {
reg = <0x00012000 0x1000>;
#address-cells = <3>;
#size-cells = <2>;
};
pcie1: pcie@13000 {
reg = <0x00013000 0x1000>;
#address-cells = <3>;
#size-cells = <2>;
};
pcie2: pcie@14000 {
reg = <0x00014000 0x1000>;
#address-cells = <3>;
#size-cells = <2>;
};
usb2: usb2@21000 {
reg = <0x00021000 0x1000>;
#address-cells = <1>;
#size-cells = <1>;
ranges;
interrupt-parent = <&gic>;
ehci: usb@21000 {
compatible = "generic-ehci";
reg = <0x00021000 0x1000>;
interrupts = <GIC_SPI 79 IRQ_TYPE_LEVEL_HIGH>;
phys = <&usb2_phy>;
#address-cells = <1>;
#size-cells = <0>;
ehci_port1: port@1 {
reg = <1>;
#trigger-source-cells = <0>;
};
ehci_port2: port@2 {
reg = <2>;
#trigger-source-cells = <0>;
};
};
ohci: usb@22000 {
compatible = "generic-ohci";
reg = <0x00022000 0x1000>;
interrupts = <GIC_SPI 79 IRQ_TYPE_LEVEL_HIGH>;
#address-cells = <1>;
#size-cells = <0>;
ohci_port1: port@1 {
reg = <1>;
#trigger-source-cells = <0>;
};
ohci_port2: port@2 {
reg = <2>;
#trigger-source-cells = <0>;
};
};
};
usb3: usb3@23000 {
reg = <0x00023000 0x1000>;
#address-cells = <1>;
#size-cells = <1>;
ranges;
interrupt-parent = <&gic>;
xhci: usb@23000 {
compatible = "generic-xhci";
reg = <0x00023000 0x1000>;
interrupts = <GIC_SPI 80 IRQ_TYPE_LEVEL_HIGH>;
phys = <&usb3_phy>;
phy-names = "usb";
#address-cells = <1>;
#size-cells = <0>;
xhci_port1: port@1 {
reg = <1>;
#trigger-source-cells = <0>;
};
};
};
gmac0: ethernet@24000 {
reg = <0x24000 0x800>;
};
gmac1: ethernet@25000 {
reg = <0x25000 0x800>;
};
gmac2: ethernet@26000 {
reg = <0x26000 0x800>;
};
gmac3: ethernet@27000 {
reg = <0x27000 0x800>;
};
};
pwm: pwm@18002000 {
compatible = "brcm,iproc-pwm";
reg = <0x18002000 0x28>;
clocks = <&osc>;
#pwm-cells = <3>;
status = "disabled";
};
mdio: mdio@18003000 {
compatible = "brcm,iproc-mdio";
reg = <0x18003000 0x8>;
#size-cells = <0>;
#address-cells = <1>;
};
rng: rng@18004000 {
compatible = "brcm,bcm5301x-rng";
reg = <0x18004000 0x14>;
};
srab: ethernet-switch@18007000 {
compatible = "brcm,bcm53011-srab", "brcm,bcm5301x-srab";
reg = <0x18007000 0x1000>;
status = "disabled";
ports {
#address-cells = <1>;
#size-cells = <0>;
port@0 {
reg = <0>;
};
port@1 {
reg = <1>;
};
port@2 {
reg = <2>;
};
port@3 {
reg = <3>;
};
port@4 {
reg = <4>;
};
port@5 {
reg = <5>;
ethernet = <&gmac0>;
};
port@7 {
reg = <7>;
ethernet = <&gmac1>;
};
port@8 {
reg = <8>;
ethernet = <&gmac2>;
fixed-link {
speed = <1000>;
full-duplex;
};
};
};
};
uart2: serial@18008000 {
compatible = "ns16550a";
reg = <0x18008000 0x20>;
clocks = <&iprocslow>;
interrupts = <GIC_SPI 86 IRQ_TYPE_LEVEL_HIGH>;
reg-shift = <2>;
status = "disabled";
};
dmu-bus@1800c000 {
compatible = "simple-bus";
ranges = <0 0x1800c000 0x1000>;
#address-cells = <1>;
#size-cells = <1>;
cru-bus@100 {
compatible = "brcm,ns-cru", "simple-mfd";
reg = <0x100 0x1a4>;
ranges;
#address-cells = <1>;
#size-cells = <1>;
usb2_phy: phy@164 {
compatible = "brcm,ns-usb2-phy";
reg = <0x164 0x4>;
brcm,syscon-clkset = <&cru_clkset>;
clocks = <&genpll BCM_NSP_GENPLL_USB_PHY_REF_CLK>;
clock-names = "phy-ref-clk";
#phy-cells = <0>;
};
cru_clkset: syscon@180 {
compatible = "brcm,cru-clkset", "syscon";
reg = <0x180 0x4>;
};
pinctrl: pinctrl@1c0 {
compatible = "brcm,bcm4708-pinmux";
reg = <0x1c0 0x24>;
reg-names = "cru_gpio_control";
spi-pins {
groups = "spi_grp";
function = "spi";
};
pinmux_i2c: i2c-pins {
groups = "i2c_grp";
function = "i2c";
};
pinmux_pwm: pwm-pins {
groups = "pwm0_grp", "pwm1_grp",
"pwm2_grp", "pwm3_grp";
function = "pwm";
};
pinmux_uart1: uart1-pins {
groups = "uart1_grp";
function = "uart1";
};
};
thermal: thermal@2c0 {
compatible = "brcm,ns-thermal";
reg = <0x2c0 0x10>;
#thermal-sensor-cells = <0>;
};
};
};
nand_controller: nand-controller@18028000 {
compatible = "brcm,nand-iproc", "brcm,brcmnand-v6.1", "brcm,brcmnand";
reg = <0x18028000 0x600>, <0x1811a408 0x600>, <0x18028f00 0x20>;
reg-names = "nand", "iproc-idm", "iproc-ext";
interrupts = <GIC_SPI 68 IRQ_TYPE_LEVEL_HIGH>;
#address-cells = <1>;
#size-cells = <0>;
brcm,nand-has-wp;
};
thermal-zones {
cpu_thermal: cpu-thermal {
polling-delay-passive = <0>;
polling-delay = <1000>;
coefficients = <(-556) 418000>;
thermal-sensors = <&thermal>;
trips {
cpu-crit {
temperature = <125000>;
hysteresis = <0>;
type = "critical";
};
};
cooling-maps {
};
};
};
};

View file

@ -1,11 +1,10 @@
// SPDX-License-Identifier: GPL-2.0-only
// Copyright (C) 2012-2013 Broadcom Corporation
#include <dt-bindings/clock/bcm281xx.h>
#include <dt-bindings/interrupt-controller/arm-gic.h>
#include <dt-bindings/interrupt-controller/irq.h>
#include "dt-bindings/clock/bcm281xx.h"
/ {
#address-cells = <1>;
#size-cells = <1>;
@ -50,44 +49,44 @@ smc@3404c000 {
reg = <0x3404c000 0x400>; /* 1 KiB in SRAM */
};
serial@3e000000 {
uartb: serial@3e000000 {
compatible = "brcm,bcm11351-dw-apb-uart", "snps,dw-apb-uart";
status = "disabled";
reg = <0x3e000000 0x1000>;
clocks = <&slave_ccu BCM281XX_SLAVE_CCU_UARTB>;
interrupts = <GIC_SPI 67 IRQ_TYPE_LEVEL_HIGH>;
reg-shift = <2>;
reg-io-width = <4>;
status = "disabled";
};
serial@3e001000 {
uartb2: serial@3e001000 {
compatible = "brcm,bcm11351-dw-apb-uart", "snps,dw-apb-uart";
status = "disabled";
reg = <0x3e001000 0x1000>;
clocks = <&slave_ccu BCM281XX_SLAVE_CCU_UARTB2>;
interrupts = <GIC_SPI 66 IRQ_TYPE_LEVEL_HIGH>;
reg-shift = <2>;
reg-io-width = <4>;
status = "disabled";
};
serial@3e002000 {
uartb3: serial@3e002000 {
compatible = "brcm,bcm11351-dw-apb-uart", "snps,dw-apb-uart";
status = "disabled";
reg = <0x3e002000 0x1000>;
clocks = <&slave_ccu BCM281XX_SLAVE_CCU_UARTB3>;
interrupts = <GIC_SPI 65 IRQ_TYPE_LEVEL_HIGH>;
reg-shift = <2>;
reg-io-width = <4>;
status = "disabled";
};
serial@3e003000 {
uartb4: serial@3e003000 {
compatible = "brcm,bcm11351-dw-apb-uart", "snps,dw-apb-uart";
status = "disabled";
reg = <0x3e003000 0x1000>;
clocks = <&slave_ccu BCM281XX_SLAVE_CCU_UARTB4>;
interrupts = <GIC_SPI 64 IRQ_TYPE_LEVEL_HIGH>;
reg-shift = <2>;
reg-io-width = <4>;
status = "disabled";
};
L2: l2-cache@3ff20000 {
@ -125,7 +124,7 @@ GIC_SPI 112 IRQ_TYPE_LEVEL_HIGH
interrupt-controller;
};
sdio1: sdio@3f180000 {
sdio1: mmc@3f180000 {
compatible = "brcm,kona-sdhci";
reg = <0x3f180000 0x10000>;
interrupts = <GIC_SPI 77 IRQ_TYPE_LEVEL_HIGH>;
@ -133,7 +132,7 @@ sdio1: sdio@3f180000 {
status = "disabled";
};
sdio2: sdio@3f190000 {
sdio2: mmc@3f190000 {
compatible = "brcm,kona-sdhci";
reg = <0x3f190000 0x10000>;
interrupts = <GIC_SPI 76 IRQ_TYPE_LEVEL_HIGH>;
@ -141,7 +140,7 @@ sdio2: sdio@3f190000 {
status = "disabled";
};
sdio3: sdio@3f1a0000 {
sdio3: mmc@3f1a0000 {
compatible = "brcm,kona-sdhci";
reg = <0x3f1a0000 0x10000>;
interrupts = <GIC_SPI 74 IRQ_TYPE_LEVEL_HIGH>;
@ -149,7 +148,7 @@ sdio3: sdio@3f1a0000 {
status = "disabled";
};
sdio4: sdio@3f1b0000 {
sdio4: mmc@3f1b0000 {
compatible = "brcm,kona-sdhci";
reg = <0x3f1b0000 0x10000>;
interrupts = <GIC_SPI 73 IRQ_TYPE_LEVEL_HIGH>;
@ -162,7 +161,7 @@ pinctrl@35004800 {
reg = <0x35004800 0x430>;
};
i2c@3e016000 {
bsc1: i2c@3e016000 {
compatible = "brcm,bcm11351-i2c", "brcm,kona-i2c";
reg = <0x3e016000 0x80>;
interrupts = <GIC_SPI 103 IRQ_TYPE_LEVEL_HIGH>;
@ -172,7 +171,7 @@ i2c@3e016000 {
status = "disabled";
};
i2c@3e017000 {
bsc2: i2c@3e017000 {
compatible = "brcm,bcm11351-i2c", "brcm,kona-i2c";
reg = <0x3e017000 0x80>;
interrupts = <GIC_SPI 102 IRQ_TYPE_LEVEL_HIGH>;
@ -182,7 +181,7 @@ i2c@3e017000 {
status = "disabled";
};
i2c@3e018000 {
bsc3: i2c@3e018000 {
compatible = "brcm,bcm11351-i2c", "brcm,kona-i2c";
reg = <0x3e018000 0x80>;
interrupts = <GIC_SPI 169 IRQ_TYPE_LEVEL_HIGH>;
@ -192,7 +191,7 @@ i2c@3e018000 {
status = "disabled";
};
i2c@3500d000 {
pmu_bsc: i2c@3500d000 {
compatible = "brcm,bcm11351-i2c", "brcm,kona-i2c";
reg = <0x3500d000 0x80>;
interrupts = <GIC_SPI 14 IRQ_TYPE_LEVEL_HIGH>;

View file

@ -15,33 +15,33 @@ memory@80000000 {
device_type = "memory";
reg = <0x80000000 0x40000000>; /* 1 GB */
};
serial@3e000000 {
status = "okay";
};
sdio1: sdio@3f180000 {
max-frequency = <48000000>;
status = "okay";
};
sdio2: sdio@3f190000 {
non-removable;
max-frequency = <48000000>;
status = "okay";
};
sdio4: sdio@3f1b0000 {
max-frequency = <48000000>;
cd-gpios = <&gpio 91 GPIO_ACTIVE_LOW>;
status = "okay";
};
usbotg: usb@3f120000 {
status = "okay";
};
usbphy: usb-phy@3f130000 {
status = "okay";
};
};
&sdio1 {
max-frequency = <48000000>;
status = "okay";
};
&sdio2 {
non-removable;
max-frequency = <48000000>;
status = "okay";
};
&sdio4 {
max-frequency = <48000000>;
cd-gpios = <&gpio 91 GPIO_ACTIVE_LOW>;
status = "okay";
};
&uartb {
status = "okay";
};
&usbotg {
status = "okay";
};
&usbphy {
status = "okay";
};

View file

@ -1,11 +1,10 @@
// SPDX-License-Identifier: GPL-2.0-only
// Copyright (C) 2014 Broadcom Corporation
#include <dt-bindings/clock/bcm21664.h>
#include <dt-bindings/interrupt-controller/arm-gic.h>
#include <dt-bindings/interrupt-controller/irq.h>
#include "dt-bindings/clock/bcm21664.h"
/ {
#address-cells = <1>;
#size-cells = <1>;
@ -50,34 +49,34 @@ smc@3404e000 {
reg = <0x3404e000 0x400>; /* 1 KiB in SRAM */
};
serial@3e000000 {
uartb: serial@3e000000 {
compatible = "brcm,bcm21664-dw-apb-uart", "snps,dw-apb-uart";
status = "disabled";
reg = <0x3e000000 0x118>;
clocks = <&slave_ccu BCM21664_SLAVE_CCU_UARTB>;
interrupts = <GIC_SPI 67 IRQ_TYPE_LEVEL_HIGH>;
reg-shift = <2>;
reg-io-width = <4>;
status = "disabled";
};
serial@3e001000 {
uartb2: serial@3e001000 {
compatible = "brcm,bcm21664-dw-apb-uart", "snps,dw-apb-uart";
status = "disabled";
reg = <0x3e001000 0x118>;
clocks = <&slave_ccu BCM21664_SLAVE_CCU_UARTB2>;
interrupts = <GIC_SPI 66 IRQ_TYPE_LEVEL_HIGH>;
reg-shift = <2>;
reg-io-width = <4>;
status = "disabled";
};
serial@3e002000 {
uartb3: serial@3e002000 {
compatible = "brcm,bcm21664-dw-apb-uart", "snps,dw-apb-uart";
status = "disabled";
reg = <0x3e002000 0x118>;
clocks = <&slave_ccu BCM21664_SLAVE_CCU_UARTB3>;
interrupts = <GIC_SPI 65 IRQ_TYPE_LEVEL_HIGH>;
reg-shift = <2>;
reg-io-width = <4>;
status = "disabled";
};
L2: cache-controller@3ff20000 {
@ -113,7 +112,7 @@ GIC_SPI 114 IRQ_TYPE_LEVEL_HIGH
interrupt-controller;
};
sdio1: sdio@3f180000 {
sdio1: mmc@3f180000 {
compatible = "brcm,kona-sdhci";
reg = <0x3f180000 0x801c>;
interrupts = <GIC_SPI 77 IRQ_TYPE_LEVEL_HIGH>;
@ -121,7 +120,7 @@ sdio1: sdio@3f180000 {
status = "disabled";
};
sdio2: sdio@3f190000 {
sdio2: mmc@3f190000 {
compatible = "brcm,kona-sdhci";
reg = <0x3f190000 0x801c>;
interrupts = <GIC_SPI 76 IRQ_TYPE_LEVEL_HIGH>;
@ -129,7 +128,7 @@ sdio2: sdio@3f190000 {
status = "disabled";
};
sdio3: sdio@3f1a0000 {
sdio3: mmc@3f1a0000 {
compatible = "brcm,kona-sdhci";
reg = <0x3f1a0000 0x801c>;
interrupts = <GIC_SPI 74 IRQ_TYPE_LEVEL_HIGH>;
@ -137,7 +136,7 @@ sdio3: sdio@3f1a0000 {
status = "disabled";
};
sdio4: sdio@3f1b0000 {
sdio4: mmc@3f1b0000 {
compatible = "brcm,kona-sdhci";
reg = <0x3f1b0000 0x801c>;
interrupts = <GIC_SPI 73 IRQ_TYPE_LEVEL_HIGH>;
@ -145,7 +144,7 @@ sdio4: sdio@3f1b0000 {
status = "disabled";
};
i2c@3e016000 {
bsc1: i2c@3e016000 {
compatible = "brcm,bcm21664-i2c", "brcm,kona-i2c";
reg = <0x3e016000 0x70>;
interrupts = <GIC_SPI 103 IRQ_TYPE_LEVEL_HIGH>;
@ -155,7 +154,7 @@ i2c@3e016000 {
status = "disabled";
};
i2c@3e017000 {
bsc2: i2c@3e017000 {
compatible = "brcm,bcm21664-i2c", "brcm,kona-i2c";
reg = <0x3e017000 0x70>;
interrupts = <GIC_SPI 102 IRQ_TYPE_LEVEL_HIGH>;
@ -165,7 +164,7 @@ i2c@3e017000 {
status = "disabled";
};
i2c@3e018000 {
bsc3: i2c@3e018000 {
compatible = "brcm,bcm21664-i2c", "brcm,kona-i2c";
reg = <0x3e018000 0x70>;
interrupts = <GIC_SPI 169 IRQ_TYPE_LEVEL_HIGH>;
@ -175,7 +174,7 @@ i2c@3e018000 {
status = "disabled";
};
i2c@3e01c000 {
bsc4: i2c@3e01c000 {
compatible = "brcm,bcm21664-i2c", "brcm,kona-i2c";
reg = <0x3e01c000 0x70>;
interrupts = <GIC_SPI 170 IRQ_TYPE_LEVEL_HIGH>;
@ -286,21 +285,21 @@ var_156m_clk: var_156m {
};
root_ccu: root_ccu@35001000 {
compatible = BCM21664_DT_ROOT_CCU_COMPAT;
compatible = "brcm,bcm21664-root-ccu";
reg = <0x35001000 0x0f00>;
#clock-cells = <1>;
clock-output-names = "frac_1m";
};
aon_ccu: aon_ccu@35002000 {
compatible = BCM21664_DT_AON_CCU_COMPAT;
compatible = "brcm,bcm21664-aon-ccu";
reg = <0x35002000 0x0f00>;
#clock-cells = <1>;
clock-output-names = "hub_timer";
};
master_ccu: master_ccu@3f001000 {
compatible = BCM21664_DT_MASTER_CCU_COMPAT;
compatible = "brcm,bcm21664-master-ccu";
reg = <0x3f001000 0x0f00>;
#clock-cells = <1>;
clock-output-names = "sdio1",
@ -314,7 +313,7 @@ master_ccu: master_ccu@3f001000 {
};
slave_ccu: slave_ccu@3e011000 {
compatible = BCM21664_DT_SLAVE_CCU_COMPAT;
compatible = "brcm,bcm21664-slave-ccu";
reg = <0x3e011000 0x0f00>;
#clock-cells = <1>;
clock-output-names = "uartb",

View file

@ -30,12 +30,11 @@
* OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
*/
/* BCM23550 and BCM21664 have almost identical clocks */
#include <dt-bindings/clock/bcm21664.h>
#include <dt-bindings/interrupt-controller/arm-gic.h>
#include <dt-bindings/interrupt-controller/irq.h>
/* BCM23550 and BCM21664 have almost identical clocks */
#include "dt-bindings/clock/bcm21664.h"
/ {
#address-cells = <1>;
#size-cells = <1>;
@ -130,36 +129,36 @@ slaves@3e000000 {
uartb: serial@0 {
compatible = "snps,dw-apb-uart";
status = "disabled";
reg = <0x00000000 0x118>;
clocks = <&slave_ccu BCM21664_SLAVE_CCU_UARTB>;
interrupts = <GIC_SPI 67 IRQ_TYPE_LEVEL_HIGH>;
reg-shift = <2>;
reg-io-width = <4>;
status = "disabled";
};
uartb2: serial@1000 {
compatible = "snps,dw-apb-uart";
status = "disabled";
reg = <0x00001000 0x118>;
clocks = <&slave_ccu BCM21664_SLAVE_CCU_UARTB2>;
interrupts = <GIC_SPI 66 IRQ_TYPE_LEVEL_HIGH>;
reg-shift = <2>;
reg-io-width = <4>;
status = "disabled";
};
uartb3: serial@2000 {
compatible = "snps,dw-apb-uart";
status = "disabled";
reg = <0x00002000 0x118>;
clocks = <&slave_ccu BCM21664_SLAVE_CCU_UARTB3>;
interrupts = <GIC_SPI 65 IRQ_TYPE_LEVEL_HIGH>;
reg-shift = <2>;
reg-io-width = <4>;
status = "disabled";
};
bsc1: i2c@16000 {
compatible = "brcm,kona-i2c";
compatible = "brcm,bcm23550-i2c", "brcm,kona-i2c";
reg = <0x00016000 0x70>;
interrupts = <GIC_SPI 103 IRQ_TYPE_LEVEL_HIGH>;
#address-cells = <1>;
@ -169,7 +168,7 @@ bsc1: i2c@16000 {
};
bsc2: i2c@17000 {
compatible = "brcm,kona-i2c";
compatible = "brcm,bcm23550-i2c", "brcm,kona-i2c";
reg = <0x00017000 0x70>;
interrupts = <GIC_SPI 102 IRQ_TYPE_LEVEL_HIGH>;
#address-cells = <1>;
@ -179,7 +178,7 @@ bsc2: i2c@17000 {
};
bsc3: i2c@18000 {
compatible = "brcm,kona-i2c";
compatible = "brcm,bcm23550-i2c", "brcm,kona-i2c";
reg = <0x00018000 0x70>;
interrupts = <GIC_SPI 169 IRQ_TYPE_LEVEL_HIGH>;
#address-cells = <1>;
@ -189,7 +188,7 @@ bsc3: i2c@18000 {
};
bsc4: i2c@1c000 {
compatible = "brcm,kona-i2c";
compatible = "brcm,bcm23550-i2c", "brcm,kona-i2c";
reg = <0x0001c000 0x70>;
interrupts = <GIC_SPI 170 IRQ_TYPE_LEVEL_HIGH>;
#address-cells = <1>;
@ -224,7 +223,7 @@ usbphy: usb-phy@e30000 {
status = "disabled";
};
sdio1: sdio@e80000 {
sdio1: mmc@e80000 {
compatible = "brcm,kona-sdhci";
reg = <0x00e80000 0x801c>;
interrupts = <GIC_SPI 77 IRQ_TYPE_LEVEL_HIGH>;
@ -232,7 +231,7 @@ sdio1: sdio@e80000 {
status = "disabled";
};
sdio2: sdio@e90000 {
sdio2: mmc@e90000 {
compatible = "brcm,kona-sdhci";
reg = <0x00e90000 0x801c>;
interrupts = <GIC_SPI 76 IRQ_TYPE_LEVEL_HIGH>;
@ -240,7 +239,7 @@ sdio2: sdio@e90000 {
status = "disabled";
};
sdio3: sdio@ea0000 {
sdio3: mmc@ea0000 {
compatible = "brcm,kona-sdhci";
reg = <0x00ea0000 0x801c>;
interrupts = <GIC_SPI 74 IRQ_TYPE_LEVEL_HIGH>;
@ -248,7 +247,7 @@ sdio3: sdio@ea0000 {
status = "disabled";
};
sdio4: sdio@eb0000 {
sdio4: mmc@eb0000 {
compatible = "brcm,kona-sdhci";
reg = <0x00eb0000 0x801c>;
interrupts = <GIC_SPI 73 IRQ_TYPE_LEVEL_HIGH>;
@ -372,21 +371,21 @@ var_156m_clk: var_156m {
};
root_ccu: root_ccu@35001000 {
compatible = BCM21664_DT_ROOT_CCU_COMPAT;
compatible = "brcm,bcm21664-root-ccu";
reg = <0x35001000 0x0f00>;
#clock-cells = <1>;
clock-output-names = "frac_1m";
};
aon_ccu: aon_ccu@35002000 {
compatible = BCM21664_DT_AON_CCU_COMPAT;
compatible = "brcm,bcm21664-aon-ccu";
reg = <0x35002000 0x0f00>;
#clock-cells = <1>;
clock-output-names = "hub_timer";
};
slave_ccu: slave_ccu@3e011000 {
compatible = BCM21664_DT_SLAVE_CCU_COMPAT;
compatible = "brcm,bcm21664-slave-ccu";
reg = <0x3e011000 0x0f00>;
#clock-cells = <1>;
clock-output-names = "uartb",
@ -399,7 +398,7 @@ slave_ccu: slave_ccu@3e011000 {
};
master_ccu: master_ccu@3f001000 {
compatible = BCM21664_DT_MASTER_CCU_COMPAT;
compatible = "brcm,bcm21664-master-ccu";
reg = <0x3f001000 0x0f00>;
#clock-cells = <1>;
clock-output-names = "sdio1",

View file

@ -21,30 +21,30 @@ serial@3e000000 {
};
i2c@3e016000 {
status = "okay";
clock-frequency = <400000>;
status = "okay";
};
i2c@3e017000 {
status = "okay";
clock-frequency = <400000>;
status = "okay";
};
i2c@3e018000 {
status = "okay";
clock-frequency = <400000>;
status = "okay";
};
i2c@3500d000 {
status = "okay";
clock-frequency = <100000>;
status = "okay";
pmu: pmu@8 {
reg = <0x08>;
};
};
sdio2: sdio@3f190000 {
sdio2: mmc@3f190000 {
non-removable;
max-frequency = <48000000>;
vmmc-supply = <&camldo1_reg>;
@ -52,7 +52,7 @@ sdio2: sdio@3f190000 {
status = "okay";
};
sdio4: sdio@3f1b0000 {
sdio4: mmc@3f1b0000 {
max-frequency = <48000000>;
cd-gpios = <&gpio 14 GPIO_ACTIVE_LOW>;
vmmc-supply = <&sdldo_reg>;

View file

@ -16,8 +16,8 @@ / {
spi {
compatible = "spi-gpio";
num-chipselects = <1>;
gpio-sck = <&chipcommon 7 0>;
gpio-mosi = <&chipcommon 4 0>;
sck-gpios = <&chipcommon 7 0>;
mosi-gpios = <&chipcommon 4 0>;
cs-gpios = <&chipcommon 6 0>;
#address-cells = <1>;
#size-cells = <0>;
@ -159,34 +159,27 @@ &srab {
ports {
port@0 {
reg = <0>;
label = "lan1";
};
port@1 {
reg = <1>;
label = "lan2";
};
port@2 {
reg = <2>;
label = "lan3";
};
port@3 {
reg = <3>;
label = "lan4";
};
port@4 {
reg = <4>;
label = "wan";
};
port@5 {
reg = <5>;
label = "cpu";
ethernet = <&gmac0>;
};
};
};

View file

@ -28,8 +28,8 @@ memory@0 {
spi {
compatible = "spi-gpio";
num-chipselects = <1>;
gpio-sck = <&chipcommon 7 0>;
gpio-mosi = <&chipcommon 4 0>;
sck-gpios = <&chipcommon 7 0>;
mosi-gpios = <&chipcommon 4 0>;
cs-gpios = <&chipcommon 6 0>;
#address-cells = <1>;
#size-cells = <0>;

View file

@ -8,7 +8,7 @@
#include "bcm4708.dtsi"
/ {
compatible = "luxul,xap-1510v1", "brcm,bcm4708";
compatible = "luxul,xap-1510-v1", "brcm,bcm4708";
model = "Luxul XAP-1510 V1";
chosen {
@ -20,6 +20,14 @@ memory@0 {
reg = <0x00000000 0x08000000>;
};
nvram@1eff0000 {
compatible = "brcm,nvram";
reg = <0x1eff0000 0x10000>;
et0macaddr: et0macaddr {
};
};
leds {
compatible = "gpio-leds";
@ -53,6 +61,11 @@ button-restart {
};
};
&gmac0 {
nvmem-cells = <&et0macaddr>;
nvmem-cell-names = "mac-address";
};
&spi_nor {
status = "okay";
};
@ -62,19 +75,15 @@ &srab {
ports {
port@0 {
reg = <0>;
label = "poe";
};
port@4 {
reg = <4>;
label = "lan";
};
port@5 {
reg = <5>;
label = "cpu";
ethernet = <&gmac0>;
};
};
};

View file

@ -24,6 +24,14 @@ memory@0 {
reg = <0x00000000 0x08000000>;
};
nvram@1eff0000 {
compatible = "brcm,nvram";
reg = <0x1eff0000 0x10000>;
et0macaddr: et0macaddr {
};
};
nand_controller: nand-controller@18028000 {
nand@0 {
partitions {
@ -60,6 +68,11 @@ button-restart {
};
};
&gmac0 {
nvmem-cells = <&et0macaddr>;
nvmem-cell-names = "mac-address";
};
&spi_nor {
status = "okay";
};
@ -69,14 +82,11 @@ &srab {
ports {
port@4 {
reg = <4>;
label = "lan";
};
port@5 {
reg = <5>;
label = "cpu";
ethernet = <&gmac0>;
};
};
};

View file

@ -13,7 +13,7 @@
#include "bcm5301x-nand-cs0-bch8.dtsi"
/ {
compatible = "netgear,r6250v1", "brcm,bcm4708";
compatible = "netgear,r6250-v1", "brcm,bcm4708";
model = "Netgear R6250 V1 (BCM4708)";
chosen {
@ -100,34 +100,27 @@ &srab {
ports {
port@0 {
reg = <0>;
label = "lan4";
};
port@1 {
reg = <1>;
label = "lan3";
};
port@2 {
reg = <2>;
label = "lan2";
};
port@3 {
reg = <3>;
label = "lan1";
};
port@4 {
reg = <4>;
label = "wan";
};
port@5 {
reg = <5>;
label = "cpu";
ethernet = <&gmac0>;
};
};
};

View file

@ -12,7 +12,7 @@
#include "bcm5301x-nand-cs0-bch8.dtsi"
/ {
compatible = "netgear,r6300v2", "brcm,bcm4708";
compatible = "netgear,r6300-v2", "brcm,bcm4708";
model = "Netgear R6300 V2 (BCM4708)";
chosen {

View file

@ -123,34 +123,27 @@ &srab {
ports {
port@0 {
reg = <0>;
label = "lan4";
};
port@1 {
reg = <1>;
label = "lan3";
};
port@2 {
reg = <2>;
label = "lan2";
};
port@3 {
reg = <3>;
label = "lan1";
};
port@4 {
reg = <4>;
label = "wan";
};
port@5 {
reg = <5>;
label = "cpu";
ethernet = <&gmac0>;
};
};
};

View file

@ -28,8 +28,8 @@ memory@0 {
spi {
compatible = "spi-gpio";
num-chipselects = <1>;
gpio-sck = <&chipcommon 7 0>;
gpio-mosi = <&chipcommon 4 0>;
sck-gpios = <&chipcommon 7 0>;
mosi-gpios = <&chipcommon 4 0>;
cs-gpios = <&chipcommon 6 0>;
#address-cells = <1>;
#size-cells = <0>;
@ -123,34 +123,27 @@ &srab {
ports {
port@0 {
reg = <0>;
label = "lan1";
};
port@1 {
reg = <1>;
label = "lan2";
};
port@2 {
reg = <2>;
label = "lan3";
};
port@3 {
reg = <3>;
label = "lan4";
};
port@4 {
reg = <4>;
label = "wan";
};
port@5 {
reg = <5>;
label = "cpu";
ethernet = <&gmac0>;
};
};
};

View file

@ -28,8 +28,8 @@ memory@0 {
spi {
compatible = "spi-gpio";
num-chipselects = <1>;
gpio-sck = <&chipcommon 7 0>;
gpio-mosi = <&chipcommon 4 0>;
sck-gpios = <&chipcommon 7 0>;
mosi-gpios = <&chipcommon 4 0>;
cs-gpios = <&chipcommon 6 0>;
#address-cells = <1>;
#size-cells = <0>;

View file

@ -8,7 +8,7 @@
#include "bcm47081.dtsi"
/ {
compatible = "luxul,xap-1410v1", "brcm,bcm47081", "brcm,bcm4708";
compatible = "luxul,xap-1410-v1", "brcm,bcm47081", "brcm,bcm4708";
model = "Luxul XAP-1410 V1";
chosen {
@ -20,6 +20,14 @@ memory@0 {
reg = <0x00000000 0x08000000>;
};
nvram@1eff0000 {
compatible = "brcm,nvram";
reg = <0x1eff0000 0x10000>;
et0macaddr: et0macaddr {
};
};
leds {
compatible = "gpio-leds";
@ -53,6 +61,11 @@ button-restart {
};
};
&gmac0 {
nvmem-cells = <&et0macaddr>;
nvmem-cell-names = "mac-address";
};
&spi_nor {
status = "okay";
};
@ -62,14 +75,11 @@ &srab {
ports {
port@4 {
reg = <4>;
label = "poe";
};
port@5 {
reg = <5>;
label = "cpu";
ethernet = <&gmac0>;
};
};
};

View file

@ -9,7 +9,7 @@
#include "bcm5301x-nand-cs0-bch4.dtsi"
/ {
compatible = "luxul,xwr-1200v1", "brcm,bcm47081", "brcm,bcm4708";
compatible = "luxul,xwr-1200-v1", "brcm,bcm47081", "brcm,bcm4708";
model = "Luxul XWR-1200 V1";
chosen {
@ -24,6 +24,10 @@ memory@0 {
nvram@1eff0000 {
compatible = "brcm,nvram";
reg = <0x1eff0000 0x10000>;
et0macaddr: et0macaddr {
#nvmem-cell-cells = <1>;
};
};
leds {
@ -106,6 +110,11 @@ &usb2 {
vcc-gpio = <&chipcommon 9 GPIO_ACTIVE_HIGH>;
};
&gmac0 {
nvmem-cells = <&et0macaddr 0>;
nvmem-cell-names = "mac-address";
};
&spi_nor {
status = "okay";
};
@ -115,34 +124,29 @@ &srab {
ports {
port@0 {
reg = <0>;
label = "lan4";
};
port@1 {
reg = <1>;
label = "lan3";
};
port@2 {
reg = <2>;
label = "lan2";
};
port@3 {
reg = <3>;
label = "lan1";
};
port@4 {
reg = <4>;
label = "wan";
nvmem-cells = <&et0macaddr 5>;
nvmem-cell-names = "mac-address";
};
port@5 {
reg = <5>;
label = "cpu";
ethernet = <&gmac0>;
};
};
};

View file

@ -137,8 +137,10 @@ bridge@0,0,0 {
#size-cells = <2>;
wifi@0,1,0 {
compatible = "brcm,bcm4366-fmac", "brcm,bcm4329-fmac";
reg = <0x0000 0 0 0 0>;
ieee80211-freq-limit = <5735000 5835000>;
brcm,ccode-map = "JP-JP-78", "US-Q2-86";
};
};
};
@ -159,6 +161,19 @@ bridge@1,1,0 {
#address-cells = <3>;
#size-cells = <2>;
bridge@1,0 {
reg = <0x800 0 0 0 0>;
#address-cells = <3>;
#size-cells = <2>;
wifi@0,0 {
compatible = "brcm,bcm4366-fmac", "brcm,bcm4329-fmac";
reg = <0x0000 0 0 0 0>;
brcm,ccode-map = "JP-JP-78", "US-Q2-86";
};
};
bridge@1,2,2 {
reg = <0x1000 0 0 0 0>;
@ -166,8 +181,10 @@ bridge@1,2,2 {
#size-cells = <2>;
wifi@1,4,0 {
compatible = "brcm,bcm4366-fmac", "brcm,bcm4329-fmac";
reg = <0x0000 0 0 0 0>;
ieee80211-freq-limit = <5170000 5730000>;
brcm,ccode-map = "JP-JP-78", "US-Q2-86";
};
};
};
@ -191,39 +208,27 @@ &srab {
ports {
port@0 {
reg = <0>;
label = "lan1";
};
port@1 {
reg = <1>;
label = "lan2";
};
port@2 {
reg = <2>;
label = "lan3";
};
port@3 {
reg = <3>;
label = "lan4";
};
port@4 {
reg = <4>;
label = "wan";
};
port@8 {
reg = <8>;
label = "cpu";
ethernet = <&gmac2>;
fixed-link {
speed = <1000>;
full-duplex;
};
};
};
};

View file

@ -181,32 +181,28 @@ &srab {
ports {
port@0 {
reg = <0>;
label = "lan4";
};
port@1 {
reg = <1>;
label = "lan3";
};
port@2 {
reg = <2>;
label = "lan2";
};
port@3 {
reg = <3>;
label = "lan1";
};
port@4 {
reg = <4>;
label = "wan";
};
sw0_p5: port@5 {
reg = <5>;
/delete-property/ethernet;
label = "extsw";
phy-mode = "rgmii";
@ -218,8 +214,6 @@ fixed-link {
};
port@7 {
reg = <7>;
ethernet = <&gmac1>;
label = "cpu";
fixed-link {
@ -229,14 +223,7 @@ fixed-link {
};
port@8 {
reg = <8>;
ethernet = <&gmac2>;
label = "cpu";
fixed-link {
speed = <1000>;
full-duplex;
};
};
};
};

View file

@ -124,39 +124,27 @@ &srab {
ports {
port@0 {
reg = <0>;
label = "lan4";
};
port@1 {
reg = <1>;
label = "lan3";
};
port@2 {
reg = <2>;
label = "lan2";
};
port@3 {
reg = <3>;
label = "lan1";
};
port@4 {
reg = <4>;
label = "wan";
};
port@8 {
reg = <8>;
label = "cpu";
ethernet = <&gmac2>;
fixed-link {
speed = <1000>;
full-duplex;
};
};
};
};

View file

@ -172,40 +172,28 @@ &srab {
ports {
port@0 {
reg = <0>;
label = "lan1";
};
port@1 {
reg = <1>;
label = "lan2";
};
port@2 {
reg = <2>;
label = "lan3";
};
port@3 {
reg = <3>;
label = "lan4";
};
port@4 {
reg = <4>;
label = "wan";
};
port@8 {
reg = <8>;
label = "cpu";
ethernet = <&gmac2>;
phy-mode = "rgmii";
fixed-link {
speed = <1000>;
full-duplex;
};
};
};
};

View file

@ -207,29 +207,32 @@ &srab {
dsa,member = <0 0>;
ports {
sw0_p0: port@0 {
label = "extsw";
fixed-link {
speed = <1000>;
full-duplex;
};
};
port@1 {
reg = <1>;
label = "lan7";
};
port@2 {
reg = <2>;
label = "lan4";
};
port@3 {
reg = <3>;
label = "lan8";
};
port@4 {
reg = <4>;
label = "wan";
};
port@5 {
reg = <5>;
ethernet = <&gmac0>;
label = "cpu";
status = "disabled";
@ -240,8 +243,6 @@ fixed-link {
};
port@7 {
reg = <7>;
ethernet = <&gmac1>;
label = "cpu";
status = "disabled";
@ -252,24 +253,7 @@ fixed-link {
};
port@8 {
reg = <8>;
ethernet = <&gmac2>;
label = "cpu";
fixed-link {
speed = <1000>;
full-duplex;
};
};
sw0_p0: port@0 {
reg = <0>;
label = "extsw";
fixed-link {
speed = <1000>;
full-duplex;
};
};
};
};

View file

@ -25,6 +25,10 @@ memory@0 {
nvram@1eff0000 {
compatible = "brcm,nvram";
reg = <0x1eff0000 0x10000>;
et0macaddr: et0macaddr {
#nvmem-cell-cells = <1>;
};
};
leds {
@ -61,6 +65,11 @@ &usb3 {
vcc-gpio = <&chipcommon 18 GPIO_ACTIVE_HIGH>;
};
&gmac0 {
nvmem-cells = <&et0macaddr 0>;
nvmem-cell-names = "mac-address";
};
&spi_nor {
status = "okay";
};
@ -74,34 +83,29 @@ &srab {
ports {
port@0 {
reg = <0>;
label = "wan";
nvmem-cells = <&et0macaddr 1>;
nvmem-cell-names = "mac-address";
};
port@1 {
reg = <1>;
label = "lan4";
};
port@2 {
reg = <2>;
label = "lan3";
};
port@3 {
reg = <3>;
label = "lan2";
};
port@4 {
reg = <4>;
label = "lan1";
};
port@5 {
reg = <5>;
label = "cpu";
ethernet = <&gmac0>;
};
};
};

View file

@ -20,6 +20,14 @@ memory@0 {
reg = <0x00000000 0x08000000>;
};
nvram@1eff0000 {
compatible = "brcm,nvram";
reg = <0x1eff0000 0x10000>;
et0macaddr: et0macaddr {
};
};
leds {
compatible = "gpio-leds";
@ -51,6 +59,11 @@ button-restart {
};
};
&gmac0 {
nvmem-cells = <&et0macaddr>;
nvmem-cell-names = "mac-address";
};
&spi_nor {
status = "okay";
};
@ -60,19 +73,15 @@ &srab {
ports {
port@0 {
reg = <0>;
label = "poe";
};
port@1 {
reg = <1>;
label = "lan";
};
port@5 {
reg = <5>;
label = "cpu";
ethernet = <&gmac0>;
};
};
};

View file

@ -25,6 +25,10 @@ memory@0 {
nvram@1eff0000 {
compatible = "brcm,nvram";
reg = <0x1eff0000 0x10000>;
et0macaddr: et0macaddr {
#nvmem-cell-cells = <1>;
};
};
leds {
@ -61,6 +65,11 @@ &usb3 {
vcc-gpio = <&chipcommon 18 GPIO_ACTIVE_HIGH>;
};
&gmac0 {
nvmem-cells = <&et0macaddr 0>;
nvmem-cell-names = "mac-address";
};
&spi_nor {
status = "okay";
};
@ -74,34 +83,29 @@ &srab {
ports {
port@0 {
reg = <0>;
label = "wan";
nvmem-cells = <&et0macaddr 1>;
nvmem-cell-names = "mac-address";
};
port@1 {
reg = <1>;
label = "lan4";
};
port@2 {
reg = <2>;
label = "lan3";
};
port@3 {
reg = <3>;
label = "lan2";
};
port@4 {
reg = <4>;
label = "lan1";
};
port@5 {
reg = <5>;
label = "cpu";
ethernet = <&gmac0>;
};
};
};

View file

@ -22,6 +22,14 @@ memory@0 {
<0x88000000 0x18000000>;
};
nvram@1eff0000 {
compatible = "brcm,nvram";
reg = <0x1eff0000 0x10000>;
et0macaddr: et0macaddr {
};
};
leds {
compatible = "gpio-leds";
@ -47,6 +55,11 @@ &uart1 {
status = "okay";
};
&gmac0 {
nvmem-cells = <&et0macaddr>;
nvmem-cell-names = "mac-address";
};
&spi_nor {
status = "okay";
};
@ -56,14 +69,11 @@ &srab {
ports {
port@0 {
reg = <0>;
label = "lan";
};
port@5 {
reg = <5>;
label = "cpu";
ethernet = <&gmac0>;
};
};
};

View file

@ -9,7 +9,7 @@
#include "bcm5301x-nand-cs0-bch4.dtsi"
/ {
compatible = "luxul,xwr-3100v1", "brcm,bcm47094", "brcm,bcm4708";
compatible = "luxul,xwr-3100-v1", "brcm,bcm47094", "brcm,bcm4708";
model = "Luxul XWR-3100 V1";
chosen {
@ -25,6 +25,10 @@ memory@0 {
nvram@1eff0000 {
compatible = "brcm,nvram";
reg = <0x1eff0000 0x10000>;
et0macaddr: et0macaddr {
#nvmem-cell-cells = <1>;
};
};
leds {
@ -101,6 +105,11 @@ &usb3 {
vcc-gpio = <&chipcommon 18 GPIO_ACTIVE_HIGH>;
};
&gmac0 {
nvmem-cells = <&et0macaddr 0>;
nvmem-cell-names = "mac-address";
};
&spi_nor {
status = "okay";
};
@ -114,34 +123,29 @@ &srab {
ports {
port@0 {
reg = <0>;
label = "lan4";
};
port@1 {
reg = <1>;
label = "lan3";
};
port@2 {
reg = <2>;
label = "lan2";
};
port@3 {
reg = <3>;
label = "lan1";
};
port@4 {
reg = <4>;
label = "wan";
nvmem-cells = <&et0macaddr 5>;
nvmem-cell-names = "mac-address";
};
port@5 {
reg = <5>;
label = "cpu";
ethernet = <&gmac0>;
};
};
};

View file

@ -27,6 +27,7 @@ nvram@1eff0000 {
reg = <0x1eff0000 0x10000>;
et0macaddr: et0macaddr {
#nvmem-cell-cells = <1>;
};
};
@ -76,7 +77,7 @@ button-restart {
};
&gmac0 {
nvmem-cells = <&et0macaddr>;
nvmem-cells = <&et0macaddr 0>;
nvmem-cell-names = "mac-address";
};
@ -97,34 +98,29 @@ &srab {
ports {
port@0 {
reg = <0>;
label = "lan4";
};
port@1 {
reg = <1>;
label = "lan3";
};
port@2 {
reg = <2>;
label = "lan2";
};
port@3 {
reg = <3>;
label = "lan1";
};
port@4 {
reg = <4>;
label = "wan";
nvmem-cells = <&et0macaddr 5>;
nvmem-cell-names = "mac-address";
};
port@5 {
reg = <5>;
label = "cpu";
ethernet = <&gmac0>;
};
};
};

View file

@ -52,6 +52,7 @@ CA7_3: cpu@3 {
L2_0: l2-cache0 {
compatible = "cache";
cache-level = <2>;
cache-unified;
};
};

View file

@ -39,8 +39,6 @@ led-1 {
keys {
compatible = "gpio-keys";
#address-cells = <1>;
#size-cells = <0>;
key-restart {
label = "Reset";
@ -74,8 +72,6 @@ &gmac3 {
};
&nandcs {
nand-ecc-algo = "hw";
partitions {
compatible = "fixed-partitions";
#address-cells = <0x1>;
@ -117,18 +113,15 @@ &srab {
ports {
port@0 {
reg = <0>;
label = "poe";
};
port@5 {
reg = <5>;
label = "cpu";
ethernet = <&gmac0>;
fixed-link {
speed = <1000>;
duplex-full;
full-duplex;
};
};
};

View file

@ -125,8 +125,6 @@ &pwm {
};
&nandcs {
nand-ecc-algo = "hw";
partitions {
/*
* The partition autodetection does not work for this device.
@ -140,31 +138,31 @@ partitions {
#address-cells = <0x1>;
#size-cells = <0x1>;
partition0@0 {
partition@0 {
label = "u-boot";
reg = <0x0 0x100000>;
read-only;
};
partition1@100000 {
partition@100000 {
label = "bootkernel1";
reg = <0x100000 0x300000>;
read-only;
};
partition2@400000 {
partition@400000 {
label = "nvram";
reg = <0x400000 0x100000>;
read-only;
};
partition3@500000 {
partition@500000 {
label = "bootkernel2";
reg = <0x500000 0x300000>;
read-only;
};
partition4@800000 {
partition@800000 {
label = "ubi";
reg = <0x800000 0x7780000>;
};
@ -176,18 +174,15 @@ &srab {
ports {
port@0 {
reg = <0>;
label = "poe";
};
port@5 {
reg = <5>;
label = "cpu";
ethernet = <&gmac0>;
fixed-link {
speed = <1000>;
duplex-full;
full-duplex;
};
};
};

View file

@ -3,53 +3,13 @@
* Generic DTS part for all BCM53010, BCM53011, BCM53012, BCM53014, BCM53015,
* BCM53016, BCM53017, BCM53018, BCM4707, BCM4708 and BCM4709 SoCs
*
* Copyright 2013-2014 Hauke Mehrtens <hauke@hauke-m.de>
*
* Licensed under the GNU/GPL. See COPYING for details.
*/
#include <dt-bindings/clock/bcm-nsp.h>
#include <dt-bindings/gpio/gpio.h>
#include <dt-bindings/input/input.h>
#include <dt-bindings/interrupt-controller/irq.h>
#include <dt-bindings/interrupt-controller/arm-gic.h>
#include "bcm-ns.dtsi"
/ {
#address-cells = <1>;
#size-cells = <1>;
interrupt-parent = <&gic>;
chipcommon-a-bus@18000000 {
compatible = "simple-bus";
ranges = <0x00000000 0x18000000 0x00001000>;
#address-cells = <1>;
#size-cells = <1>;
uart0: serial@300 {
compatible = "ns16550";
reg = <0x0300 0x100>;
interrupts = <GIC_SPI 85 IRQ_TYPE_LEVEL_HIGH>;
clocks = <&iprocslow>;
status = "disabled";
};
uart1: serial@400 {
compatible = "ns16550";
reg = <0x0400 0x100>;
interrupts = <GIC_SPI 85 IRQ_TYPE_LEVEL_HIGH>;
clocks = <&iprocslow>;
pinctrl-names = "default";
pinctrl-0 = <&pinmux_uart1>;
status = "disabled";
};
};
mpcore-bus@19000000 {
compatible = "simple-bus";
ranges = <0x00000000 0x19000000 0x00023000>;
#address-cells = <1>;
#size-cells = <1>;
a9pll: arm_clk@0 {
#clock-cells = <0>;
compatible = "brcm,nsp-armpll";
@ -57,26 +17,6 @@ a9pll: arm_clk@0 {
reg = <0x00000 0x1000>;
};
scu@20000 {
compatible = "arm,cortex-a9-scu";
reg = <0x20000 0x100>;
};
timer@20200 {
compatible = "arm,cortex-a9-global-timer";
reg = <0x20200 0x100>;
interrupts = <GIC_PPI 11 IRQ_TYPE_EDGE_RISING>;
clocks = <&periph_clk>;
};
timer@20600 {
compatible = "arm,cortex-a9-twd-timer";
reg = <0x20600 0x20>;
interrupts = <GIC_PPI 13 (GIC_CPU_MASK_SIMPLE(2) |
IRQ_TYPE_EDGE_RISING)>;
clocks = <&periph_clk>;
};
watchdog@20620 {
compatible = "arm,cortex-a9-twd-wdt";
reg = <0x20620 0x20>;
@ -84,25 +24,6 @@ watchdog@20620 {
IRQ_TYPE_EDGE_RISING)>;
clocks = <&periph_clk>;
};
gic: interrupt-controller@21000 {
compatible = "arm,cortex-a9-gic";
#interrupt-cells = <3>;
#address-cells = <0>;
interrupt-controller;
reg = <0x21000 0x1000>,
<0x20100 0x100>;
};
L2: cache-controller@22000 {
compatible = "arm,pl310-cache";
reg = <0x22000 0x1000>;
cache-unified;
arm,shared-override;
prefetch-data = <1>;
prefetch-instr = <1>;
cache-level = <2>;
};
};
pmu {
@ -148,220 +69,6 @@ periph_clk: periph_clk {
};
};
axi@18000000 {
compatible = "brcm,bus-axi";
reg = <0x18000000 0x1000>;
ranges = <0x00000000 0x18000000 0x00100000>;
#address-cells = <1>;
#size-cells = <1>;
#interrupt-cells = <1>;
interrupt-map-mask = <0x000fffff 0xffff>;
interrupt-map =
/* ChipCommon */
<0x00000000 0 &gic GIC_SPI 85 IRQ_TYPE_LEVEL_HIGH>,
/* Switch Register Access Block */
<0x00007000 0 &gic GIC_SPI 95 IRQ_TYPE_LEVEL_HIGH>,
<0x00007000 1 &gic GIC_SPI 96 IRQ_TYPE_LEVEL_HIGH>,
<0x00007000 2 &gic GIC_SPI 97 IRQ_TYPE_LEVEL_HIGH>,
<0x00007000 3 &gic GIC_SPI 98 IRQ_TYPE_LEVEL_HIGH>,
<0x00007000 4 &gic GIC_SPI 99 IRQ_TYPE_LEVEL_HIGH>,
<0x00007000 5 &gic GIC_SPI 100 IRQ_TYPE_LEVEL_HIGH>,
<0x00007000 6 &gic GIC_SPI 101 IRQ_TYPE_LEVEL_HIGH>,
<0x00007000 7 &gic GIC_SPI 102 IRQ_TYPE_LEVEL_HIGH>,
<0x00007000 8 &gic GIC_SPI 103 IRQ_TYPE_LEVEL_HIGH>,
<0x00007000 9 &gic GIC_SPI 104 IRQ_TYPE_LEVEL_HIGH>,
<0x00007000 10 &gic GIC_SPI 105 IRQ_TYPE_LEVEL_HIGH>,
<0x00007000 11 &gic GIC_SPI 106 IRQ_TYPE_LEVEL_HIGH>,
<0x00007000 12 &gic GIC_SPI 107 IRQ_TYPE_LEVEL_HIGH>,
/* PCIe Controller 0 */
<0x00012000 0 &gic GIC_SPI 126 IRQ_TYPE_LEVEL_HIGH>,
<0x00012000 1 &gic GIC_SPI 127 IRQ_TYPE_LEVEL_HIGH>,
<0x00012000 2 &gic GIC_SPI 128 IRQ_TYPE_LEVEL_HIGH>,
<0x00012000 3 &gic GIC_SPI 129 IRQ_TYPE_LEVEL_HIGH>,
<0x00012000 4 &gic GIC_SPI 130 IRQ_TYPE_LEVEL_HIGH>,
<0x00012000 5 &gic GIC_SPI 131 IRQ_TYPE_LEVEL_HIGH>,
/* PCIe Controller 1 */
<0x00013000 0 &gic GIC_SPI 132 IRQ_TYPE_LEVEL_HIGH>,
<0x00013000 1 &gic GIC_SPI 133 IRQ_TYPE_LEVEL_HIGH>,
<0x00013000 2 &gic GIC_SPI 134 IRQ_TYPE_LEVEL_HIGH>,
<0x00013000 3 &gic GIC_SPI 135 IRQ_TYPE_LEVEL_HIGH>,
<0x00013000 4 &gic GIC_SPI 136 IRQ_TYPE_LEVEL_HIGH>,
<0x00013000 5 &gic GIC_SPI 137 IRQ_TYPE_LEVEL_HIGH>,
/* PCIe Controller 2 */
<0x00014000 0 &gic GIC_SPI 138 IRQ_TYPE_LEVEL_HIGH>,
<0x00014000 1 &gic GIC_SPI 138 IRQ_TYPE_LEVEL_HIGH>,
<0x00014000 2 &gic GIC_SPI 140 IRQ_TYPE_LEVEL_HIGH>,
<0x00014000 3 &gic GIC_SPI 141 IRQ_TYPE_LEVEL_HIGH>,
<0x00014000 4 &gic GIC_SPI 142 IRQ_TYPE_LEVEL_HIGH>,
<0x00014000 5 &gic GIC_SPI 143 IRQ_TYPE_LEVEL_HIGH>,
/* USB 2.0 Controller */
<0x00021000 0 &gic GIC_SPI 79 IRQ_TYPE_LEVEL_HIGH>,
/* USB 3.0 Controller */
<0x00023000 0 &gic GIC_SPI 80 IRQ_TYPE_LEVEL_HIGH>,
/* Ethernet Controller 0 */
<0x00024000 0 &gic GIC_SPI 147 IRQ_TYPE_LEVEL_HIGH>,
/* Ethernet Controller 1 */
<0x00025000 0 &gic GIC_SPI 148 IRQ_TYPE_LEVEL_HIGH>,
/* Ethernet Controller 2 */
<0x00026000 0 &gic GIC_SPI 149 IRQ_TYPE_LEVEL_HIGH>,
/* Ethernet Controller 3 */
<0x00027000 0 &gic GIC_SPI 150 IRQ_TYPE_LEVEL_HIGH>,
/* NAND Controller */
<0x00028000 0 &gic GIC_SPI 64 IRQ_TYPE_LEVEL_HIGH>,
<0x00028000 1 &gic GIC_SPI 65 IRQ_TYPE_LEVEL_HIGH>,
<0x00028000 2 &gic GIC_SPI 66 IRQ_TYPE_LEVEL_HIGH>,
<0x00028000 3 &gic GIC_SPI 67 IRQ_TYPE_LEVEL_HIGH>,
<0x00028000 4 &gic GIC_SPI 68 IRQ_TYPE_LEVEL_HIGH>,
<0x00028000 5 &gic GIC_SPI 69 IRQ_TYPE_LEVEL_HIGH>,
<0x00028000 6 &gic GIC_SPI 70 IRQ_TYPE_LEVEL_HIGH>,
<0x00028000 7 &gic GIC_SPI 71 IRQ_TYPE_LEVEL_HIGH>;
chipcommon: chipcommon@0 {
reg = <0x00000000 0x1000>;
gpio-controller;
#gpio-cells = <2>;
interrupt-controller;
#interrupt-cells = <2>;
};
pcie0: pcie@12000 {
reg = <0x00012000 0x1000>;
};
pcie1: pcie@13000 {
reg = <0x00013000 0x1000>;
};
pcie2: pcie@14000 {
reg = <0x00014000 0x1000>;
};
usb2: usb2@21000 {
reg = <0x00021000 0x1000>;
#address-cells = <1>;
#size-cells = <1>;
ranges;
interrupt-parent = <&gic>;
ehci: usb@21000 {
#usb-cells = <0>;
compatible = "generic-ehci";
reg = <0x00021000 0x1000>;
interrupts = <GIC_SPI 79 IRQ_TYPE_LEVEL_HIGH>;
phys = <&usb2_phy>;
#address-cells = <1>;
#size-cells = <0>;
ehci_port1: port@1 {
reg = <1>;
#trigger-source-cells = <0>;
};
ehci_port2: port@2 {
reg = <2>;
#trigger-source-cells = <0>;
};
};
ohci: usb@22000 {
#usb-cells = <0>;
compatible = "generic-ohci";
reg = <0x00022000 0x1000>;
interrupts = <GIC_SPI 79 IRQ_TYPE_LEVEL_HIGH>;
#address-cells = <1>;
#size-cells = <0>;
ohci_port1: port@1 {
reg = <1>;
#trigger-source-cells = <0>;
};
ohci_port2: port@2 {
reg = <2>;
#trigger-source-cells = <0>;
};
};
};
usb3: usb3@23000 {
reg = <0x00023000 0x1000>;
#address-cells = <1>;
#size-cells = <1>;
ranges;
interrupt-parent = <&gic>;
xhci: usb@23000 {
#usb-cells = <0>;
compatible = "generic-xhci";
reg = <0x00023000 0x1000>;
interrupts = <GIC_SPI 80 IRQ_TYPE_LEVEL_HIGH>;
phys = <&usb3_phy>;
phy-names = "usb";
#address-cells = <1>;
#size-cells = <0>;
xhci_port1: port@1 {
reg = <1>;
#trigger-source-cells = <0>;
};
};
};
gmac0: ethernet@24000 {
reg = <0x24000 0x800>;
};
gmac1: ethernet@25000 {
reg = <0x25000 0x800>;
};
gmac2: ethernet@26000 {
reg = <0x26000 0x800>;
};
gmac3: ethernet@27000 {
reg = <0x27000 0x800>;
};
};
pwm: pwm@18002000 {
compatible = "brcm,iproc-pwm";
reg = <0x18002000 0x28>;
clocks = <&osc>;
#pwm-cells = <3>;
status = "disabled";
};
mdio: mdio@18003000 {
compatible = "brcm,iproc-mdio";
reg = <0x18003000 0x8>;
#size-cells = <0>;
#address-cells = <1>;
};
mdio-mux@18003000 {
compatible = "mdio-mux-mmioreg", "mdio-mux";
mdio-parent-bus = <&mdio>;
@ -389,15 +96,6 @@ usb3_dmp: syscon@18105000 {
reg = <0x18105000 0x1000>;
};
uart2: serial@18008000 {
compatible = "ns16550a";
reg = <0x18008000 0x20>;
clocks = <&iprocslow>;
interrupts = <GIC_SPI 86 IRQ_TYPE_LEVEL_HIGH>;
reg-shift = <2>;
status = "disabled";
};
i2c0: i2c@18009000 {
compatible = "brcm,iproc-i2c";
reg = <0x18009000 0x50>;
@ -409,18 +107,7 @@ i2c0: i2c@18009000 {
};
dmu-bus@1800c000 {
compatible = "simple-bus";
ranges = <0 0x1800c000 0x1000>;
#address-cells = <1>;
#size-cells = <1>;
cru-bus@100 {
compatible = "brcm,ns-cru", "simple-mfd";
reg = <0x100 0x1a4>;
ranges;
#address-cells = <1>;
#size-cells = <1>;
lcpll0: clock-controller@100 {
#clock-cells = <1>;
compatible = "brcm,nsp-lcpll0";
@ -440,86 +127,9 @@ genpll: clock-controller@140 {
"usbclk", "iprocfast",
"sata1", "sata2";
};
usb2_phy: phy@164 {
compatible = "brcm,ns-usb2-phy";
reg = <0x164 0x4>;
brcm,syscon-clkset = <&cru_clkset>;
clocks = <&genpll BCM_NSP_GENPLL_USB_PHY_REF_CLK>;
clock-names = "phy-ref-clk";
#phy-cells = <0>;
};
cru_clkset: syscon@180 {
compatible = "brcm,cru-clkset", "syscon";
reg = <0x180 0x4>;
};
pinctrl: pinctrl@1c0 {
compatible = "brcm,bcm4708-pinmux";
reg = <0x1c0 0x24>;
reg-names = "cru_gpio_control";
spi-pins {
groups = "spi_grp";
function = "spi";
};
pinmux_i2c: i2c-pins {
groups = "i2c_grp";
function = "i2c";
};
pinmux_pwm: pwm-pins {
groups = "pwm0_grp", "pwm1_grp",
"pwm2_grp", "pwm3_grp";
function = "pwm";
};
pinmux_uart1: uart1-pins {
groups = "uart1_grp";
function = "uart1";
};
};
thermal: thermal@2c0 {
compatible = "brcm,ns-thermal";
reg = <0x2c0 0x10>;
#thermal-sensor-cells = <0>;
};
};
};
srab: ethernet-switch@18007000 {
compatible = "brcm,bcm53011-srab", "brcm,bcm5301x-srab";
reg = <0x18007000 0x1000>;
status = "disabled";
/* ports are defined in board DTS */
ports {
#address-cells = <1>;
#size-cells = <0>;
};
};
rng: rng@18004000 {
compatible = "brcm,bcm5301x-rng";
reg = <0x18004000 0x14>;
};
nand_controller: nand-controller@18028000 {
compatible = "brcm,nand-iproc", "brcm,brcmnand-v6.1", "brcm,brcmnand";
reg = <0x18028000 0x600>, <0x1811a408 0x600>, <0x18028f00 0x20>;
reg-names = "nand", "iproc-idm", "iproc-ext";
interrupts = <GIC_SPI 68 IRQ_TYPE_LEVEL_HIGH>;
#address-cells = <1>;
#size-cells = <0>;
brcm,nand-has-wp;
};
spi@18029200 {
compatible = "brcm,spi-nsp-qspi", "brcm,spi-bcm-qspi";
reg = <0x18029200 0x184>,
@ -542,7 +152,6 @@ spi@18029200 {
"spi_lr_session_done",
"spi_lr_overread";
clocks = <&iprocmed>;
clock-names = "iprocmed";
num-cs = <2>;
#address-cells = <1>;
#size-cells = <0>;
@ -558,24 +167,4 @@ partitions {
};
};
};
thermal-zones {
cpu_thermal: cpu-thermal {
polling-delay-passive = <0>;
polling-delay = <1000>;
coefficients = <(-556) 418000>;
thermal-sensors = <&thermal>;
trips {
cpu-crit {
temperature = <125000>;
hysteresis = <0>;
type = "critical";
};
};
cooling-maps {
};
};
};
};

View file

@ -36,6 +36,7 @@ B15_1: cpu@1 {
L2_0: l2-cache0 {
compatible = "cache";
cache-level = <2>;
cache-unified;
};
};

View file

@ -44,6 +44,7 @@ CA7_2: cpu@2 {
L2_0: l2-cache0 {
compatible = "cache";
cache-level = <2>;
cache-unified;
};
};

View file

@ -52,6 +52,7 @@ CA7_3: cpu@3 {
L2_0: l2-cache0 {
compatible = "cache";
cache-level = <2>;
cache-unified;
};
};

View file

@ -36,6 +36,7 @@ CA7_1: cpu@1 {
L2_0: l2-cache0 {
compatible = "cache";
cache-level = <2>;
cache-unified;
};
};

View file

@ -44,6 +44,7 @@ CA7_2: cpu@2 {
L2_0: l2-cache0 {
compatible = "cache";
cache-level = <2>;
cache-unified;
};
};

View file

@ -36,6 +36,7 @@ CA7_1: cpu@1 {
L2_0: l2-cache0 {
compatible = "cache";
cache-level = <2>;
cache-unified;
};
};