arm64: dts: qcom: sm8250: add lpass lpi pin controller node

Add LPASS LPI pinctrl node required for Audio functionality on RB5.

Signed-off-by: Srinivas Kandagatla <srinivas.kandagatla@linaro.org>
Tested-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org>
Link: https://lore.kernel.org/r/20201202180741.16386-4-srinivas.kandagatla@linaro.org
Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>
This commit is contained in:
Srinivas Kandagatla 2020-12-02 18:07:38 +00:00 committed by Bjorn Andersson
parent 793bbd2db7
commit 3160c1b894

View file

@ -1284,6 +1284,90 @@ aoncc: clock-controller@3380000 {
clock-names = "core", "audio", "bus";
};
lpass_tlmm: pinctrl@33c0000{
compatible = "qcom,sm8250-lpass-lpi-pinctrl";
reg = <0 0x033c0000 0x0 0x20000>,
<0 0x03550000 0x0 0x10000>;
gpio-controller;
#gpio-cells = <2>;
gpio-ranges = <&lpass_tlmm 0 0 14>;
clocks = <&q6afecc LPASS_HW_MACRO_VOTE LPASS_CLK_ATTRIBUTE_COUPLE_NO>,
<&q6afecc LPASS_HW_DCODEC_VOTE LPASS_CLK_ATTRIBUTE_COUPLE_NO>;
clock-names = "core", "audio";
wsa_swr_active: wsa-swr-active-pins {
clk {
pins = "gpio10";
function = "wsa_swr_clk";
drive-strength = <2>;
slew-rate = <1>;
bias-disable;
};
data {
pins = "gpio11";
function = "wsa_swr_data";
drive-strength = <2>;
slew-rate = <1>;
bias-bus-hold;
};
};
wsa_swr_sleep: wsa-swr-sleep-pins {
clk {
pins = "gpio10";
function = "wsa_swr_clk";
drive-strength = <2>;
input-enable;
bias-pull-down;
};
data {
pins = "gpio11";
function = "wsa_swr_data";
drive-strength = <2>;
input-enable;
bias-pull-down;
};
};
dmic01_active: dmic01-active-pins {
clk {
pins = "gpio6";
function = "dmic1_clk";
drive-strength = <8>;
output-high;
};
data {
pins = "gpio7";
function = "dmic1_data";
drive-strength = <8>;
input-enable;
};
};
dmic01_sleep: dmic01-sleep-pins {
clk {
pins = "gpio6";
function = "dmic1_clk";
drive-strength = <2>;
bias-disable;
output-low;
};
data {
pins = "gpio7";
function = "dmic1_data";
drive-strength = <2>;
pull-down;
input-enable;
};
};
};
gpu: gpu@3d00000 {
compatible = "qcom,adreno-650.2",
"qcom,adreno";