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net: sparx5: use phylink_generic_validate()
Sparx5 has no special behaviour in its validation implementation, so can be switched to phylink_generic_validate(). Signed-off-by: Russell King (Oracle) <rmk+kernel@armlinux.org.uk> Signed-off-by: David S. Miller <davem@davemloft.net>
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parent
9b5cc05fd9
commit
319faa90b7
2 changed files with 4 additions and 59 deletions
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@ -292,6 +292,9 @@ static int sparx5_create_port(struct sparx5 *sparx5,
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spx5_port->phylink_config.dev = &spx5_port->ndev->dev;
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spx5_port->phylink_config.type = PHYLINK_NETDEV;
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spx5_port->phylink_config.pcs_poll = true;
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spx5_port->phylink_config.mac_capabilities = MAC_ASYM_PAUSE |
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MAC_SYM_PAUSE | MAC_10 | MAC_100 | MAC_1000FD |
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MAC_2500FD | MAC_5000FD | MAC_10000FD | MAC_25000FD;
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__set_bit(PHY_INTERFACE_MODE_SGMII,
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spx5_port->phylink_config.supported_interfaces);
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@ -26,64 +26,6 @@ static bool port_conf_has_changed(struct sparx5_port_config *a, struct sparx5_po
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return false;
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}
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static void sparx5_phylink_validate(struct phylink_config *config,
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unsigned long *supported,
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struct phylink_link_state *state)
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{
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__ETHTOOL_DECLARE_LINK_MODE_MASK(mask) = { 0, };
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phylink_set(mask, Autoneg);
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phylink_set_port_modes(mask);
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phylink_set(mask, Pause);
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phylink_set(mask, Asym_Pause);
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switch (state->interface) {
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case PHY_INTERFACE_MODE_5GBASER:
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phylink_set(mask, 5000baseT_Full);
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break;
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case PHY_INTERFACE_MODE_10GBASER:
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phylink_set(mask, 10000baseT_Full);
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phylink_set(mask, 10000baseCR_Full);
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phylink_set(mask, 10000baseSR_Full);
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phylink_set(mask, 10000baseLR_Full);
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phylink_set(mask, 10000baseLRM_Full);
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phylink_set(mask, 10000baseER_Full);
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break;
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case PHY_INTERFACE_MODE_25GBASER:
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phylink_set(mask, 25000baseCR_Full);
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phylink_set(mask, 25000baseSR_Full);
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break;
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case PHY_INTERFACE_MODE_SGMII:
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case PHY_INTERFACE_MODE_QSGMII:
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phylink_set(mask, 10baseT_Half);
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phylink_set(mask, 10baseT_Full);
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phylink_set(mask, 100baseT_Half);
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phylink_set(mask, 100baseT_Full);
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phylink_set(mask, 1000baseT_Full);
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phylink_set(mask, 1000baseX_Full);
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break;
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case PHY_INTERFACE_MODE_1000BASEX:
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phylink_set(mask, 1000baseT_Full);
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phylink_set(mask, 1000baseX_Full);
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break;
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case PHY_INTERFACE_MODE_2500BASEX:
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phylink_set(mask, 2500baseT_Full);
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phylink_set(mask, 2500baseX_Full);
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break;
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default:
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linkmode_zero(supported);
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return;
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}
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linkmode_and(supported, supported, mask);
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linkmode_and(state->advertising, state->advertising, mask);
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}
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static void sparx5_phylink_mac_config(struct phylink_config *config,
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unsigned int mode,
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const struct phylink_link_state *state)
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@ -187,7 +129,7 @@ const struct phylink_pcs_ops sparx5_phylink_pcs_ops = {
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};
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const struct phylink_mac_ops sparx5_phylink_mac_ops = {
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.validate = sparx5_phylink_validate,
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.validate = phylink_generic_validate,
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.mac_config = sparx5_phylink_mac_config,
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.mac_link_down = sparx5_phylink_mac_link_down,
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.mac_link_up = sparx5_phylink_mac_link_up,
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