net: phy: nxp-c45-tja11xx: add MACsec statistics
Add MACsec statistics callbacks. The statistic registers must be set to 0 if the SC/SA is deleted to read relevant values next time when the SC/SA is used. Signed-off-by: Radu Pirea (NXP OSS) <radu-nicolae.pirea@oss.nxp.com> Signed-off-by: David S. Miller <davem@davemloft.net>
This commit is contained in:
Radu Pirea (NXP OSS)
David S. Miller
parent
a868b486cb
commit
31a99fc06b
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@ -137,6 +137,35 @@
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#define ADAPTER_EN BIT(6)
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#define MACSEC_EN BIT(5)
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#define MACSEC_INOV1HS 0x0140
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#define MACSEC_INOV2HS 0x0144
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#define MACSEC_INOD1HS 0x0148
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#define MACSEC_INOD2HS 0x014C
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#define MACSEC_RXSCIPUS 0x0150
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#define MACSEC_RXSCIPDS 0x0154
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#define MACSEC_RXSCIPLS 0x0158
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#define MACSEC_RXAN0INUSS 0x0160
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#define MACSEC_RXAN0IPUSS 0x0170
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#define MACSEC_RXSA_A_IPOS 0x0194
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#define MACSEC_RXSA_A_IPIS 0x01B0
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#define MACSEC_RXSA_A_IPNVS 0x01B4
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#define MACSEC_RXSA_B_IPOS 0x01D4
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#define MACSEC_RXSA_B_IPIS 0x01F0
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#define MACSEC_RXSA_B_IPNVS 0x01F4
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#define MACSEC_OPUS 0x021C
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#define MACSEC_OPTLS 0x022C
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#define MACSEC_OOP1HS 0x0240
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#define MACSEC_OOP2HS 0x0244
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#define MACSEC_OOE1HS 0x0248
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#define MACSEC_OOE2HS 0x024C
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#define MACSEC_TXSA_A_OPPS 0x028C
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#define MACSEC_TXSA_A_OPES 0x0290
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#define MACSEC_TXSA_B_OPPS 0x02CC
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#define MACSEC_TXSA_B_OPES 0x02D0
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#define MACSEC_INPWTS 0x0630
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#define MACSEC_INPBTS 0x0638
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#define MACSEC_IPSNFS 0x063C
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enum nxp_c45_sa_type {
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TX_SA,
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RX_SA,
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@ -175,6 +204,11 @@ struct nxp_c45_sa_regs {
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u16 ka;
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u16 ssci;
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u16 salt;
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u16 ipis;
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u16 ipnvs;
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u16 ipos;
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u16 opps;
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u16 opes;
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};
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static const struct nxp_c45_sa_regs rx_sa_a_regs = {
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@ -186,6 +220,9 @@ static const struct nxp_c45_sa_regs rx_sa_a_regs = {
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.ka = MACSEC_RXSA_A_KA,
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.ssci = MACSEC_RXSA_A_SSCI,
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.salt = MACSEC_RXSA_A_SALT,
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.ipis = MACSEC_RXSA_A_IPIS,
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.ipnvs = MACSEC_RXSA_A_IPNVS,
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.ipos = MACSEC_RXSA_A_IPOS,
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};
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static const struct nxp_c45_sa_regs rx_sa_b_regs = {
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@ -197,6 +234,9 @@ static const struct nxp_c45_sa_regs rx_sa_b_regs = {
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.ka = MACSEC_RXSA_B_KA,
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.ssci = MACSEC_RXSA_B_SSCI,
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.salt = MACSEC_RXSA_B_SALT,
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.ipis = MACSEC_RXSA_B_IPIS,
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.ipnvs = MACSEC_RXSA_B_IPNVS,
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.ipos = MACSEC_RXSA_B_IPOS,
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};
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static const struct nxp_c45_sa_regs tx_sa_a_regs = {
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@ -206,6 +246,8 @@ static const struct nxp_c45_sa_regs tx_sa_a_regs = {
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.ka = MACSEC_TXSA_A_KA,
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.ssci = MACSEC_TXSA_A_SSCI,
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.salt = MACSEC_TXSA_A_SALT,
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.opps = MACSEC_TXSA_A_OPPS,
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.opes = MACSEC_TXSA_A_OPES,
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};
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static const struct nxp_c45_sa_regs tx_sa_b_regs = {
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@ -215,6 +257,8 @@ static const struct nxp_c45_sa_regs tx_sa_b_regs = {
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.ka = MACSEC_TXSA_B_KA,
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.ssci = MACSEC_TXSA_B_SSCI,
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.salt = MACSEC_TXSA_B_SALT,
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.opps = MACSEC_TXSA_B_OPPS,
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.opes = MACSEC_TXSA_B_OPES,
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};
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static const
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@ -284,6 +328,26 @@ static int nxp_c45_macsec_read(struct phy_device *phydev, u16 addr, u32 *value)
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return 0;
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}
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static void nxp_c45_macsec_read32_64(struct phy_device *phydev, u16 addr,
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u64 *value)
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{
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u32 lvalue;
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nxp_c45_macsec_read(phydev, addr, &lvalue);
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*value = lvalue;
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}
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static void nxp_c45_macsec_read64(struct phy_device *phydev, u16 addr,
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u64 *value)
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{
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u32 lvalue;
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nxp_c45_macsec_read(phydev, addr, &lvalue);
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*value = (u64)lvalue << 32;
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nxp_c45_macsec_read(phydev, addr + 4, &lvalue);
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*value |= lvalue;
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}
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static void nxp_c45_secy_irq_en(struct phy_device *phydev,
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struct nxp_c45_secy *phy_secy, bool en)
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{
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@ -445,6 +509,41 @@ static void nxp_c45_sa_set_key(struct macsec_context *ctx,
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nxp_c45_macsec_write(phydev, sa_regs->cs, MACSEC_SA_CS_A);
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}
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static void nxp_c45_rx_sa_clear_stats(struct phy_device *phydev,
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struct nxp_c45_sa *sa)
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{
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nxp_c45_macsec_write(phydev, sa->regs->ipis, 0);
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nxp_c45_macsec_write(phydev, sa->regs->ipnvs, 0);
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nxp_c45_macsec_write(phydev, sa->regs->ipos, 0);
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nxp_c45_macsec_write(phydev, MACSEC_RXAN0INUSS + sa->an * 4, 0);
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nxp_c45_macsec_write(phydev, MACSEC_RXAN0IPUSS + sa->an * 4, 0);
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}
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static void nxp_c45_rx_sa_read_stats(struct phy_device *phydev,
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struct nxp_c45_sa *sa,
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struct macsec_rx_sa_stats *stats)
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{
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nxp_c45_macsec_read(phydev, sa->regs->ipis, &stats->InPktsInvalid);
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nxp_c45_macsec_read(phydev, sa->regs->ipnvs, &stats->InPktsNotValid);
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nxp_c45_macsec_read(phydev, sa->regs->ipos, &stats->InPktsOK);
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}
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static void nxp_c45_tx_sa_clear_stats(struct phy_device *phydev,
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struct nxp_c45_sa *sa)
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{
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nxp_c45_macsec_write(phydev, sa->regs->opps, 0);
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nxp_c45_macsec_write(phydev, sa->regs->opes, 0);
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}
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static void nxp_c45_tx_sa_read_stats(struct phy_device *phydev,
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struct nxp_c45_sa *sa,
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struct macsec_tx_sa_stats *stats)
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{
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nxp_c45_macsec_read(phydev, sa->regs->opps, &stats->OutPktsProtected);
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nxp_c45_macsec_read(phydev, sa->regs->opes, &stats->OutPktsEncrypted);
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}
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static void nxp_c45_rx_sa_update(struct phy_device *phydev,
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struct nxp_c45_sa *sa, bool en)
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{
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@ -649,6 +748,23 @@ static void nxp_c45_tx_sc_update(struct phy_device *phydev,
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nxp_c45_macsec_write(phydev, MACSEC_TXSC_CFG, cfg);
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}
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static void nxp_c45_tx_sc_clear_stats(struct phy_device *phydev,
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struct nxp_c45_secy *phy_secy)
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{
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struct nxp_c45_sa *pos, *tmp;
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list_for_each_entry_safe(pos, tmp, &phy_secy->sa_list, list)
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if (pos->type == TX_SA)
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nxp_c45_tx_sa_clear_stats(phydev, pos);
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nxp_c45_macsec_write(phydev, MACSEC_OPUS, 0);
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nxp_c45_macsec_write(phydev, MACSEC_OPTLS, 0);
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nxp_c45_macsec_write(phydev, MACSEC_OOP1HS, 0);
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nxp_c45_macsec_write(phydev, MACSEC_OOP2HS, 0);
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nxp_c45_macsec_write(phydev, MACSEC_OOE1HS, 0);
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nxp_c45_macsec_write(phydev, MACSEC_OOE2HS, 0);
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}
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static void nxp_c45_set_rx_sc0_impl(struct phy_device *phydev,
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bool enable)
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{
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@ -733,6 +849,32 @@ static void nxp_c45_rx_sc_update(struct phy_device *phydev,
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nxp_c45_macsec_write(phydev, MACSEC_RXSC_CFG, cfg);
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}
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static void nxp_c45_rx_sc_clear_stats(struct phy_device *phydev,
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struct nxp_c45_secy *phy_secy)
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{
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struct nxp_c45_sa *pos, *tmp;
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int i;
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list_for_each_entry_safe(pos, tmp, &phy_secy->sa_list, list)
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if (pos->type == RX_SA)
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nxp_c45_rx_sa_clear_stats(phydev, pos);
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nxp_c45_macsec_write(phydev, MACSEC_INOD1HS, 0);
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nxp_c45_macsec_write(phydev, MACSEC_INOD2HS, 0);
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nxp_c45_macsec_write(phydev, MACSEC_INOV1HS, 0);
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nxp_c45_macsec_write(phydev, MACSEC_INOV2HS, 0);
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nxp_c45_macsec_write(phydev, MACSEC_RXSCIPDS, 0);
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nxp_c45_macsec_write(phydev, MACSEC_RXSCIPLS, 0);
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nxp_c45_macsec_write(phydev, MACSEC_RXSCIPUS, 0);
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for (i = 0; i < MACSEC_NUM_AN; i++) {
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nxp_c45_macsec_write(phydev, MACSEC_RXAN0INUSS + i * 4, 0);
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nxp_c45_macsec_write(phydev, MACSEC_RXAN0IPUSS + i * 4, 0);
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}
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}
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static void nxp_c45_rx_sc_del(struct phy_device *phydev,
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struct nxp_c45_secy *phy_secy)
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{
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@ -742,6 +884,8 @@ static void nxp_c45_rx_sc_del(struct phy_device *phydev,
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nxp_c45_macsec_write(phydev, MACSEC_RPW, 0);
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nxp_c45_set_sci(phydev, MACSEC_RXSC_SCI_1H, 0);
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nxp_c45_rx_sc_clear_stats(phydev, phy_secy);
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list_for_each_entry_safe(pos, tmp, &phy_secy->sa_list, list) {
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if (pos->type == RX_SA) {
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nxp_c45_rx_sa_update(phydev, pos, false);
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@ -750,6 +894,13 @@ static void nxp_c45_rx_sc_del(struct phy_device *phydev,
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}
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}
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static void nxp_c45_clear_global_stats(struct phy_device *phydev)
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{
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nxp_c45_macsec_write(phydev, MACSEC_INPBTS, 0);
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nxp_c45_macsec_write(phydev, MACSEC_INPWTS, 0);
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nxp_c45_macsec_write(phydev, MACSEC_IPSNFS, 0);
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}
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static void nxp_c45_macsec_en(struct phy_device *phydev, bool en)
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{
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u32 reg;
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@ -941,6 +1092,7 @@ static int nxp_c45_mdo_del_secy(struct macsec_context *ctx)
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nxp_c45_mdo_dev_stop(ctx);
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nxp_c45_tx_sa_next(phy_secy, &next_sa, encoding_sa);
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nxp_c45_tx_sa_update(phydev, &next_sa, false);
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nxp_c45_tx_sc_clear_stats(phydev, phy_secy);
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if (phy_secy->rx_sc)
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nxp_c45_rx_sc_del(phydev, phy_secy);
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@ -951,6 +1103,9 @@ static int nxp_c45_mdo_del_secy(struct macsec_context *ctx)
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clear_bit(phy_secy->secy_id, priv->macsec->tx_sc_bitmap);
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nxp_c45_secy_free(phy_secy);
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if (list_empty(&priv->macsec->secy_list))
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nxp_c45_clear_global_stats(phydev);
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return 0;
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}
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@ -1108,6 +1263,7 @@ static int nxp_c45_mdo_del_rxsa(struct macsec_context *ctx)
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nxp_c45_select_secy(phydev, phy_secy->secy_id);
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nxp_c45_rx_sa_update(phydev, sa, false);
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nxp_c45_rx_sa_clear_stats(phydev, sa);
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nxp_c45_sa_free(sa);
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@ -1197,12 +1353,196 @@ static int nxp_c45_mdo_del_txsa(struct macsec_context *ctx)
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nxp_c45_select_secy(phydev, phy_secy->secy_id);
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if (ctx->secy->tx_sc.encoding_sa == sa->an)
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nxp_c45_tx_sa_update(phydev, sa, false);
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nxp_c45_tx_sa_clear_stats(phydev, sa);
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nxp_c45_sa_free(sa);
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return 0;
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}
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static int nxp_c45_mdo_get_dev_stats(struct macsec_context *ctx)
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{
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struct phy_device *phydev = ctx->phydev;
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struct nxp_c45_phy *priv = phydev->priv;
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struct macsec_dev_stats *dev_stats;
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struct nxp_c45_secy *phy_secy;
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phy_secy = nxp_c45_find_secy(&priv->macsec->secy_list, ctx->secy->sci);
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if (IS_ERR(phy_secy))
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return PTR_ERR(phy_secy);
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dev_stats = ctx->stats.dev_stats;
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nxp_c45_select_secy(phydev, phy_secy->secy_id);
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nxp_c45_macsec_read32_64(phydev, MACSEC_OPUS,
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&dev_stats->OutPktsUntagged);
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nxp_c45_macsec_read32_64(phydev, MACSEC_OPTLS,
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&dev_stats->OutPktsTooLong);
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nxp_c45_macsec_read32_64(phydev, MACSEC_INPBTS,
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&dev_stats->InPktsBadTag);
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if (phy_secy->secy->validate_frames == MACSEC_VALIDATE_STRICT)
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nxp_c45_macsec_read32_64(phydev, MACSEC_INPWTS,
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&dev_stats->InPktsNoTag);
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else
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nxp_c45_macsec_read32_64(phydev, MACSEC_INPWTS,
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&dev_stats->InPktsUntagged);
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if (phy_secy->secy->validate_frames == MACSEC_VALIDATE_STRICT)
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nxp_c45_macsec_read32_64(phydev, MACSEC_IPSNFS,
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&dev_stats->InPktsNoSCI);
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else
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nxp_c45_macsec_read32_64(phydev, MACSEC_IPSNFS,
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&dev_stats->InPktsUnknownSCI);
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/* Always 0. */
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dev_stats->InPktsOverrun = 0;
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return 0;
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}
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static int nxp_c45_mdo_get_tx_sc_stats(struct macsec_context *ctx)
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{
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struct phy_device *phydev = ctx->phydev;
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struct nxp_c45_phy *priv = phydev->priv;
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struct macsec_tx_sa_stats tx_sa_stats;
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struct macsec_tx_sc_stats *stats;
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struct nxp_c45_secy *phy_secy;
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struct nxp_c45_sa *pos, *tmp;
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phy_secy = nxp_c45_find_secy(&priv->macsec->secy_list, ctx->secy->sci);
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if (IS_ERR(phy_secy))
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return PTR_ERR(phy_secy);
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stats = ctx->stats.tx_sc_stats;
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nxp_c45_select_secy(phydev, phy_secy->secy_id);
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nxp_c45_macsec_read64(phydev, MACSEC_OOE1HS,
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&stats->OutOctetsEncrypted);
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nxp_c45_macsec_read64(phydev, MACSEC_OOP1HS,
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&stats->OutOctetsProtected);
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list_for_each_entry_safe(pos, tmp, &phy_secy->sa_list, list) {
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if (pos->type != TX_SA)
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continue;
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memset(&tx_sa_stats, 0, sizeof(tx_sa_stats));
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nxp_c45_tx_sa_read_stats(phydev, pos, &tx_sa_stats);
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stats->OutPktsEncrypted += tx_sa_stats.OutPktsEncrypted;
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stats->OutPktsProtected += tx_sa_stats.OutPktsProtected;
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}
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return 0;
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}
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static int nxp_c45_mdo_get_tx_sa_stats(struct macsec_context *ctx)
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{
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struct phy_device *phydev = ctx->phydev;
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struct nxp_c45_phy *priv = phydev->priv;
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struct macsec_tx_sa_stats *stats;
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struct nxp_c45_secy *phy_secy;
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u8 an = ctx->sa.assoc_num;
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struct nxp_c45_sa *sa;
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phy_secy = nxp_c45_find_secy(&priv->macsec->secy_list, ctx->secy->sci);
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if (IS_ERR(phy_secy))
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return PTR_ERR(phy_secy);
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sa = nxp_c45_find_sa(&phy_secy->sa_list, TX_SA, an);
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if (IS_ERR(sa))
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return PTR_ERR(sa);
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stats = ctx->stats.tx_sa_stats;
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nxp_c45_select_secy(phydev, phy_secy->secy_id);
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nxp_c45_tx_sa_read_stats(phydev, sa, stats);
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return 0;
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}
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static int nxp_c45_mdo_get_rx_sc_stats(struct macsec_context *ctx)
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{
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||||
struct phy_device *phydev = ctx->phydev;
|
||||
struct nxp_c45_phy *priv = phydev->priv;
|
||||
struct macsec_rx_sa_stats rx_sa_stats;
|
||||
struct macsec_rx_sc_stats *stats;
|
||||
struct nxp_c45_secy *phy_secy;
|
||||
struct nxp_c45_sa *pos, *tmp;
|
||||
u32 reg = 0;
|
||||
int i;
|
||||
|
||||
phy_secy = nxp_c45_find_secy(&priv->macsec->secy_list, ctx->secy->sci);
|
||||
if (IS_ERR(phy_secy))
|
||||
return PTR_ERR(phy_secy);
|
||||
|
||||
if (phy_secy->rx_sc != ctx->rx_sc)
|
||||
return -EINVAL;
|
||||
|
||||
stats = ctx->stats.rx_sc_stats;
|
||||
nxp_c45_select_secy(phydev, phy_secy->secy_id);
|
||||
|
||||
list_for_each_entry_safe(pos, tmp, &phy_secy->sa_list, list) {
|
||||
if (pos->type != RX_SA)
|
||||
continue;
|
||||
|
||||
memset(&rx_sa_stats, 0, sizeof(rx_sa_stats));
|
||||
nxp_c45_rx_sa_read_stats(phydev, pos, &rx_sa_stats);
|
||||
|
||||
stats->InPktsInvalid += rx_sa_stats.InPktsInvalid;
|
||||
stats->InPktsNotValid += rx_sa_stats.InPktsNotValid;
|
||||
stats->InPktsOK += rx_sa_stats.InPktsOK;
|
||||
}
|
||||
|
||||
for (i = 0; i < MACSEC_NUM_AN; i++) {
|
||||
nxp_c45_macsec_read(phydev, MACSEC_RXAN0INUSS + i * 4, ®);
|
||||
stats->InPktsNotUsingSA += reg;
|
||||
nxp_c45_macsec_read(phydev, MACSEC_RXAN0IPUSS + i * 4, ®);
|
||||
stats->InPktsUnusedSA += reg;
|
||||
}
|
||||
|
||||
nxp_c45_macsec_read64(phydev, MACSEC_INOD1HS,
|
||||
&stats->InOctetsDecrypted);
|
||||
nxp_c45_macsec_read64(phydev, MACSEC_INOV1HS,
|
||||
&stats->InOctetsValidated);
|
||||
|
||||
nxp_c45_macsec_read32_64(phydev, MACSEC_RXSCIPDS,
|
||||
&stats->InPktsDelayed);
|
||||
nxp_c45_macsec_read32_64(phydev, MACSEC_RXSCIPLS,
|
||||
&stats->InPktsLate);
|
||||
nxp_c45_macsec_read32_64(phydev, MACSEC_RXSCIPUS,
|
||||
&stats->InPktsUnchecked);
|
||||
|
||||
return 0;
|
||||
}
|
||||
|
||||
static int nxp_c45_mdo_get_rx_sa_stats(struct macsec_context *ctx)
|
||||
{
|
||||
struct phy_device *phydev = ctx->phydev;
|
||||
struct nxp_c45_phy *priv = phydev->priv;
|
||||
struct macsec_rx_sa_stats *stats;
|
||||
struct nxp_c45_secy *phy_secy;
|
||||
u8 an = ctx->sa.assoc_num;
|
||||
struct nxp_c45_sa *sa;
|
||||
|
||||
phy_secy = nxp_c45_find_secy(&priv->macsec->secy_list, ctx->secy->sci);
|
||||
if (IS_ERR(phy_secy))
|
||||
return PTR_ERR(phy_secy);
|
||||
|
||||
sa = nxp_c45_find_sa(&phy_secy->sa_list, RX_SA, an);
|
||||
if (IS_ERR(sa))
|
||||
return PTR_ERR(sa);
|
||||
|
||||
stats = ctx->stats.rx_sa_stats;
|
||||
nxp_c45_select_secy(phydev, phy_secy->secy_id);
|
||||
|
||||
nxp_c45_rx_sa_read_stats(phydev, sa, stats);
|
||||
nxp_c45_macsec_read(phydev, MACSEC_RXAN0INUSS + an * 4,
|
||||
&stats->InPktsNotUsingSA);
|
||||
nxp_c45_macsec_read(phydev, MACSEC_RXAN0IPUSS + an * 4,
|
||||
&stats->InPktsUnusedSA);
|
||||
|
||||
return 0;
|
||||
}
|
||||
|
||||
static const struct macsec_ops nxp_c45_macsec_ops = {
|
||||
.mdo_dev_open = nxp_c45_mdo_dev_open,
|
||||
.mdo_dev_stop = nxp_c45_mdo_dev_stop,
|
||||
|
|
@ -1218,6 +1558,11 @@ static const struct macsec_ops nxp_c45_macsec_ops = {
|
|||
.mdo_add_txsa = nxp_c45_mdo_add_txsa,
|
||||
.mdo_upd_txsa = nxp_c45_mdo_upd_txsa,
|
||||
.mdo_del_txsa = nxp_c45_mdo_del_txsa,
|
||||
.mdo_get_dev_stats = nxp_c45_mdo_get_dev_stats,
|
||||
.mdo_get_tx_sc_stats = nxp_c45_mdo_get_tx_sc_stats,
|
||||
.mdo_get_tx_sa_stats = nxp_c45_mdo_get_tx_sa_stats,
|
||||
.mdo_get_rx_sc_stats = nxp_c45_mdo_get_rx_sc_stats,
|
||||
.mdo_get_rx_sa_stats = nxp_c45_mdo_get_rx_sa_stats,
|
||||
};
|
||||
|
||||
int nxp_c45_macsec_config_init(struct phy_device *phydev)
|
||||
|
|
|
|||
Loading…
Reference in New Issue