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i.MX ARM device tree update for 5.19: 

- New board support: PHYTEC phyGATE-Tauri-S, TQ-Systems MBa6UL,
   LS1021A IoT board, Toradex Iris and Aster carrier, i.MX7D SMEGW01,
   i.MXRT1050 EVK, Bosch ACC board.
 - A series from Alexander Stein to update i.MX51 based digi-connectcore
   board, regarding to DMA of UART devices, PMIC voltages, USB
   vbus-supply and usbphy.
 - A series of changes from David Jander and Oleksij Rempel to remove
   prototype specific deprecated code not used in production from
   i.MX6Q/DL Vicut1 board, and unify Vicut1 and Victgo variants to reduce
   maintaining overhead.
 - Quite some changes from different people to update imx6ull-colibri board
   on various aspects, touchscreen, device tree overlays, NAND BCH geometry,
   GPIO line names, FEC phy-supply, etc.
 - A couple of changes from Fabio Estevam to switch imx6dl-plybas and
   imx6ul-kontron-n6x1x-s to use standard 'uart-has-rtscts' property.
 - A couple of patches from Li Yang to update IFC device compatible and
   node name for LayerScape SoCs.
 - Disable USB host to work around boot issue on imx6qdl-udoo board.
 - A series from Max Krummenacher to update Colibri i.MX6DL device trees,
   drop dedicated v1.1 DT, disable add-on accessories, cleanups, etc.
 - Various random and small updates on i.MX28 and i.MX6 boards.
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Merge tag 'imx-dt-5.19' of git://git.kernel.org/pub/scm/linux/kernel/git/shawnguo/linux into arm/dt

i.MX ARM device tree update for 5.19:

- New board support: PHYTEC phyGATE-Tauri-S, TQ-Systems MBa6UL,
  LS1021A IoT board, Toradex Iris and Aster carrier, i.MX7D SMEGW01,
  i.MXRT1050 EVK, Bosch ACC board.
- A series from Alexander Stein to update i.MX51 based digi-connectcore
  board, regarding to DMA of UART devices, PMIC voltages, USB
  vbus-supply and usbphy.
- A series of changes from David Jander and Oleksij Rempel to remove
  prototype specific deprecated code not used in production from
  i.MX6Q/DL Vicut1 board, and unify Vicut1 and Victgo variants to reduce
  maintaining overhead.
- Quite some changes from different people to update imx6ull-colibri board
  on various aspects, touchscreen, device tree overlays, NAND BCH geometry,
  GPIO line names, FEC phy-supply, etc.
- A couple of changes from Fabio Estevam to switch imx6dl-plybas and
  imx6ul-kontron-n6x1x-s to use standard 'uart-has-rtscts' property.
- A couple of patches from Li Yang to update IFC device compatible and
  node name for LayerScape SoCs.
- Disable USB host to work around boot issue on imx6qdl-udoo board.
- A series from Max Krummenacher to update Colibri i.MX6DL device trees,
  drop dedicated v1.1 DT, disable add-on accessories, cleanups, etc.
- Various random and small updates on i.MX28 and i.MX6 boards.

* tag 'imx-dt-5.19' of git://git.kernel.org/pub/scm/linux/kernel/git/shawnguo/linux: (77 commits)
  ARM: dts: imx6ull-colibri: improve pinctrl node names
  ARM: dts: imx6ull-colibri: move gpio-keys node to som dtsi
  ARM: dts: imx6ull-colibri: add/update some comments
  ARM: dts: imx6ull-colibri: fix nand bch geometry
  ARM: dts: imx6ull-colibri: add support for toradex aster carrier boards
  ARM: dts: imx6ull-colibri: add support for toradex iris carrier boards
  ARM: dts: imx6ull-colibri: add gpio-line-names
  ARM: dts: imx6ull-colibri: update device trees to support overlays
  ARM: dts: imx6ull-colibri: update usdhc1 pixmux and signaling
  ARM: dts: imx6ull-colibri: add touchscreen device nodes
  ARM: dts: imx6ull-colibri: add phy-supply to fec
  ARM: dts: imx6ull-colibri: change touch i2c parameters
  ARM: dts: imx6ull-colibri: use pull-down for adc pins
  ARM: dts: Add bosch acc board
  ARM: dts: imx: Add i.MXRT1050-EVK support
  ARM: dts: imx7d-smegw01: Add support for i.MX7D SMEGW01 board
  ARM: dts: imx6qdl-udoo: Disable USB host to work around boot issues
  ARM: dts: imx27: use new 'dma-channels' property
  ARM: dts: imx6qdl-phytec: Add LED labels
  ARM: dts: ls1021a: reduce the interrupt-map-mask
  ...

Link: https://lore.kernel.org/r/20220508033843.2773685-3-shawnguo@kernel.org
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
This commit is contained in:
Arnd Bergmann 2022-05-09 23:43:09 +02:00
parent d4dcdc53c4 19a434aa3e
commit 31df43eff2
101 changed files with 5943 additions and 1463 deletions
Show Stats Download Patch File Download Diff File Expand all files Collapse all files

25
arch/arm/boot/dts/Makefile
View File

@ -462,8 +462,10 @@ dtb-$(CONFIG_SOC_IMX6Q) += \
imx6dl-aristainetos_7.dtb \
imx6dl-aristainetos2_4.dtb \
imx6dl-aristainetos2_7.dtb \
imx6dl-colibri-aster.dtb \
imx6dl-colibri-eval-v3.dtb \
imx6dl-colibri-v1_1-eval-v3.dtb \
imx6dl-colibri-iris.dtb \
imx6dl-colibri-iris-v2.dtb \
imx6dl-cubox-i.dtb \
imx6dl-cubox-i-emmc-som-v15.dtb \
imx6dl-cubox-i-som-v15.dtb \
@ -551,6 +553,7 @@ dtb-$(CONFIG_SOC_IMX6Q) += \
imx6q-b450v3.dtb \
imx6q-b650v3.dtb \
imx6q-b850v3.dtb \
imx6q-bosch-acc.dtb \
imx6q-cm-fx6.dtb \
imx6q-cubox-i.dtb \
imx6q-cubox-i-emmc-som-v15.dtb \
@ -694,6 +697,9 @@ dtb-$(CONFIG_SOC_IMX6UL) += \
imx6ul-kontron-n6310-s.dtb \
imx6ul-kontron-n6310-s-43.dtb \
imx6ul-liteboard.dtb \
imx6ul-tqma6ul1-mba6ulx.dtb \
imx6ul-tqma6ul2-mba6ulx.dtb \
imx6ul-tqma6ul2l-mba6ulx.dtb \
imx6ul-opos6uldev.dtb \
imx6ul-pico-dwarf.dtb \
imx6ul-pico-hobbit.dtb \
@ -705,15 +711,28 @@ dtb-$(CONFIG_SOC_IMX6UL) += \
imx6ul-tx6ul-0011.dtb \
imx6ul-tx6ul-mainboard.dtb \
imx6ull-14x14-evk.dtb \
imx6ull-colibri-aster.dtb \
imx6ull-colibri-emmc-aster.dtb \
imx6ull-colibri-emmc-eval-v3.dtb \
imx6ull-colibri-emmc-iris.dtb \
imx6ull-colibri-emmc-iris-v2.dtb \
imx6ull-colibri-eval-v3.dtb \
imx6ull-colibri-iris.dtb \
imx6ull-colibri-iris-v2.dtb \
imx6ull-colibri-wifi-aster.dtb \
imx6ull-colibri-wifi-eval-v3.dtb \
imx6ull-colibri-wifi-iris.dtb \
imx6ull-colibri-wifi-iris-v2.dtb \
imx6ull-jozacp.dtb \
imx6ull-myir-mys-6ulx-eval.dtb \
imx6ull-opos6uldev.dtb \
imx6ull-phytec-segin-ff-rdk-nand.dtb \
imx6ull-phytec-segin-ff-rdk-emmc.dtb \
imx6ull-phytec-segin-lc-rdk-nand.dtb \
imx6ull-phytec-tauri-emmc.dtb \
imx6ull-phytec-tauri-nand.dtb \
imx6ull-tqma6ull2-mba6ulx.dtb \
imx6ull-tqma6ull2l-mba6ulx.dtb \
imx6ulz-14x14-evk.dtb \
imx6ulz-bsh-smm-m2.dtb
dtb-$(CONFIG_SOC_IMX7D) += \
@ -736,6 +755,7 @@ dtb-$(CONFIG_SOC_IMX7D) += \
imx7d-sdb.dtb \
imx7d-sdb-reva.dtb \
imx7d-sdb-sht11.dtb \
imx7d-smegw01.dtb \
imx7d-zii-rmu2.dtb \
imx7d-zii-rpu2.dtb \
imx7s-colibri-aster.dtb \
@ -745,9 +765,12 @@ dtb-$(CONFIG_SOC_IMX7D) += \
dtb-$(CONFIG_SOC_IMX7ULP) += \
imx7ulp-com.dtb \
imx7ulp-evk.dtb
dtb-$(CONFIG_SOC_IMXRT) += \
imxrt1050-evk.dtb
dtb-$(CONFIG_SOC_LAN966) += \
lan966x-pcb8291.dtb
dtb-$(CONFIG_SOC_LS1021A) += \
ls1021a-iot.dtb \
ls1021a-moxa-uc-8410a.dtb \
ls1021a-qds.dtb \
ls1021a-tsn.dtb \

2
arch/arm/boot/dts/imx27.dtsi
View File

@ -96,7 +96,7 @@
<&clks IMX27_CLK_DMA_AHB_GATE>;
clock-names = "ipg", "ahb";
#dma-cells = <1>;
#dma-channels = <16>;
dma-channels = <16>;
};
wdog: watchdog@10002000 {

2
arch/arm/boot/dts/imx28-evk.dts
View File

@ -129,7 +129,7 @@
pinctrl-0 = <&spi2_pins_a>;
status = "okay";
flash: m25p80@0 {
flash: flash@0 {
#address-cells = <1>;
#size-cells = <1>;
compatible = "sst,sst25vf016b", "jedec,spi-nor";

2
arch/arm/boot/dts/imx28-m28evk.dts
View File

@ -33,7 +33,7 @@
pinctrl-0 = <&spi2_pins_a>;
status = "okay";
flash: m25p80@0 {
flash: flash@0 {
#address-cells = <1>;
#size-cells = <1>;
compatible = "m25p80", "jedec,spi-nor";

2
arch/arm/boot/dts/imx28-sps1.dts
View File

@ -51,7 +51,7 @@
pinctrl-0 = <&spi2_pins_a>;
status = "okay";
flash: m25p80@0 {
flash: flash@0 {
#address-cells = <1>;
#size-cells = <1>;
compatible = "everspin,mr25h256", "mr25h256";

8
arch/arm/boot/dts/imx51-digi-connectcore-jsk.dts
View File

@ -13,6 +13,13 @@
chosen {
stdout-path = &uart1;
};
usbphy1: usbphy1 {
compatible = "usb-nop-xceiv";
clocks = <&clks IMX5_CLK_USB_PHY_GATE>;
clock-names = "main_clk";
#phy-cells = <0>;
};
};
&esdhc1 {
@ -63,6 +70,7 @@
&usbh1 {
pinctrl-names = "default";
pinctrl-0 = <&pinctrl_usbh1>;
fsl,usbphy = <&usbphy1>;
dr_mode = "host";
phy_type = "ulpi";
disable-over-current;

25
arch/arm/boot/dts/imx51-digi-connectcore-som.dtsi
View File

@ -34,22 +34,22 @@
regulators {
sw1_reg: sw1 {
regulator-min-microvolt = <1000000>;
regulator-min-microvolt = <1050000>;
regulator-max-microvolt = <1100000>;
regulator-boot-on;
regulator-always-on;
};
sw2_reg: sw2 {
regulator-min-microvolt = <1225000>;
regulator-max-microvolt = <1225000>;
regulator-min-microvolt = <1175000>;
regulator-max-microvolt = <1275000>;
regulator-boot-on;
regulator-always-on;
};
sw3_reg: sw3 {
regulator-min-microvolt = <1200000>;
regulator-max-microvolt = <1200000>;
regulator-min-microvolt = <1150000>;
regulator-max-microvolt = <1350000>;
regulator-boot-on;
regulator-always-on;
};
@ -102,18 +102,6 @@
regulator-always-on;
};
vgen1_reg: vgen1 {
regulator-min-microvolt = <1200000>;
regulator-max-microvolt = <1200000>;
regulator-always-on;
};
vgen2_reg: vgen2 {
regulator-min-microvolt = <3150000>;
regulator-max-microvolt = <3150000>;
regulator-always-on;
};
vgen3_reg: vgen3 {
regulator-min-microvolt = <1800000>;
regulator-max-microvolt = <1800000>;
@ -124,8 +112,6 @@
regulator-always-on;
};
gpo1_reg: gpo1 { };
gpo2_reg: gpo2 { };
gpo3_reg: gpo3 { };
@ -198,6 +184,7 @@
&usbotg {
phy_type = "utmi_wide";
disable-over-current;
vbus-supply = <&swbst_reg>;
/* Device role is not known, keep status disabled */
};

6
arch/arm/boot/dts/imx51.dtsi
View File

@ -215,6 +215,8 @@
clocks = <&clks IMX5_CLK_UART3_IPG_GATE>,
<&clks IMX5_CLK_UART3_PER_GATE>;
clock-names = "ipg", "per";
dmas = <&sdma 43 5 1>, <&sdma 44 5 2>;
dma-names = "rx", "tx";
status = "disabled";
};
@ -426,6 +428,8 @@
clocks = <&clks IMX5_CLK_UART1_IPG_GATE>,
<&clks IMX5_CLK_UART1_PER_GATE>;
clock-names = "ipg", "per";
dmas = <&sdma 18 4 1>, <&sdma 19 4 2>;
dma-names = "rx", "tx";
status = "disabled";
};
@ -436,6 +440,8 @@
clocks = <&clks IMX5_CLK_UART2_IPG_GATE>,
<&clks IMX5_CLK_UART2_PER_GATE>;
clock-names = "ipg", "per";
dmas = <&sdma 16 4 1>, <&sdma 17 4 2>;
dma-names = "rx", "tx";
status = "disabled";
};

113
arch/arm/boot/dts/imx6dl-colibri-aster.dts Normal file
View File

@ -0,0 +1,113 @@
// SPDX-License-Identifier: GPL-2.0-or-later OR MIT
/*
* Copyright 2022 Toradex
*/
/dts-v1/;
#include <dt-bindings/input/input.h>
#include <dt-bindings/interrupt-controller/irq.h>
#include "imx6dl.dtsi"
#include "imx6qdl-colibri.dtsi"
/ {
model = "Toradex Colibri iMX6DL/S on Colibri Aster Board";
compatible = "toradex,colibri_imx6dl-aster", "toradex,colibri_imx6dl",
"fsl,imx6dl";
aliases {
i2c0 = &i2c2;
i2c1 = &i2c3;
};
chosen {
stdout-path = "serial0:115200n8";
};
};
/* Colibri SSP */
&ecspi4 {
cs-gpios = <
&gpio5 2 GPIO_ACTIVE_HIGH
&gpio5 4 GPIO_ACTIVE_HIGH
>;
pinctrl-names = "default";
pinctrl-0 = <&pinctrl_ecspi4 &pinctrl_csi_gpio_2>;
status = "okay";
};
/* Colibri I2C: I2C3_SDA/SCL on SODIMM 194/196 */
&i2c3 {
status = "okay";
};
&iomuxc {
pinctrl-names = "default";
pinctrl-0 = <
&pinctrl_csi_gpio_1
&pinctrl_gpio_2
&pinctrl_gpio_aster
&pinctrl_usbh_oc_1
&pinctrl_usbc_id_1
&pinctrl_weim_gpio_5
>;
pinctrl_gpio_aster: gpioaster {
fsl,pins = <
MX6QDL_PAD_KEY_COL2__GPIO4_IO10 0x1b0b0
MX6QDL_PAD_KEY_ROW2__GPIO4_IO11 0x1b0b0
MX6QDL_PAD_KEY_ROW4__GPIO4_IO15 0x1b0b0
MX6QDL_PAD_NANDF_D1__GPIO2_IO01 0x1b0b0
MX6QDL_PAD_NANDF_D3__GPIO2_IO03 0x1b0b0
MX6QDL_PAD_NANDF_D6__GPIO2_IO06 0x1b0b0
MX6QDL_PAD_SD4_DAT0__GPIO2_IO08 0x1b0b0
MX6QDL_PAD_SD4_DAT3__GPIO2_IO11 0x1b0b0
>;
};
};
&pwm1 {
status = "okay";
};
&pwm2 {
status = "okay";
};
&pwm3 {
status = "okay";
};
&pwm4 {
status = "okay";
};
&reg_usb_host_vbus {
status = "okay";
};
&uart1 {
status = "okay";
};
&uart2 {
status = "okay";
};
&uart3 {
status = "okay";
};
&usbh1 {
vbus-supply = <&reg_usb_host_vbus>;
status = "okay";
};
&usbotg {
status = "okay";
};
/* Colibri MMC */
&usdhc1 {
status = "okay";
};

110
arch/arm/boot/dts/imx6dl-colibri-eval-v3.dts
View File

@ -1,6 +1,6 @@
// SPDX-License-Identifier: GPL-2.0+ OR MIT
// SPDX-License-Identifier: GPL-2.0-or-later OR MIT
/*
* Copyright 2014-2020 Toradex
* Copyright 2014-2022 Toradex
* Copyright 2012 Freescale Semiconductor, Inc.
* Copyright 2011 Linaro Ltd.
*/
@ -17,12 +17,6 @@
compatible = "toradex,colibri_imx6dl-eval-v3", "toradex,colibri_imx6dl",
"fsl,imx6dl";
/* Will be filled by the bootloader */
memory@10000000 {
device_type = "memory";
reg = <0x10000000 0>;
};
aliases {
i2c0 = &i2c2;
i2c1 = &i2c3;
@ -44,67 +38,6 @@
clock-frequency = <16000000>;
clock-output-names = "clk16m";
};
gpio-keys {
compatible = "gpio-keys";
pinctrl-names = "default";
pinctrl-0 = <&pinctrl_gpio_keys>;
wakeup {
label = "Wake-Up";
gpios = <&gpio2 22 GPIO_ACTIVE_HIGH>; /* SODIMM 45 */
linux,code = <KEY_WAKEUP>;
debounce-interval = <10>;
wakeup-source;
};
};
lcd_display: disp0 {
compatible = "fsl,imx-parallel-display";
#address-cells = <1>;
#size-cells = <0>;
interface-pix-fmt = "bgr666";
pinctrl-names = "default";
pinctrl-0 = <&pinctrl_ipu1_lcdif>;
status = "okay";
port@0 {
reg = <0>;
lcd_display_in: endpoint {
remote-endpoint = <&ipu1_di0_disp0>;
};
};
port@1 {
reg = <1>;
lcd_display_out: endpoint {
remote-endpoint = <&lcd_panel_in>;
};
};
};
panel: panel {
/*
* edt,et057090dhu: EDT 5.7" LCD TFT
* edt,et070080dh6: EDT 7.0" LCD TFT
*/
compatible = "edt,et057090dhu";
backlight = <&backlight>;
port {
lcd_panel_in: endpoint {
remote-endpoint = <&lcd_display_out>;
};
};
};
};
&backlight {
brightness-levels = <0 127 191 223 239 247 251 255>;
default-brightness-level = <1>;
status = "okay";
};
/* Colibri SSP */
@ -113,40 +46,21 @@
mcp251x0: mcp251x@0 {
compatible = "microchip,mcp2515";
reg = <0>;
clocks = <&clk16m>;
interrupt-parent = <&gpio3>;
interrupts = <27 0x2>;
reg = <0>;
spi-max-frequency = <10000000>;
status = "okay";
};
};
&hdmi {
status = "okay";
};
/*
* Colibri I2C: I2C3_SDA/SCL on SODIMM 194/196 (e.g. RTC on carrier board)
*/
&i2c3 {
status = "okay";
/*
* Touchscreen is using SODIMM 28/30, also used for PWM<B>, PWM<C>,
* aka pwm2, pwm3. so if you enable touchscreen, disable the pwms
*/
touchscreen@4a {
compatible = "atmel,maxtouch";
pinctrl-names = "default";
pinctrl-0 = <&pinctrl_pcap_1>;
reg = <0x4a>;
interrupt-parent = <&gpio1>;
interrupts = <9 IRQ_TYPE_EDGE_FALLING>; /* SODIMM 28 */
reset-gpios = <&gpio2 10 GPIO_ACTIVE_LOW>; /* SODIMM 30 */
status = "disabled";
};
/* M41T0M6 real time clock on carrier board */
rtc_i2c: rtc@68 {
compatible = "st,m41t0";
@ -162,24 +76,6 @@
&pinctrl_weim_gpio_5 &pinctrl_weim_gpio_6
&pinctrl_usbh_oc_1 &pinctrl_usbc_id_1
>;
pinctrl_pcap_1: pcap1grp {
fsl,pins = <
MX6QDL_PAD_GPIO_9__GPIO1_IO09 0x1b0b0 /* SODIMM 28 */
MX6QDL_PAD_SD4_DAT2__GPIO2_IO10 0x1b0b0 /* SODIMM 30 */
>;
};
pinctrl_mxt_ts: mxttsgrp {
fsl,pins = <
MX6QDL_PAD_EIM_CS1__GPIO2_IO24 0x130b0 /* SODIMM 107 */
MX6QDL_PAD_SD2_DAT1__GPIO1_IO14 0x130b0 /* SODIMM 106 */
>;
};
};
&ipu1_di0_disp0 {
remote-endpoint = <&lcd_display_in>;
};
&pwm1 {

46
arch/arm/boot/dts/imx6dl-colibri-iris-v2.dts Normal file
View File

@ -0,0 +1,46 @@
// SPDX-License-Identifier: GPL-2.0-or-later OR MIT
/*
* Copyright 2022 Toradex
*/
/dts-v1/;
#include "imx6dl-colibri-iris.dts"
/ {
model = "Toradex Colibri iMX6DL/S on Colibri Iris V2 Board";
compatible = "toradex,colibri_imx6dl-iris-v2", "toradex,colibri_imx6dl",
"fsl,imx6dl";
reg_3v3_vmmc: regulator-3v3-vmmc {
compatible = "regulator-fixed";
pinctrl-names = "default";
pinctrl-0 = <&pinctrl_enable_3v3_vmmc>;
regulator-name = "3v3_vmmc";
regulator-min-microvolt = <3300000>;
regulator-max-microvolt = <3300000>;
gpio = <&gpio2 11 GPIO_ACTIVE_HIGH>;
startup-delay-us = <100>;
enable-active-high;
};
};
&iomuxc {
pinctrl-names = "default";
pinctrl-0 = <&pinctrl_gpio_iris &pinctrl_usbh_oc_1 &pinctrl_usbc_id_1>;
pinctrl_enable_3v3_vmmc: enable3v3vmmcgrp {
fsl,pins = <
MX6QDL_PAD_SD4_DAT3__GPIO2_IO11 0x1b0b0
>;
};
};
/* Colibri MMC */
&usdhc1 {
cap-power-off-card;
/* uncomment the following to enable SD card UHS mode if you have a V1.1 module */
/* /delete-property/ no-1-8-v; */
vmmc-supply = <&reg_3v3_vmmc>;
status = "okay";
};

152
arch/arm/boot/dts/imx6dl-colibri-iris.dts Normal file
View File

@ -0,0 +1,152 @@
// SPDX-License-Identifier: GPL-2.0-or-later OR MIT
/*
* Copyright 2022 Toradex
*/
/dts-v1/;
#include <dt-bindings/input/input.h>
#include <dt-bindings/interrupt-controller/irq.h>
#include "imx6dl.dtsi"
#include "imx6qdl-colibri.dtsi"
/ {
model = "Toradex Colibri iMX6DL/S on Colibri Iris Board";
compatible = "toradex,colibri_imx6dl-iris", "toradex,colibri_imx6dl",
"fsl,imx6dl";
aliases {
i2c0 = &i2c2;
i2c1 = &i2c3;
};
aliases {
rtc0 = &rtc_i2c;
rtc1 = &snvs_rtc;
};
chosen {
stdout-path = "serial0:115200n8";
};
};
/* Colibri SSP */
&ecspi4 {
status = "okay";
};
&gpio2 {
pinctrl-names = "default";
pinctrl-0 = <&pinctrl_uart1_forceoff &pinctrl_uart23_forceoff>;
/*
* uart-a-on-x13-enable turns the UART transceiver for UART_A on. If one
* wants to turn the transceiver off, that property has to be deleted
* and the gpio handled in userspace.
* The same applies to uart-b-c-on-x14-enable where the UART_B and
* UART_C transceiver is turned on.
*/
uart-a-on-x13-enable-hog {
gpio-hog;
gpios = <4 GPIO_ACTIVE_HIGH>; /* SODIMM 102 */
output-high;
};
uart-b-c-on-x14-enable-hog {
gpio-hog;
gpios = <8 GPIO_ACTIVE_HIGH>; /* SODIMM 104 */
output-high;
};
};
/*
* Colibri I2C: I2C3_SDA/SCL on SODIMM 194/196 (e.g. RTC on carrier board)
*/
&i2c3 {
status = "okay";
rtc_i2c: rtc@68 {
compatible = "st,m41t0";
reg = <0x68>;
};
};
&iomuxc {
pinctrl-names = "default";
pinctrl-0 = <
&pinctrl_gpio_iris
&pinctrl_usbh_oc_1
&pinctrl_usbc_id_1
>;
pinctrl_gpio_iris: gpioirisgrp {
fsl,pins = <
MX6QDL_PAD_EIM_A17__GPIO2_IO21 0x1b0b0
MX6QDL_PAD_EIM_A18__GPIO2_IO20 0x1b0b0
MX6QDL_PAD_EIM_A19__GPIO2_IO19 0x1b0b0
MX6QDL_PAD_EIM_A20__GPIO2_IO18 0x1b0b0
MX6QDL_PAD_EIM_A23__GPIO6_IO06 0x1b0b0
MX6QDL_PAD_EIM_D27__GPIO3_IO27 0x1b0b0
MX6QDL_PAD_NANDF_D3__GPIO2_IO03 0x1b0b0
MX6QDL_PAD_SD2_DAT0__GPIO1_IO15 0x1b0b0
>;
};
pinctrl_uart1_forceoff: uart1forceoffgrp {
fsl,pins = <
MX6QDL_PAD_NANDF_D4__GPIO2_IO04 0x1b0b0
>;
};
pinctrl_uart23_forceoff: uart23forceoffgrp {
fsl,pins = <
MX6QDL_PAD_SD4_DAT0__GPIO2_IO08 0x1b0b0
>;
};
};
&pwm1 {
status = "okay";
};
&pwm2 {
status = "okay";
};
&pwm3 {
status = "okay";
};
&pwm4 {
status = "okay";
};
&reg_usb_host_vbus {
status = "okay";
};
&uart1 {
status = "okay";
};
&uart2 {
status = "okay";
};
&uart3 {
status = "okay";
};
&usbh1 {
vbus-supply = <&reg_usb_host_vbus>;
status = "okay";
};
&usbotg {
status = "okay";
};
/* Colibri MMC */
&usdhc1 {
status = "okay";
};

31
arch/arm/boot/dts/imx6dl-colibri-v1_1-eval-v3.dts
View File

@ -1,31 +0,0 @@
// SPDX-License-Identifier: GPL-2.0+ OR MIT
/*
* Copyright 2020 Toradex
*/
/dts-v1/;
#include "imx6dl-colibri-eval-v3.dts"
#include "imx6qdl-colibri-v1_1-uhs.dtsi"
/ {
model = "Toradex Colibri iMX6DL/S V1.1 on Colibri Evaluation Board V3";
compatible = "toradex,colibri_imx6dl-v1_1-eval-v3",
"toradex,colibri_imx6dl-v1_1",
"toradex,colibri_imx6dl-eval-v3",
"toradex,colibri_imx6dl",
"fsl,imx6dl";
};
/* Colibri MMC */
&usdhc1 {
status = "okay";
/*
* Please make sure your carrier board does not pull-up any of
* the MMC/SD signals to 3.3 volt before attempting to activate
* UHS-I support.
* To let signaling voltage be changed to 1.8V, please
* delete no-1-8-v property (example below):
* /delete-property/no-1-8-v;
*/
};

6
arch/arm/boot/dts/imx6dl-eckelmann-ci4x10.dts
View File

@ -297,7 +297,11 @@
phy-mode = "rmii";
phy-reset-gpios = <&gpio1 18 GPIO_ACTIVE_LOW>;
phy-handle = <&phy>;
clocks = <&clks IMX6QDL_CLK_ENET>, <&clks IMX6QDL_CLK_ENET>, <&rmii_clk>;
clocks = <&clks IMX6QDL_CLK_ENET>,
<&clks IMX6QDL_CLK_ENET>,
<&rmii_clk>,
<&clks IMX6QDL_CLK_ENET_REF>;
clock-names = "ipg", "ahb", "ptp", "enet_out";
status = "okay";
mdio {

2
arch/arm/boot/dts/imx6dl-plybas.dts
View File

@ -214,7 +214,7 @@
&uart2 {
pinctrl-names = "default";
pinctrl-0 = <&pinctrl_uart2>;
fsl,uart-has-rtscts;
uart-has-rtscts;
linux,rs485-enabled-at-boot-time;
rs485-rts-delay = <0 20>;
status = "okay";

2
arch/arm/boot/dts/imx6dl-rex-basic.dts
View File

@ -19,7 +19,7 @@
};
&ecspi3 {
flash: m25p80@0 {
flash: flash@0 {
compatible = "sst,sst25vf016b", "jedec,spi-nor";
spi-max-frequency = <20000000>;
reg = <0>;

657
arch/arm/boot/dts/imx6dl-victgo.dts
View File

@ -5,46 +5,13 @@
*/
/dts-v1/;
#include <dt-bindings/display/sdtv-standards.h>
#include <dt-bindings/gpio/gpio.h>
#include <dt-bindings/input/input.h>
#include <dt-bindings/leds/common.h>
#include <dt-bindings/media/tvp5150.h>
#include <dt-bindings/sound/fsl-imx-audmux.h>
#include "imx6dl.dtsi"
#include "imx6qdl-vicut1.dtsi"
/ {
model = "Kverneland TGO";
compatible = "kvg,victgo", "fsl,imx6dl";
chosen {
stdout-path = &uart4;
};
backlight: backlight {
compatible = "pwm-backlight";
pinctrl-names = "default";
pinctrl-0 = <&pinctrl_backlight>;
pwms = <&pwm1 0 5000000 0>;
brightness-levels = <0 16 64 255>;
num-interpolated-steps = <16>;
default-brightness-level = <1>;
power-supply = <&reg_3v3>;
enable-gpios = <&gpio4 28 GPIO_ACTIVE_HIGH>;
};
connector {
compatible = "composite-video-connector";
label = "Composite0";
sdtv-standards = <SDTV_STD_PAL_B>;
port {
comp0_out: endpoint {
remote-endpoint = <&tvp5150_comp0_in>;
};
};
};
gpio-keys {
compatible = "gpio-keys";
pinctrl-names = "default";
@ -71,36 +38,9 @@
io-channels = <&vdiv_vaccu>, <&vdiv_hitch_pos>;
};
leds {
compatible = "gpio-leds";
pinctrl-names = "default";
pinctrl-0 = <&pinctrl_leds>;
led-0 {
label = "debug0";
function = LED_FUNCTION_HEARTBEAT;
gpios = <&gpio1 8 GPIO_ACTIVE_HIGH>;
linux,default-trigger = "heartbeat";
};
led-1 {
label = "debug1";
function = LED_FUNCTION_DISK;
gpios = <&gpio1 9 GPIO_ACTIVE_HIGH>;
linux,default-trigger = "disk-activity";
};
led-2 {
label = "power_led";
function = LED_FUNCTION_POWER;
gpios = <&gpio2 24 GPIO_ACTIVE_HIGH>;
default-state = "on";
};
};
panel {
compatible = "kyo,tcg121xglp";
backlight = <&backlight>;
compatible = "lg,lb070wv8";
backlight = <&backlight_lcd>;
power-supply = <&reg_3v3>;
port {
@ -116,38 +56,6 @@
clock-frequency = <50000000>;
};
reg_1v8: regulator-1v8 {
compatible = "regulator-fixed";
regulator-name = "1v8";
regulator-min-microvolt = <1800000>;
regulator-max-microvolt = <1800000>;
};
reg_3v3: regulator-3v3 {
compatible = "regulator-fixed";
regulator-name = "3v3";
regulator-min-microvolt = <3300000>;
regulator-max-microvolt = <3300000>;
};
reg_h1_vbus: regulator-h1-vbus {
compatible = "regulator-fixed";
regulator-name = "h1-vbus";
regulator-min-microvolt = <5000000>;
regulator-max-microvolt = <5000000>;
gpio = <&gpio1 0 GPIO_ACTIVE_HIGH>;
enable-active-high;
};
reg_otg_vbus: regulator-otg-vbus {
compatible = "regulator-fixed";
regulator-name = "otg-vbus";
regulator-min-microvolt = <5000000>;
regulator-max-microvolt = <5000000>;
gpio = <&gpio3 22 GPIO_ACTIVE_HIGH>;
enable-active-high;
};
rotary-encoder {
compatible = "rotary-encoder";
pinctrl-0 = <&pinctrl_rotary_ch>;
@ -160,33 +68,6 @@
wakeup-source;
};
sound {
compatible = "simple-audio-card";
simple-audio-card,name = "prti6q-sgtl5000";
simple-audio-card,format = "i2s";
simple-audio-card,widgets =
"Microphone", "Microphone Jack",
"Line", "Line In Jack",
"Headphone", "Headphone Jack",
"Speaker", "External Speaker";
simple-audio-card,routing =
"MIC_IN", "Microphone Jack",
"LINE_IN", "Line In Jack",
"Headphone Jack", "HP_OUT",
"External Speaker", "LINE_OUT";
simple-audio-card,cpu {
sound-dai = <&ssi1>;
system-clock-frequency = <0>;
};
simple-audio-card,codec {
sound-dai = <&codec>;
bitclock-master;
frame-master;
};
};
thermal-zones {
chassis-thermal {
polling-delay = <20000>;
@ -213,7 +94,6 @@
<&adc_ts 5>;
io-channel-names = "y", "z1", "z2", "x";
touchscreen-min-pressure = <64687>;
touchscreen-inverted-x;
touchscreen-inverted-y;
touchscreen-x-plate-ohms = <300>;
touchscreen-y-plate-ohms = <800>;
@ -254,61 +134,6 @@
};
};
&audmux {
pinctrl-names = "default";
pinctrl-0 = <&pinctrl_audmux>;
status = "okay";
mux-ssi1 {
fsl,audmux-port = <0>;
fsl,port-config = <
IMX_AUDMUX_V2_PTCR_SYN 0
IMX_AUDMUX_V2_PTCR_TFSEL(2) 0
IMX_AUDMUX_V2_PTCR_TCSEL(2) 0
IMX_AUDMUX_V2_PTCR_TFSDIR 0
IMX_AUDMUX_V2_PTCR_TCLKDIR IMX_AUDMUX_V2_PDCR_RXDSEL(2)
>;
};
mux-pins3 {
fsl,audmux-port = <2>;
fsl,port-config = <
IMX_AUDMUX_V2_PTCR_SYN IMX_AUDMUX_V2_PDCR_RXDSEL(0)
0 IMX_AUDMUX_V2_PDCR_TXRXEN
>;
};
};
&can1 {
pinctrl-names = "default";
pinctrl-0 = <&pinctrl_can1>;
status = "okay";
};
&can2 {
pinctrl-names = "default";
pinctrl-0 = <&pinctrl_can2>;
status = "okay";
};
&clks {
assigned-clocks = <&clks IMX6QDL_CLK_LDB_DI0_SEL>;
assigned-clock-parents = <&clks IMX6QDL_CLK_PLL5_VIDEO_DIV>;
};
&ecspi1 {
cs-gpios = <&gpio3 19 GPIO_ACTIVE_LOW>;
pinctrl-names = "default";
pinctrl-0 = <&pinctrl_ecspi1>;
status = "okay";
flash@0 {
compatible = "jedec,spi-nor";
reg = <0>;
spi-max-frequency = <20000000>;
};
};
&ecspi2 {
cs-gpios = <&gpio5 12 GPIO_ACTIVE_LOW>;
pinctrl-names = "default";
@ -385,36 +210,19 @@
"CAM2_MIRROR", "", "", "SMBALERT",
"DEBUG_0", "DEBUG_1", "", "", "", "", "", "",
"SD1_DATA0", "SD1_DATA1", "SD1_CMD", "SD1_DATA2", "SD1_CLK",
"SD1_DATA3", "", "",
"", "", "", "", "", "", "", "";
};
&gpio2 {
gpio-line-names =
"", "", "", "", "", "", "", "",
"REV_ID0", "REV_ID1", "REV_ID2", "REV_ID3", "REV_ID4",
"BOARD_ID0", "BOARD_ID1", "BOARD_ID2",
"", "", "", "", "", "", "ISB_IN1", "ON_SWITCH",
"POWER_LED", "", "", "", "", "", "", "";
};
&gpio3 {
gpio-line-names =
"", "", "", "", "", "", "", "",
"", "", "", "", "", "", "", "",
"ECSPI1_SCLK", "ECSPI1_MISO", "ECSPI1_MOSI", "ECSPI1_SS1",
"CPU_ON1_FB", "USB_EXT1_OC", "USB_EXT1_PWR", "YACO_IRQ",
"TSS_TXD", "TSS_RXD", "", "", "", "", "YACO_BOOT0",
"YACO_RESET";
"SD1_DATA3", "ETH_MDIO", "",
"", "", "", "", "", "", "", "ETH_MDC";
};
&gpio4 {
gpio-line-names =
"", "", "", "", "", "", "", "",
"", "", "", "", "CAN1_SR", "CAN2_SR", "CAN2_TX", "CAN2_RX",
"", "", "DIP1_FB", "", "VCAM_EN", "", "", "",
"CPU_LIGHT_ON", "", "ETH_RESET", "CPU_CONTACT_IN", "BL_EN",
"BL_PWM", "ETH_INTRP", "ISB_LED";
"", "", "", "", "", "", "UART4_TXD", "UART4_RXD",
"UART5_TXD", "UART5_RXD", "CAN1_TX", "CAN1_RX", "CAN1_SR",
"CAN2_SR", "CAN2_TX", "CAN2_RX",
"", "", "DIP1_FB", "", "VCAM_EN", "ON1_CTRL", "ON2_CTRL",
"HITCH_IN_OUT",
"LIGHT_ON", "", "ETH_RESET", "CONTACT_IN", "BL_EN",
"BL_PWM", "ETH_INT", "ISB_LED";
};
&gpio5 {
@ -422,51 +230,22 @@
"", "", "", "", "", "", "", "",
"TSC_PENIRQ", "TSC_BUSY", "ECSPI2_MOSI", "ECSPI2_MISO",
"ECSPI2_SS0", "ECSPI2_SCLK", "", "",
"", "", "", "", "", "", "", "",
"", "", "ITU656_CLK", "I2S_MCLK", "ITU656_PDN", "AUDIO_RESET",
"I2S_BITCLK", "I2S_DOUT",
"I2S_LRCLK", "I2S_DIN", "I2C1_SDA", "I2C1_SCL", "YACO_AUX_RX",
"YACO_AUX_TX", "ITU656_D0", "ITU656_D1";
};
&gpio6 {
gpio-line-names =
"ITU656_D2", "ITU656_D3", "ITU656_D4", "ITU656_D5",
"ITU656_D6", "ITU656_D7", "", "",
"", "", "", "", "", "", "", "",
"", "", "", "", "", "", "", "",
"", "", "", "", "", "", "", "";
};
&i2c1 {
clock-frequency = <100000>;
pinctrl-names = "default";
pinctrl-0 = <&pinctrl_i2c1>;
status = "okay";
codec: audio-codec@a {
compatible = "fsl,sgtl5000";
reg = <0xa>;
#sound-dai-cells = <0>;
clocks = <&clks 201>;
VDDA-supply = <&reg_3v3>;
VDDIO-supply = <&reg_3v3>;
VDDD-supply = <&reg_1v8>;
};
video-decoder@5c {
compatible = "ti,tvp5150";
reg = <0x5c>;
#address-cells = <1>;
#size-cells = <0>;
port@0 {
reg = <0>;
tvp5150_comp0_in: endpoint {
remote-endpoint = <&comp0_out>;
};
};
/* Output port 2 is video output pad */
port@2 {
reg = <2>;
tvp5151_to_ipu1_csi0_mux: endpoint {
remote-endpoint = <&ipu1_csi0_mux_from_parallel_sensor>;
};
};
};
keypad@70 {
compatible = "holtek,ht16k33";
pinctrl-names = "default";
@ -490,225 +269,9 @@
MATRIX_KEY(6, 1, KEY_F1)
>;
};
/* additional i2c devices are added automatically by the boot loader */
};
&i2c3 {
clock-frequency = <100000>;
pinctrl-names = "default";
pinctrl-0 = <&pinctrl_i2c3>;
status = "okay";
adc@49 {
compatible = "ti,ads1015";
reg = <0x49>;
#address-cells = <1>;
#size-cells = <0>;
channel@4 {
reg = <4>;
ti,gain = <3>;
ti,datarate = <3>;
};
channel@5 {
reg = <5>;
ti,gain = <3>;
ti,datarate = <3>;
};
channel@6 {
reg = <6>;
ti,gain = <3>;
ti,datarate = <3>;
};
channel@7 {
reg = <7>;
ti,gain = <3>;
ti,datarate = <3>;
};
};
rtc@51 {
compatible = "nxp,pcf8563";
reg = <0x51>;
};
tsens0: temperature-sensor@70 {
compatible = "ti,tmp103";
reg = <0x70>;
#thermal-sensor-cells = <0>;
};
};
&ipu1_csi0 {
pinctrl-names = "default";
pinctrl-0 = <&pinctrl_ipu1_csi0>;
status = "okay";
};
&ipu1_csi0_mux_from_parallel_sensor {
remote-endpoint = <&tvp5151_to_ipu1_csi0_mux>;
};
&ldb {
status = "okay";
lvds-channel@0 {
status = "okay";
port@4 {
reg = <4>;
lvds0_out: endpoint {
remote-endpoint = <&panel_in>;
};
};
};
};
&pwm1 {
pinctrl-names = "default";
pinctrl-0 = <&pinctrl_pwm1>;
status = "okay";
};
&pwm3 {
pinctrl-names = "default";
pinctrl-0 = <&pinctrl_pwm3>;
status = "okay";
};
&ssi1 {
#sound-dai-cells = <0>;
fsl,mode = "ac97-slave";
status = "okay";
};
&uart1 {
pinctrl-names = "default";
pinctrl-0 = <&pinctrl_uart1>;
status = "okay";
};
&uart2 {
pinctrl-names = "default";
pinctrl-0 = <&pinctrl_uart2>;
status = "okay";
};
&uart3 {
pinctrl-names = "default";
pinctrl-0 = <&pinctrl_uart3>;
status = "okay";
};
&uart4 {
pinctrl-names = "default";
pinctrl-0 = <&pinctrl_uart4>;
status = "okay";
};
&uart5 {
pinctrl-names = "default";
pinctrl-0 = <&pinctrl_uart5>;
status = "okay";
};
&usbh1 {
vbus-supply = <&reg_h1_vbus>;
pinctrl-names = "default";
phy_type = "utmi";
dr_mode = "host";
status = "okay";
};
&usbotg {
vbus-supply = <&reg_otg_vbus>;
pinctrl-names = "default";
pinctrl-0 = <&pinctrl_usbotg>;
phy_type = "utmi";
dr_mode = "host";
disable-over-current;
status = "okay";
};
&usdhc1 {
pinctrl-names = "default";
pinctrl-0 = <&pinctrl_usdhc1>;
cd-gpios = <&gpio1 1 GPIO_ACTIVE_LOW>;
no-1-8-v;
disable-wp;
cap-sd-highspeed;
no-mmc;
no-sdio;
status = "okay";
};
&usdhc3 {
pinctrl-names = "default";
pinctrl-0 = <&pinctrl_usdhc3>;
bus-width = <8>;
no-1-8-v;
non-removable;
no-sd;
no-sdio;
status = "okay";
};
&iomuxc {
pinctrl-names = "default";
pinctrl-0 = <&pinctrl_hog>;
pinctrl_audmux: audmuxgrp {
fsl,pins = <
/* SGTL5000 sys_mclk */
MX6QDL_PAD_CSI0_MCLK__CCM_CLKO1 0x030b0
MX6QDL_PAD_CSI0_DAT7__AUD3_RXD 0x130b0
MX6QDL_PAD_CSI0_DAT4__AUD3_TXC 0x130b0
MX6QDL_PAD_CSI0_DAT5__AUD3_TXD 0x110b0
MX6QDL_PAD_CSI0_DAT6__AUD3_TXFS 0x130b0
>;
};
pinctrl_backlight: backlightgrp {
fsl,pins = <
MX6QDL_PAD_DISP0_DAT7__GPIO4_IO28 0x1b0b0
>;
};
pinctrl_can1: can1grp {
fsl,pins = <
MX6QDL_PAD_KEY_ROW2__FLEXCAN1_RX 0x1b000
MX6QDL_PAD_KEY_COL2__FLEXCAN1_TX 0x3008
/* CAN1_SR */
MX6QDL_PAD_KEY_COL3__GPIO4_IO12 0x13008
/* CAN1_TERM */
MX6QDL_PAD_GPIO_0__GPIO1_IO00 0x1b088
>;
};
pinctrl_can2: can2grp {
fsl,pins = <
MX6QDL_PAD_KEY_ROW4__FLEXCAN2_RX 0x1b000
MX6QDL_PAD_KEY_COL4__FLEXCAN2_TX 0x3008
/* CAN2_SR */
MX6QDL_PAD_KEY_ROW3__GPIO4_IO13 0x13008
>;
};
pinctrl_ecspi1: ecspi1grp {
fsl,pins = <
MX6QDL_PAD_EIM_D17__ECSPI1_MISO 0x100b1
MX6QDL_PAD_EIM_D18__ECSPI1_MOSI 0x100b1
MX6QDL_PAD_EIM_D16__ECSPI1_SCLK 0x100b1
/* CS */
MX6QDL_PAD_EIM_D19__GPIO3_IO19 0x000b1
>;
};
pinctrl_ecspi2: ecspi2grp {
fsl,pins = <
MX6QDL_PAD_DISP0_DAT16__ECSPI2_MOSI 0x100b1
@ -747,113 +310,12 @@
>;
};
pinctrl_hog: hoggrp {
fsl,pins = <
/* ITU656_nRESET */
MX6QDL_PAD_GPIO_2__GPIO1_IO02 0x1b0b0
/* CAM1_MIRROR */
MX6QDL_PAD_GPIO_3__GPIO1_IO03 0x130b0
/* CAM2_MIRROR */
MX6QDL_PAD_GPIO_4__GPIO1_IO04 0x130b0
/* CAM_nDETECT */
MX6QDL_PAD_GPIO_17__GPIO7_IO12 0x1b0b0
/* ISB_IN1 */
MX6QDL_PAD_EIM_A16__GPIO2_IO22 0x130b0
/* ISB_nIN2 */
MX6QDL_PAD_EIM_A17__GPIO2_IO21 0x1b0b0
/* WARN_LIGHT */
MX6QDL_PAD_EIM_A19__GPIO2_IO19 0x100b0
/* ON2_FB */
MX6QDL_PAD_EIM_A25__GPIO5_IO02 0x100b0
/* YACO_nIRQ */
MX6QDL_PAD_EIM_D23__GPIO3_IO23 0x1b0b0
/* YACO_BOOT0 */
MX6QDL_PAD_EIM_D30__GPIO3_IO30 0x130b0
/* YACO_nRESET */
MX6QDL_PAD_EIM_D31__GPIO3_IO31 0x1b0b0
/* FORCE_ON1 */
MX6QDL_PAD_EIM_EB2__GPIO2_IO30 0x1b0b0
/* AUDIO_nRESET */
MX6QDL_PAD_CSI0_VSYNC__GPIO5_IO21 0x1f0b0
/* ITU656_nPDN */
MX6QDL_PAD_CSI0_DATA_EN__GPIO5_IO20 0x1b0b0
/* HW revision detect */
/* REV_ID0 */
MX6QDL_PAD_SD4_DAT0__GPIO2_IO08 0x1b0b0
/* REV_ID1 is shared with PWM3 */
/* REV_ID2 */
MX6QDL_PAD_SD4_DAT2__GPIO2_IO10 0x1b0b0
/* REV_ID3 */
MX6QDL_PAD_SD4_DAT3__GPIO2_IO11 0x1b0b0
/* REV_ID4 */
MX6QDL_PAD_SD4_DAT4__GPIO2_IO12 0x1b0b0
/* New in HW revision 1 */
/* ON1_FB */
MX6QDL_PAD_EIM_D20__GPIO3_IO20 0x100b0
/* DIP1_FB */
MX6QDL_PAD_DI0_PIN2__GPIO4_IO18 0x1b0b0
>;
};
pinctrl_i2c1: i2c1grp {
fsl,pins = <
MX6QDL_PAD_CSI0_DAT8__I2C1_SDA 0x4001f8b1
MX6QDL_PAD_CSI0_DAT9__I2C1_SCL 0x4001f8b1
>;
};
pinctrl_i2c3: i2c3grp {
fsl,pins = <
MX6QDL_PAD_GPIO_5__I2C3_SCL 0x4001b8b1
MX6QDL_PAD_GPIO_6__I2C3_SDA 0x4001b8b1
>;
};
pinctrl_ipu1_csi0: ipu1csi0grp {
fsl,pins = <
MX6QDL_PAD_CSI0_DAT12__IPU1_CSI0_DATA12 0x1b0b0
MX6QDL_PAD_CSI0_DAT13__IPU1_CSI0_DATA13 0x1b0b0
MX6QDL_PAD_CSI0_DAT14__IPU1_CSI0_DATA14 0x1b0b0
MX6QDL_PAD_CSI0_DAT15__IPU1_CSI0_DATA15 0x1b0b0
MX6QDL_PAD_CSI0_DAT16__IPU1_CSI0_DATA16 0x1b0b0
MX6QDL_PAD_CSI0_DAT17__IPU1_CSI0_DATA17 0x1b0b0
MX6QDL_PAD_CSI0_DAT18__IPU1_CSI0_DATA18 0x1b0b0
MX6QDL_PAD_CSI0_DAT19__IPU1_CSI0_DATA19 0x1b0b0
MX6QDL_PAD_CSI0_PIXCLK__IPU1_CSI0_PIXCLK 0x1b0b0
>;
};
pinctrl_keypad: keypadgrp {
fsl,pins = <
MX6QDL_PAD_GPIO_19__GPIO4_IO05 0x1b0b0
>;
};
pinctrl_leds: ledsgrp {
fsl,pins = <
/* DEBUG0 */
MX6QDL_PAD_DI0_DISP_CLK__GPIO4_IO16 0x1b0b0
/* DEBUG1 */
MX6QDL_PAD_DI0_PIN15__GPIO4_IO17 0x1b0b0
/* POWER_LED */
MX6QDL_PAD_EIM_CS1__GPIO2_IO24 0x1b0b0
>;
};
pinctrl_pwm1: pwm1grp {
fsl,pins = <
MX6QDL_PAD_DISP0_DAT8__PWM1_OUT 0x1b0b0
>;
};
pinctrl_pwm3: pwm3grp {
fsl,pins = <
MX6QDL_PAD_SD4_DAT1__PWM3_OUT 0x1b0b0
>;
};
pinctrl_rotary_ch: rotarychgrp {
fsl,pins = <
MX6QDL_PAD_NANDF_D3__GPIO2_IO03 0x1b0b0
@ -867,77 +329,4 @@
MX6QDL_PAD_DISP0_DAT15__GPIO5_IO09 0x1b0b0
>;
};
/* YaCO AUX Uart */
pinctrl_uart1: uart1grp {
fsl,pins = <
MX6QDL_PAD_CSI0_DAT10__UART1_TX_DATA 0x1b0b1
MX6QDL_PAD_CSI0_DAT11__UART1_RX_DATA 0x1b0b1
>;
};
pinctrl_uart2: uart2grp {
fsl,pins = <
MX6QDL_PAD_EIM_D26__UART2_TX_DATA 0x1b0b1
MX6QDL_PAD_EIM_D27__UART2_RX_DATA 0x1b0b1
>;
};
/* YaCO Touchscreen UART */
pinctrl_uart3: uart3grp {
fsl,pins = <
MX6QDL_PAD_EIM_D24__UART3_TX_DATA 0x1b0b1
MX6QDL_PAD_EIM_D25__UART3_RX_DATA 0x1b0b1
>;
};
pinctrl_uart4: uart4grp {
fsl,pins = <
MX6QDL_PAD_KEY_COL0__UART4_TX_DATA 0x1b0b1
MX6QDL_PAD_KEY_ROW0__UART4_RX_DATA 0x1b0b1
>;
};
pinctrl_uart5: uart5grp {
fsl,pins = <
MX6QDL_PAD_KEY_COL1__UART5_TX_DATA 0x1b0b1
MX6QDL_PAD_KEY_ROW1__UART5_RX_DATA 0x1b0b1
>;
};
pinctrl_usbotg: usbotggrp {
fsl,pins = <
MX6QDL_PAD_EIM_D21__USB_OTG_OC 0x1b0b0
/* power enable, high active */
MX6QDL_PAD_EIM_D22__GPIO3_IO22 0x1b0b0
>;
};
pinctrl_usdhc1: usdhc1grp {
fsl,pins = <
MX6QDL_PAD_SD1_CMD__SD1_CMD 0x170f9
MX6QDL_PAD_SD1_CLK__SD1_CLK 0x100f9
MX6QDL_PAD_SD1_DAT0__SD1_DATA0 0x170f9
MX6QDL_PAD_SD1_DAT1__SD1_DATA1 0x170f9
MX6QDL_PAD_SD1_DAT2__SD1_DATA2 0x170f9
MX6QDL_PAD_SD1_DAT3__SD1_DATA3 0x170f9
MX6QDL_PAD_GPIO_1__GPIO1_IO01 0x1b0b0
>;
};
pinctrl_usdhc3: usdhc3grp {
fsl,pins = <
MX6QDL_PAD_SD3_CMD__SD3_CMD 0x17099
MX6QDL_PAD_SD3_CLK__SD3_CLK 0x10099
MX6QDL_PAD_SD3_DAT0__SD3_DATA0 0x17099
MX6QDL_PAD_SD3_DAT1__SD3_DATA1 0x17099
MX6QDL_PAD_SD3_DAT2__SD3_DATA2 0x17099
MX6QDL_PAD_SD3_DAT3__SD3_DATA3 0x17099
MX6QDL_PAD_SD3_DAT4__SD3_DATA4 0x17099
MX6QDL_PAD_SD3_DAT5__SD3_DATA5 0x17099
MX6QDL_PAD_SD3_DAT6__SD3_DATA6 0x17099
MX6QDL_PAD_SD3_DAT7__SD3_DATA7 0x17099
MX6QDL_PAD_SD3_RST__SD3_RESET 0x1b0b1
>;
};
};

1
arch/arm/boot/dts/imx6dl-vicut1.dts
View File

@ -6,6 +6,7 @@
/dts-v1/;
#include "imx6dl.dtsi"
#include "imx6qdl-vicut1.dtsi"
#include "imx6qdl-vicut1-12inch.dtsi"
/ {
model = "Kverneland UT1 Board";

2
arch/arm/boot/dts/imx6q-ba16.dtsi
View File

@ -142,7 +142,7 @@
pinctrl-0 = <&pinctrl_ecspi1>;
status = "okay";
flash: n25q032@0 {
flash: flash@0 {
compatible = "jedec,spi-nor";
#address-cells = <1>;
#size-cells = <1>;

779
arch/arm/boot/dts/imx6q-bosch-acc.dts Normal file
View File

@ -0,0 +1,779 @@
// SPDX-License-Identifier: GPL-2.0
/*
* Support for the i.MX6-based Bosch ACC board.
*
* Copyright (C) 2016 Garz & Fricke GmbH
* Copyright (C) 2018 DENX Software Engineering GmbH, Heiko Schocher <hs@denx.de>
* Copyright (C) 2018 DENX Software Engineering GmbH, Niel Fourie <lusus@denx.de>
* Copyright (C) 2019-2021 Bosch Thermotechnik GmbH, Matthias Winker <matthias.winker@bosch.com>
* Copyright (C) 2022 DENX Software Engineering GmbH, Philip Oberfichtner <pro@denx.de>
*/
/dts-v1/;
#include <dt-bindings/gpio/gpio.h>
#include <dt-bindings/leds/common.h>
#include "imx6q.dtsi"
/ {
model = "Bosch ACC";
compatible = "bosch,imx6q-acc", "fsl,imx6q";
aliases {
i2c0 = &i2c1;
i2c1 = &i2c2;
i2c2 = &i2c3;
mmc0 = &usdhc4;
mmc1 = &usdhc2;
serial0 = &uart2;
serial1 = &uart1;
};
memory@10000000 {
device_type = "memory";
reg = <0x10000000 0x40000000>;
};
backlight_lvds: backlight-lvds {
compatible = "pwm-backlight";
pwms = <&pwm1 0 200000>;
brightness-levels = <0 61 499 1706 4079 8022 13938 22237 33328 47623 65535>;
num-interpolated-steps = <10>;
default-brightness-level = <60>;
power-supply = <&reg_lcd>;
};
panel {
compatible = "dataimage,fg1001l0dsswmg01";
backlight = <&backlight_lvds>;
port {
panel_in: endpoint {
remote-endpoint = <&lvds0_out>;
};
};
};
refclk: refclk {
compatible = "fixed-factor-clock";
#clock-cells = <0>;
clocks = <&clks IMX6QDL_CLK_CKO2>;
clock-div = <1>;
clock-mult = <1>;
clock-output-names = "12mhz_refclk";
assigned-clocks = <&clks IMX6QDL_CLK_CKO>,
<&clks IMX6QDL_CLK_CKO2>,
<&clks IMX6QDL_CLK_CKO2_SEL>;
assigned-clock-parents = <&clks IMX6QDL_CLK_CKO2>,
<&clks IMX6QDL_CLK_CKO2_PODF>,
<&clks IMX6QDL_CLK_OSC>;
assigned-clock-rates = <0>, <12000000>, <0>;
};
cpus {
cpu0: cpu@0 {
operating-points = <
/* kHz uV */
1200000 1275000
996000 1225000
852000 1225000
792000 1150000
396000 950000
>;
fsl,soc-operating-points = <
/* ARM kHz SOC-PU uV */
1200000 1225000
996000 1175000
852000 1175000
792000 1150000
396000 1150000
>;
};
cpu1: cpu@1 {
operating-points = <
/* kHz uV */
1200000 1275000
996000 1225000
852000 1225000
792000 1150000
396000 950000
>;
fsl,soc-operating-points = <
/* ARM kHz SOC-PU uV */
1200000 1225000
996000 1175000
852000 1175000
792000 1150000
396000 1150000
>;
};
};
pwm-leds {
compatible = "pwm-leds";
led_red: led-0 {
color = <LED_COLOR_ID_RED>;
max-brightness = <248>;
default-state = "off";
pwms = <&pwm2 0 500000>;
};
led_white: led-1 {
color = <LED_COLOR_ID_WHITE>;
max-brightness = <248>;
default-state = "off";
pwms = <&pwm3 0 500000>;
linux,default-trigger = "heartbeat";
};
};
gpio-leds {
compatible = "gpio-leds";
pinctrl-names = "default";
pinctrl-0 = <&pinctrl_reset_gpio_led>;
led-2 {
color = <LED_COLOR_ID_RED>;
gpios = <&gpio5 18 GPIO_ACTIVE_HIGH>;
default-state = "off";
};
};
reg_5p0: regulator-5p0 {
compatible = "regulator-fixed";
regulator-name = "5p0";
};
reg_vin: regulator-vin {
compatible = "regulator-fixed";
regulator-name = "VIN";
regulator-min-microvolt = <4500000>;
regulator-max-microvolt = <4500000>;
regulator-always-on;
vin-supply = <&reg_5p0>;
};
reg_usb_otg_vbus: regulator-usb-otg-vbus {
compatible = "regulator-fixed";
regulator-name = "usb_otg_vbus";
regulator-min-microvolt = <5000000>;
regulator-max-microvolt = <5000000>;
};
reg_usb_h1_vbus: regulator-usb-h1-vbus {
compatible = "regulator-fixed";
regulator-name = "usb_h1_vbus";
regulator-min-microvolt = <5000000>;
regulator-max-microvolt = <5000000>;
regulator-always-on;
vin-supply = <&reg_5p0>;
};
reg_usb_h2_vbus: regulator-usb-h2-vbus {
compatible = "regulator-fixed";
regulator-name = "usb_h2_vbus";
regulator-min-microvolt = <5000000>;
regulator-max-microvolt = <5000000>;
vin-supply = <&reg_5p0> ;
regulator-always-on;
};
reg_vsnvs: regulator-vsnvs {
compatible = "regulator-fixed";
regulator-name = "VSNVS_3V0";
regulator-min-microvolt = <3000000>;
regulator-max-microvolt = <3000000>;
regulator-always-on;
vin-supply = <&reg_5p0>;
};
reg_lcd: regulator-lcd {
compatible = "regulator-fixed";
regulator-name = "LCD0 POWER";
regulator-min-microvolt = <5000000>;
regulator-max-microvolt = <5000000>;
pinctrl-names = "default";
pinctrl-0 = <&pinctrl_lcd_enable>;
gpio = <&gpio3 23 GPIO_ACTIVE_HIGH>;
enable-active-high;
regulator-boot-on;
};
reg_dac: regulator-dac {
compatible = "regulator-fixed";
regulator-name = "vref_dac";
regulator-min-microvolt = <20000>;
regulator-max-microvolt = <20000>;
vin-supply = <&reg_5p0> ;
regulator-boot-on;
};
reg_sw4: regulator-sw4 {
compatible = "regulator-fixed";
regulator-name = "SW4_3V3";
regulator-min-microvolt = <3300000>;
regulator-max-microvolt = <3300000>;
regulator-always-on;
vin-supply = <&reg_5p0>;
};
reg_sys: regulator-sys {
compatible = "regulator-fixed";
regulator-name = "SYS_4V2";
regulator-min-microvolt = <4200000>;
regulator-max-microvolt = <4200000>;
regulator-always-on;
vin-supply = <&reg_5p0>;
};
};
&reg_arm {
vin-supply = <&sw2_reg>;
};
&reg_soc {
vin-supply = <&sw1c_reg>;
};
&reg_vdd1p1 {
vin-supply = <&reg_vsnvs>;
};
&reg_vdd2p5 {
vin-supply = <&reg_vsnvs>;
};
&reg_vdd3p0 {
vin-supply = <&reg_vsnvs>;
};
&fec {
pinctrl-names = "default";
pinctrl-0 = <&pinctrl_enet>;
clocks = <&clks IMX6QDL_CLK_ENET>,
<&clks IMX6QDL_CLK_ENET>,
<&clks IMX6QDL_CLK_ENET>,
<&clks IMX6QDL_CLK_ENET_REF>;
clock-names = "ipg", "ahb", "ptp", "enet_out";
phy-mode = "rmii";
phy-supply = <&reg_sw4>;
phy-handle = <&ethphy>;
status = "okay";
mdio {
#address-cells = <1>;
#size-cells = <0>;
ethphy: ethernet-phy@0 {
compatible = "ethernet-phy-ieee802.3-c22";
reg = <0>;
interrupt-parent = <&gpio1>;
interrupts = <23 IRQ_TYPE_EDGE_FALLING>;
smsc,disable-energy-detect;
};
};
};
&gpu_vg {
status = "disabled";
};
&gpu_2d {
status = "disabled";
};
&i2c1 {
pinctrl-names = "default";
pinctrl-0 = <&pinctrl_i2c1>;
clock-frequency = <400000>;
status = "okay";
pmic: pmic@8 {
compatible = "fsl,pfuze100";
reg = <0x08>;
regulators {
sw1c_reg: sw1c {
regulator-name = "VDD_SOC (sw1abc)";
regulator-min-microvolt = <1275000>;
regulator-max-microvolt = <1500000>;
regulator-boot-on;
regulator-always-on;
regulator-ramp-delay = <6250>;
};
sw2_reg: sw2 {
regulator-name = "VDD_ARM (sw2)";
regulator-min-microvolt = <1050000>;
regulator-max-microvolt = <1500000>;
regulator-boot-on;
regulator-always-on;
regulator-ramp-delay = <6250>;
};
sw3a_reg: sw3a {
compatible = "regulator-fixed";
regulator-name = "DDR_1V5a";
regulator-boot-on;
regulator-always-on;
};
sw3b_reg: sw3b {
compatible = "regulator-fixed";
regulator-name = "DDR_1V5b";
regulator-boot-on;
regulator-always-on;
};
sw4_reg: sw4 {
regulator-name = "AUX 3V15 (sw4)";
regulator-min-microvolt = <800000>;
regulator-max-microvolt = <3300000>;
};
swbst_reg: swbst {
regulator-min-microvolt = <5000000>;
regulator-max-microvolt = <5150000>;
regulator-boot-on;
regulator-always-on;
status = "disabled";
};
snvs_reg: vsnvs {
regulator-min-microvolt = <1200000>;
regulator-max-microvolt = <3000000>;
regulator-boot-on;
regulator-always-on;
};
vref_reg: vrefddr {
regulator-boot-on;
regulator-always-on;
};
vgen1_reg: vgen1 {
regulator-min-microvolt = <800000>;
regulator-max-microvolt = <1550000>;
regulator-always-on;
};
vgen2_reg: vgen2 {
regulator-min-microvolt = <800000>;
regulator-max-microvolt = <1550000>;
regulator-always-on;
};
vgen3_reg: vgen3 {
regulator-min-microvolt = <1800000>;
regulator-max-microvolt = <3300000>;
regulator-always-on;
};
vgen4_reg: vgen4 {
regulator-min-microvolt = <1800000>;
regulator-max-microvolt = <3300000>;
regulator-always-on;
regulator-boot-on;
};
vgen5_reg: vgen5 {
regulator-min-microvolt = <1800000>;
regulator-max-microvolt = <3300000>;
regulator-always-on;
regulator-boot-on;
};
vgen6_reg: vgen6 {
regulator-min-microvolt = <1800000>;
regulator-max-microvolt = <3300000>;
regulator-always-on;
};
};
};
lm75: sensor@49 {
compatible = "national,lm75b";
pinctrl-names = "default";
pinctrl-0 = <&pinctrl_lm75>;
reg = <0x49>;
};
eeprom: eeprom@50 {
compatible = "atmel,24c32";
reg = <0x50>;
pagesize = <32>;
};
rtc: rtc@51 {
pinctrl-names = "default";
pinctrl-0 = <&pinctrl_rtc>;
compatible = "nxp,pcf8563";
reg = <0x51>;
};
};
&i2c2 {
pinctrl-names = "default";
pinctrl-0 = <&pinctrl_i2c2>;
clock-frequency = <100000>;
status = "okay";
eeprom_ext: eeprom@50 {
compatible = "atmel,24c32";
reg = <0x50>;
pagesize = <32>;
};
};
&i2c3 {
pinctrl-names = "default";
pinctrl-0 = <&pinctrl_i2c3>;
clock-frequency = <400000>;
status = "okay";
usb3503: usb@8 {
compatible = "smsc,usb3503";
pinctrl-names = "default";
pinctrl-0 = <&pinctrl_usb3503>;
reg = <0x08>;
connect-gpios = <&gpio1 16 GPIO_ACTIVE_HIGH>; /* Old: 0, SS: HIGH */
intn-gpios = <&gpio7 12 GPIO_ACTIVE_LOW>; /* Old: 1, SS: HIGH */
reset-gpios = <&gpio5 5 GPIO_ACTIVE_LOW>; /* Old: 0, SS: HIGH */
initial-mode = <1>;
clocks = <&refclk>;
clock-names = "refclk";
refclk-frequency = <12000000>;
};
exc3000: touchscreen@2a {
compatible = "eeti,exc3000";
reg = <0x2a>;
pinctrl-names = "default";
pinctrl-0 = <&pinctrl_ctouch>;
interrupt-parent = <&gpio4>;
interrupts = <6 IRQ_TYPE_LEVEL_LOW>;
touchscreen-size-x = <4096>;
touchscreen-size-y = <4096>;
};
vcnl4035: light-sensor@60 {
compatible = "vishay,vcnl4035";
pinctrl-names = "default";
pinctrl-0 = <&pinctrl_proximity>;
reg = <0x60>;
};
};
&ldb {
status = "okay";
lvds0: lvds-channel@0 {
fsl,data-mapping = "spwg";
fsl,data-width = <24>;
port@4 {
reg = <4>;
lvds0_out: endpoint {
remote-endpoint = <&panel_in>;
};
};
};
};
&pwm1 {
#pwm-cells = <2>;
pinctrl-names = "default";
pinctrl-0 = <&pinctrl_pwm1>;
status = "okay";
};
&pwm2 {
#pwm-cells = <2>;
pinctrl-names = "default";
pinctrl-0 = <&pinctrl_pwm2>;
status = "okay";
};
&pwm3 {
#pwm-cells = <2>;
pinctrl-names = "default";
pinctrl-0 = <&pinctrl_pwm3>;
status = "okay";
};
&pwm4 {
#pwm-cells = <2>;
pinctrl-names = "default";
pinctrl-0 = <&pinctrl_pwm4>;
status = "okay";
};
&uart1 {
pinctrl-names = "default";
pinctrl-0 = <&pinctrl_uart1>;
rts-gpios = <&gpio7 8 GPIO_ACTIVE_HIGH>;
linux,rs485-enabled-at-boot-time;
rs485-rx-during-tx;
status = "okay";
};
&uart2 {
pinctrl-names = "default";
pinctrl-0 = <&pinctrl_uart2>;
uart-has-rtscts;
status = "okay";
};
&usbh1 {
vbus-supply = <&reg_usb_h1_vbus>;
status = "okay";
};
&usbh2 {
pinctrl-names = "idle", "active";
pinctrl-0 = <&pinctrl_usbh2_idle>;
pinctrl-1 = <&pinctrl_usbh2_active>;
vbus-supply = <&reg_usb_h2_vbus>;
status = "okay";
};
&usbotg {
pinctrl-names = "default";
pinctrl-0 = <&pinctrl_usbotg>;
vbus-supply = <&reg_usb_otg_vbus>;
disable-over-current;
dr_mode = "otg";
srp-disable;
hnp-disable;
adp-disable;
status = "okay";
};
&usbphynop1 {
clocks = <&clks IMX6QDL_CLK_USBPHY1>;
clock-names = "main_clk";
vcc-supply = <&reg_usb_h1_vbus>;
};
&usbphynop2 {
vcc-supply = <&reg_usb_h2_vbus>;
};
&usdhc2 {
pinctrl-names = "default";
pinctrl-0 = <&pinctrl_usdhc2>;
cd-gpios = <&gpio1 4 GPIO_ACTIVE_LOW>;
no-1-8-v;
keep-power-in-suspend;
enable-sdio-wakeup;
voltage-ranges = <3300 3300>;
vmmc-supply = <&reg_sw4>;
fsl,wp-controller;
status = "okay";
};
&usdhc4 {
pinctrl-names = "default";
pinctrl-0 = <&pinctrl_usdhc4>;
bus-width = <8>;
non-removable;
no-1-8-v;
keep-power-in-suspend;
voltage-ranges = <3300 3300>;
vmmc-supply = <&reg_sw4>;
fsl,wp-controller;
status = "okay";
};
&wdog1 {
pinctrl-names = "default";
pinctrl-0 = <&pinctrl_wdog1>;
fsl,ext-reset-output;
timeout-sec=<10>;
status = "okay";
};
&iomuxc {
pinctrl_enet: enetgrp {
fsl,pins = <
MX6QDL_PAD_ENET_MDC__ENET_MDC 0x1b0b0
MX6QDL_PAD_ENET_MDIO__ENET_MDIO 0x1b0b0
MX6QDL_PAD_ENET_CRS_DV__ENET_RX_EN 0x1b0b0
MX6QDL_PAD_ENET_REF_CLK__GPIO1_IO23 0x1b0b0 /* FEC INT */
MX6QDL_PAD_ENET_RX_ER__ENET_RX_ER 0x1b0b0
MX6QDL_PAD_ENET_TX_EN__ENET_TX_EN 0x0001b098
MX6QDL_PAD_ENET_RXD0__ENET_RX_DATA0 0x1b0b0
MX6QDL_PAD_ENET_RXD1__ENET_RX_DATA1 0x1b0b0
MX6QDL_PAD_ENET_TXD1__ENET_TX_DATA1 0x0001b098
MX6QDL_PAD_ENET_TXD0__ENET_TX_DATA0 0x0001b098
MX6QDL_PAD_GPIO_16__ENET_REF_CLK 0x4001b0a8
>;
};
pinctrl_reset_gpio_led: reset-gpio-led-grp {
fsl,pins = <
MX6QDL_PAD_CSI0_PIXCLK__GPIO5_IO18 0x1b0b0
>;
};
pinctrl_i2c1: i2c1grp {
fsl,pins = <
MX6QDL_PAD_CSI0_DAT8__I2C1_SDA 0x4001b8b1
MX6QDL_PAD_CSI0_DAT9__I2C1_SCL 0x4001b8b1
>;
};
pinctrl_i2c2: i2c2grp {
fsl,pins = <
MX6QDL_PAD_KEY_COL3__I2C2_SCL 0x4001b810
MX6QDL_PAD_KEY_ROW3__I2C2_SDA 0x4001b810
>;
};
pinctrl_i2c3: i2c3grp {
fsl,pins = <
MX6QDL_PAD_GPIO_5__I2C3_SCL 0x4001b8b1
MX6QDL_PAD_GPIO_6__I2C3_SDA 0x4001b8b1
>;
};
pinctrl_lcd_enable: lcdenablegrp {
fsl,pins = <
MX6QDL_PAD_EIM_D23__GPIO3_IO23 0x1b0b0 /* lcd enable */
MX6QDL_PAD_EIM_D16__GPIO3_IO16 0x1b0b0 /* sel6_8 */
>;
};
pinctrl_lm75: lm75grp {
fsl,pins = <
MX6QDL_PAD_KEY_ROW0__GPIO4_IO07 0x1b0b0
>;
};
pinctrl_proximity: proximitygrp {
fsl,pins = <
MX6QDL_PAD_KEY_ROW2__GPIO4_IO11 0x1b0b0
>;
};
pinctrl_pwm1: pwm1grp {
fsl,pins = <
MX6QDL_PAD_SD1_DAT3__PWM1_OUT 0x0001b0b0
>;
};
pinctrl_pwm2: pwm2grp {
fsl,pins = <
MX6QDL_PAD_SD1_DAT2__PWM2_OUT 0x0001b0b0
>;
};
pinctrl_pwm3: pwm3grp {
fsl,pins = <
MX6QDL_PAD_SD1_DAT1__PWM3_OUT 0x0001b0b0
>;
};
pinctrl_pwm4: pwm4grp {
fsl,pins = <
MX6QDL_PAD_SD1_CMD__PWM4_OUT 0x0001b0b0
>;
};
pinctrl_rtc: rtc-grp {
fsl,pins = <
MX6QDL_PAD_KEY_COL1__GPIO4_IO08 0x1b0b0 /* RTC INT */
>;
};
pinctrl_ctouch: ctouch-grp {
fsl,pins = <
MX6QDL_PAD_KEY_COL0__GPIO4_IO06 0x1b0b0 /* CTOUCH_INT */
MX6QDL_PAD_SD1_CLK__GPIO1_IO20 0x0001b0b0 /* CTOUCH_RESET */
>;
};
pinctrl_uart1: uart1grp {
fsl,pins = <
MX6QDL_PAD_SD3_DAT6__UART1_RX_DATA 0x1b0b1
MX6QDL_PAD_SD3_DAT7__UART1_TX_DATA 0x1b0b1
MX6QDL_PAD_SD3_RST__GPIO7_IO08 0x0001b0b0
>;
};
pinctrl_uart2: uart2grp {
fsl,pins = <
MX6QDL_PAD_SD3_DAT4__UART2_RX_DATA 0x1b0b1
MX6QDL_PAD_SD3_DAT5__UART2_TX_DATA 0x1b0b1
MX6QDL_PAD_EIM_D28__UART2_CTS_B 0x1b0b1
MX6QDL_PAD_EIM_D29__UART2_RTS_B 0x1b0b1
>;
};
pinctrl_usbh2_idle: usbh2-idle-grp {
fsl,pins = <
MX6QDL_PAD_RGMII_TXC__USB_H2_DATA 0x00013018
MX6QDL_PAD_RGMII_TX_CTL__USB_H2_STROBE 0x00013018
>;
};
pinctrl_usbh2_active: usbh2-active-grp {
fsl,pins = <
MX6QDL_PAD_RGMII_TXC__USB_H2_DATA 0x00013018
MX6QDL_PAD_RGMII_TX_CTL__USB_H2_STROBE 0x00017018
>;
};
pinctrl_usb3503: usb3503-grp {
fsl,pins = <
MX6QDL_PAD_CSI0_MCLK__CCM_CLKO1 0x00000018
MX6QDL_PAD_GPIO_17__GPIO7_IO12 0x1b0b0 /* USB INT */
MX6QDL_PAD_DISP0_DAT11__GPIO5_IO05 0x0001b0b0 /* USB Reset */
MX6QDL_PAD_SD1_DAT0__GPIO1_IO16 0x1b0b0 /* USB Connect */
>;
};
pinctrl_usbotg: usbotggrp {
fsl,pins = <
MX6QDL_PAD_GPIO_1__USB_OTG_ID 0x17059
>;
};
pinctrl_usdhc2: usdhc2grp {
fsl,pins = <
MX6QDL_PAD_SD2_CMD__SD2_CMD 0x00017069
MX6QDL_PAD_SD2_CLK__SD2_CLK 0x00010038
MX6QDL_PAD_SD2_DAT0__SD2_DATA0 0x00017069
MX6QDL_PAD_SD2_DAT1__SD2_DATA1 0x00017069
MX6QDL_PAD_SD2_DAT2__SD2_DATA2 0x00017069
MX6QDL_PAD_SD2_DAT3__SD2_DATA3 0x00017069
MX6QDL_PAD_GPIO_4__SD2_CD_B 0x0001b0b0
>;
};
pinctrl_usdhc4: usdhc4grp {
fsl,pins = <
MX6QDL_PAD_SD4_CMD__SD4_CMD 0x00017059
MX6QDL_PAD_SD4_CLK__SD4_CLK 0x00010059
MX6QDL_PAD_SD4_DAT0__SD4_DATA0 0x00017059
MX6QDL_PAD_SD4_DAT1__SD4_DATA1 0x00017059
MX6QDL_PAD_SD4_DAT2__SD4_DATA2 0x00017059
MX6QDL_PAD_SD4_DAT3__SD4_DATA3 0x00017059
MX6QDL_PAD_SD4_DAT4__SD4_DATA4 0x00017059
MX6QDL_PAD_SD4_DAT5__SD4_DATA5 0x00017059
MX6QDL_PAD_SD4_DAT6__SD4_DATA6 0x00017059
MX6QDL_PAD_SD4_DAT7__SD4_DATA7 0x00017059
>;
};
pinctrl_wdog1: wdoggrp {
fsl,pins = <
MX6QDL_PAD_GPIO_9__WDOG1_B 0x1b0b0
>;
};
};

2
arch/arm/boot/dts/imx6q-bx50v3.dtsi
View File

@ -160,7 +160,7 @@
pinctrl-0 = <&pinctrl_ecspi5>;
status = "okay";
m25_eeprom: m25p80@0 {
m25_eeprom: flash@0 {
compatible = "atmel,at25";
spi-max-frequency = <10000000>;
size = <0x8000>;

2
arch/arm/boot/dts/imx6q-cm-fx6.dts
View File

@ -260,7 +260,7 @@
pinctrl-0 = <&pinctrl_ecspi1>;
status = "okay";
m25p80@0 {
flash@0 {
#address-cells = <1>;
#size-cells = <1>;
compatible = "st,m25p", "jedec,spi-nor";

2
arch/arm/boot/dts/imx6q-dmo-edmqmx6.dts
View File

@ -102,7 +102,7 @@
cs-gpios = <&gpio1 12 GPIO_ACTIVE_LOW>;
status = "okay";
flash: m25p80@0 {
flash: flash@0 {
compatible = "m25p80", "jedec,spi-nor";
spi-max-frequency = <40000000>;
reg = <0>;

2
arch/arm/boot/dts/imx6q-dms-ba16.dts
View File

@ -47,7 +47,7 @@
pinctrl-0 = <&pinctrl_ecspi5>;
status = "okay";
m25_eeprom: m25p80@0 {
m25_eeprom: flash@0 {
compatible = "atmel,at25256B", "atmel,at25";
spi-max-frequency = <20000000>;
size = <0x8000>;

2
arch/arm/boot/dts/imx6q-gw5400-a.dts
View File

@ -137,7 +137,7 @@
pinctrl-0 = <&pinctrl_ecspi1>;
status = "okay";
flash: m25p80@0 {
flash: flash@0 {
compatible = "sst,w25q256", "jedec,spi-nor";
spi-max-frequency = <30000000>;
reg = <0>;

2
arch/arm/boot/dts/imx6q-marsboard.dts
View File

@ -100,7 +100,7 @@
cs-gpios = <&gpio2 30 GPIO_ACTIVE_LOW>;
status = "okay";
m25p80@0 {
flash@0 {
compatible = "microchip,sst25vf016b";
spi-max-frequency = <20000000>;
reg = <0>;

2
arch/arm/boot/dts/imx6q-rex-pro.dts
View File

@ -19,7 +19,7 @@
};
&ecspi3 {
flash: m25p80@0 {
flash: flash@0 {
compatible = "sst,sst25vf032b", "jedec,spi-nor";
spi-max-frequency = <20000000>;
reg = <0>;

5
arch/arm/boot/dts/imx6q-vicut1.dts
View File

@ -6,12 +6,9 @@
/dts-v1/;
#include "imx6q.dtsi"
#include "imx6qdl-vicut1.dtsi"
#include "imx6qdl-vicut1-12inch.dtsi"
/ {
model = "Kverneland UT1Q Board";
compatible = "kvg,vicut1q", "fsl,imx6q";
};
&sata {
status = "okay";
};

2
arch/arm/boot/dts/imx6qdl-aristainetos.dtsi
View File

@ -96,7 +96,7 @@
pinctrl-0 = <&pinctrl_ecspi4>;
status = "okay";
flash: m25p80@0 {
flash: flash@0 {
#address-cells = <1>;
#size-cells = <1>;
compatible = "micron,n25q128a11", "jedec,spi-nor";

2
arch/arm/boot/dts/imx6qdl-aristainetos2.dtsi
View File

@ -131,7 +131,7 @@
pinctrl-0 = <&pinctrl_ecspi4>;
status = "okay";
flash: m25p80@1 {
flash: flash@1 {
#address-cells = <1>;
#size-cells = <1>;
compatible = "micron,n25q128a11", "jedec,spi-nor";

44
arch/arm/boot/dts/imx6qdl-colibri-v1_1-uhs.dtsi
View File

@ -1,44 +0,0 @@
// SPDX-License-Identifier: GPL-2.0+ OR MIT
/*
* Copyright 2020 Toradex
*/
&iomuxc {
pinctrl_usdhc1_100mhz: usdhc1grp100mhz {
fsl,pins = <
MX6QDL_PAD_SD1_CMD__SD1_CMD 0x170b1
MX6QDL_PAD_SD1_CLK__SD1_CLK 0x100b1
MX6QDL_PAD_SD1_DAT0__SD1_DATA0 0x170b1
MX6QDL_PAD_SD1_DAT1__SD1_DATA1 0x170b1
MX6QDL_PAD_SD1_DAT2__SD1_DATA2 0x170b1
MX6QDL_PAD_SD1_DAT3__SD1_DATA3 0x170b1
>;
};
pinctrl_usdhc1_200mhz: usdhc1grp200mhz {
fsl,pins = <
MX6QDL_PAD_SD1_CMD__SD1_CMD 0x170f1
MX6QDL_PAD_SD1_CLK__SD1_CLK 0x100f1
MX6QDL_PAD_SD1_DAT0__SD1_DATA0 0x170f1
MX6QDL_PAD_SD1_DAT1__SD1_DATA1 0x170f1
MX6QDL_PAD_SD1_DAT2__SD1_DATA2 0x170f1
MX6QDL_PAD_SD1_DAT3__SD1_DATA3 0x170f1
>;
};
};
/* Colibri MMC */
&usdhc1 {
pinctrl-names = "default", "state_100mhz", "state_200mhz";
pinctrl-0 = <&pinctrl_usdhc1 &pinctrl_mmc_cd>;
pinctrl-1 = <&pinctrl_usdhc1_100mhz &pinctrl_mmc_cd>;
pinctrl-2 = <&pinctrl_usdhc1_200mhz &pinctrl_mmc_cd>;
vmmc-supply = <&reg_module_3v3>;
vqmmc-supply = <&vgen3_reg>;
wakeup-source;
keep-power-in-suspend;
sd-uhs-sdr12;
sd-uhs-sdr25;
sd-uhs-sdr50;
sd-uhs-sdr104;
};

815
arch/arm/boot/dts/imx6qdl-colibri.dtsi
View File

File diff suppressed because it is too large Load Diff

2
arch/arm/boot/dts/imx6qdl-dfi-fs700-m60.dtsi
View File

@ -35,7 +35,7 @@
pinctrl-0 = <&pinctrl_ecspi3>;
status = "okay";
flash: m25p80@0 {
flash: flash@0 {
#address-cells = <1>;
#size-cells = <1>;
compatible = "sst,sst25vf040b", "jedec,spi-nor";

2
arch/arm/boot/dts/imx6qdl-kontron-samx6i.dtsi
View File

@ -258,7 +258,7 @@
status = "okay";
/* default boot source: workaround #1 for errata ERR006282 */
smarc_flash: spi-flash@0 {
smarc_flash: flash@0 {
compatible = "winbond,w25q16dw", "jedec,spi-nor";
reg = <0>;
spi-max-frequency = <20000000>;

2
arch/arm/boot/dts/imx6qdl-nit6xlite.dtsi
View File

@ -179,7 +179,7 @@
pinctrl-0 = <&pinctrl_ecspi1>;
status = "okay";
flash: m25p80@0 {
flash: flash@0 {
compatible = "microchip,sst25vf016b";
spi-max-frequency = <20000000>;
reg = <0>;

2
arch/arm/boot/dts/imx6qdl-nitrogen6_max.dtsi
View File

@ -321,7 +321,7 @@
pinctrl-0 = <&pinctrl_ecspi1>;
status = "okay";
flash: m25p80@0 {
flash: flash@0 {
compatible = "microchip,sst25vf016b";
spi-max-frequency = <20000000>;
reg = <0>;

2
arch/arm/boot/dts/imx6qdl-nitrogen6_som2.dtsi
View File

@ -252,7 +252,7 @@
pinctrl-0 = <&pinctrl_ecspi1>;
status = "okay";
flash: m25p80@0 {
flash: flash@0 {
compatible = "microchip,sst25vf016b";
spi-max-frequency = <20000000>;
reg = <0>;

2
arch/arm/boot/dts/imx6qdl-nitrogen6x.dtsi
View File

@ -237,7 +237,7 @@
pinctrl-0 = <&pinctrl_ecspi1>;
status = "okay";
flash: m25p80@0 {
flash: flash@0 {
compatible = "sst,sst25vf016b", "jedec,spi-nor";
spi-max-frequency = <20000000>;
reg = <0>;

4
arch/arm/boot/dts/imx6qdl-phytec-pfla02.dtsi
View File

@ -47,12 +47,12 @@
pinctrl-0 = <&pinctrl_leds>;
compatible = "gpio-leds";
green {
led_green: green {
label = "phyflex:green";
gpios = <&gpio1 30 0>;
};
red {
led_red: red {
label = "phyflex:red";
gpios = <&gpio2 31 0>;
};

2
arch/arm/boot/dts/imx6qdl-sabreauto.dtsi
View File

@ -272,7 +272,7 @@
pinctrl-0 = <&pinctrl_ecspi1 &pinctrl_ecspi1_cs>;
status = "disabled"; /* pin conflict with WEIM NOR */
flash: m25p80@0 {
flash: flash@0 {
#address-cells = <1>;
#size-cells = <1>;
compatible = "st,m25p32", "jedec,spi-nor";

2
arch/arm/boot/dts/imx6qdl-sabrelite.dtsi
View File

@ -313,7 +313,7 @@
pinctrl-0 = <&pinctrl_ecspi1>;
status = "okay";
flash: m25p80@0 {
flash: flash@0 {
compatible = "sst,sst25vf016b", "jedec,spi-nor";
spi-max-frequency = <20000000>;
reg = <0>;

2
arch/arm/boot/dts/imx6qdl-sabresd.dtsi
View File

@ -197,7 +197,7 @@
pinctrl-0 = <&pinctrl_ecspi1>;
status = "okay";
flash: m25p80@0 {
flash: flash@0 {
#address-cells = <1>;
#size-cells = <1>;
compatible = "st,m25p32", "jedec,spi-nor";

5
arch/arm/boot/dts/imx6qdl-tx6.dtsi
View File

@ -264,11 +264,6 @@
&fec {
pinctrl-names = "default";
pinctrl-0 = <&pinctrl_enet &pinctrl_enet_mdio &pinctrl_etnphy_rst>;
clocks = <&clks IMX6QDL_CLK_ENET>,
<&clks IMX6QDL_CLK_ENET>,
<&clks IMX6QDL_CLK_ENET_REF>,
<&clks IMX6QDL_CLK_ENET_REF>;
clock-names = "ipg", "ahb", "ptp", "enet_out";
phy-mode = "rmii";
phy-reset-gpios = <&gpio7 6 GPIO_ACTIVE_LOW>;
phy-reset-post-delay = <10>;

2
arch/arm/boot/dts/imx6qdl-udoo.dtsi
View File

@ -295,7 +295,7 @@
pinctrl-0 = <&pinctrl_usbh>;
vbus-supply = <&reg_usb_h1_vbus>;
clocks = <&clks IMX6QDL_CLK_CKO>;
status = "okay";
status = "disabled";
};
&usbotg {

128
arch/arm/boot/dts/imx6qdl-vicut1-12inch.dtsi Normal file
View File

@ -0,0 +1,128 @@
// SPDX-License-Identifier: GPL-2.0-or-later OR MIT
/*
* Copyright (c) 2021 Protonic Holland
*/
/ {
gpio-keys {
compatible = "gpio-keys";
pinctrl-names = "default";
pinctrl-0 = <&pinctrl_gpiokeys>;
autorepeat;
power {
label = "Power Button";
gpios = <&gpio2 23 GPIO_ACTIVE_LOW>;
linux,code = <KEY_POWER>;
wakeup-source;
};
};
panel {
compatible = "kyo,tcg121xglp";
backlight = <&backlight_lcd>;
power-supply = <&reg_3v3>;
port {
panel_in: endpoint {
remote-endpoint = <&lvds0_out>;
};
};
};
};
&fec {
pinctrl-names = "default";
pinctrl-0 = <&pinctrl_enet>;
phy-mode = "rgmii-id";
phy-handle = <&rgmii_phy>;
status = "okay";
mdio {
#address-cells = <1>;
#size-cells = <0>;
/* Microchip KSZ9031RNX PHY */
rgmii_phy: ethernet-phy@0 {
reg = <0>;
interrupts-extended = <&gpio1 28 IRQ_TYPE_LEVEL_LOW>;
reset-gpios = <&gpio1 25 GPIO_ACTIVE_LOW>;
reset-assert-us = <10000>;
reset-deassert-us = <300>;
};
};
};
&gpio1 {
gpio-line-names =
"CAN1_TERM", "SD1_CD", "ITU656_RESET", "CAM1_MIRROR",
"CAM2_MIRROR", "", "", "SMBALERT",
"DEBUG_0", "DEBUG_1", "", "", "", "", "", "",
"SD1_DATA0", "SD1_DATA1", "SD1_CMD", "SD1_DATA2", "SD1_CLK",
"SD1_DATA3", "ETH_MDIO", "",
"", "ETH_RESET", "", "", "ETH_INT", "", "", "ETH_MDC";
};
&gpio4 {
gpio-line-names =
"", "", "", "", "", "", "UART4_TXD", "UART4_RXD",
"UART5_TXD", "UART5_RXD", "CAN1_TX", "CAN1_RX", "CAN1_SR",
"CAN2_SR", "CAN2_TX", "CAN2_RX",
"", "", "DIP1_FB", "", "VCAM_EN", "ON1_CTRL", "ON2_CTRL",
"HITCH_IN_OUT",
"LIGHT_ON", "", "", "CONTACT_IN", "BL_EN", "BL_PWM", "",
"ISB_LED";
};
&gpio5 {
gpio-line-names =
"", "", "", "", "", "", "", "",
"", "", "", "", "", "", "", "",
"", "", "ITU656_CLK", "I2S_MCLK", "ITU656_PDN", "AUDIO_RESET",
"I2S_BITCLK", "I2S_DOUT",
"I2S_LRCLK", "I2S_DIN", "I2C1_SDA", "I2C1_SCL", "YACO_AUX_RX",
"YACO_AUX_TX", "ITU656_D0", "ITU656_D1";
};
&gpio6 {
gpio-line-names =
"ITU656_D2", "ITU656_D3", "ITU656_D4", "ITU656_D5",
"ITU656_D6", "ITU656_D7", "", "",
"", "", "", "", "", "", "", "",
"", "", "", "RGMII_TXC", "RGMII_TD0", "RGMII_TD1", "RGMII_TD2",
"RGMII_TD3",
"RGMII_RX_CTL", "RGMII_RD0", "RGMII_TX_CTL", "RGMII_RD1",
"RGMII_RD2", "RGMII_RD3", "", "";
};
&iomuxc {
pinctrl_enet: enetgrp {
fsl,pins = <
MX6QDL_PAD_RGMII_RXC__RGMII_RXC 0x1b030
MX6QDL_PAD_RGMII_RD0__RGMII_RD0 0x1b030
MX6QDL_PAD_RGMII_RD1__RGMII_RD1 0x1b030
MX6QDL_PAD_RGMII_RD2__RGMII_RD2 0x1b030
MX6QDL_PAD_RGMII_RD3__RGMII_RD3 0x1b030
MX6QDL_PAD_RGMII_RX_CTL__RGMII_RX_CTL 0x1b030
MX6QDL_PAD_RGMII_TXC__RGMII_TXC 0x10030
MX6QDL_PAD_RGMII_TD0__RGMII_TD0 0x10030
MX6QDL_PAD_RGMII_TD1__RGMII_TD1 0x10030
MX6QDL_PAD_RGMII_TD2__RGMII_TD2 0x10030
MX6QDL_PAD_RGMII_TD3__RGMII_TD3 0x10030
MX6QDL_PAD_RGMII_TX_CTL__RGMII_TX_CTL 0x10030
MX6QDL_PAD_ENET_REF_CLK__ENET_TX_CLK 0x10030
MX6QDL_PAD_ENET_MDIO__ENET_MDIO 0x10030
MX6QDL_PAD_ENET_MDC__ENET_MDC 0x10030
/* Phy reset */
MX6QDL_PAD_ENET_CRS_DV__GPIO1_IO25 0x1b0b0
MX6QDL_PAD_ENET_TX_EN__GPIO1_IO28 0x1b0b1
>;
};
pinctrl_gpiokeys: gpiokeygrp {
fsl,pins = <
/* nON_SWITCH */
MX6QDL_PAD_EIM_CS0__GPIO2_IO23 0x1b0b0
>;
};
};

263
arch/arm/boot/dts/imx6qdl-vicut1.dtsi
View File

@ -16,18 +16,27 @@
stdout-path = &uart4;
};
backlight: backlight {
backlight_lcd: backlight {
compatible = "pwm-backlight";
pinctrl-names = "default";
pinctrl-0 = <&pinctrl_backlight>;
pwms = <&pwm1 0 5000000 0>;
brightness-levels = <0 16 64 255>;
num-interpolated-steps = <16>;
default-brightness-level = <1>;
default-brightness-level = <48>;
power-supply = <&reg_3v3>;
enable-gpios = <&gpio4 28 GPIO_ACTIVE_HIGH>;
};
backlight_led: backlight_led {
compatible = "pwm-backlight";
pwms = <&pwm3 0 5000000 0>;
brightness-levels = <0 16 64 255>;
num-interpolated-steps = <16>;
default-brightness-level = <48>;
power-supply = <&reg_3v3>;
};
connector {
compatible = "composite-video-connector";
label = "Composite0";
@ -61,54 +70,37 @@
gpios = <&gpio2 2 GPIO_ACTIVE_LOW>;
};
gpio-keys {
compatible = "gpio-keys";
autorepeat;
power {
label = "Power Button";
gpios = <&gpio2 23 GPIO_ACTIVE_LOW>;
linux,code = <KEY_POWER>;
wakeup-source;
};
};
leds {
compatible = "gpio-leds";
pinctrl-names = "default";
pinctrl-0 = <&pinctrl_leds>;
led-0 {
label = "LED_DI0_DEBUG_0";
label = "debug0";
function = LED_FUNCTION_HEARTBEAT;
gpios = <&gpio4 16 GPIO_ACTIVE_HIGH>;
gpios = <&gpio1 8 GPIO_ACTIVE_HIGH>;
linux,default-trigger = "heartbeat";
};
led-1 {
label = "LED_DI0_DEBUG_1";
label = "debug1";
function = LED_FUNCTION_DISK;
gpios = <&gpio4 17 GPIO_ACTIVE_HIGH>;
gpios = <&gpio1 9 GPIO_ACTIVE_HIGH>;
linux,default-trigger = "disk-activity";
};
led-2 {
label = "POWER_LED";
label = "power_led";
function = LED_FUNCTION_POWER;
gpios = <&gpio2 24 GPIO_ACTIVE_HIGH>;
default-state = "on";
};
};
panel {
compatible = "kyo,tcg121xglp";
backlight = <&backlight>;
power-supply = <&reg_3v3>;
port {
panel_in: endpoint {
remote-endpoint = <&lvds0_out>;
};
led-3 {
label = "isb_led";
function = LED_FUNCTION_POWER;
gpios = <&gpio4 31 GPIO_ACTIVE_HIGH>;
default-state = "on";
};
};
@ -135,18 +127,6 @@
enable-active-high;
};
reg_wifi: regulator-wifi {
compatible = "regulator-fixed";
pinctrl-names = "default";
pinctrl-0 = <&pinctrl_wifi_npd>;
regulator-name = "wifi";
regulator-min-microvolt = <1800000>;
regulator-max-microvolt = <1800000>;
gpio = <&gpio1 26 GPIO_ACTIVE_HIGH>;
enable-active-high;
startup-delay-us = <70000>;
};
sound {
compatible = "simple-audio-card";
simple-audio-card,name = "prti6q-sgtl5000";
@ -173,6 +153,14 @@
frame-master;
};
};
thermal-zones {
chassis-thermal {
polling-delay = <20000>;
polling-delay-passive = <0>;
thermal-sensors = <&tsens0>;
};
};
};
&audmux {
@ -232,47 +220,13 @@
};
};
&fec {
pinctrl-names = "default";
pinctrl-0 = <&pinctrl_enet>;
phy-mode = "rgmii-id";
phy-handle = <&rgmii_phy>;
status = "okay";
mdio {
#address-cells = <1>;
#size-cells = <0>;
/* Microchip KSZ9031RNX PHY */
rgmii_phy: ethernet-phy@0 {
reg = <0>;
interrupts-extended = <&gpio1 28 IRQ_TYPE_LEVEL_LOW>;
reset-gpios = <&gpio1 25 GPIO_ACTIVE_LOW>;
reset-assert-us = <10000>;
reset-deassert-us = <300>;
};
};
};
&gpio1 {
gpio-line-names =
"CAN1_TERM", "SD1_CD", "ITU656_RESET", "CAM1_MIRROR",
"CAM2_MIRROR", "", "", "SMBALERT",
"DEBUG_0", "DEBUG_1", "SDIO_SCK", "SDIO_CMD", "SDIO_D3",
"SDIO_D2", "SDIO_D1", "SDIO_D0",
"SD1_DATA0", "SD1_DATA1", "SD1_CMD", "SD1_DATA2", "SD1_CLK",
"SD1_DATA3", "", "",
"", "ETH_RESET", "WIFI_PD", "WIFI_BT_RST", "ETH_INT", "",
"WL_IRQ", "ETH_MDC";
};
&gpio2 {
gpio-line-names =
"count0", "count1", "count2", "", "", "", "", "",
"REV_ID0", "REV_ID1", "REV_ID2", "REV_ID3", "REV_ID4",
"BOARD_ID0", "BOARD_ID1", "BOARD_ID2",
"", "", "", "", "", "", "", "ON_SWITCH",
"POWER_LED", "", "ECSPI2_SS0", "", "", "", "", "";
"YACO_WHEEL", "YACO_RADAR", "YACO_PTO", "", "", "", "", "",
"", "LED_PWM", "", "", "",
"", "", "",
"", "", "", "", "", "ISB_IN2", "ISB_nIN1", "ON_SWITCH",
"POWER_LED", "", "", "", "", "", "", "";
};
&gpio3 {
@ -281,37 +235,8 @@
"", "", "", "", "", "", "", "",
"ECSPI1_SCLK", "ECSPI1_MISO", "ECSPI1_MOSI", "ECSPI1_SS1",
"CPU_ON1_FB", "USB_OTG_OC", "USB_OTG_PWR", "YACO_IRQ",
"", "", "", "", "", "", "", "";
};
&gpio4 {
gpio-line-names =
"", "", "", "", "", "", "UART4_TXD", "UART4_RXD",
"UART5_TXD", "UART5_RXD", "CAN1_TX", "CAN1_RX", "CAN1_SR",
"CAN2_SR", "CAN2_TX", "CAN2_RX",
"LED_DI0_DEBUG_0", "LED_DI0_DEBUG_1", "", "", "", "", "", "",
"", "", "", "", "BL_EN", "BL_PWM", "", "";
};
&gpio5 {
gpio-line-names =
"", "", "", "", "", "PCIE_WAKE", "PCIE_CLKREQ", "PCIE_W_DIS",
"PCIE_RESET", "", "", "", "", "", "", "",
"", "", "ITU656_CLK", "I2S_MCLK", "ITU656_PDN", "AUDIO_RESET",
"I2S_BITCLK", "I2S_DOUT",
"I2S_LRCLK", "I2S_DIN", "I2C1_SDA", "I2C1_SCL", "YACO_AUX_RX",
"YACO_AUX_TX", "ITU656_D0", "ITU656_D1";
};
&gpio6 {
gpio-line-names =
"ITU656_D2", "ITU656_D3", "ITU656_D4", "ITU656_D5",
"ITU656_D6", "ITU656_D7", "", "",
"", "", "", "", "", "", "", "",
"", "", "", "RGMII_TXC", "RGMII_TD0", "RGMII_TD1", "RGMII_TD2",
"RGMII_TD3",
"RGMII_RX_CTL", "RGMII_RD0", "RGMII_TX_CTL", "RGMII_RD1",
"RGMII_RD2", "RGMII_RD3", "", "";
"TSS_TXD", "TSS_RXD", "", "", "", "", "YACO_BOOT0",
"YACO_RESET";
};
&gpio7 {
@ -406,9 +331,10 @@
reg = <0x51>;
};
temperature-sensor@70 {
tsens0: temperature-sensor@70 {
compatible = "ti,tmp103";
reg = <0x70>;
#thermal-sensor-cells = <0>;
};
};
@ -438,16 +364,18 @@
};
};
&pcie {
status = "okay";
};
&pwm1 {
pinctrl-names = "default";
pinctrl-0 = <&pinctrl_pwm1>;
status = "okay";
};
&pwm3 {
pinctrl-names = "default";
pinctrl-0 = <&pinctrl_pwm3>;
status = "okay";
};
&ssi1 {
#sound-dai-cells = <0>;
fsl,mode = "ac97-slave";
@ -460,12 +388,6 @@
status = "okay";
};
&uart2 {
pinctrl-names = "default";
pinctrl-0 = <&pinctrl_uart2>;
status = "okay";
};
&uart3 {
pinctrl-names = "default";
pinctrl-0 = <&pinctrl_uart3>;
@ -513,26 +435,6 @@
status = "okay";
};
&usdhc2 {
pinctrl-names = "default";
pinctrl-0 = <&pinctrl_usdhc2>;
vmmc-supply = <&reg_wifi>;
non-removable;
cap-power-off-card;
keep-power-in-suspend;
no-1-8-v;
no-mmc;
no-sd;
status = "okay";
wifi {
compatible = "ti,wl1271";
interrupts-extended = <&gpio1 30 IRQ_TYPE_LEVEL_HIGH>;
ref-clock-frequency = "38400000";
tcxo-clock-frequency = "19200000";
};
};
&usdhc3 {
pinctrl-names = "default";
pinctrl-0 = <&pinctrl_usdhc3>;
@ -613,29 +515,6 @@
>;
};
pinctrl_enet: enetgrp {
fsl,pins = <
MX6QDL_PAD_RGMII_RXC__RGMII_RXC 0x1b030
MX6QDL_PAD_RGMII_RD0__RGMII_RD0 0x1b030
MX6QDL_PAD_RGMII_RD1__RGMII_RD1 0x1b030
MX6QDL_PAD_RGMII_RD2__RGMII_RD2 0x1b030
MX6QDL_PAD_RGMII_RD3__RGMII_RD3 0x1b030
MX6QDL_PAD_RGMII_RX_CTL__RGMII_RX_CTL 0x1b030
MX6QDL_PAD_RGMII_TXC__RGMII_TXC 0x10030
MX6QDL_PAD_RGMII_TD0__RGMII_TD0 0x10030
MX6QDL_PAD_RGMII_TD1__RGMII_TD1 0x10030
MX6QDL_PAD_RGMII_TD2__RGMII_TD2 0x10030
MX6QDL_PAD_RGMII_TD3__RGMII_TD3 0x10030
MX6QDL_PAD_RGMII_TX_CTL__RGMII_TX_CTL 0x10030
MX6QDL_PAD_ENET_REF_CLK__ENET_TX_CLK 0x10030
MX6QDL_PAD_ENET_MDIO__ENET_MDIO 0x10030
MX6QDL_PAD_ENET_MDC__ENET_MDC 0x10030
/* Phy reset */
MX6QDL_PAD_ENET_CRS_DV__GPIO1_IO25 0x1b0b0
MX6QDL_PAD_ENET_TX_EN__GPIO1_IO28 0x1b0b1
>;
};
pinctrl_hog: hoggrp {
fsl,pins = <
/* ITU656_nRESET */
@ -646,8 +525,6 @@
MX6QDL_PAD_GPIO_4__GPIO1_IO04 0x130b0
/* CAM_nDETECT */
MX6QDL_PAD_GPIO_17__GPIO7_IO12 0x1b0b0
/* nON_SWITCH */
MX6QDL_PAD_EIM_CS0__GPIO2_IO23 0x1b0b0
/* ISB_IN1 */
MX6QDL_PAD_EIM_A16__GPIO2_IO22 0x130b0
/* ISB_nIN2 */
@ -669,27 +546,11 @@
/* ITU656_nPDN */
MX6QDL_PAD_CSI0_DATA_EN__GPIO5_IO20 0x1b0b0
/* HW revision detect */
/* REV_ID0 */
MX6QDL_PAD_SD4_DAT0__GPIO2_IO08 0x1b0b0
/* REV_ID1 */
MX6QDL_PAD_SD4_DAT1__GPIO2_IO09 0x1b0b0
/* REV_ID2 */
MX6QDL_PAD_SD4_DAT2__GPIO2_IO10 0x1b0b0
/* REV_ID3 */
MX6QDL_PAD_SD4_DAT3__GPIO2_IO11 0x1b0b0
/* REV_ID4 */
MX6QDL_PAD_SD4_DAT4__GPIO2_IO12 0x1b0b0
/* New in HW revision 1 */
/* ON1_FB */
MX6QDL_PAD_EIM_D20__GPIO3_IO20 0x100b0
/* DIP1_FB */
MX6QDL_PAD_DI0_PIN2__GPIO4_IO18 0x1b0b0
/* New in UT2: FIXME: ISB PWM should start off, PD */
/* ISB_LED_PWM */
MX6QDL_PAD_DISP0_DAT9__GPIO4_IO30 0x130b0
>;
};
@ -729,6 +590,8 @@
MX6QDL_PAD_DI0_PIN15__GPIO4_IO17 0x1b0b0
/* POWER_LED */
MX6QDL_PAD_EIM_CS1__GPIO2_IO24 0x1b0b0
/* ISB_LED */
MX6QDL_PAD_DISP0_DAT10__GPIO4_IO31 0x1b0b0
>;
};
@ -738,6 +601,12 @@
>;
};
pinctrl_pwm3: pwm3grp {
fsl,pins = <
MX6QDL_PAD_SD4_DAT1__PWM3_OUT 0x1b0b0
>;
};
/* YaCO AUX Uart */
pinctrl_uart1: uart1grp {
fsl,pins = <
@ -746,15 +615,6 @@
>;
};
pinctrl_uart2: uart2grp {
fsl,pins = <
MX6QDL_PAD_EIM_D26__UART2_RX_DATA 0x1b0b1
MX6QDL_PAD_EIM_D27__UART2_TX_DATA 0x1b0b1
MX6QDL_PAD_EIM_D28__UART2_DTE_CTS_B 0x1b0b1
MX6QDL_PAD_EIM_D29__UART2_DTE_RTS_B 0x1b0b1
>;
};
/* YaCO Touchscreen UART */
pinctrl_uart3: uart3grp {
fsl,pins = <
@ -797,19 +657,6 @@
>;
};
pinctrl_usdhc2: usdhc2grp {
fsl,pins = <
MX6QDL_PAD_SD2_CMD__SD2_CMD 0x170b9
MX6QDL_PAD_SD2_CLK__SD2_CLK 0x100b9
MX6QDL_PAD_SD2_DAT0__SD2_DATA0 0x170b9
MX6QDL_PAD_SD2_DAT1__SD2_DATA1 0x170b9
MX6QDL_PAD_SD2_DAT2__SD2_DATA2 0x170b9
MX6QDL_PAD_SD2_DAT3__SD2_DATA3 0x170b9
/* WL12xx IRQ */
MX6QDL_PAD_ENET_TXD0__GPIO1_IO30 0x10880
>;
};
pinctrl_usdhc3: usdhc3grp {
fsl,pins = <
MX6QDL_PAD_SD3_CMD__SD3_CMD 0x17099
@ -825,10 +672,4 @@
MX6QDL_PAD_SD3_RST__SD3_RESET 0x1b0b1
>;
};
pinctrl_wifi_npd: wifinpdgrp {
fsl,pins = <
MX6QDL_PAD_ENET_RXD1__GPIO1_IO26 0x1b8b0
>;
};
};

1
arch/arm/boot/dts/imx6qp-vicutp.dts
View File

@ -6,6 +6,7 @@
/dts-v1/;
#include "imx6qp.dtsi"
#include "imx6qdl-vicut1.dtsi"
#include "imx6qdl-vicut1-12inch.dtsi"
/ {
model = "Kverneland UT1P Board";

2
arch/arm/boot/dts/imx6sl-evk.dts
View File

@ -137,7 +137,7 @@
pinctrl-0 = <&pinctrl_ecspi1>;
status = "okay";
flash: m25p80@0 {
flash: flash@0 {
#address-cells = <1>;
#size-cells = <1>;
compatible = "st,m25p32", "jedec,spi-nor";

2
arch/arm/boot/dts/imx6sl.dtsi
View File

@ -50,7 +50,7 @@
#address-cells = <1>;
#size-cells = <0>;
cpu@0 {
cpu0: cpu@0 {
compatible = "arm,cortex-a9";
device_type = "cpu";
reg = <0x0>;

2
arch/arm/boot/dts/imx6sx-nitrogen6sx.dts
View File

@ -107,7 +107,7 @@
pinctrl-0 = <&pinctrl_ecspi1>;
status = "okay";
flash: m25p80@0 {
flash: flash@0 {
compatible = "microchip,sst25vf016b";
spi-max-frequency = <20000000>;
reg = <0>;

4
arch/arm/boot/dts/imx6sx-sdb-reva.dts
View File

@ -123,7 +123,7 @@
pinctrl-0 = <&pinctrl_qspi2>;
status = "okay";
flash0: s25fl128s@0 {
flash0: flash@0 {
reg = <0>;
#address-cells = <1>;
#size-cells = <1>;
@ -133,7 +133,7 @@
spi-tx-bus-width = <4>;
};
flash1: s25fl128s@2 {
flash1: flash@2 {
reg = <2>;
#address-cells = <1>;
#size-cells = <1>;

4
arch/arm/boot/dts/imx6sx-sdb.dts
View File

@ -108,7 +108,7 @@
pinctrl-0 = <&pinctrl_qspi2>;
status = "okay";
flash0: n25q256a@0 {
flash0: flash@0 {
#address-cells = <1>;
#size-cells = <1>;
compatible = "micron,n25q256a", "jedec,spi-nor";
@ -118,7 +118,7 @@
reg = <0>;
};
flash1: n25q256a@2 {
flash1: flash@2 {
#address-cells = <1>;
#size-cells = <1>;
compatible = "micron,n25q256a", "jedec,spi-nor";

2
arch/arm/boot/dts/imx6ul-14x14-evk.dtsi
View File

@ -286,7 +286,7 @@
pinctrl-0 = <&pinctrl_qspi>;
status = "okay";
flash0: n25q256a@0 {
flash0: flash@0 {
#address-cells = <1>;
#size-cells = <1>;
compatible = "micron,n25q256a", "jedec,spi-nor";

2
arch/arm/boot/dts/imx6ul-kontron-n6310-som.dtsi
View File

@ -19,7 +19,7 @@
};
&qspi {
spi-flash@0 {
flash@0 {
#address-cells = <1>;
#size-cells = <1>;
compatible = "spi-nand";

2
arch/arm/boot/dts/imx6ul-kontron-n6311-som.dtsi
View File

@ -18,7 +18,7 @@
};
&qspi {
spi-flash@0 {
flash@0 {
#address-cells = <1>;
#size-cells = <1>;
compatible = "spi-nand";

2
arch/arm/boot/dts/imx6ul-kontron-n6x1x-s.dtsi
View File

@ -178,7 +178,7 @@
&uart3 {
pinctrl-names = "default";
pinctrl-0 = <&pinctrl_uart3>;
fsl,uart-has-rtscts;
uart-has-rtscts;
status = "okay";
};

2
arch/arm/boot/dts/imx6ul-kontron-n6x1x-som-common.dtsi
View File

@ -19,7 +19,7 @@
pinctrl-0 = <&pinctrl_ecspi2>;
status = "okay";
spi-flash@0 {
flash@0 {
compatible = "mxicy,mx25v8035f", "jedec,spi-nor";
spi-max-frequency = <50000000>;
reg = <0>;

3
arch/arm/boot/dts/imx6ul-phytec-segin-peb-av-02.dtsi
View File

@ -11,7 +11,7 @@
brightness-levels = <0 4 8 16 32 64 128 255>;
default-brightness-level = <5>;
power-supply = <&reg_backlight_en>;
pwms = <&pwm3 0 5000000>;
pwms = <&pwm3 0 5000000 0>;
status = "disabled";
};
@ -91,7 +91,6 @@
};
&pwm3 {
#pwm-cells = <2>;
pinctrl-names = "default";
pinctrl-0 = <&pinctrl_pwm3>;
status = "disabled";

211
arch/arm/boot/dts/imx6ul-tqma6ul-common.dtsi Normal file
View File

@ -0,0 +1,211 @@
// SPDX-License-Identifier: (GPL-2.0-or-later OR MIT)
/*
* Copyright 2018-2022 TQ-Systems GmbH
* Author: Markus Niebel <Markus.Niebel@tq-group.com>
*/
/*
* Common for
* - TQMa6ULx
* - TQMa6ULxL
* - TQMa6ULLx
* - TQMa6ULLxL
*/
/ {
memory@80000000 {
device_type = "memory";
reg = <0x80000000 0x10000000>;
};
};
&i2c4 {
clock-frequency = <100000>;
pinctrl-names = "default", "gpio";
pinctrl-0 = <&pinctrl_i2c4>;
pinctrl-1 = <&pinctrl_i2c4_recovery>;
scl-gpios = <&gpio1 20 (GPIO_ACTIVE_HIGH | GPIO_OPEN_DRAIN)>;
sda-gpios = <&gpio1 21 (GPIO_ACTIVE_HIGH | GPIO_OPEN_DRAIN)>;
status = "okay";
pfuze3000: pmic@8 {
compatible = "fsl,pfuze3000";
reg = <0x08>;
regulators {
reg_sw1a: sw1a {
regulator-min-microvolt = <700000>;
regulator-max-microvolt = <3300000>;
regulator-boot-on;
regulator-ramp-delay = <6250>;
/* not used */
};
reg_sw1b_core: sw1b {
regulator-min-microvolt = <700000>;
regulator-max-microvolt = <1475000>;
regulator-boot-on;
regulator-always-on;
regulator-ramp-delay = <6250>;
};
reg_sw2: sw2 {
regulator-min-microvolt = <2500000>;
regulator-max-microvolt = <3300000>;
};
reg_sw3_ddr: sw3 {
regulator-min-microvolt = <900000>;
regulator-max-microvolt = <1650000>;
regulator-boot-on;
regulator-always-on;
};
reg_swbst: swbst {
regulator-min-microvolt = <5000000>;
regulator-max-microvolt = <5150000>;
/* not used */
};
reg_snvs_3v0: vsnvs {
regulator-min-microvolt = <1000000>;
regulator-max-microvolt = <3000000>;
regulator-boot-on;
regulator-always-on;
};
reg_vrefddr: vrefddr {
regulator-boot-on;
regulator-always-on;
};
reg_vccsd: vccsd {
regulator-min-microvolt = <2850000>;
regulator-max-microvolt = <3300000>;
};
reg_v33_3v3: v33 {
regulator-min-microvolt = <2850000>;
regulator-max-microvolt = <3300000>;
regulator-always-on;
};
reg_vldo1_3v3: vldo1 {
regulator-min-microvolt = <1800000>;
regulator-max-microvolt = <3300000>;
/* not used */
};
reg_vldo2: vldo2 {
regulator-min-microvolt = <800000>;
regulator-max-microvolt = <1550000>;
/* not used */
};
reg_vldo3: vldo3 {
regulator-min-microvolt = <1800000>;
regulator-max-microvolt = <3300000>;
/* not used */
};
reg_vldo4: vldo4 {
regulator-min-microvolt = <1800000>;
regulator-max-microvolt = <1800000>;
regulator-always-on;
};
};
};
jc42_1a: eeprom-temperature-sensor@1a {
compatible = "nxp,se97", "jedec,jc-42.4-temp";
reg = <0x1a>;
};
m24c64_50: eeprom@50 {
compatible = "atmel,24c64";
reg = <0x50>;
pagesize = <32>;
};
m24c02_52: eeprom@52 {
compatible = "nxp,se97b", "atmel,24c02";
reg = <0x52>;
pagesize = <16>;
read-only;
};
rtc0: rtc@68 {
compatible = "dallas,ds1339";
reg = <0x68>;
};
};
&gpio4 {
pinctrl-names = "default";
pinctrl-0 = <&pinctrl_pmic>;
/*
* PMIC & temperature sensor IRQ
* Both do currently not use IRQ
* potentially dangerous if used on baseboard
*/
pmic-int-hog {
gpio-hog;
gpios = <24 0>;
input;
};
};
&qspi {
pinctrl-names = "default";
pinctrl-0 = <&pinctrl_qspi>;
status = "okay";
flash0: flash@0 {
#address-cells = <1>;
#size-cells = <1>;
compatible = "jedec,spi-nor";
spi-max-frequency = <33000000>;
spi-rx-bus-width = <4>;
spi-tx-bus-width = <1>;
reg = <0>;
};
};
/* eMMC */
&usdhc2 {
pinctrl-names = "default", "state_100mhz" , "state_200mhz";
pinctrl-0 = <&pinctrl_usdhc2>;
pinctrl-1 = <&pinctrl_usdhc2_100mhz>;
pinctrl-2 = <&pinctrl_usdhc2_200mhz>;
bus-width = <8>;
disable-wp;
non-removable;
no-sdio;
no-sd;
status = "okay";
};
&iomuxc {
pinctrl_i2c4: i2c4grp {
fsl,pins = <
MX6UL_PAD_UART2_TX_DATA__I2C4_SCL 0x4001b8b0
MX6UL_PAD_UART2_RX_DATA__I2C4_SDA 0x4001b8b0
>;
};
pinctrl_i2c4_recovery: i2c4recoverygrp {
fsl,pins = <
MX6UL_PAD_UART2_TX_DATA__GPIO1_IO20 0x4001b8b0
MX6UL_PAD_UART2_RX_DATA__GPIO1_IO21 0x4001b8b0
>;
};
pinctrl_pmic: pmic {
fsl,pins = <
/* PMIC irq */
MX6UL_PAD_CSI_DATA03__GPIO4_IO24 0x1b099
>;
};
};

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// SPDX-License-Identifier: (GPL-2.0-or-later OR MIT)
/*
* Copyright 2018-2022 TQ-Systems GmbH
* Author: Markus Niebel <Markus.Niebel@tq-group.com>
*/
/dts-v1/;
#include "imx6ul-tqma6ul1.dtsi"
#include "mba6ulx.dtsi"
/ {
model = "TQ-Systems TQMa6UL1 SoM on MBa6ULx board";
compatible = "tq,imx6ul-tqma6ul1-mba6ulx", "tq,imx6ul-tqma6ul1", "fsl,imx6ul";
};
/*
* Note: can2 and fec2 are enabled on mba6ulx level (for i.MX6ULG2 usage)
* and need to be disabled here again
*/
&can2 {
status = "disabled";
};
&fec1 {
pinctrl-names = "default";
pinctrl-0 = <&pinctrl_enet1>, <&pinctrl_enet1_mdc>;
status = "okay";
mdio {
#address-cells = <1>;
#size-cells = <0>;
ethphy0: ethernet-phy@0 {
compatible = "ethernet-phy-ieee802.3-c22";
max-speed = <100>;
reg = <0>;
};
};
};
&fec2 {
/delete-property/ phy-handle;
/delete-node/ mdio;
};
&iomuxc {
pinctrl_enet1_mdc: enet1mdcgrp {
fsl,pins = <
/* mdio */
MX6UL_PAD_GPIO1_IO07__ENET1_MDC 0x1b0b0
MX6UL_PAD_GPIO1_IO06__ENET1_MDIO 0x1b0b0
>;
};
};

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// SPDX-License-Identifier: (GPL-2.0-or-later OR MIT)
/*
* Copyright 2018-2022 TQ-Systems GmbH
* Author: Markus Niebel <Markus.Niebel@tq-group.com>
*/
#include "imx6ul-tqma6ul2.dtsi"
/ {
model = "TQ-Systems TQMa6UL1 SoM";
compatible = "tq,imx6ul-tqma6ul1", "fsl,imx6ul";
};
/*
* There are no module specific differences compared to TQMa6UL2,
* only external interfaces differ
*/
/*
* Devices not available on i.MX6ULG1 and should not be enabled on
* mainboard level (again)
*/
&can2 {
status = "disabled";
};
&csi {
status = "disabled";
};
&fec2 {
status = "disabled";
};
&lcdif {
status = "disabled";
};

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// SPDX-License-Identifier: (GPL-2.0-or-later OR MIT)
/*
* Copyright 2018-2022 TQ-Systems GmbH
* Author: Markus Niebel <Markus.Niebel@tq-group.com>
*/
/dts-v1/;
#include "imx6ul-tqma6ul2.dtsi"
#include "mba6ulx.dtsi"
/ {
model = "TQ-Systems TQMa6ULx SoM on MBa6ULx board";
compatible = "tq,imx6ul-tqma6ul2-mba6ulx", "tq,imx6ul-tqma6ul2", "fsl,imx6ul";
};

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// SPDX-License-Identifier: (GPL-2.0-or-later OR MIT)
/*
* Copyright 2018-2022 TQ-Systems GmbH
* Author: Markus Niebel <Markus.Niebel@tq-group.com>
*/
#include "imx6ul.dtsi"
#include "imx6ul-tqma6ul-common.dtsi"
#include "imx6ul-tqma6ulx-common.dtsi"
/ {
model = "TQ-Systems TQMa6UL2 SoM";
compatible = "tq,imx6ul-tqma6ul2", "fsl,imx6ul";
};
&usdhc2 {
fsl,tuning-step = <6>;
};
&iomuxc {
pinctrl_usdhc2: usdhc2grp {
fsl,pins = <
MX6UL_PAD_NAND_RE_B__USDHC2_CLK 0x00017051
MX6UL_PAD_NAND_WE_B__USDHC2_CMD 0x00017051
MX6UL_PAD_NAND_DATA00__USDHC2_DATA0 0x00017051
MX6UL_PAD_NAND_DATA01__USDHC2_DATA1 0x00017051
MX6UL_PAD_NAND_DATA02__USDHC2_DATA2 0x00017051
MX6UL_PAD_NAND_DATA03__USDHC2_DATA3 0x00017051
MX6UL_PAD_NAND_DATA04__USDHC2_DATA4 0x00017051
MX6UL_PAD_NAND_DATA05__USDHC2_DATA5 0x00017051
MX6UL_PAD_NAND_DATA06__USDHC2_DATA6 0x00017051
MX6UL_PAD_NAND_DATA07__USDHC2_DATA7 0x00017051
/* rst */
MX6UL_PAD_NAND_ALE__GPIO4_IO10 0x0001b051
>;
};
pinctrl_usdhc2_100mhz: usdhc2-100mhzgrp {
fsl,pins = <
MX6UL_PAD_NAND_RE_B__USDHC2_CLK 0x000170e1
MX6UL_PAD_NAND_WE_B__USDHC2_CMD 0x000170f1
MX6UL_PAD_NAND_DATA00__USDHC2_DATA0 0x000170f1
MX6UL_PAD_NAND_DATA01__USDHC2_DATA1 0x000170f1
MX6UL_PAD_NAND_DATA02__USDHC2_DATA2 0x000170f1
MX6UL_PAD_NAND_DATA03__USDHC2_DATA3 0x000170f1
MX6UL_PAD_NAND_DATA04__USDHC2_DATA4 0x000170f1
MX6UL_PAD_NAND_DATA05__USDHC2_DATA5 0x000170f1
MX6UL_PAD_NAND_DATA06__USDHC2_DATA6 0x000170f1
MX6UL_PAD_NAND_DATA07__USDHC2_DATA7 0x000170f1
/* rst */
MX6UL_PAD_NAND_ALE__GPIO4_IO10 0x0001b051
>;
};
pinctrl_usdhc2_200mhz: usdhc2-200mhzgrp {
fsl,pins = <
MX6UL_PAD_NAND_RE_B__USDHC2_CLK 0x000170f1
MX6UL_PAD_NAND_WE_B__USDHC2_CMD 0x000170e1
MX6UL_PAD_NAND_DATA00__USDHC2_DATA0 0x000170e1
MX6UL_PAD_NAND_DATA01__USDHC2_DATA1 0x000170e1
MX6UL_PAD_NAND_DATA02__USDHC2_DATA2 0x000170e1
MX6UL_PAD_NAND_DATA03__USDHC2_DATA3 0x000170e1
MX6UL_PAD_NAND_DATA04__USDHC2_DATA4 0x000170e1
MX6UL_PAD_NAND_DATA05__USDHC2_DATA5 0x000170e1
MX6UL_PAD_NAND_DATA06__USDHC2_DATA6 0x000170e1
MX6UL_PAD_NAND_DATA07__USDHC2_DATA7 0x000170e1
/* rst */
MX6UL_PAD_NAND_ALE__GPIO4_IO10 0x0001b051
>;
};
};

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// SPDX-License-Identifier: (GPL-2.0-or-later OR MIT)
/*
* Copyright 2018-2022 TQ Systems GmbH
* Author: Markus Niebel <Markus.Niebel@tq-group.com>
*/
/dts-v1/;
#include "imx6ul-tqma6ul2l.dtsi"
#include "mba6ulx.dtsi"
/ {
model = "TQ Systems TQMa6UL2L SoM on MBa6ULx board";
compatible = "tq,imx6ul-tqma6ul2l-mba6ulx", "tq,imx6ul-tqma6ul2l", "fsl,imx6ul";
};

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// SPDX-License-Identifier: (GPL-2.0-or-later OR MIT)
/*
* Copyright 2018-2022 TQ-Systems GmbH
* Author: Markus Niebel <Markus.Niebel@tq-group.com>
*/
#include "imx6ul.dtsi"
#include "imx6ul-tqma6ul-common.dtsi"
#include "imx6ul-tqma6ulxl-common.dtsi"
/ {
model = "TQ-Systems TQMa6UL2L SoM";
compatible = "tq,imx6ul-tqma6ul2l", "fsl,imx6ul";
};
&usdhc2 {
fsl,tuning-step= <6>;
};
&iomuxc {
pinctrl_usdhc2: usdhc2grp {
fsl,pins = <
MX6UL_PAD_NAND_RE_B__USDHC2_CLK 0x00017051
MX6UL_PAD_NAND_WE_B__USDHC2_CMD 0x00017051
MX6UL_PAD_NAND_DATA00__USDHC2_DATA0 0x00017051
MX6UL_PAD_NAND_DATA01__USDHC2_DATA1 0x00017051
MX6UL_PAD_NAND_DATA02__USDHC2_DATA2 0x00017051
MX6UL_PAD_NAND_DATA03__USDHC2_DATA3 0x00017051
MX6UL_PAD_NAND_DATA04__USDHC2_DATA4 0x00017051
MX6UL_PAD_NAND_DATA05__USDHC2_DATA5 0x00017051
MX6UL_PAD_NAND_DATA06__USDHC2_DATA6 0x00017051
MX6UL_PAD_NAND_DATA07__USDHC2_DATA7 0x00017051
/* rst */
MX6UL_PAD_NAND_ALE__GPIO4_IO10 0x0001b051
>;
};
pinctrl_usdhc2_100mhz: usdhc2-100mhzgrp {
fsl,pins = <
MX6UL_PAD_NAND_RE_B__USDHC2_CLK 0x000170e1
MX6UL_PAD_NAND_WE_B__USDHC2_CMD 0x000170f1
MX6UL_PAD_NAND_DATA00__USDHC2_DATA0 0x000170f1
MX6UL_PAD_NAND_DATA01__USDHC2_DATA1 0x000170f1
MX6UL_PAD_NAND_DATA02__USDHC2_DATA2 0x000170f1
MX6UL_PAD_NAND_DATA03__USDHC2_DATA3 0x000170f1
MX6UL_PAD_NAND_DATA04__USDHC2_DATA4 0x000170f1
MX6UL_PAD_NAND_DATA05__USDHC2_DATA5 0x000170f1
MX6UL_PAD_NAND_DATA06__USDHC2_DATA6 0x000170f1
MX6UL_PAD_NAND_DATA07__USDHC2_DATA7 0x000170f1
/* rst */
MX6UL_PAD_NAND_ALE__GPIO4_IO10 0x0001b051
>;
};
pinctrl_usdhc2_200mhz: usdhc2-200mhzgrp {
fsl,pins = <
MX6UL_PAD_NAND_RE_B__USDHC2_CLK 0x000170f9
MX6UL_PAD_NAND_WE_B__USDHC2_CMD 0x000170f1
MX6UL_PAD_NAND_DATA00__USDHC2_DATA0 0x000170f1
MX6UL_PAD_NAND_DATA01__USDHC2_DATA1 0x000170f1
MX6UL_PAD_NAND_DATA02__USDHC2_DATA2 0x000170f1
MX6UL_PAD_NAND_DATA03__USDHC2_DATA3 0x000170f1
MX6UL_PAD_NAND_DATA04__USDHC2_DATA4 0x000170f1
MX6UL_PAD_NAND_DATA05__USDHC2_DATA5 0x000170f1
MX6UL_PAD_NAND_DATA06__USDHC2_DATA6 0x000170f1
MX6UL_PAD_NAND_DATA07__USDHC2_DATA7 0x000170f1
/* rst */
MX6UL_PAD_NAND_ALE__GPIO4_IO10 0x0001b051
>;
};
};

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// SPDX-License-Identifier: (GPL-2.0-or-later OR MIT)
/*
* Copyright 2018-2022 TQ-Systems GmbH
* Author: Markus Niebel <Markus.Niebel@tq-group.com>
*/
/*
* Common for
* - TQMa6ULx
* - TQMa6ULLx
*/
&m24c64_50 {
vcc-supply = <&reg_sw2>;
};
&m24c02_52 {
vcc-supply = <&reg_sw2>;
};
&reg_sw2 {
regulator-boot-on;
regulator-always-on;
};
/* eMMC */
&usdhc2 {
vmmc-supply = <&reg_sw2>;
vqmmc-supply = <&reg_vldo4>;
};
&iomuxc {
pinctrl_qspi: qspigrp {
fsl,pins = <
MX6UL_PAD_NAND_WP_B__QSPI_A_SCLK 0x70b9
MX6UL_PAD_NAND_READY_B__QSPI_A_DATA00 0x70b9
MX6UL_PAD_NAND_CE0_B__QSPI_A_DATA01 0x70b9
MX6UL_PAD_NAND_CE1_B__QSPI_A_DATA02 0x70b9
MX6UL_PAD_NAND_CLE__QSPI_A_DATA03 0x70b9
MX6UL_PAD_NAND_DQS__QSPI_A_SS0_B 0x70a1
>;
};
};

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// SPDX-License-Identifier: (GPL-2.0-or-later OR MIT)
/*
* Copyright 2018-2022 TQ-Systems GmbH
* Author: Markus Niebel <Markus.Niebel@tq-group.com>
*/
/*
* Common for
* - TQMa6ULxL
* - TQMa6ULLxL
*/
/ {
reg_vin: reg-vin {
compatible = "regulator-fixed";
regulator-name = "VIN";
regulator-min-microvolt = <3300000>;
regulator-max-microvolt = <3300000>;
regulator-always-on;
};
};
&m24c64_50 {
vcc-supply = <&reg_vin>;
};
&m24c02_52 {
vcc-supply = <&reg_vin>;
};
/* eMMC */
&usdhc2 {
vmmc-supply = <&reg_vin>;
vqmmc-supply = <&reg_vldo4>;
};
&iomuxc {
pinctrl_qspi: qspigrp {
fsl,pins = <
MX6UL_PAD_NAND_WP_B__QSPI_A_SCLK 0x70a9
MX6UL_PAD_NAND_READY_B__QSPI_A_DATA00 0x70a9
MX6UL_PAD_NAND_CE0_B__QSPI_A_DATA01 0x70a9
MX6UL_PAD_NAND_CE1_B__QSPI_A_DATA02 0x70a9
MX6UL_PAD_NAND_CLE__QSPI_A_DATA03 0x70a9
MX6UL_PAD_NAND_DQS__QSPI_A_SS0_B 0x70a1
>;
};
};

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// SPDX-License-Identifier: GPL-2.0-or-later OR MIT
/*
* Copyright 2017-2022 Toradex
*/
/dts-v1/;
#include "imx6ull-colibri-nonwifi.dtsi"
#include "imx6ull-colibri-aster.dtsi"
/ {
model = "Toradex Colibri iMX6ULL 256/512MB on Colibri Aster";
compatible = "toradex,colibri-imx6ull-aster",
"toradex,colibri-imx6ull",
"fsl,imx6ull";
};
&atmel_mxt_ts {
status = "okay";
};

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// SPDX-License-Identifier: GPL-2.0-or-later OR MIT
/*
* Copyright 2017-2022 Toradex
*/
/ {
chosen {
stdout-path = "serial0:115200n8";
};
gpio-keys {
compatible = "gpio-keys";
pinctrl-names = "default";
pinctrl-0 = <&pinctrl_snvs_gpiokeys>;
power {
label = "Wake-Up";
gpios = <&gpio5 1 GPIO_ACTIVE_HIGH>;
linux,code = <KEY_WAKEUP>;
debounce-interval = <10>;
wakeup-source;
};
};
reg_3v3: regulator-3v3 {
compatible = "regulator-fixed";
regulator-name = "3.3V";
regulator-min-microvolt = <3300000>;
regulator-max-microvolt = <3300000>;
};
reg_5v0: regulator-5v0 {
compatible = "regulator-fixed";
regulator-name = "5V";
regulator-min-microvolt = <5000000>;
regulator-max-microvolt = <5000000>;
};
reg_usbh_vbus: regulator-usbh-vbus {
compatible = "regulator-fixed";
pinctrl-names = "default";
pinctrl-0 = <&pinctrl_usbh_reg>;
regulator-name = "VCC_USB[1-4]";
regulator-min-microvolt = <5000000>;
regulator-max-microvolt = <5000000>;
gpio = <&gpio1 2 GPIO_ACTIVE_LOW>;
vin-supply = <&reg_5v0>;
};
};
&adc1 {
status = "okay";
};
&ecspi1 {
status = "okay";
num-cs = <2>;
cs-gpios = <
&gpio3 26 GPIO_ACTIVE_HIGH /* SODIMM 86 LCD_DATA21 */
&gpio4 28 GPIO_ACTIVE_HIGH /* SODIMM 65 CSI_DATA07 */
>;
};
/*
* Following SODIMM Pins should not be accessed as GPIO on Aster board:
* 134 - AIN5_SCL (no connection)
* 127 - Voltage Level Translator OE# signal (IC11 and IC12)
*
* To configure GPIO to LED5, please disable FEC2 and uncomment the following:
* &iomuxc {
* pinctrl-names = "default";
* pinctrl-0 = <
* &pinctrl_gpio1
* &pinctrl_gpio2
* &pinctrl_gpio3
* &pinctrl_gpio4
* &pinctrl_gpio6 - for non-WiFi modules only
* &pinctrl_gpio7
* &pinctrl_gpio_aster
* >;
*
* pinctrl_gpio_aster: gpio-aster {
* fsl,pins = <
* MX6UL_PAD_GPIO1_IO07__GPIO1_IO07 0x1b0b0
* >;
* };
* };
*/
&i2c1 {
status = "okay";
m41t0m6: rtc@68 {
compatible = "st,m41t0";
reg = <0x68>;
};
};
/* PWM <A> */
&pwm4 {
status = "okay";
};
/* PWM <B> */
&pwm5 {
status = "okay";
};
/* PWM <C> */
&pwm6 {
status = "okay";
};
/* PWM <D> */
&pwm7 {
status = "okay";
};
&uart1 {
status = "okay";
};
&uart2 {
status = "okay";
};
&uart5 {
status = "okay";
};
&usbotg1 {
vbus-supply = <&reg_usbh_vbus>;
status = "okay";
};
&usbotg2 {
vbus-supply = <&reg_usbh_vbus>;
status = "okay";
};
&usdhc1 {
vmmc-supply = <&reg_3v3>;
status = "okay";
};

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// SPDX-License-Identifier: GPL-2.0-or-later OR MIT
/*
* Copyright 2022 Toradex
*/
/dts-v1/;
#include "imx6ull-colibri-emmc-nonwifi.dtsi"
#include "imx6ull-colibri-aster.dtsi"
/ {
model = "Toradex Colibri iMX6ULL 1GB (eMMC) on Colibri Aster";
compatible = "toradex,colibri-imx6ull-emmc-aster",
"toradex,colibri-imx6ull-emmc",
"toradex,colibri-imx6ull",
"fsl,imx6ull";
};

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// SPDX-License-Identifier: GPL-2.0-or-later OR MIT
/*
* Copyright 2022 Toradex
*/
/dts-v1/;
#include "imx6ull-colibri-emmc-nonwifi.dtsi"
#include "imx6ull-colibri-iris-v2.dtsi"
/ {
model = "Toradex Colibri iMX6ULL 1G (eMMC) on Colibri Iris V2";
compatible = "toradex,colibri-imx6ull-iris-v2",
"toradex,colibri-imx6ull-emmc",
"toradex,colibri-imx6ull",
"fsl,imx6ull";
};

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// SPDX-License-Identifier: GPL-2.0-or-later OR MIT
/*
* Copyright 2022 Toradex
*/
/dts-v1/;
#include "imx6ull-colibri-emmc-nonwifi.dtsi"
#include "imx6ull-colibri-iris.dtsi"
/ {
model = "Toradex Colibri iMX6ULL 1GB (eMMC) on Colibri Iris";
compatible = "toradex,colibri-imx6ull-emmc-iris",
"toradex,colibri-imx6ull-emmc",
"toradex,colibri-imx6ull",
"fsl,imx6ull";
};

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// SPDX-License-Identifier: GPL-2.0+ OR MIT
// SPDX-License-Identifier: GPL-2.0-or-later OR MIT
/*
* Copyright 2021 Toradex
* Copyright 2022 Toradex
*/
#include "imx6ull-colibri.dtsi"
@ -8,7 +8,7 @@
/ {
aliases {
mmc0 = &usdhc2; /* eMMC */
mmc1 = &usdhc1; /* MMC 4bit slot */
mmc1 = &usdhc1; /* MMC 4-bit slot */
};
memory@80000000 {
@ -154,6 +154,7 @@
"SODIMM_127";
};
/* NAND */
&gpmi {
status = "disabled";
};
@ -170,6 +171,7 @@
pinctrl-0 = <&pinctrl_snvs_gpio1 &pinctrl_snvs_gpio3>;
};
/* eMMC */
&usdhc2 {
pinctrl-names = "default";
pinctrl-0 = <&pinctrl_usdhc2emmc>;

6
arch/arm/boot/dts/imx6ull-colibri-eval-v3.dts
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@ -1,6 +1,6 @@
// SPDX-License-Identifier: (GPL-2.0 OR MIT)
// SPDX-License-Identifier: GPL-2.0-or-later OR MIT
/*
* Copyright 2018 Toradex AG
* Copyright 2018-2022 Toradex
*/
/dts-v1/;
@ -9,6 +9,6 @@
#include "imx6ull-colibri-eval-v3.dtsi"
/ {
model = "Toradex Colibri iMX6ULL 256MB on Colibri Evaluation Board V3";
model = "Toradex Colibri iMX6ULL 256/512MB on Colibri Evaluation Board V3";
compatible = "toradex,colibri-imx6ull-eval", "fsl,imx6ull";
};

63
arch/arm/boot/dts/imx6ull-colibri-eval-v3.dtsi
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@ -1,6 +1,6 @@
// SPDX-License-Identifier: (GPL-2.0 OR MIT)
// SPDX-License-Identifier: GPL-2.0-or-later OR MIT
/*
* Copyright 2017 Toradex AG
* Copyright 2017-2022 Toradex
*/
/ {
@ -8,20 +8,6 @@
stdout-path = "serial0:115200n8";
};
gpio-keys {
compatible = "gpio-keys";
pinctrl-names = "default";
pinctrl-0 = <&pinctrl_snvs_gpiokeys>;
power {
label = "Wake-Up";
gpios = <&gpio5 1 GPIO_ACTIVE_HIGH>;
linux,code = <KEY_WAKEUP>;
debounce-interval = <10>;
wakeup-source;
};
};
/* fixed crystal dedicated to mcp2515 */
clk16m: clk16m {
compatible = "fixed-clock";
@ -29,18 +15,6 @@
clock-frequency = <16000000>;
};
panel: panel {
compatible = "edt,et057090dhu";
backlight = <&bl>;
power-supply = <&reg_3v3>;
port {
panel_in: endpoint {
remote-endpoint = <&lcdif_out>;
};
};
};
reg_3v3: regulator-3v3 {
compatible = "regulator-fixed";
regulator-name = "3.3V";
@ -71,14 +45,6 @@
status = "okay";
};
&bl {
brightness-levels = <0 4 8 16 32 64 128 255>;
default-brightness-level = <6>;
power-supply = <&reg_3v3>;
pwms = <&pwm4 0 5000000 1>;
status = "okay";
};
&ecspi1 {
status = "okay";
@ -107,16 +73,6 @@
};
};
&lcdif {
status = "okay";
port {
lcdif_out: endpoint {
remote-endpoint = <&panel_in>;
};
};
};
/* PWM <A> */
&pwm4 {
status = "okay";
@ -150,6 +106,7 @@
};
&usbotg1 {
vbus-supply = <&reg_usbh_vbus>;
status = "okay";
};
@ -159,20 +116,6 @@
};
&usdhc1 {
pinctrl-names = "default", "state_100mhz", "state_200mhz", "sleep";
pinctrl-0 = <&pinctrl_usdhc1 &pinctrl_snvs_usdhc1_cd>;
pinctrl-1 = <&pinctrl_usdhc1_100mhz &pinctrl_snvs_usdhc1_cd>;
pinctrl-2 = <&pinctrl_usdhc1_200mhz &pinctrl_snvs_usdhc1_cd>;
pinctrl-3 = <&pinctrl_usdhc1 &pinctrl_snvs_usdhc1_sleep_cd>;
cd-gpios = <&gpio5 0 GPIO_ACTIVE_LOW>;
disable-wp;
wakeup-source;
keep-power-in-suspend;
vmmc-supply = <&reg_3v3>;
vqmmc-supply = <&reg_sd1_vmmc>;
sd-uhs-sdr12;
sd-uhs-sdr25;
sd-uhs-sdr50;
sd-uhs-sdr104;
status = "okay";
};

65
arch/arm/boot/dts/imx6ull-colibri-iris-v2.dts Normal file
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@ -0,0 +1,65 @@
// SPDX-License-Identifier: GPL-2.0-or-later OR MIT
/*
* Copyright 2018-2022 Toradex
*/
/dts-v1/;
#include "imx6ull-colibri-nonwifi.dtsi"
#include "imx6ull-colibri-iris-v2.dtsi"
/ {
model = "Toradex Colibri iMX6ULL 256M/512B on Colibri Iris V2";
compatible = "toradex,colibri-imx6ull-iris-v2",
"toradex,colibri-imx6ull",
"fsl,imx6ull";
};
&atmel_mxt_ts {
status = "okay";
};
&gpio1 {
/* This turns the LVDS transceiver on */
lvds-power-on {
gpio-hog;
gpios = <14 GPIO_ACTIVE_HIGH>; /* SODIMM 99 */
line-name = "LVDS_POWER_ON";
output-high;
};
};
&gpio2 {
/*
* This switches the LVDS transceiver to the single-channel
* output mode.
*/
lvds-ch-mode {
gpio-hog;
gpios = <0 GPIO_ACTIVE_HIGH>; /* SODIMM 55 */
line-name = "LVDS_CH_MODE";
output-high;
};
/*
* This switches the LVDS transceiver to the 24-bit RGB mode.
*/
lvds-rgb-mode {
gpio-hog;
gpios = <1 GPIO_ACTIVE_HIGH>; /* SODIMM 63 */
line-name = "LVDS_RGB_MODE";
output-low;
};
};
&gpio5 {
/*
* This switches the LVDS transceiver to VESA color mapping mode.
*/
lvds-color-map {
gpio-hog;
gpios = <3 GPIO_ACTIVE_HIGH>; /* SODIMM 95 */
line-name = "LVDS_COLOR_MAP";
output-low;
};
};

27
arch/arm/boot/dts/imx6ull-colibri-iris-v2.dtsi Normal file
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@ -0,0 +1,27 @@
// SPDX-License-Identifier: GPL-2.0-or-later OR MIT
/*
* Copyright 2018-2022 Toradex
*/
#include "imx6ull-colibri-iris.dtsi"
/ {
reg_3v3_vmmc: regulator-3v3-vmmc {
compatible = "regulator-fixed";
regulator-name = "3v3_vmmc";
regulator-min-microvolt = <3300000>;
regulator-max-microvolt = <3300000>;
gpio = <&gpio1 26 GPIO_ACTIVE_HIGH>;
startup-delay-us = <100>;
enable-active-high;
};
};
&usdhc1 {
cap-power-off-card;
vmmc-supply = <&reg_3v3_vmmc>;
/delete-property/ keep-power-in-suspend;
/delete-property/ no-1-8-v;
status = "okay";
};

20
arch/arm/boot/dts/imx6ull-colibri-iris.dts Normal file
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@ -0,0 +1,20 @@
// SPDX-License-Identifier: GPL-2.0-or-later OR MIT
/*
* Copyright 2018-2022 Toradex
*/
/dts-v1/;
#include "imx6ull-colibri-nonwifi.dtsi"
#include "imx6ull-colibri-iris.dtsi"
/ {
model = "Toradex Colibri iMX6ULL 256/512MB on Colibri Iris";
compatible = "toradex,colibri-imx6ull-iris",
"toradex,colibri-imx6ull",
"fsl,imx6ull";
};
&atmel_mxt_ts {
status = "okay";
};

132
arch/arm/boot/dts/imx6ull-colibri-iris.dtsi Normal file
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@ -0,0 +1,132 @@
// SPDX-License-Identifier: GPL-2.0-or-later OR MIT
/*
* Copyright 2018-2022 Toradex
*/
/ {
chosen {
stdout-path = "serial0:115200n8";
};
gpio-keys {
compatible = "gpio-keys";
pinctrl-names = "default";
pinctrl-0 = <&pinctrl_snvs_gpiokeys>;
power {
label = "Wake-Up";
gpios = <&gpio5 1 GPIO_ACTIVE_HIGH>;
linux,code = <KEY_WAKEUP>;
debounce-interval = <10>;
wakeup-source;
};
};
reg_3v3: regulator-3v3 {
compatible = "regulator-fixed";
regulator-name = "3.3V";
regulator-min-microvolt = <3300000>;
regulator-max-microvolt = <3300000>;
};
reg_5v0: regulator-5v0 {
compatible = "regulator-fixed";
regulator-name = "5V";
regulator-min-microvolt = <5000000>;
regulator-max-microvolt = <5000000>;
};
reg_usbh_vbus: regulator-usbh-vbus {
compatible = "regulator-fixed";
pinctrl-names = "default";
pinctrl-0 = <&pinctrl_usbh_reg>;
regulator-name = "VCC_USB[1-4]";
regulator-min-microvolt = <5000000>;
regulator-max-microvolt = <5000000>;
gpio = <&gpio1 2 GPIO_ACTIVE_LOW>;
vin-supply = <&reg_5v0>;
};
};
&adc1 {
status = "okay";
};
&gpio1 {
/*
* uart25_tx_on turns the UART transceiver on. If one wants to turn the
* transceiver off, that property has to be deleted and the gpio handled
* in userspace.
* The same applies to uart1_tx_on.
*/
uart25_tx_on {
gpio-hog;
gpios = <15 0>;
output-high;
};
};
&gpio2 {
uart1_tx_on {
gpio-hog;
gpios = <7 0>;
output-high;
};
};
&i2c1 {
status = "okay";
/* M41T0M6 real time clock on carrier board */
m41t0m6: rtc@68 {
compatible = "st,m41t0";
reg = <0x68>;
};
};
/* PWM <A> */
&pwm4 {
status = "okay";
};
/* PWM <B> */
&pwm5 {
status = "okay";
};
/* PWM <C> */
&pwm6 {
status = "okay";
};
/* PWM <D> */
&pwm7 {
status = "okay";
};
&uart1 {
status = "okay";
};
&uart2 {
status = "okay";
};
&uart5 {
status = "okay";
};
&usbotg1 {
vbus-supply = <&reg_usbh_vbus>;
status = "okay";
};
&usbotg2 {
vbus-supply = <&reg_usbh_vbus>;
status = "okay";
};
&usdhc1 {
vmmc-supply = <&reg_3v3>;
status = "okay";
};

145
arch/arm/boot/dts/imx6ull-colibri-nonwifi.dtsi
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@ -1,6 +1,6 @@
// SPDX-License-Identifier: (GPL-2.0 OR MIT)
// SPDX-License-Identifier: GPL-2.0-or-later OR MIT
/*
* Copyright 2018 Toradex AG
* Copyright 2018-2022 Toradex
*/
#include "imx6ull-colibri.dtsi"
@ -12,13 +12,150 @@
};
};
&gpio1 {
gpio-line-names = "SODIMM_8",
"SODIMM_6",
"SODIMM_129",
"SODIMM_89",
"SODIMM_19",
"SODIMM_21",
"UNUSABLE_SODIMM_180",
"UNUSABLE_SODIMM_184",
"SODIMM_4",
"SODIMM_2",
"SODIMM_106",
"SODIMM_71",
"SODIMM_23",
"SODIMM_31",
"SODIMM_99",
"SODIMM_102",
"SODIMM_33",
"SODIMM_35",
"SODIMM_25",
"SODIMM_27",
"SODIMM_36",
"SODIMM_38",
"SODIMM_32",
"SODIMM_34",
"SODIMM_135",
"SODIMM_77",
"SODIMM_100",
"SODIMM_186",
"SODIMM_196",
"SODIMM_194";
};
&gpio2 {
gpio-line-names = "SODIMM_55",
"SODIMM_63",
"SODIMM_178",
"SODIMM_188",
"SODIMM_73",
"SODIMM_30",
"SODIMM_67",
"SODIMM_104",
"",
"",
"",
"",
"",
"",
"",
"",
"SODIMM_190",
"SODIMM_47",
"SODIMM_192",
"SODIMM_49",
"SODIMM_51",
"SODIMM_53";
};
&gpio3 {
gpio-line-names = "SODIMM_56",
"SODIMM_44",
"SODIMM_68",
"SODIMM_82",
"",
"SODIMM_76",
"SODIMM_70",
"SODIMM_60",
"SODIMM_58",
"SODIMM_78",
"SODIMM_72",
"SODIMM_80",
"SODIMM_46",
"SODIMM_62",
"SODIMM_48",
"SODIMM_74",
"SODIMM_50",
"SODIMM_52",
"SODIMM_54",
"SODIMM_66",
"SODIMM_64",
"SODIMM_57",
"SODIMM_61",
"SODIMM_29",
"SODIMM_37",
"SODIMM_88",
"SODIMM_86",
"SODIMM_92",
"SODIMM_90";
};
&gpio4 {
gpio-line-names = "",
"",
"",
"",
"",
"",
"",
"",
"",
"",
"",
"SODIMM_59",
"",
"",
"SODIMM_133",
"",
"SODIMM_28",
"SODIMM_75",
"SODIMM_96",
"SODIMM_81",
"SODIMM_94",
"SODIMM_101",
"SODIMM_103",
"SODIMM_79",
"SODIMM_97",
"SODIMM_69",
"SODIMM_98",
"SODIMM_85",
"SODIMM_65";
};
&gpio5 {
gpio-line-names = "SODIMM_43",
"SODIMM_45",
"SODIMM_137",
"SODIMM_95",
"SODIMM_107",
"SODIMM_131",
"SODIMM_93",
"",
"SODIMM_138",
"",
"SODIMM_105",
"SODIMM_127";
};
&iomuxc {
pinctrl-names = "default";
pinctrl-0 = <&pinctrl_gpio1 &pinctrl_gpio2 &pinctrl_gpio3
&pinctrl_gpio4 &pinctrl_gpio5 &pinctrl_gpio6 &pinctrl_gpio7>;
&pinctrl_gpio4 &pinctrl_gpio6 &pinctrl_gpio7>;
};
&iomuxc_snvs {
pinctrl-names = "default";
pinctrl-0 = <&pinctrl_snvs_gpio1 &pinctrl_snvs_gpio2 &pinctrl_snvs_gpio3>;
pinctrl-0 = <&pinctrl_snvs_gpio1 &pinctrl_snvs_gpio3>;
};

20
arch/arm/boot/dts/imx6ull-colibri-wifi-aster.dts Normal file
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@ -0,0 +1,20 @@
// SPDX-License-Identifier: GPL-2.0-or-later OR MIT
/*
* Copyright 2017-2022 Toradex
*/
/dts-v1/;
#include "imx6ull-colibri-wifi.dtsi"
#include "imx6ull-colibri-aster.dtsi"
/ {
model = "Toradex Colibri iMX6ULL 512MB on Colibri Aster";
compatible = "toradex,colibri-imx6ull-wifi-aster",
"toradex,colibri-imx6ull",
"fsl,imx6ull";
};
&atmel_mxt_ts {
status = "okay";
};

4
arch/arm/boot/dts/imx6ull-colibri-wifi-eval-v3.dts
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@ -1,6 +1,6 @@
// SPDX-License-Identifier: (GPL-2.0 OR MIT)
// SPDX-License-Identifier: GPL-2.0-or-later OR MIT
/*
* Copyright 2018 Toradex AG
* Copyright 2018-2022 Toradex
*/
/dts-v1/;

65
arch/arm/boot/dts/imx6ull-colibri-wifi-iris-v2.dts Normal file
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@ -0,0 +1,65 @@
// SPDX-License-Identifier: GPL-2.0-or-later OR MIT
/*
* Copyright 2018-2022 Toradex
*/
/dts-v1/;
#include "imx6ull-colibri-wifi.dtsi"
#include "imx6ull-colibri-iris-v2.dtsi"
/ {
model = "Toradex Colibri iMX6ULL 512MB on Colibri Iris V2";
compatible = "toradex,colibri-imx6ull-wifi-iris-v2",
"toradex,colibri-imx6ull",
"fsl,imx6ull";
};
&atmel_mxt_ts {
status = "okay";
};
&gpio1 {
/* This turns the LVDS transceiver on */
lvds-power-on {
gpio-hog;
gpios = <14 GPIO_ACTIVE_HIGH>; /* SODIMM 99 */
line-name = "LVDS_POWER_ON";
output-high;
};
};
&gpio2 {
/*
* This switches the LVDS transceiver to the single-channel
* output mode.
*/
lvds-ch-mode {
gpio-hog;
gpios = <0 GPIO_ACTIVE_HIGH>; /* SODIMM 55 */
line-name = "LVDS_CH_MODE";
output-high;
};
/*
* This switches the LVDS transceiver to the 24-bit RGB mode.
*/
lvds-rgb-mode {
gpio-hog;
gpios = <1 GPIO_ACTIVE_HIGH>; /* SODIMM 63 */
line-name = "LVDS_RGB_MODE";
output-low;
};
};
&gpio5 {
/*
* This switches the LVDS transceiver to VESA color mapping mode.
*/
lvds-color-map {
gpio-hog;
gpios = <3 GPIO_ACTIVE_HIGH>; /* SODIMM 95 */
line-name = "LVDS_COLOR_MAP";
output-low;
};
};

20
arch/arm/boot/dts/imx6ull-colibri-wifi-iris.dts Normal file
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@ -0,0 +1,20 @@
// SPDX-License-Identifier: GPL-2.0-or-later OR MIT
/*
* Copyright 2018-2022 Toradex
*/
/dts-v1/;
#include "imx6ull-colibri-wifi.dtsi"
#include "imx6ull-colibri-iris.dtsi"
/ {
model = "Toradex Colibri iMX6ULL 512MB on Colibri Iris";
compatible = "toradex,colibri-imx6ull-wifi-iris",
"toradex,colibri-imx6ull",
"fsl,imx6ull";
};
&atmel_mxt_ts {
status = "okay";
};

144
arch/arm/boot/dts/imx6ull-colibri-wifi.dtsi
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@ -1,6 +1,6 @@
// SPDX-License-Identifier: (GPL-2.0 OR MIT)
// SPDX-License-Identifier: GPL-2.0-or-later OR MIT
/*
* Copyright 2018 Toradex AG
* Copyright 2018-2022 Toradex
*/
#include "imx6ull-colibri.dtsi"
@ -23,16 +23,152 @@
clock-frequency = <792000000>;
};
&gpio1 {
gpio-line-names = "SODIMM_8",
"SODIMM_6",
"SODIMM_129",
"",
"SODIMM_19",
"SODIMM_21",
"UNUSABLE_SODIMM_180",
"UNUSABLE_SODIMM_184",
"SODIMM_4",
"SODIMM_2",
"SODIMM_106",
"SODIMM_71",
"SODIMM_23",
"SODIMM_31",
"SODIMM_99",
"SODIMM_102",
"SODIMM_33",
"SODIMM_35",
"SODIMM_25",
"SODIMM_27",
"SODIMM_36",
"SODIMM_38",
"SODIMM_32",
"SODIMM_34",
"SODIMM_135",
"SODIMM_77",
"SODIMM_100",
"SODIMM_186",
"SODIMM_196",
"SODIMM_194";
};
&gpio2 {
gpio-line-names = "SODIMM_55",
"SODIMM_63",
"SODIMM_178",
"SODIMM_188",
"SODIMM_73",
"SODIMM_30",
"SODIMM_67",
"SODIMM_104",
"",
"",
"",
"",
"",
"",
"",
"",
"SODIMM_190",
"SODIMM_47",
"SODIMM_192",
"SODIMM_49",
"SODIMM_51",
"SODIMM_53";
};
&gpio3 {
gpio-line-names = "SODIMM_56",
"SODIMM_44",
"SODIMM_68",
"SODIMM_82",
"",
"SODIMM_76",
"SODIMM_70",
"SODIMM_60",
"SODIMM_58",
"SODIMM_78",
"SODIMM_72",
"SODIMM_80",
"SODIMM_46",
"SODIMM_62",
"SODIMM_48",
"SODIMM_74",
"SODIMM_50",
"SODIMM_52",
"SODIMM_54",
"SODIMM_66",
"SODIMM_64",
"SODIMM_57",
"SODIMM_61",
"SODIMM_29",
"SODIMM_37",
"SODIMM_88",
"SODIMM_86",
"SODIMM_92",
"SODIMM_90";
};
&gpio4 {
gpio-line-names = "",
"",
"",
"",
"",
"",
"",
"",
"",
"",
"",
"SODIMM_59",
"",
"",
"SODIMM_133",
"",
"SODIMM_28",
"SODIMM_75",
"SODIMM_96",
"",
"",
"",
"",
"",
"",
"SODIMM_69",
"SODIMM_98",
"SODIMM_85",
"SODIMM_65";
};
&gpio5 {
gpio-line-names = "SODIMM_43",
"SODIMM_45",
"SODIMM_137",
"SODIMM_95",
"SODIMM_107",
"SODIMM_131",
"",
"",
"",
"",
"SODIMM_105";
};
&iomuxc {
pinctrl-names = "default";
pinctrl-0 = <&pinctrl_gpio1 &pinctrl_gpio2 &pinctrl_gpio3
&pinctrl_gpio4 &pinctrl_gpio5 &pinctrl_gpio7>;
&pinctrl_gpio4 &pinctrl_gpio7>;
};
&iomuxc_snvs {
pinctrl-names = "default";
pinctrl-0 = <&pinctrl_snvs_gpio1 &pinctrl_snvs_gpio2>;
pinctrl-0 = <&pinctrl_snvs_gpio1>;
};
&usdhc2 {

285
arch/arm/boot/dts/imx6ull-colibri.dtsi
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@ -1,22 +1,54 @@
// SPDX-License-Identifier: GPL-2.0+ OR MIT
// SPDX-License-Identifier: GPL-2.0-or-later OR MIT
/*
* Copyright 2018-2021 Toradex
* Copyright 2018-2022 Toradex
*/
#include "imx6ull.dtsi"
/ {
/* Ethernet aliases to ensure correct MAC addresses */
aliases {
ethernet0 = &fec2;
ethernet1 = &fec1;
};
bl: backlight {
backlight: backlight {
compatible = "pwm-backlight";
brightness-levels = <0 4 8 16 32 64 128 255>;
default-brightness-level = <6>;
enable-gpios = <&gpio1 11 GPIO_ACTIVE_HIGH>;
pinctrl-names = "default";
pinctrl-0 = <&pinctrl_gpio_bl_on>;
enable-gpios = <&gpio1 11 GPIO_ACTIVE_HIGH>;
status = "disabled";
power-supply = <&reg_3v3>;
pwms = <&pwm4 0 5000000 1>;
status = "okay";
};
gpio-keys {
compatible = "gpio-keys";
pinctrl-names = "default";
pinctrl-0 = <&pinctrl_snvs_gpiokeys>;
wakeup {
debounce-interval = <10>;
gpios = <&gpio5 1 GPIO_ACTIVE_HIGH>; /* SODIMM 45 */
label = "Wake-Up";
linux,code = <KEY_WAKEUP>;
wakeup-source;
};
};
panel_dpi: panel-dpi {
compatible = "edt,et057090dhu";
backlight = <&backlight>;
power-supply = <&reg_3v3>;
status = "okay";
port {
lcd_panel_in: endpoint {
remote-endpoint = <&lcdif_out>;
};
};
};
reg_module_3v3: regulator-module-3v3 {
@ -35,7 +67,7 @@
regulator-max-microvolt = <3300000>;
};
reg_sd1_vmmc: regulator-sd1-vmmc {
reg_sd1_vqmmc: regulator-sd1-vqmmc {
compatible = "regulator-gpio";
gpio = <&gpio5 9 GPIO_ACTIVE_HIGH>;
pinctrl-names = "default";
@ -47,11 +79,25 @@
states = <1800000 0x1 3300000 0x0>;
vin-supply = <&reg_module_3v3>;
};
reg_eth_phy: regulator-eth-phy {
compatible = "regulator-fixed-clock";
regulator-boot-on;
regulator-min-microvolt = <3300000>;
regulator-max-microvolt = <3300000>;
regulator-name = "+V3.3_ETH";
regulator-type = "voltage";
vin-supply = <&reg_module_3v3>;
clocks = <&clks IMX6UL_CLK_ENET2_REF_125M>;
startup-delay-us = <150000>;
};
};
&adc1 {
num-channels = <10>;
vref-supply = <&reg_module_3v3_avdd>;
pinctrl-names = "default";
pinctrl-0 = <&pinctrl_adc1>;
};
&can1 {
@ -73,12 +119,14 @@
pinctrl-0 = <&pinctrl_ecspi1 &pinctrl_ecspi1_cs>;
};
/* Ethernet */
&fec2 {
pinctrl-names = "default", "sleep";
pinctrl-0 = <&pinctrl_enet2>;
pinctrl-1 = <&pinctrl_enet2_sleep>;
phy-mode = "rmii";
phy-handle = <&ethphy1>;
phy-supply = <&reg_eth_phy>;
status = "okay";
mdio {
@ -93,9 +141,11 @@
};
};
/* NAND */
&gpmi {
pinctrl-names = "default";
pinctrl-0 = <&pinctrl_gpmi_nand>;
fsl,use-minimum-ecc;
nand-on-flash-bbt;
nand-ecc-mode = "hw";
nand-ecc-strength = <8>;
@ -103,15 +153,35 @@
status = "okay";
};
/* I2C3_SDA/SCL on SODIMM 194/196 (e.g. RTC on carrier board) */
&i2c1 {
pinctrl-names = "default", "gpio";
pinctrl-0 = <&pinctrl_i2c1>;
pinctrl-1 = <&pinctrl_i2c1_gpio>;
sda-gpios = <&gpio1 29 (GPIO_ACTIVE_HIGH | GPIO_OPEN_DRAIN)>;
scl-gpios = <&gpio1 28 (GPIO_ACTIVE_HIGH | GPIO_OPEN_DRAIN)>;
status = "okay";
/* Atmel maxtouch controller */
atmel_mxt_ts: touchscreen@4a {
compatible = "atmel,maxtouch";
pinctrl-names = "default";
pinctrl-0 = <&pinctrl_atmel_conn>;
reg = <0x4a>;
interrupt-parent = <&gpio5>;
interrupts = <4 IRQ_TYPE_EDGE_FALLING>; /* SODIMM 107 / INT */
reset-gpios = <&gpio1 10 GPIO_ACTIVE_LOW>; /* SODIMM 106 / RST */
status = "disabled";
};
};
/*
* PWR_I2C: power I2C to audio codec, PMIC, temperature sensor and
* touch screen controller
*/
&i2c2 {
/* Use low frequency to compensate for the high pull-up values. */
clock-frequency = <40000>;
pinctrl-names = "default", "gpio";
pinctrl-0 = <&pinctrl_i2c2>;
pinctrl-1 = <&pinctrl_i2c2_gpio>;
@ -119,7 +189,7 @@
scl-gpios = <&gpio1 30 (GPIO_ACTIVE_HIGH | GPIO_OPEN_DRAIN)>;
status = "okay";
ad7879@2c {
ad7879_ts: touchscreen@2c {
compatible = "adi,ad7879-1";
pinctrl-names = "default";
pinctrl-0 = <&pinctrl_snvs_ad7879_int>;
@ -140,23 +210,33 @@
pinctrl-names = "default";
pinctrl-0 = <&pinctrl_lcdif_dat
&pinctrl_lcdif_ctrl>;
port {
lcdif_out: endpoint {
remote-endpoint = <&lcd_panel_in>;
};
};
};
/* PWM <A> */
&pwm4 {
pinctrl-names = "default";
pinctrl-0 = <&pinctrl_pwm4>;
};
/* PWM <B> */
&pwm5 {
pinctrl-names = "default";
pinctrl-0 = <&pinctrl_pwm5>;
};
/* PWM <C> */
&pwm6 {
pinctrl-names = "default";
pinctrl-0 = <&pinctrl_pwm6>;
};
/* PWM <D> */
&pwm7 {
pinctrl-names = "default";
pinctrl-0 = <&pinctrl_pwm7>;
@ -170,6 +250,7 @@
status = "disabled";
};
/* Colibri UART_A */
&uart1 {
pinctrl-names = "default";
pinctrl-0 = <&pinctrl_uart1 &pinctrl_uart1_ctrl1>;
@ -177,6 +258,7 @@
fsl,dte-mode;
};
/* Colibri UART_B */
&uart2 {
pinctrl-names = "default";
pinctrl-0 = <&pinctrl_uart2>;
@ -184,12 +266,14 @@
fsl,dte-mode;
};
/* Colibri UART_C */
&uart5 {
pinctrl-names = "default";
pinctrl-0 = <&pinctrl_uart5>;
fsl,dte-mode;
};
/* Colibri USBC */
&usbotg1 {
dr_mode = "otg";
srp-disable;
@ -197,14 +281,28 @@
adp-disable;
};
/* Colibri USBH */
&usbotg2 {
dr_mode = "host";
};
/* Colibri MMC/SD */
&usdhc1 {
pinctrl-names = "default", "state_100mhz", "state_200mhz", "sleep";
pinctrl-0 = <&pinctrl_usdhc1 &pinctrl_snvs_usdhc1_cd>;
pinctrl-1 = <&pinctrl_usdhc1_100mhz &pinctrl_snvs_usdhc1_cd>;
pinctrl-2 = <&pinctrl_usdhc1_200mhz &pinctrl_snvs_usdhc1_cd>;
pinctrl-3 = <&pinctrl_usdhc1 &pinctrl_snvs_usdhc1_cd_sleep>;
assigned-clocks = <&clks IMX6UL_CLK_USDHC1_SEL>, <&clks IMX6UL_CLK_USDHC1>;
assigned-clock-parents = <&clks IMX6UL_CLK_PLL2_PFD2>;
assigned-clock-rates = <0>, <198000000>;
bus-width = <4>;
cd-gpios = <&gpio5 0 GPIO_ACTIVE_LOW>; /* MMC_CD */
disable-wp;
keep-power-in-suspend;
no-1-8-v;
vqmmc-supply = <&reg_sd1_vqmmc>;
wakeup-source;
};
&wdog1 {
@ -214,13 +312,36 @@
};
&iomuxc {
pinctrl_can_int: canint-grp {
pinctrl_adc1: adc1grp {
fsl,pins = <
MX6UL_PAD_GPIO1_IO00__GPIO1_IO00 0x3000 /* SODIMM 8 */
MX6UL_PAD_GPIO1_IO01__GPIO1_IO01 0x3000 /* SODIMM 6 */
MX6UL_PAD_GPIO1_IO08__GPIO1_IO08 0x3000 /* SODIMM 4 */
MX6UL_PAD_GPIO1_IO09__GPIO1_IO09 0x3000 /* SODIMM 2 */
>;
};
pinctrl_atmel_adap: atmeladapgrp {
fsl,pins = <
MX6UL_PAD_NAND_DQS__GPIO4_IO16 0xb0a0 /* SODIMM 28 */
MX6UL_PAD_ENET1_TX_EN__GPIO2_IO05 0xb0a0 /* SODIMM 30 */
>;
};
pinctrl_atmel_conn: atmelconngrp {
fsl,pins = <
MX6UL_PAD_JTAG_MOD__GPIO1_IO10 0xb0a0 /* SODIMM 106 */
MX6ULL_PAD_SNVS_TAMPER4__GPIO5_IO04 0xb0a0 /* SODIMM 107 */
>;
};
pinctrl_can_int: canintgrp {
fsl,pins = <
MX6UL_PAD_ENET1_TX_DATA1__GPIO2_IO04 0x13010 /* SODIMM 73 */
>;
};
pinctrl_enet2: enet2-grp {
pinctrl_enet2: enet2grp {
fsl,pins = <
MX6UL_PAD_GPIO1_IO06__ENET2_MDIO 0x1b0b0
MX6UL_PAD_GPIO1_IO07__ENET2_MDC 0x1b0b0
@ -235,7 +356,7 @@
>;
};
pinctrl_enet2_sleep: enet2sleepgrp {
pinctrl_enet2_sleep: enet2-sleepgrp {
fsl,pins = <
MX6UL_PAD_GPIO1_IO06__GPIO1_IO06 0x0
MX6UL_PAD_GPIO1_IO07__GPIO1_IO07 0x0
@ -250,13 +371,13 @@
>;
};
pinctrl_ecspi1_cs: ecspi1-cs-grp {
pinctrl_ecspi1_cs: ecspi1csgrp {
fsl,pins = <
MX6UL_PAD_LCD_DATA21__GPIO3_IO26 0x70a0 /* SODIMM 86 */
>;
};
pinctrl_ecspi1: ecspi1-grp {
pinctrl_ecspi1: ecspi1grp {
fsl,pins = <
MX6UL_PAD_LCD_DATA20__ECSPI1_SCLK 0x000a0 /* SODIMM 88 */
MX6UL_PAD_LCD_DATA22__ECSPI1_MOSI 0x000a0 /* SODIMM 92 */
@ -264,27 +385,27 @@
>;
};
pinctrl_flexcan1: flexcan1-grp {
pinctrl_flexcan1: flexcan1grp {
fsl,pins = <
MX6UL_PAD_ENET1_RX_DATA0__FLEXCAN1_TX 0x1b020
MX6UL_PAD_ENET1_RX_DATA1__FLEXCAN1_RX 0x1b020
>;
};
pinctrl_flexcan2: flexcan2-grp {
pinctrl_flexcan2: flexcan2grp {
fsl,pins = <
MX6UL_PAD_ENET1_TX_DATA0__FLEXCAN2_RX 0x1b020
MX6UL_PAD_ENET1_RX_EN__FLEXCAN2_TX 0x1b020
>;
};
pinctrl_gpio_bl_on: gpio-bl-on-grp {
pinctrl_gpio_bl_on: gpioblongrp {
fsl,pins = <
MX6UL_PAD_JTAG_TMS__GPIO1_IO11 0x30a0 /* SODIMM 71 */
>;
};
pinctrl_gpio1: gpio1-grp {
pinctrl_gpio1: gpio1grp {
fsl,pins = <
MX6UL_PAD_UART3_RX_DATA__GPIO1_IO25 0x10b0 /* SODIMM 77 */
MX6UL_PAD_JTAG_TCK__GPIO1_IO14 0x70a0 /* SODIMM 99 */
@ -297,7 +418,7 @@
>;
};
pinctrl_gpio2: gpio2-grp { /* Camera */
pinctrl_gpio2: gpio2grp { /* Camera */
fsl,pins = <
MX6UL_PAD_CSI_DATA04__GPIO4_IO25 0x10b0 /* SODIMM 69 */
MX6UL_PAD_CSI_MCLK__GPIO4_IO17 0x10b0 /* SODIMM 75 */
@ -307,26 +428,20 @@
>;
};
pinctrl_gpio3: gpio3-grp { /* CAN2 */
pinctrl_gpio3: gpio3grp { /* CAN2 */
fsl,pins = <
MX6UL_PAD_ENET1_RX_EN__GPIO2_IO02 0x10b0 /* SODIMM 178 */
MX6UL_PAD_ENET1_TX_DATA0__GPIO2_IO03 0x10b0 /* SODIMM 188 */
>;
};
pinctrl_gpio4: gpio4-grp {
pinctrl_gpio4: gpio4grp {
fsl,pins = <
MX6UL_PAD_CSI_DATA07__GPIO4_IO28 0x10b0 /* SODIMM 65 */
>;
};
pinctrl_gpio5: gpio5-grp { /* ATMEL MXT TOUCH */
fsl,pins = <
MX6UL_PAD_JTAG_MOD__GPIO1_IO10 0xb0a0 /* SODIMM 106 */
>;
};
pinctrl_gpio6: gpio6-grp { /* Wifi pins */
pinctrl_gpio6: gpio6grp { /* Wifi pins */
fsl,pins = <
MX6UL_PAD_GPIO1_IO03__GPIO1_IO03 0x10b0 /* SODIMM 89 */
MX6UL_PAD_CSI_DATA02__GPIO4_IO23 0x10b0 /* SODIMM 79 */
@ -338,7 +453,7 @@
>;
};
pinctrl_gpio7: gpio7-grp { /* CAN1 */
pinctrl_gpio7: gpio7grp { /* CAN1 */
fsl,pins = <
MX6UL_PAD_ENET1_RX_DATA0__GPIO2_IO00 0xb0b0/* SODIMM 55 */
MX6UL_PAD_ENET1_RX_DATA1__GPIO2_IO01 0xb0b0 /* SODIMM 63 */
@ -347,9 +462,9 @@
/*
* With an eMMC instead of a raw NAND device the following pins
* are available at SODIMM pins
* are available at SODIMM pins.
*/
pinctrl_gpmi_gpio: gpmi-gpio-grp {
pinctrl_gpmi_gpio: gpmigpiogrp {
fsl,pins = <
MX6UL_PAD_NAND_ALE__GPIO4_IO10 0x10b0 /* SODIMM 140 */
MX6UL_PAD_NAND_CE0_B__GPIO4_IO13 0x10b0 /* SODIMM 144 */
@ -358,7 +473,7 @@
>;
};
pinctrl_gpmi_nand: gpmi-nand-grp {
pinctrl_gpmi_nand: gpminandgrp {
fsl,pins = <
MX6UL_PAD_NAND_DATA00__RAWNAND_DATA00 0x100a9
MX6UL_PAD_NAND_DATA01__RAWNAND_DATA01 0x100a9
@ -377,35 +492,35 @@
>;
};
pinctrl_i2c1: i2c1-grp {
pinctrl_i2c1: i2c1grp {
fsl,pins = <
MX6UL_PAD_UART4_TX_DATA__I2C1_SCL 0x4001b8b0 /* SODIMM 196 */
MX6UL_PAD_UART4_RX_DATA__I2C1_SDA 0x4001b8b0 /* SODIMM 194 */
>;
};
pinctrl_i2c1_gpio: i2c1-gpio-grp {
pinctrl_i2c1_gpio: i2c1-gpiogrp {
fsl,pins = <
MX6UL_PAD_UART4_TX_DATA__GPIO1_IO28 0x4001b8b0 /* SODIMM 196 */
MX6UL_PAD_UART4_RX_DATA__GPIO1_IO29 0x4001b8b0 /* SODIMM 194 */
>;
};
pinctrl_i2c2: i2c2-grp {
pinctrl_i2c2: i2c2grp {
fsl,pins = <
MX6UL_PAD_UART5_TX_DATA__I2C2_SCL 0x4001b8b0
MX6UL_PAD_UART5_RX_DATA__I2C2_SDA 0x4001b8b0
MX6UL_PAD_UART5_TX_DATA__I2C2_SCL 0x4001f8b0
MX6UL_PAD_UART5_RX_DATA__I2C2_SDA 0x4001f8b0
>;
};
pinctrl_i2c2_gpio: i2c2-gpio-grp {
pinctrl_i2c2_gpio: i2c2-gpiogrp {
fsl,pins = <
MX6UL_PAD_UART5_TX_DATA__GPIO1_IO30 0x4001b8b0
MX6UL_PAD_UART5_RX_DATA__GPIO1_IO31 0x4001b8b0
MX6UL_PAD_UART5_TX_DATA__GPIO1_IO30 0x4001f8b0
MX6UL_PAD_UART5_RX_DATA__GPIO1_IO31 0x4001f8b0
>;
};
pinctrl_lcdif_dat: lcdif-dat-grp {
pinctrl_lcdif_dat: lcdifdatgrp {
fsl,pins = <
MX6UL_PAD_LCD_DATA00__LCDIF_DATA00 0x00079 /* SODIMM 76 */
MX6UL_PAD_LCD_DATA01__LCDIF_DATA01 0x00079 /* SODIMM 70 */
@ -428,7 +543,7 @@
>;
};
pinctrl_lcdif_ctrl: lcdif-ctrl-grp {
pinctrl_lcdif_ctrl: lcdifctrlgrp {
fsl,pins = <
MX6UL_PAD_LCD_CLK__LCDIF_CLK 0x00079 /* SODIMM 56 */
MX6UL_PAD_LCD_ENABLE__LCDIF_ENABLE 0x00079 /* SODIMM 44 */
@ -437,31 +552,31 @@
>;
};
pinctrl_pwm4: pwm4-grp {
pinctrl_pwm4: pwm4grp {
fsl,pins = <
MX6UL_PAD_NAND_WP_B__PWM4_OUT 0x00079 /* SODIMM 59 */
>;
};
pinctrl_pwm5: pwm5-grp {
pinctrl_pwm5: pwm5grp {
fsl,pins = <
MX6UL_PAD_NAND_DQS__PWM5_OUT 0x00079 /* SODIMM 28 */
>;
};
pinctrl_pwm6: pwm6-grp {
pinctrl_pwm6: pwm6grp {
fsl,pins = <
MX6UL_PAD_ENET1_TX_EN__PWM6_OUT 0x00079 /* SODIMM 30 */
>;
};
pinctrl_pwm7: pwm7-grp {
pinctrl_pwm7: pwm7grp {
fsl,pins = <
MX6UL_PAD_ENET1_TX_CLK__PWM7_OUT 0x00079 /* SODIMM 67 */
>;
};
pinctrl_uart1: uart1-grp {
pinctrl_uart1: uart1grp {
fsl,pins = <
MX6UL_PAD_UART1_TX_DATA__UART1_DTE_RX 0x1b0b1 /* SODIMM 33 */
MX6UL_PAD_UART1_RX_DATA__UART1_DTE_TX 0x1b0b1 /* SODIMM 35 */
@ -470,16 +585,16 @@
>;
};
pinctrl_uart1_ctrl1: uart1-ctrl1-grp { /* Additional DTR, DCD */
pinctrl_uart1_ctrl1: uart1ctrl1grp { /* Additional DTR, DCD */
fsl,pins = <
MX6UL_PAD_JTAG_TDI__GPIO1_IO13 0x70a0 /* SODIMM 31 */
MX6UL_PAD_LCD_DATA18__GPIO3_IO23 0x10b0 /* SODIMM 29 */
MX6UL_PAD_JTAG_TDO__GPIO1_IO12 0x90b1 /* SODIMM 23 */
MX6UL_PAD_LCD_DATA19__GPIO3_IO24 0x10b0 /* SODIMM 37 */
MX6UL_PAD_JTAG_TDI__GPIO1_IO13 0x70a0 /* SODIMM 31 / DCD */
MX6UL_PAD_LCD_DATA18__GPIO3_IO23 0x10b0 /* SODIMM 29 / DSR */
MX6UL_PAD_JTAG_TDO__GPIO1_IO12 0x90b1 /* SODIMM 23 / DTR */
MX6UL_PAD_LCD_DATA19__GPIO3_IO24 0x10b0 /* SODIMM 37 / RI */
>;
};
pinctrl_uart2: uart2-grp {
pinctrl_uart2: uart2grp {
fsl,pins = <
MX6UL_PAD_UART2_TX_DATA__UART2_DTE_RX 0x1b0b1 /* SODIMM 36 */
MX6UL_PAD_UART2_RX_DATA__UART2_DTE_TX 0x1b0b1 /* SODIMM 38 */
@ -487,23 +602,23 @@
MX6UL_PAD_UART2_RTS_B__UART2_DTE_CTS 0x1b0b1 /* SODIMM 34 */
>;
};
pinctrl_uart5: uart5-grp {
pinctrl_uart5: uart5grp {
fsl,pins = <
MX6UL_PAD_GPIO1_IO04__UART5_DTE_RX 0x1b0b1 /* SODIMM 19 */
MX6UL_PAD_GPIO1_IO05__UART5_DTE_TX 0x1b0b1 /* SODIMM 21 */
>;
};
pinctrl_usbh_reg: gpio-usbh-reg {
pinctrl_usbh_reg: usbhreggrp {
fsl,pins = <
MX6UL_PAD_GPIO1_IO02__GPIO1_IO02 0x10b0 /* SODIMM 129 */
MX6UL_PAD_GPIO1_IO02__GPIO1_IO02 0x10b0 /* SODIMM 129 / USBH_PEN */
>;
};
pinctrl_usdhc1: usdhc1-grp {
pinctrl_usdhc1: usdhc1grp {
fsl,pins = <
MX6UL_PAD_SD1_CLK__USDHC1_CLK 0x17059 /* SODIMM 47 */
MX6UL_PAD_SD1_CMD__USDHC1_CMD 0x10059 /* SODIMM 190 */
MX6UL_PAD_SD1_CLK__USDHC1_CLK 0x10059 /* SODIMM 47 */
MX6UL_PAD_SD1_CMD__USDHC1_CMD 0x17059 /* SODIMM 190 */
MX6UL_PAD_SD1_DATA0__USDHC1_DATA0 0x17059 /* SODIMM 192 */
MX6UL_PAD_SD1_DATA1__USDHC1_DATA1 0x17059 /* SODIMM 49 */
MX6UL_PAD_SD1_DATA2__USDHC1_DATA2 0x17059 /* SODIMM 51 */
@ -511,10 +626,10 @@
>;
};
pinctrl_usdhc1_100mhz: usdhc1-100mhz-grp {
pinctrl_usdhc1_100mhz: usdhc1-100mhzgrp {
fsl,pins = <
MX6UL_PAD_SD1_CLK__USDHC1_CLK 0x170b9
MX6UL_PAD_SD1_CMD__USDHC1_CMD 0x100b9
MX6UL_PAD_SD1_CLK__USDHC1_CLK 0x100b9
MX6UL_PAD_SD1_CMD__USDHC1_CMD 0x170b9
MX6UL_PAD_SD1_DATA0__USDHC1_DATA0 0x170b9
MX6UL_PAD_SD1_DATA1__USDHC1_DATA1 0x170b9
MX6UL_PAD_SD1_DATA2__USDHC1_DATA2 0x170b9
@ -522,25 +637,25 @@
>;
};
pinctrl_usdhc1_200mhz: usdhc1-200mhz-grp {
pinctrl_usdhc1_200mhz: usdhc1-200mhzgrp {
fsl,pins = <
MX6UL_PAD_SD1_CLK__USDHC1_CLK 0x170f9
MX6UL_PAD_SD1_CMD__USDHC1_CMD 0x100f9
MX6UL_PAD_SD1_DATA0__USDHC1_DATA0 0x170b9
MX6UL_PAD_SD1_DATA1__USDHC1_DATA1 0x170b9
MX6UL_PAD_SD1_DATA2__USDHC1_DATA2 0x170b9
MX6UL_PAD_SD1_DATA3__USDHC1_DATA3 0x170b9
MX6UL_PAD_SD1_CLK__USDHC1_CLK 0x100f9
MX6UL_PAD_SD1_CMD__USDHC1_CMD 0x170f9
MX6UL_PAD_SD1_DATA0__USDHC1_DATA0 0x170f9
MX6UL_PAD_SD1_DATA1__USDHC1_DATA1 0x170f9
MX6UL_PAD_SD1_DATA2__USDHC1_DATA2 0x170f9
MX6UL_PAD_SD1_DATA3__USDHC1_DATA3 0x170f9
>;
};
pinctrl_usdhc2: usdhc2-grp {
pinctrl_usdhc2: usdhc2grp {
fsl,pins = <
MX6UL_PAD_CSI_DATA00__USDHC2_DATA0 0x17069
MX6UL_PAD_CSI_DATA01__USDHC2_DATA1 0x17069
MX6UL_PAD_CSI_DATA02__USDHC2_DATA2 0x17069
MX6UL_PAD_CSI_DATA03__USDHC2_DATA3 0x17069
MX6UL_PAD_CSI_HSYNC__USDHC2_CMD 0x17069
MX6UL_PAD_CSI_VSYNC__USDHC2_CLK 0x17069
MX6UL_PAD_CSI_VSYNC__USDHC2_CLK 0x10069
MX6UL_PAD_GPIO1_IO03__OSC32K_32K_OUT 0x10
>;
@ -561,7 +676,7 @@
>;
};
pinctrl_wdog: wdog-grp {
pinctrl_wdog: wdoggrp {
fsl,pins = <
MX6UL_PAD_LCD_RESET__WDOG1_WDOG_ANY 0x30b0
>;
@ -569,65 +684,59 @@
};
&iomuxc_snvs {
pinctrl_snvs_gpio1: snvs-gpio1-grp {
pinctrl_snvs_gpio1: snvsgpio1grp {
fsl,pins = <
MX6ULL_PAD_SNVS_TAMPER6__GPIO5_IO06 0x110a0 /* SODIMM 93 */
MX6ULL_PAD_SNVS_TAMPER3__GPIO5_IO03 0x110a0 /* SODIMM 95 */
MX6ULL_PAD_BOOT_MODE0__GPIO5_IO10 0x1b0a0 /* SODIMM 105 */
MX6ULL_PAD_SNVS_TAMPER5__GPIO5_IO05 0x0b0a0 /* SODIMM 131 */
MX6ULL_PAD_SNVS_TAMPER5__GPIO5_IO05 0x0b0a0 /* SODIMM 131 / USBH_OC */
MX6ULL_PAD_SNVS_TAMPER8__GPIO5_IO08 0x110a0 /* SODIMM 138 */
>;
};
pinctrl_snvs_gpio2: snvs-gpio2-grp { /* ATMEL MXT TOUCH */
fsl,pins = <
MX6ULL_PAD_SNVS_TAMPER4__GPIO5_IO04 0xb0a0 /* SODIMM 107 */
>;
};
pinctrl_snvs_gpio3: snvs-gpio3-grp { /* Wifi pins */
pinctrl_snvs_gpio3: snvsgpio3grp { /* Wifi pins */
fsl,pins = <
MX6ULL_PAD_BOOT_MODE1__GPIO5_IO11 0x130a0 /* SODIMM 127 */
>;
};
pinctrl_snvs_ad7879_int: snvs-ad7879-int-grp { /* TOUCH Interrupt */
pinctrl_snvs_ad7879_int: snvsad7879intgrp { /* TOUCH Interrupt */
fsl,pins = <
MX6ULL_PAD_SNVS_TAMPER7__GPIO5_IO07 0x100b0
>;
};
pinctrl_snvs_reg_sd: snvs-reg-sd-grp {
pinctrl_snvs_reg_sd: snvsregsdgrp {
fsl,pins = <
MX6ULL_PAD_SNVS_TAMPER9__GPIO5_IO09 0x400100b0
>;
};
pinctrl_snvs_usbc_det: snvs-usbc-det-grp {
pinctrl_snvs_usbc_det: snvsusbcdetgrp {
fsl,pins = <
MX6ULL_PAD_SNVS_TAMPER2__GPIO5_IO02 0x130b0
>;
};
pinctrl_snvs_gpiokeys: snvs-gpiokeys-grp {
pinctrl_snvs_gpiokeys: snvsgpiokeysgrp {
fsl,pins = <
MX6ULL_PAD_SNVS_TAMPER1__GPIO5_IO01 0x130a0 /* SODIMM 45 */
MX6ULL_PAD_SNVS_TAMPER1__GPIO5_IO01 0x130a0 /* SODIMM 45 / WAKE_UP */
>;
};
pinctrl_snvs_usdhc1_cd: snvs-usdhc1-cd-grp {
pinctrl_snvs_usdhc1_cd: snvsusdhc1cdgrp {
fsl,pins = <
MX6ULL_PAD_SNVS_TAMPER0__GPIO5_IO00 0x1b0a0 /* SODIMM 43 */
MX6ULL_PAD_SNVS_TAMPER0__GPIO5_IO00 0x1b0a0 /* SODIMM 43 / MMC_CD */
>;
};
pinctrl_snvs_usdhc1_sleep_cd: snvs-usdhc1-cd-grp-slp {
pinctrl_snvs_usdhc1_cd_sleep: snvsusdhc1cd-sleepgrp {
fsl,pins = <
MX6ULL_PAD_SNVS_TAMPER0__GPIO5_IO00 0x0
>;
};
pinctrl_snvs_wifi_pdn: snvs-wifi-pdn-grp {
pinctrl_snvs_wifi_pdn: snvswifipdngrp {
fsl,pins = <
MX6ULL_PAD_BOOT_MODE1__GPIO5_IO11 0x130a0
>;

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arch/arm/boot/dts/imx6ull-kontron-n6411-som.dtsi
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@ -18,7 +18,7 @@
};
&qspi {
spi-flash@0 {
flash@0 {
#address-cells = <1>;
#size-cells = <1>;
compatible = "spi-nand";

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// SPDX-License-Identifier: (GPL-2.0+ OR MIT)
/*
* Copyright (C) 2021 PHYTEC Messtechnik GmbH
* Author: Alexander Bauer <a.bauer@phytec.de>
*/
/dts-v1/;
#include "imx6ull-phytec-tauri.dtsi"
/ {
model = "PHYTEC phyGate-Tauri i.MX6 UltraLite";
compatible = "phytec,imx6ull-phygate-tauri",
"phytec,imx6ull-phygate-tauri-emmc",
"phytec,imx6ull-pcl063", "fsl,imx6ull";
};
/* EMMC-Version */
&usdhc2 {
status = "okay";
};

20
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// SPDX-License-Identifier: (GPL-2.0+ OR MIT)
/*
* Copyright (C) 2021 PHYTEC Messtechnik GmbH
* Author: Alexander Bauer <a.bauer@phytec.de>
*/
/dts-v1/;
#include "imx6ull-phytec-tauri.dtsi"
/ {
model = "PHYTEC phyGate-Tauri i.MX6 UltraLite";
compatible = "phytec,imx6ull-phygate-tauri",
"phytec,imx6ull-phygate-tauri-nand",
"phytec,imx6ull-pcl063", "fsl,imx6ull";
};
/* NAND-Version */
&gpmi {
status = "okay";
};

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// SPDX-License-Identifier: (GPL-2.0+ OR MIT)
/*
* Copyright (C) 2021 PHYTEC Messtechnik GmbH
* Author: Alexander Bauer <a.bauer@phytec.de>
*/
/dts-v1/;
#include "imx6ull.dtsi"
#include "imx6ull-phytec-phycore-som.dtsi"
/ {
model = "PHYTEC phyGate-Tauri i.MX6 UltraLite";
compatible = "phytec,imx6ull-phygate-tauri",
"phytec,imx6ull-pcl063", "fsl,imx6ull";
aliases {
rtc0 = &i2c_rtc;
rtc1 = &snvs_rtc;
};
gpio_keys: gpio-keys {
compatible = "gpio-key";
pinctrl-names = "default";
pinctrl-0 = <&pinctrl_gpio_keys>;
key {
label = "KEY-A";
gpios = <&gpio1 18 GPIO_ACTIVE_LOW>;
linux,code = <KEY_A>;
wakeup-source;
};
};
reg_adc1_vref_3v3: regulator-vref-3v3 {
compatible = "regulator-fixed";
regulator-name = "vref-3v3";
regulator-min-microvolt = <3300000>;
regulator-max-microvolt = <3300000>;
};
reg_s25fl064_hold: regulator-s25fl064-hold {
pinctrl-names = "default";
pinctrl-0 = <&pinctrl_s25fl064_hold>;
compatible = "regulator-fixed";
regulator-name = "s25fl064_hold";
regulator-min-microvolt = <3300000>;
regulator-max-microvolt = <3300000>;
gpio = <&gpio3 17 GPIO_ACTIVE_HIGH>;
enable-active-high;
regulator-always-on;
};
reg_usb_hub_vbus: regulator-hub-otg1-vbus {
pinctrl-names = "default";
pinctrl-0 = <&pinctrl_usbhubpwr>;
compatible = "regulator-fixed";
regulator-name = "usb_hub_vbus";
regulator-min-microvolt = <3300000>;
regulator-max-microvolt = <3300000>;
gpio = <&gpio5 5 GPIO_ACTIVE_HIGH>;
enable-active-high;
regulator-always-on;
};
reg_usb_otg1_vbus: regulator-usb-otg1-vbus {
pinctrl-names = "default";
pinctrl-0 = <&pinctrl_usbotg1pwr>;
compatible = "regulator-fixed";
regulator-name = "usb_otg1_vbus";
regulator-min-microvolt = <3300000>;
regulator-max-microvolt = <3300000>;
gpio = <&gpio4 28 GPIO_ACTIVE_HIGH>;
enable-active-high;
regulator-always-on;
};
user_leds: user-leds {
compatible = "gpio-leds";
pinctrl-names = "default";
pinctrl-0 = <&pinctrl_user_leds>,
<&pinctrl_user_leds_snvs>;
user-led1 {
label = "yellow";
gpios = <&gpio1 3 GPIO_ACTIVE_HIGH>;
linux,default-trigger = "off";
};
user-led2 {
label = "red";
gpios = <&gpio5 9 GPIO_ACTIVE_HIGH>;
linux,default-trigger = "off";
};
};
};
&can1 {
pinctrl-names = "default";
pinctrl-0 = <&pinctrl_flexcan1>;
status = "okay";
};
&can2 {
pinctrl-names = "default";
pinctrl-0 = <&pinctrl_flexcan2>;
status = "okay";
};
&ecspi1 {
#address-cells = <1>;
#size-cells = <0>;
pinctrl-names = "default";
pinctrl-0 = <&pinctrl_ecspi1>,
<&pinctrl_ecspi1_cs>;
cs-gpios = <&gpio3 26 GPIO_ACTIVE_LOW>,
<&gpio3 10 GPIO_ACTIVE_LOW>,
<&gpio3 11 GPIO_ACTIVE_LOW>;
status = "okay";
tpm_tis: tpm@1 {
pinctrl-names = "default";
pinctrl-0 = <&pinctrl_tpm>;
compatible = "tcg,tpm_tis-spi";
reg = <1>;
spi-max-frequency = <20000000>;
interrupt-parent = <&gpio5>;
interrupts = <2 IRQ_TYPE_LEVEL_LOW>;
};
s25fl064: flash@2 {
#address-cells = <1>;
#size-cells = <1>;
compatible = " jedec,spi-nor";
reg = <2>;
spi-max-frequency = <40000000>;
m25p,fast-read;
status = "disabled";
};
};
&ecspi3 {
pinctrl-names = "default";
pinctrl-0 = <&pinctrl_ecspi3>;
cs-gpios = <&gpio1 20 GPIO_ACTIVE_LOW>;
dmas = <&sdma 7 8 0>,
<&sdma 8 8 0>;
dma-names = "rx", "tx";
status = "okay";
};
&ethphy1 {
status = "okay";
};
&fec1 {
status = "okay";
};
&fec2 {
pinctrl-names = "default";
pinctrl-0 = <&pinctrl_enet2>;
phy-mode = "rmii";
phy-handle = <&ethphy2>;
status = "okay";
};
&i2c1 {
status = "okay";
tmp102: tmp@49 {
compatible = "ti,tmp102";
reg = <0x49>;
pinctrl-names = "default";
pinctrl-0 = <&pinctrl_tempsense>;
interrupt-parent = <&gpio5>;
interrupts = <0 IRQ_TYPE_LEVEL_LOW>;
#thermal-sensor-cells = <1>;
};
i2c_rtc: rtc@68 {
pinctrl-names = "default";
pinctrl-0 = <&pinctrl_rtc_int>;
compatible = "microcrystal,rv4162";
reg = <0x68>;
interrupt-parent = <&gpio5>;
interrupts = <1 IRQ_TYPE_LEVEL_LOW>;
};
};
&i2c2 {
pinctrl-names = "default", "gpio";
pinctrl-0 = <&pinctrl_i2c2>;
pinctrl-1 = <&pinctrl_i2c2_gpio>;
sda-gpios = <&gpio1 1 (GPIO_ACTIVE_HIGH | GPIO_OPEN_DRAIN)>;
scl-gpios = <&gpio1 0 (GPIO_ACTIVE_HIGH | GPIO_OPEN_DRAIN)>;
status = "okay";
};
&i2c3 {
pinctrl-names = "default", "gpio";
pinctrl-0 = <&pinctrl_i2c3>;
pinctrl-1 = <&pinctrl_i2c3_gpio>;
sda-gpios = <&gpio3 5 (GPIO_ACTIVE_HIGH | GPIO_OPEN_DRAIN)>;
scl-gpios = <&gpio3 6 (GPIO_ACTIVE_HIGH | GPIO_OPEN_DRAIN)>;
status = "okay";
};
&i2c4 {
pinctrl-names = "default", "gpio";
pinctrl-0 = <&pinctrl_i2c4>;
pinctrl-1 = <&pinctrl_i2c4_gpio>;
sda-gpios = <&gpio3 7 (GPIO_ACTIVE_HIGH | GPIO_OPEN_DRAIN)>;
scl-gpios = <&gpio3 8 (GPIO_ACTIVE_HIGH | GPIO_OPEN_DRAIN)>;
status = "okay";
};
&mdio {
ethphy2: ethernet-phy@2 {
reg = <2>;
micrel,led-mode = <1>;
clocks = <&clks IMX6UL_CLK_ENET2_REF>;
clock-names = "rmii-ref";
status = "okay";
};
};
&pwm3 {
pinctrl-names = "default";
pinctrl-0 = <&pinctrl_pwm3>;
status = "okay";
};
&pwm6 {
pinctrl-names = "default";
pinctrl-0 = <&pinctrl_pwm6>;
status = "okay";
};
&pwm7 {
pinctrl-names = "default";
pinctrl-0 = <&pinctrl_pwm7>;
status = "okay";
};
&pwm8 {
pinctrl-names = "default";
pinctrl-0 = <&pinctrl_pwm8>;
status = "okay";
};
&uart3 {
pinctrl-names = "default";
pinctrl-0 = <&pinctrl_uart3>;
status = "okay";
};
/* UART4 * RS485 */
&uart4 {
pinctrl-names = "default";
pinctrl-0 = <&pinctrl_uart4>;
rts-gpios = <&gpio3 2 GPIO_ACTIVE_HIGH>;
rs485-rts-active-high;
linux,rs485-enabled-at-boot-time;
status = "okay";
};
/* UART5 * RS232 */
&uart5 {
pinctrl-names = "default";
pinctrl-0 = <&pinctrl_uart5>;
uart-has-rtscts;
status = "okay";
};
&uart7 {
pinctrl-names = "default";
pinctrl-0 = <&pinctrl_uart7>;
status = "okay";
};
/* USB */
&usbotg1 {
pinctrl-names = "default";
pinctrl-0 = <&pinctrl_usb_otg1>;
vbus-supply = <&reg_usb_otg1_vbus>;
dr_mode = "host";
disable-over-current;
status = "okay";
};
&usbotg2 {
vbus-supply = <&reg_usb_hub_vbus>;
disable-over-current;
dr_mode = "host";
status = "okay";
};
&usdhc1 {
pinctrl-names = "default", "state_100mhz", "state_200mhz";
pinctrl-0 = <&pinctrl_usdhc1>;
pinctrl-1 = <&pinctrl_usdhc1_100mhz>;
pinctrl-2 = <&pinctrl_usdhc1_200mhz>;
cd-gpios = <&gpio1 19 GPIO_ACTIVE_LOW>;
no-1-8-v;
keep-power-in-suspend;
wakeup-source;
status = "okay";
};
&usdhc2 {
status = "disabled";
};
&iomuxc_snvs {
pinctrl_rtc_int: rtcintgrp {
fsl,pins = <
MX6ULL_PAD_SNVS_TAMPER1__GPIO5_IO01 0x17059
>;
};
pinctrl_stmpe: stmpegrp {
fsl,pins = <
MX6ULL_PAD_SNVS_TAMPER3__GPIO5_IO03 0x17059
>;
};
pinctrl_tempsense: tempsensegrp {
fsl,pins = <
MX6ULL_PAD_SNVS_TAMPER0__GPIO5_IO00 0x17059
>;
};
pinctrl_tpm: tpmgrp {
fsl,pins = <
MX6ULL_PAD_SNVS_TAMPER2__GPIO5_IO02 0x17059
>;
};
pinctrl_usbhubpwr: usbhubpwrgrp {
fsl,pins = <
MX6ULL_PAD_SNVS_TAMPER5__GPIO5_IO05 0x17059
>;
};
pinctrl_user_leds_snvs: user_ledsgrp {
fsl,pins = <
MX6ULL_PAD_SNVS_TAMPER9__GPIO5_IO09 0x79
>;
};
};
&iomuxc {
pinctrl_gpio: gpiogrp {
fsl,pins = <
MX6UL_PAD_CSI_DATA05__GPIO4_IO26 0x17059 /* nUART_MUX_RS232 */
MX6UL_PAD_CSI_DATA04__GPIO4_IO25 0x17059 /* nUART_MUX_DUAL_RX_TX */
>;
};
pinctrl_gpio_keys: gpiokeysgrp {
fsl,pins = <
MX6UL_PAD_UART1_CTS_B__GPIO1_IO18 0x79
>;
};
pinctrl_ecspi3: ecspi3grp {
fsl,pins = <
MX6UL_PAD_UART2_RX_DATA__ECSPI3_SCLK 0x100b1
MX6UL_PAD_UART2_RTS_B__ECSPI3_MISO 0x100b1
MX6UL_PAD_UART2_CTS_B__ECSPI3_MOSI 0x100b1
MX6UL_PAD_UART2_TX_DATA__GPIO1_IO20 0x10b0
>;
};
pinctrl_ecspi1: ecspi1grp {
fsl,pins = <
MX6UL_PAD_LCD_DATA20__ECSPI1_SCLK 0x100b1
MX6UL_PAD_LCD_DATA23__ECSPI1_MISO 0x100b1
MX6UL_PAD_LCD_DATA22__ECSPI1_MOSI 0x100b1
>;
};
pinctrl_ecspi1_cs: ecspi1csgrp {
fsl,pins = <
MX6UL_PAD_LCD_DATA21__GPIO3_IO26 0x10b0
MX6UL_PAD_LCD_DATA05__GPIO3_IO10 0x10b0
MX6UL_PAD_LCD_DATA06__GPIO3_IO11 0x10b0
>;
};
pinctrl_enet2: enet2grp {
fsl,pins = <
MX6UL_PAD_ENET2_RX_EN__ENET2_RX_EN 0x1b0b0
MX6UL_PAD_ENET2_RX_ER__ENET2_RX_ER 0x1b0b0
MX6UL_PAD_ENET2_RX_DATA0__ENET2_RDATA00 0x1b0b0
MX6UL_PAD_ENET2_RX_DATA1__ENET2_RDATA01 0x1b0b0
MX6UL_PAD_ENET2_TX_EN__ENET2_TX_EN 0x1b010
MX6UL_PAD_ENET2_TX_DATA0__ENET2_TDATA00 0x1b010
MX6UL_PAD_ENET2_TX_DATA1__ENET2_TDATA01 0x1b010
MX6UL_PAD_ENET2_TX_CLK__ENET2_REF_CLK2 0x4001b010
>;
};
pinctrl_flexcan1: flexcan1grp {
fsl,pins = <
MX6UL_PAD_UART3_CTS_B__FLEXCAN1_TX 0x0b0b0
MX6UL_PAD_UART3_RTS_B__FLEXCAN1_RX 0x0b0b0
>;
};
pinctrl_flexcan2: flexcan2grp {
fsl,pins = <
MX6UL_PAD_LCD_DATA10__FLEXCAN2_TX 0x0b0b0
MX6UL_PAD_LCD_DATA11__FLEXCAN2_RX 0x0b0b0
>;
};
princtrl_flexcan2_en: flexcan2engrp {
fsl,pins = <
MX6UL_PAD_UART1_CTS_B__GPIO1_IO18 0x17059
>;
};
pinctrl_i2c2: i2c2grp {
fsl,pins = <
MX6UL_PAD_GPIO1_IO00__I2C2_SCL 0xb0
MX6UL_PAD_GPIO1_IO01__I2C2_SDA 0xb0
>;
};
pinctrl_i2c2_gpio: i2c2gpiogrp {
fsl,pins = <
MX6UL_PAD_GPIO1_IO00__GPIO1_IO00 0xb0
MX6UL_PAD_GPIO1_IO01__GPIO1_IO01 0xb0
>;
};
pinctrl_i2c3: i2c3grp {
fsl,pins = <
MX6UL_PAD_LCD_DATA01__I2C3_SCL 0xb0
MX6UL_PAD_LCD_DATA00__I2C3_SDA 0xb0
>;
};
pinctrl_i2c3_gpio: i2c3gpiogrp {
fsl,pins = <
MX6UL_PAD_LCD_DATA01__GPIO3_IO06 0xb0
MX6UL_PAD_LCD_DATA00__GPIO3_IO05 0xb0
>;
};
pinctrl_i2c4: i2c4grp {
fsl,pins = <
MX6UL_PAD_LCD_DATA03__I2C4_SCL 0xb0
MX6UL_PAD_LCD_DATA02__I2C4_SDA 0xb0
>;
};
pinctrl_i2c4_gpio: i2c4gpiogrp {
fsl,pins = <
MX6UL_PAD_LCD_DATA03__GPIO3_IO08 0xb0
MX6UL_PAD_LCD_DATA02__GPIO3_IO07 0xb0
>;
};
pinctrl_pwm3: pwm3grp {
fsl,pins = <
MX6UL_PAD_GPIO1_IO04__PWM3_OUT 0x0b0b0
>;
};
pinctrl_pwm6: pwm6grp {
fsl,pins = <
MX6UL_PAD_JTAG_TDI__PWM6_OUT 0x0b0b0
>;
};
pinctrl_pwm7: pwm7grp {
fsl,pins = <
MX6UL_PAD_JTAG_TCK__PWM7_OUT 0x0b0b0
>;
};
pinctrl_pwm8: pwm8grp {
fsl,pins = <
MX6UL_PAD_JTAG_TRST_B__PWM8_OUT 0x0b0b0
>;
};
pinctrl_s25fl064_hold: s25fl064holdgrp {
fsl,pins = <
MX6UL_PAD_LCD_DATA12__GPIO3_IO17 0x100b1
>;
};
pinctrl_sai2: sai2grp {
fsl,pins = <
MX6UL_PAD_JTAG_TDI__SAI2_TX_BCLK 0x17088
MX6UL_PAD_JTAG_TDO__SAI2_TX_SYNC 0x17088
MX6UL_PAD_JTAG_TRST_B__SAI2_TX_DATA 0x11088
MX6UL_PAD_JTAG_TCK__SAI2_RX_DATA 0x11088
MX6UL_PAD_JTAG_TMS__SAI2_MCLK 0x17088
>;
};
pinctrl_uart3: uart3grp {
fsl,pins = <
MX6UL_PAD_UART3_TX_DATA__UART3_DCE_TX 0x1b0b1
MX6UL_PAD_UART3_RX_DATA__UART3_DCE_RX 0x1b0b1
>;
};
pinctrl_uart4: uart4grp {
fsl,pins = <
MX6UL_PAD_LCD_CLK__UART4_DCE_TX 0x1b0b1
MX6UL_PAD_LCD_ENABLE__UART4_DCE_RX 0x1b0b1
MX6UL_PAD_LCD_HSYNC__GPIO3_IO02 0x1b0b1
>;
};
pinctrl_uart5: uart5grp {
fsl,pins = <
MX6UL_PAD_UART5_TX_DATA__UART5_DCE_TX 0x1b0b1
MX6UL_PAD_UART5_RX_DATA__UART5_DCE_RX 0x1b0b1
>;
};
pinctrl_uart7: uart7grp {
fsl,pins = <
MX6UL_PAD_LCD_DATA16__UART7_DCE_TX 0x1b0b1
MX6UL_PAD_LCD_DATA17__UART7_DCE_RX 0x1b0b1
>;
};
pinctrl_usb_otg1: usbotg1grp {
fsl,pins = <
MX6UL_PAD_CSI_DATA06__GPIO4_IO27 0x80
>;
};
pinctrl_usbotg1pwr: usbotg1pwrgrp {
fsl,pins = <
MX6UL_PAD_CSI_DATA07__GPIO4_IO28 0x17059
>;
};
pinctrl_usdhc1: usdhc1grp {
fsl,pins = <
MX6UL_PAD_SD1_CMD__USDHC1_CMD 0x17059
MX6UL_PAD_SD1_CLK__USDHC1_CLK 0x10059
MX6UL_PAD_SD1_DATA0__USDHC1_DATA0 0x17059
MX6UL_PAD_SD1_DATA1__USDHC1_DATA1 0x17059
MX6UL_PAD_SD1_DATA2__USDHC1_DATA2 0x17059
MX6UL_PAD_SD1_DATA3__USDHC1_DATA3 0x17059
MX6UL_PAD_UART1_RTS_B__GPIO1_IO19 0x17059
>;
};
pinctrl_usdhc1_100mhz: usdhc1100mhzgrp {
fsl,pins = <
MX6UL_PAD_SD1_CMD__USDHC1_CMD 0x170b9
MX6UL_PAD_SD1_CLK__USDHC1_CLK 0x100b9
MX6UL_PAD_SD1_DATA0__USDHC1_DATA0 0x170b9
MX6UL_PAD_SD1_DATA1__USDHC1_DATA1 0x170b9
MX6UL_PAD_SD1_DATA2__USDHC1_DATA2 0x170b9
MX6UL_PAD_SD1_DATA3__USDHC1_DATA3 0x170b9
>;
};
pinctrl_usdhc1_200mhz: usdhc1200mhzgrp {
fsl,pins = <
MX6UL_PAD_SD1_CMD__USDHC1_CMD 0x170f9
MX6UL_PAD_SD1_CLK__USDHC1_CLK 0x100f9
MX6UL_PAD_SD1_DATA0__USDHC1_DATA0 0x170f9
MX6UL_PAD_SD1_DATA1__USDHC1_DATA1 0x170f9
MX6UL_PAD_SD1_DATA2__USDHC1_DATA2 0x170f9
MX6UL_PAD_SD1_DATA3__USDHC1_DATA3 0x170f9
>;
};
pinctrl_user_leds: userledsgrp {
fsl,pins = <
MX6UL_PAD_GPIO1_IO03__GPIO1_IO03 0x79
>;
};
};

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// SPDX-License-Identifier: (GPL-2.0-or-later OR MIT)
/*
* Copyright 2018-2022 TQ-Systems GmbH
* Author: Markus Niebel <Markus.Niebel@tq-group.com>
*/
/dts-v1/;
#include "imx6ull-tqma6ull2.dtsi"
#include "mba6ulx.dtsi"
/ {
model = "TQ-Systems TQMa6ULL2 SoM on MBa6ULx board";
compatible = "tq,imx6ull-tqma6ull2-mba6ulx", "tq,imx6ull-tqma6ull2", "fsl,imx6ull";
};

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// SPDX-License-Identifier: (GPL-2.0-or-later OR MIT)
/*
* Copyright 2018-2022 TQ-Systems GmbH
* Author: Markus Niebel <Markus.Niebel@tq-group.com>
*/
#include "imx6ull.dtsi"
#include "imx6ul-tqma6ul-common.dtsi"
#include "imx6ul-tqma6ulx-common.dtsi"
/ {
model = "TQ-Systems TQMa6ULL2 SoM";
compatible = "tq,imx6ull-tqma6ull2", "fsl,imx6ull";
};
&usdhc2 {
fsl,tuning-step= <6>;
/* Errata ERR010450 Workaround */
max-frequency = <99000000>;
assigned-clocks = <&clks IMX6UL_CLK_USDHC2_SEL>, <&clks IMX6UL_CLK_USDHC2>;
assigned-clock-parents = <&clks IMX6UL_CLK_PLL2_PFD2>;
assigned-clock-rates = <0>, <198000000>;
};
&iomuxc {
pinctrl_usdhc2: usdhc2grp {
fsl,pins = <
MX6UL_PAD_NAND_RE_B__USDHC2_CLK 0x00017031
MX6UL_PAD_NAND_WE_B__USDHC2_CMD 0x00017039
MX6UL_PAD_NAND_DATA00__USDHC2_DATA0 0x00017039
MX6UL_PAD_NAND_DATA01__USDHC2_DATA1 0x00017039
MX6UL_PAD_NAND_DATA02__USDHC2_DATA2 0x00017039
MX6UL_PAD_NAND_DATA03__USDHC2_DATA3 0x00017039
MX6UL_PAD_NAND_DATA04__USDHC2_DATA4 0x00017039
MX6UL_PAD_NAND_DATA05__USDHC2_DATA5 0x00017039
MX6UL_PAD_NAND_DATA06__USDHC2_DATA6 0x00017039
MX6UL_PAD_NAND_DATA07__USDHC2_DATA7 0x00017039
/* rst */
MX6UL_PAD_NAND_ALE__GPIO4_IO10 0x0001b051
>;
};
pinctrl_usdhc2_100mhz: usdhc2-100mhzgrp {
fsl,pins = <
MX6UL_PAD_NAND_RE_B__USDHC2_CLK 0x000170f1
MX6UL_PAD_NAND_WE_B__USDHC2_CMD 0x000170f1
MX6UL_PAD_NAND_DATA00__USDHC2_DATA0 0x000170f1
MX6UL_PAD_NAND_DATA01__USDHC2_DATA1 0x000170f1
MX6UL_PAD_NAND_DATA02__USDHC2_DATA2 0x000170f1
MX6UL_PAD_NAND_DATA03__USDHC2_DATA3 0x000170f1
MX6UL_PAD_NAND_DATA04__USDHC2_DATA4 0x000170f1
MX6UL_PAD_NAND_DATA05__USDHC2_DATA5 0x000170f1
MX6UL_PAD_NAND_DATA06__USDHC2_DATA6 0x000170f1
MX6UL_PAD_NAND_DATA07__USDHC2_DATA7 0x000170f1
/* rst */
MX6UL_PAD_NAND_ALE__GPIO4_IO10 0x0001b051
>;
};
pinctrl_usdhc2_200mhz: usdhc2-200mhzgrp {
fsl,pins = <
MX6UL_PAD_NAND_RE_B__USDHC2_CLK 0x000170f1
MX6UL_PAD_NAND_WE_B__USDHC2_CMD 0x000170f1
MX6UL_PAD_NAND_DATA00__USDHC2_DATA0 0x000170f1
MX6UL_PAD_NAND_DATA01__USDHC2_DATA1 0x000170f1
MX6UL_PAD_NAND_DATA02__USDHC2_DATA2 0x000170f1
MX6UL_PAD_NAND_DATA03__USDHC2_DATA3 0x000170f1
MX6UL_PAD_NAND_DATA04__USDHC2_DATA4 0x000170f1
MX6UL_PAD_NAND_DATA05__USDHC2_DATA5 0x000170f1
MX6UL_PAD_NAND_DATA06__USDHC2_DATA6 0x000170f1
MX6UL_PAD_NAND_DATA07__USDHC2_DATA7 0x000170f1
/* rst */
MX6UL_PAD_NAND_ALE__GPIO4_IO10 0x0001b051
>;
};
};

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// SPDX-License-Identifier: (GPL-2.0-or-later OR MIT)
/*
* Copyright 2018-2022 TQ-Systems GmbH
* Author: Markus Niebel <Markus.Niebel@tq-group.com>
*/
/dts-v1/;
#include "imx6ull-tqma6ull2l.dtsi"
#include "mba6ulx.dtsi"
/ {
model = "TQ Systems TQMa6ULL2L SoM on MBa6ULx board";
compatible = "tq,imx6ull-tqma6ull2l-mba6ulx", "tq,imx6ull-tqma6ull2l", "fsl,imx6ull";
};

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// SPDX-License-Identifier: (GPL-2.0-or-later OR MIT)
/*
* Copyright 2018-2022 TQ-Systems GmbH
* Author: Markus Niebel <Markus.Niebel@tq-group.com>
*/
#include "imx6ull.dtsi"
#include "imx6ul-tqma6ul-common.dtsi"
#include "imx6ul-tqma6ulxl-common.dtsi"
/ {
model = "TQ Systems TQMa6ULL2L SoM";
compatible = "tq,imx6ull-tqma6ull2l", "fsl,imx6ull";
};
&usdhc2 {
fsl,tuning-step= <6>;
/* Errata ERR010450 Workaround */
max-frequency = <99000000>;
assigned-clocks = <&clks IMX6UL_CLK_USDHC2_SEL>, <&clks IMX6UL_CLK_USDHC2>;
assigned-clock-parents = <&clks IMX6UL_CLK_PLL2_PFD2>;
assigned-clock-rates = <0>, <198000000>;
};
&iomuxc {
pinctrl_usdhc2: usdhc2grp {
fsl,pins = <
MX6UL_PAD_NAND_RE_B__USDHC2_CLK 0x00017031
MX6UL_PAD_NAND_WE_B__USDHC2_CMD 0x00017039
MX6UL_PAD_NAND_DATA00__USDHC2_DATA0 0x00017039
MX6UL_PAD_NAND_DATA01__USDHC2_DATA1 0x00017039
MX6UL_PAD_NAND_DATA02__USDHC2_DATA2 0x00017039
MX6UL_PAD_NAND_DATA03__USDHC2_DATA3 0x00017039
MX6UL_PAD_NAND_DATA04__USDHC2_DATA4 0x00017039
MX6UL_PAD_NAND_DATA05__USDHC2_DATA5 0x00017039
MX6UL_PAD_NAND_DATA06__USDHC2_DATA6 0x00017039
MX6UL_PAD_NAND_DATA07__USDHC2_DATA7 0x00017039
/* rst */
MX6UL_PAD_NAND_ALE__GPIO4_IO10 0x0001b051
>;
};
pinctrl_usdhc2_100mhz: usdhc2-100mhzgrp {
fsl,pins = <
MX6UL_PAD_NAND_RE_B__USDHC2_CLK 0x000170f1
MX6UL_PAD_NAND_WE_B__USDHC2_CMD 0x000170f1
MX6UL_PAD_NAND_DATA00__USDHC2_DATA0 0x000170f1
MX6UL_PAD_NAND_DATA01__USDHC2_DATA1 0x000170f1
MX6UL_PAD_NAND_DATA02__USDHC2_DATA2 0x000170f1
MX6UL_PAD_NAND_DATA03__USDHC2_DATA3 0x000170f1
MX6UL_PAD_NAND_DATA04__USDHC2_DATA4 0x000170f1
MX6UL_PAD_NAND_DATA05__USDHC2_DATA5 0x000170f1
MX6UL_PAD_NAND_DATA06__USDHC2_DATA6 0x000170f1
MX6UL_PAD_NAND_DATA07__USDHC2_DATA7 0x000170f1
/* rst */
MX6UL_PAD_NAND_ALE__GPIO4_IO10 0x0001b051
>;
};
pinctrl_usdhc2_200mhz: usdhc2-200mhzgrp {
fsl,pins = <
MX6UL_PAD_NAND_RE_B__USDHC2_CLK 0x000170f1
MX6UL_PAD_NAND_WE_B__USDHC2_CMD 0x000170f1
MX6UL_PAD_NAND_DATA00__USDHC2_DATA0 0x000170f1
MX6UL_PAD_NAND_DATA01__USDHC2_DATA1 0x000170f1
MX6UL_PAD_NAND_DATA02__USDHC2_DATA2 0x000170f1
MX6UL_PAD_NAND_DATA03__USDHC2_DATA3 0x000170f1
MX6UL_PAD_NAND_DATA04__USDHC2_DATA4 0x000170f1
MX6UL_PAD_NAND_DATA05__USDHC2_DATA5 0x000170f1
MX6UL_PAD_NAND_DATA06__USDHC2_DATA6 0x000170f1
MX6UL_PAD_NAND_DATA07__USDHC2_DATA7 0x000170f1
/* rst */
MX6UL_PAD_NAND_ALE__GPIO4_IO10 0x0001b051
>;
};
};

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// SPDX-License-Identifier: (GPL-2.0+ OR MIT)
//
// Copyright (C) 2020 PHYTEC Messtechnik GmbH
// Author: Jens Lang <J.Lang@phytec.de>
// Copyright (C) 2021 Fabio Estevam <festevam@denx.de>
/dts-v1/;
#include <dt-bindings/gpio/gpio.h>
#include "imx7d.dtsi"
/ {
model = "Storopack SMEGW01 board";
compatible = "storopack,imx7d-smegw01", "fsl,imx7d";
aliases {
mmc0 = &usdhc1;
mmc1 = &usdhc3;
mmc2 = &usdhc2;
rtc0 = &i2c_rtc;
rtc1 = &snvs_rtc;
};
chosen {
stdout-path = &uart1;
};
memory@80000000 {
device_type = "memory";
reg = <0x80000000 0x20000000>;
};
reg_lte_on: regulator-lte-on {
compatible = "regulator-fixed";
pinctrl-names = "default";
pinctrl-0 = <&pinctrl_lte_on>;
regulator-min-microvolt = <3300000>;
regulator-max-microvolt = <3300000>;
regulator-name = "lte_on";
gpio = <&gpio7 12 GPIO_ACTIVE_HIGH>;
enable-active-high;
regulator-always-on;
};
reg_lte_nreset: regulator-lte-nreset {
compatible = "regulator-fixed";
pinctrl-names = "default";
pinctrl-0 = <&pinctrl_lte_nreset>;
regulator-min-microvolt = <3300000>;
regulator-max-microvolt = <3300000>;
regulator-name = "LTE_nReset";
gpio = <&gpio6 21 GPIO_ACTIVE_HIGH>;
enable-active-high;
regulator-always-on;
};
reg_wifi: regulator-wifi {
compatible = "regulator-fixed";
gpio = <&gpio2 30 GPIO_ACTIVE_HIGH>;
enable-active-high;
pinctrl-names = "default";
pinctrl-0 = <&pinctrl_wifi>;
regulator-name = "wifi_reg";
regulator-min-microvolt = <3300000>;
regulator-max-microvolt = <3300000>;
};
reg_wlan_rfkill: regulator-wlan-rfkill {
compatible = "regulator-fixed";
pinctrl-names = "default";
pinctrl-2 = <&pinctrl_rfkill>;
regulator-min-microvolt = <3300000>;
regulator-max-microvolt = <3300000>;
regulator-name = "wlan_rfkill";
gpio = <&gpio2 11 GPIO_ACTIVE_HIGH>;
enable-active-high;
regulator-always-on;
};
reg_usbotg_vbus: regulator-usbotg-vbus {
compatible = "regulator-fixed";
pinctrl-names = "default";
pinctrl-0 = <&pinctrl_usbotg1_pwr_gpio>;
regulator-name = "usb_otg_vbus";
regulator-min-microvolt = <5000000>;
regulator-max-microvolt = <5000000>;
gpio = <&gpio1 05 GPIO_ACTIVE_HIGH>;
enable-active-high;
};
};
&ecspi1 {
pinctrl-names = "default";
pinctrl-0 = <&pinctrl_ecspi1>;
cs-gpios = <&gpio4 19 GPIO_ACTIVE_LOW>;
status = "okay";
sram@0 {
compatible = "microchip,48l640";
reg = <0>;
#address-cells = <1>;
#size-cells = <1>;
spi-max-frequency = <16000000>;
};
};
&fec1 {
pinctrl-names = "default";
pinctrl-0 = <&pinctrl_enet1>;
assigned-clocks = <&clks IMX7D_ENET1_TIME_ROOT_SRC>,
<&clks IMX7D_ENET1_TIME_ROOT_CLK>;
assigned-clock-parents = <&clks IMX7D_PLL_ENET_MAIN_100M_CLK>;
assigned-clock-rates = <0>, <100000000>;
phy-mode = "rgmii-id";
phy-handle = <&ethphy0>;
fsl,magic-packet;
status = "okay";
mdio: mdio {
#address-cells = <1>;
#size-cells = <0>;
ethphy0: ethernet-phy@1 {
compatible = "ethernet-phy-id0022.1622",
"ethernet-phy-ieee802.3-c22";
reg = <1>;
reset-gpios = <&gpio2 28 GPIO_ACTIVE_LOW>;
};
ethphy1: ethernet-phy@2 {
compatible = "ethernet-phy-id0022.1622",
"ethernet-phy-ieee802.3-c22";
reg = <2>;
};
};
};
&fec2 {
pinctrl-names = "default";
pinctrl-0 = <&pinctrl_enet2>;
assigned-clocks = <&clks IMX7D_ENET2_TIME_ROOT_SRC>,
<&clks IMX7D_ENET2_TIME_ROOT_CLK>;
assigned-clock-parents = <&clks IMX7D_PLL_ENET_MAIN_100M_CLK>;
assigned-clock-rates = <0>, <100000000>;
phy-mode = "rgmii-id";
phy-handle = <&ethphy1>;
fsl,magic-packet;
status = "okay";
};
&i2c2 {
pinctrl-names = "default";
pinctrl-0 =<&pinctrl_i2c2>;
clock-frequency = <100000>;
status = "okay";
i2c_rtc: rtc@52 {
compatible = "microcrystal,rv3028";
pinctrl-names = "default";
pinctrl-0 = <&pinctrl_rtc_int>;
reg = <0x52>;
interrupt-parent = <&gpio2>;
interrupts = <15 IRQ_TYPE_LEVEL_LOW>;
};
};
&flexcan1 {
pinctrl-names = "default";
pinctrl-0 = <&pinctrl_flexcan1>;
status = "okay";
};
&flexcan2 {
pinctrl-names = "default";
pinctrl-0 = <&pinctrl_flexcan2>;
status = "okay";
};
&uart1 {
pinctrl-names = "default";
pinctrl-0 = <&pinctrl_uart1>;
status = "okay";
};
&uart3 {
pinctrl-names = "default";
pinctrl-0 = <&pinctrl_uart3>;
status = "okay";
};
&usbotg1 {
pinctrl-names = "default";
pinctrl-0 = <&pinctrl_usbotg1_lpsr>;
dr_mode = "otg";
vbus-supply = <&reg_usbotg_vbus>;
status = "okay";
};
&usbotg2 {
pinctrl-names = "default";
pinctrl-0 = <&pinctrl_usbotg2>;
dr_mode = "host";
status = "okay";
};
&usdhc1 {
pinctrl-names = "default";
pinctrl-0 = <&pinctrl_usdhc1>;
cd-gpios = <&gpio5 0 GPIO_ACTIVE_LOW>;
no-1-8-v;
enable-sdio-wakeup;
keep-power-in-suspend;
status = "okay";
};
&usdhc2 {
pinctrl-names = "default";
pinctrl-0 = <&pinctrl_usdhc2>;
bus-width = <4>;
non-removable;
cap-sd-highspeed;
sd-uhs-ddr50;
mmc-ddr-1_8v;
vmmc-supply = <&reg_wifi>;
enable-sdio-wakeup;
status = "okay";
};
&usdhc3 {
pinctrl-names = "default", "state_100mhz", "state_200mhz";
pinctrl-0 = <&pinctrl_usdhc3>;
pinctrl-1 = <&pinctrl_usdhc3_100mhz>;
pinctrl-2 = <&pinctrl_usdhc3_200mhz>;
assigned-clocks = <&clks IMX7D_USDHC3_ROOT_CLK>;
assigned-clock-rates = <400000000>;
max-frequency = <200000000>;
bus-width = <8>;
fsl,tuning-step = <1>;
non-removable;
cap-mmc-highspeed;
cap-mmc-hw-reset;
mmc-hs200-1_8v;
mmc-ddr-1_8v;
status = "okay";
};
&wdog1 {
pinctrl-names = "default";
pinctrl-0 = <&pinctrl_wdog>;
fsl,ext-reset-output;
status = "okay";
};
&iomuxc {
pinctrl_ecspi1: ecspi1grp {
fsl,pins = <
MX7D_PAD_ECSPI1_SS0__GPIO4_IO19 0x04
MX7D_PAD_ECSPI1_SCLK__ECSPI1_SCLK 0x04
MX7D_PAD_ECSPI1_MOSI__ECSPI1_MOSI 0x04
MX7D_PAD_ECSPI1_MISO__ECSPI1_MISO 0x04
>;
};
pinctrl_enet1: enet1grp {
fsl,pins = <
MX7D_PAD_ENET1_RGMII_RX_CTL__ENET1_RGMII_RX_CTL 0x5
MX7D_PAD_ENET1_RGMII_RD0__ENET1_RGMII_RD0 0x5
MX7D_PAD_ENET1_RGMII_RD1__ENET1_RGMII_RD1 0x5
MX7D_PAD_ENET1_RGMII_RD2__ENET1_RGMII_RD2 0x5
MX7D_PAD_ENET1_RGMII_RD3__ENET1_RGMII_RD3 0x5
MX7D_PAD_ENET1_RGMII_RXC__ENET1_RGMII_RXC 0x5
MX7D_PAD_ENET1_RGMII_TX_CTL__ENET1_RGMII_TX_CTL 0x5
MX7D_PAD_ENET1_RGMII_TD0__ENET1_RGMII_TD0 0x5
MX7D_PAD_ENET1_RGMII_TD1__ENET1_RGMII_TD1 0x5
MX7D_PAD_ENET1_RGMII_TD2__ENET1_RGMII_TD2 0x5
MX7D_PAD_ENET1_RGMII_TD3__ENET1_RGMII_TD3 0x5
MX7D_PAD_ENET1_RGMII_TXC__ENET1_RGMII_TXC 0x5
MX7D_PAD_GPIO1_IO10__ENET1_MDIO 0x7
MX7D_PAD_GPIO1_IO11__ENET1_MDC 0x7
>;
};
pinctrl_enet2: enet2grp {
fsl,pins = <
MX7D_PAD_EPDC_SDCE0__ENET2_RGMII_RX_CTL 0x5
MX7D_PAD_EPDC_SDCE1__ENET2_RGMII_RXC 0x5
MX7D_PAD_EPDC_SDCLK__ENET2_RGMII_RD0 0x5
MX7D_PAD_EPDC_SDLE__ENET2_RGMII_RD1 0x5
MX7D_PAD_EPDC_SDOE__ENET2_RGMII_RD2 0x5
MX7D_PAD_EPDC_SDSHR__ENET2_RGMII_RD3 0x5
MX7D_PAD_EPDC_SDCE2__ENET2_RGMII_TD0 0x5
MX7D_PAD_EPDC_SDCE3__ENET2_RGMII_TD1 0x5
MX7D_PAD_EPDC_GDCLK__ENET2_RGMII_TD2 0x5
MX7D_PAD_EPDC_GDOE__ENET2_RGMII_TD3 0x5
MX7D_PAD_EPDC_GDRL__ENET2_RGMII_TX_CTL 0x5
MX7D_PAD_EPDC_GDSP__ENET2_RGMII_TXC 0x5
MX7D_PAD_GPIO1_IO09__GPIO1_IO9 0x08
>;
};
pinctrl_i2c2: i2c2grp {
fsl,pins = <
MX7D_PAD_I2C2_SCL__I2C2_SCL 0x40000004
MX7D_PAD_I2C2_SDA__I2C2_SDA 0x40000004
>;
};
pinctrl_flexcan1: flexcan1grp {
fsl,pins = <
MX7D_PAD_GPIO1_IO12__FLEXCAN1_RX 0x0b0b0
MX7D_PAD_GPIO1_IO13__FLEXCAN1_TX 0x0b0b0
>;
};
pinctrl_flexcan2: flexcan2grp {
fsl,pins = <
MX7D_PAD_GPIO1_IO14__FLEXCAN2_RX 0x0b0b0
MX7D_PAD_GPIO1_IO15__FLEXCAN2_TX 0x0b0b0
>;
};
pinctrl_lte_on: lteongrp {
fsl,pins = <
MX7D_PAD_ENET1_TX_CLK__GPIO7_IO12 0x17059
>;
};
pinctrl_lte_nreset: ltenresetgrp {
fsl,pins = <
MX7D_PAD_SAI2_RX_DATA__GPIO6_IO21 0x17059
>;
};
pinctrl_rfkill: rfkillrp {
fsl,pins = <
MX7D_PAD_EPDC_DATA11__GPIO2_IO11 0x17059
>;
};
pinctrl_rtc_int: rtcintgrp {
fsl,pins = <
MX7D_PAD_EPDC_DATA15__GPIO2_IO15 0x17059
>;
};
pinctrl_uart1: uart1grp {
fsl,pins = <
MX7D_PAD_UART1_TX_DATA__UART1_DCE_TX 0x74
MX7D_PAD_UART1_RX_DATA__UART1_DCE_RX 0x7c
>;
};
pinctrl_uart3: uart3grp {
fsl,pins = <
MX7D_PAD_UART3_TX_DATA__UART3_DCE_TX 0x7c
MX7D_PAD_UART3_RX_DATA__UART3_DCE_RX 0x74
>;
};
pinctrl_usbotg1_lpsr: usbotg1 {
fsl,pins = <
MX7D_PAD_LPSR_GPIO1_IO04__USB_OTG1_OC 0x04
>;
};
pinctrl_usbotg1_pwr: usbotg1-pwr {
fsl,pins = <
MX7D_PAD_LPSR_GPIO1_IO05__USB_OTG1_PWR 0x04
>;
};
pinctrl_usbotg1_pwr_gpio: usbotg1-pwr-gpio {
fsl,pins = <
MX7D_PAD_LPSR_GPIO1_IO05__GPIO1_IO5 0x04
>;
};
pinctrl_usbotg2: usbotg2grp {
fsl,pins = <
MX7D_PAD_UART3_RTS_B__USB_OTG2_OC 0x04
>;
};
pinctrl_usdhc1: usdhc1grp {
fsl,pins = <
MX7D_PAD_SD1_CD_B__GPIO5_IO0 0x59
MX7D_PAD_SD1_CMD__SD1_CMD 0x59
MX7D_PAD_SD1_CLK__SD1_CLK 0x19
MX7D_PAD_SD1_DATA0__SD1_DATA0 0x59
MX7D_PAD_SD1_DATA1__SD1_DATA1 0x59
MX7D_PAD_SD1_DATA2__SD1_DATA2 0x59
MX7D_PAD_SD1_DATA3__SD1_DATA3 0x59
>;
};
pinctrl_usdhc2: usdhc2grp {
fsl,pins = <
MX7D_PAD_SD2_CLK__SD2_CLK 0x19
MX7D_PAD_SD2_CMD__SD2_CMD 0x59
MX7D_PAD_SD2_DATA0__SD2_DATA0 0x59
MX7D_PAD_SD2_DATA1__SD2_DATA1 0x59
MX7D_PAD_SD2_DATA2__SD2_DATA2 0x59
MX7D_PAD_SD2_DATA3__SD2_DATA3 0x59
MX7D_PAD_SD2_CD_B__SD2_CD_B 0x08
>;
};
pinctrl_usdhc3: usdhc3grp {
fsl,pins = <
MX7D_PAD_SD3_CMD__SD3_CMD 0x5d
MX7D_PAD_SD3_CLK__SD3_CLK 0x1d
MX7D_PAD_SD3_DATA0__SD3_DATA0 0x5d
MX7D_PAD_SD3_DATA1__SD3_DATA1 0x5d
MX7D_PAD_SD3_DATA2__SD3_DATA2 0x5d
MX7D_PAD_SD3_DATA3__SD3_DATA3 0x5d
MX7D_PAD_SD3_DATA4__SD3_DATA4 0x5d
MX7D_PAD_SD3_DATA5__SD3_DATA5 0x5d
MX7D_PAD_SD3_DATA6__SD3_DATA6 0x5d
MX7D_PAD_SD3_DATA7__SD3_DATA7 0x5d
MX7D_PAD_SD3_STROBE__SD3_STROBE 0x1d
>;
};
pinctrl_usdhc3_100mhz: usdhc3-100mhzgrp {
fsl,pins = <
MX7D_PAD_SD3_CMD__SD3_CMD 0x5e
MX7D_PAD_SD3_CLK__SD3_CLK 0x1e
MX7D_PAD_SD3_DATA0__SD3_DATA0 0x5e
MX7D_PAD_SD3_DATA1__SD3_DATA1 0x5e
MX7D_PAD_SD3_DATA2__SD3_DATA2 0x5e
MX7D_PAD_SD3_DATA3__SD3_DATA3 0x5e
MX7D_PAD_SD3_DATA4__SD3_DATA4 0x5e
MX7D_PAD_SD3_DATA5__SD3_DATA5 0x5e
MX7D_PAD_SD3_DATA6__SD3_DATA6 0x5e
MX7D_PAD_SD3_DATA7__SD3_DATA7 0x5e
MX7D_PAD_SD3_STROBE__SD3_STROBE 0x1e
>;
};
pinctrl_usdhc3_200mhz: usdhc3-200mhzgrp {
fsl,pins = <
MX7D_PAD_SD3_CMD__SD3_CMD 0x5f
MX7D_PAD_SD3_CLK__SD3_CLK 0x0f
MX7D_PAD_SD3_DATA0__SD3_DATA0 0x5f
MX7D_PAD_SD3_DATA1__SD3_DATA1 0x5f
MX7D_PAD_SD3_DATA2__SD3_DATA2 0x5f
MX7D_PAD_SD3_DATA3__SD3_DATA3 0x5f
MX7D_PAD_SD3_DATA4__SD3_DATA4 0x5f
MX7D_PAD_SD3_DATA5__SD3_DATA5 0x5f
MX7D_PAD_SD3_DATA6__SD3_DATA6 0x5f
MX7D_PAD_SD3_DATA7__SD3_DATA7 0x5f
MX7D_PAD_SD3_STROBE__SD3_STROBE 0x1f
>;
};
pinctrl_wifi: wifigrp {
fsl,pins = <
MX7D_PAD_EPDC_PWR_COM__GPIO2_IO30 0x04
MX7D_PAD_SD2_RESET_B__GPIO5_IO11 0x04
>;
};
};
&iomuxc_lpsr {
pinctrl_wdog: wdoggrp {
fsl,pins = <
MX7D_PAD_LPSR_GPIO1_IO00__WDOG1_WDOG_B 0x74
>;
};
};

2
arch/arm/boot/dts/imx7s.dtsi
View File

@ -446,7 +446,7 @@
status = "disabled";
};
iomuxc_lpsr: iomuxc-lpsr@302c0000 {
iomuxc_lpsr: pinctrl@302c0000 {
compatible = "fsl,imx7d-iomuxc-lpsr";
reg = <0x302c0000 0x10000>;
fsl,input-sel = <&iomuxc>;

72
arch/arm/boot/dts/imxrt1050-evk.dts Normal file
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@ -0,0 +1,72 @@
// SPDX-License-Identifier: (GPL-2.0+ OR MIT)
/*
* Copyright (C) 2019
* Author(s): Giulio Benetti <giulio.benetti@benettiengineering.com>
*/
/dts-v1/;
#include "imxrt1050.dtsi"
#include "imxrt1050-pinfunc.h"
/ {
model = "NXP IMXRT1050-evk board";
compatible = "fsl,imxrt1050-evk", "fsl,imxrt1050";
chosen {
stdout-path = &lpuart1;
};
aliases {
gpio0 = &gpio1;
gpio1 = &gpio2;
gpio2 = &gpio3;
gpio3 = &gpio4;
gpio4 = &gpio5;
mmc0 = &usdhc1;
serial0 = &lpuart1;
};
memory@80000000 {
device_type = "memory";
reg = <0x80000000 0x2000000>;
};
};
&lpuart1 {
pinctrl-names = "default";
pinctrl-0 = <&pinctrl_lpuart1>;
status = "okay";
};
&iomuxc {
pinctrl-names = "default";
pinctrl_lpuart1: lpuart1grp {
fsl,pins = <
MXRT1050_IOMUXC_GPIO_AD_B0_12_LPUART1_TXD 0xf1
MXRT1050_IOMUXC_GPIO_AD_B0_13_LPUART1_RXD 0xf1
>;
};
pinctrl_usdhc0: usdhc0grp {
fsl,pins = <
MXRT1050_IOMUXC_GPIO_B1_12_USDHC1_CD_B 0x1B000
MXRT1050_IOMUXC_GPIO_B1_14_USDHC1_VSELECT 0xB069
MXRT1050_IOMUXC_GPIO_SD_B0_00_USDHC1_CMD 0x17061
MXRT1050_IOMUXC_GPIO_SD_B0_01_USDHC1_CLK 0x17061
MXRT1050_IOMUXC_GPIO_SD_B0_05_USDHC1_DATA3 0x17061
MXRT1050_IOMUXC_GPIO_SD_B0_04_USDHC1_DATA2 0x17061
MXRT1050_IOMUXC_GPIO_SD_B0_03_USDHC1_DATA1 0x17061
MXRT1050_IOMUXC_GPIO_SD_B0_02_USDHC1_DATA0 0x17061
>;
};
};
&usdhc1 {
pinctrl-names = "default", "state_100mhz", "state_200mhz", "sleep";
pinctrl-0 = <&pinctrl_usdhc0>;
pinctrl-1 = <&pinctrl_usdhc0>;
pinctrl-2 = <&pinctrl_usdhc0>;
pinctrl-3 = <&pinctrl_usdhc0>;
cd-gpios = <&gpio2 28 GPIO_ACTIVE_LOW>;
status = "okay";
};

160
arch/arm/boot/dts/imxrt1050.dtsi Normal file
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@ -0,0 +1,160 @@
// SPDX-License-Identifier: (GPL-2.0+ OR MIT)
/*
* Copyright (C) 2019
* Author(s): Giulio Benetti <giulio.benetti@benettiengineering.com>
*/
#include "armv7-m.dtsi"
#include <dt-bindings/interrupt-controller/arm-gic.h>
#include <dt-bindings/clock/imxrt1050-clock.h>
#include <dt-bindings/gpio/gpio.h>
/ {
#address-cells = <1>;
#size-cells = <1>;
clocks {
osc: osc {
compatible = "fixed-clock";
#clock-cells = <0>;
clock-frequency = <24000000>;
};
osc3M: osc3M {
compatible = "fixed-clock";
#clock-cells = <0>;
clock-frequency = <3000000>;
};
};
soc {
lpuart1: serial@40184000 {
compatible = "fsl,imxrt1050-lpuart", "fsl,imx7ulp-lpuart";
reg = <0x40184000 0x4000>;
interrupts = <20>;
clocks = <&clks IMXRT1050_CLK_LPUART1>;
clock-names = "ipg";
status = "disabled";
};
iomuxc: pinctrl@401f8000 {
compatible = "fsl,imxrt1050-iomuxc";
reg = <0x401f8000 0x4000>;
fsl,mux_mask = <0x7>;
};
anatop: anatop@400d8000 {
compatible = "fsl,imxrt-anatop";
reg = <0x400d8000 0x4000>;
};
clks: clock-controller@400fc000 {
compatible = "fsl,imxrt1050-ccm";
reg = <0x400fc000 0x4000>;
interrupts = <95>, <96>;
clocks = <&osc>;
clock-names = "osc";
#clock-cells = <1>;
assigned-clocks = <&clks IMXRT1050_CLK_PLL1_BYPASS>,
<&clks IMXRT1050_CLK_PLL1_BYPASS>,
<&clks IMXRT1050_CLK_PLL2_BYPASS>,
<&clks IMXRT1050_CLK_PLL3_BYPASS>,
<&clks IMXRT1050_CLK_PLL3_PFD1_664_62M>,
<&clks IMXRT1050_CLK_PLL2_PFD2_396M>;
assigned-clock-parents = <&clks IMXRT1050_CLK_PLL1_REF_SEL>,
<&clks IMXRT1050_CLK_PLL1_ARM>,
<&clks IMXRT1050_CLK_PLL2_SYS>,
<&clks IMXRT1050_CLK_PLL3_USB_OTG>,
<&clks IMXRT1050_CLK_PLL3_USB_OTG>,
<&clks IMXRT1050_CLK_PLL2_SYS>;
};
edma1: dma-controller@400e8000 {
#dma-cells = <2>;
compatible = "fsl,imx7ulp-edma";
reg = <0x400e8000 0x4000>,
<0x400ec000 0x4000>;
dma-channels = <32>;
interrupts = <0>, <1>, <2>, <3>, <4>, <5>, <6>, <7>, <8>,
<9>, <10>, <11>, <12>, <13>, <14>, <15>, <16>;
clock-names = "dma", "dmamux0";
clocks = <&clks IMXRT1050_CLK_DMA>,
<&clks IMXRT1050_CLK_DMA_MUX>;
};
usdhc1: mmc@402c0000 {
compatible ="fsl,imxrt1050-usdhc", "fsl,imx6sl-usdhc";
reg = <0x402c0000 0x4000>;
interrupts = <110>;
clocks = <&clks IMXRT1050_CLK_IPG_PDOF>,
<&clks IMXRT1050_CLK_OSC>,
<&clks IMXRT1050_CLK_USDHC1>;
clock-names = "ipg", "ahb", "per";
bus-width = <4>;
fsl,wp-controller;
no-1-8-v;
max-frequency = <4000000>;
fsl,tuning-start-tap = <20>;
fsl,tuning-step= <2>;
status = "disabled";
};
gpio1: gpio@401b8000 {
compatible = "fsl,imxrt1050-gpio", "fsl,imx35-gpio";
reg = <0x401b8000 0x4000>;
interrupts = <80>, <81>;
gpio-controller;
#gpio-cells = <2>;
interrupt-controller;
#interrupt-cells = <2>;
};
gpio2: gpio@401bc000 {
compatible = "fsl,imxrt1050-gpio", "fsl,imx35-gpio";
reg = <0x401bc000 0x4000>;
interrupts = <82>, <83>;
gpio-controller;
#gpio-cells = <2>;
interrupt-controller;
#interrupt-cells = <2>;
};
gpio3: gpio@401c0000 {
compatible = "fsl,imxrt1050-gpio", "fsl,imx35-gpio";
reg = <0x401c0000 0x4000>;
interrupts = <84>, <85>;
gpio-controller;
#gpio-cells = <2>;
interrupt-controller;
#interrupt-cells = <2>;
};
gpio4: gpio@401c4000 {
compatible = "fsl,imxrt1050-gpio", "fsl,imx35-gpio";
reg = <0x401c4000 0x4000>;
interrupts = <86>, <87>;
gpio-controller;
#gpio-cells = <2>;
interrupt-controller;
#interrupt-cells = <2>;
};
gpio5: gpio@400c0000 {
compatible = "fsl,imxrt1050-gpio", "fsl,imx35-gpio";
reg = <0x400c0000 0x4000>;
interrupts = <88>, <89>;
gpio-controller;
#gpio-cells = <2>;
interrupt-controller;
#interrupt-cells = <2>;
};
gpt: timer@401ec000 {
compatible = "fsl,imxrt1050-gpt", "fsl,imx6dl-gpt", "fsl,imx6sl-gpt";
reg = <0x401ec000 0x4000>;
interrupts = <100>;
clocks = <&osc3M>;
clock-names = "per";
};
};
};

227
arch/arm/boot/dts/ls1021a-iot.dts Normal file
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@ -0,0 +1,227 @@
// SPDX-License-Identifier: GPL-2.0
/*
* Copyright 2021-2022 NXP
*
*/
/dts-v1/;
#include "ls1021a.dtsi"
/ {
model = "LS1021A-IOT Board";
compatible = "fsl,ls1021a-iot", "fsl,ls1021a";
sys_mclk: clock-mclk {
compatible = "fixed-clock";
#clock-cells = <0>;
clock-frequency = <24576000>;
};
reg_3p3v: regulator-3V3 {
compatible = "regulator-fixed";
regulator-name = "3P3V";
regulator-min-microvolt = <3300000>;
regulator-max-microvolt = <3300000>;
regulator-always-on;
};
reg_2p5v: regulator-2V5 {
compatible = "regulator-fixed";
regulator-name = "2P5V";
regulator-min-microvolt = <2500000>;
regulator-max-microvolt = <2500000>;
regulator-always-on;
};
sound {
compatible = "simple-audio-card";
simple-audio-card,format = "i2s";
simple-audio-card,widgets =
"Microphone", "Microphone Jack",
"Headphone", "Headphone Jack",
"Speaker", "Speaker Ext",
"Line", "Line In Jack";
simple-audio-card,routing =
"MIC_IN", "Microphone Jack",
"Microphone Jack", "Mic Bias",
"LINE_IN", "Line In Jack",
"Headphone Jack", "HP_OUT",
"Speaker Ext", "LINE_OUT";
simple-audio-card,cpu {
sound-dai = <&sai2>;
frame-master;
bitclock-master;
};
simple-audio-card,codec {
sound-dai = <&sgtl5000>;
frame-master;
bitclock-master;
};
};
};
&can0{
status = "disabled";
};
&can1{
status = "disabled";
};
&can2{
status = "disabled";
};
&can3{
status = "okay";
};
&dcu {
display = <&display>;
status = "okay";
display: display@0 {
bits-per-pixel = <24>;
display-timings {
native-mode = <&timing0>;
timing0: mode0 {
clock-frequency = <25000000>;
hactive = <640>;
vactive = <480>;
hback-porch = <80>;
hfront-porch = <80>;
vback-porch = <16>;
vfront-porch = <16>;
hsync-len = <12>;
vsync-len = <2>;
hsync-active = <1>;
vsync-active = <1>;
};
};
};
};
&enet0 {
tbi-handle = <&tbi1>;
phy-handle = <&phy1>;
phy-connection-type = "sgmii";
status = "okay";
};
&enet1 {
tbi-handle = <&tbi1>;
phy-handle = <&phy3>;
phy-connection-type = "sgmii";
status = "okay";
};
&enet2 {
fixed-link = <0 1 1000 0 0>;
phy-connection-type = "rgmii-id";
status = "okay";
};
&esdhc{
status = "okay";
};
&i2c0 {
status = "okay";
pca9555: gpio@23 {
compatible = "nxp,pca9555";
reg = <0x23>;
gpio-controller;
#gpio-cells = <2>;
interrupt-controller;
#interrupt-cells = <2>;
};
sgtl5000: audio-codec@2a {
#sound-dai-cells=<0x0>;
compatible = "fsl,sgtl5000";
reg = <0x2a>;
VDDA-supply = <&reg_3p3v>;
VDDIO-supply = <&reg_2p5v>;
clocks = <&sys_mclk>;
};
max1239: adc@35 {
compatible = "maxim,max1239";
reg = <0x35>;
#io-channel-cells = <1>;
};
ina2201: core-monitor@44 {
compatible = "ti,ina220";
reg = <0x44>;
shunt-resistor = <1000>;
};
ina2202: current-monitor@45 {
compatible = "ti,ina220";
reg = <0x45>;
shunt-resistor = <1000>;
};
lm75b: thermal-monitor@48 {
compatible = "national,lm75b";
reg = <0x48>;
};
};
&lpuart0 {
status = "okay";
};
&mdio0 {
phy0: ethernet-phy@0 {
reg = <0x0>;
};
phy1: ethernet-phy@1 {
reg = <0x1>;
};
phy2: ethernet-phy@2 {
reg = <0x2>;
};
phy3: ethernet-phy@3 {
reg = <0x3>;
};
tbi1: tbi-phy@1f {
reg = <0x1f>;
device_type = "tbi-phy";
};
};
&qspi {
num-cs = <2>;
status = "okay";
s25fl128s: flash@0 {
compatible = "jedec,spi-nor";
#address-cells = <1>;
#size-cells = <1>;
spi-max-frequency = <20000000>;
reg = <0>;
};
};
&sai2 {
status = "okay";
};
&uart0 {
status = "okay";
};
&uart1 {
status = "okay";
};

6
arch/arm/boot/dts/ls1021a.dtsi
View File

@ -122,8 +122,8 @@
interrupts = <GIC_SPI 180 IRQ_TYPE_LEVEL_HIGH>;
};
ifc: ifc@1530000 {
compatible = "fsl,ifc", "simple-bus";
ifc: memory-controller@1530000 {
compatible = "fsl,ifc";
reg = <0x0 0x1530000 0x0 0x10000>;
interrupts = <GIC_SPI 75 IRQ_TYPE_LEVEL_HIGH>;
status = "disabled";
@ -192,7 +192,7 @@
<3 0 &gic GIC_SPI 167 IRQ_TYPE_LEVEL_HIGH>,
<4 0 &gic GIC_SPI 168 IRQ_TYPE_LEVEL_HIGH>,
<5 0 &gic GIC_SPI 169 IRQ_TYPE_LEVEL_HIGH>;
interrupt-map-mask = <0xffffffff 0x0>;
interrupt-map-mask = <0x7 0x0>;
};
};

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