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[PATCH] ARM: 2752/1: disable ixp2000 PCI I/O software workaround on chips that don't need it
Patch from Lennert Buytenhek The later ixp2000 models don't need the PCI I/O workaround that we currently perform. Add a config option to disable the workaround, and panic on boot if a kernel without the workaround is booted on a buggy chip. As only pre-production ixp2000s need the workaround, the default is for it not to be configured in. Signed-off-by: Lennert Buytenhek <buytenh@wantstofly.org> Signed-off-by: Deepak Saxena Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
This commit is contained in:
parent
3cd9e19ebc
commit
321ab6a5fa
9 changed files with 41 additions and 7 deletions
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@ -99,6 +99,7 @@ CONFIG_ARCH_ENP2611=y
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# CONFIG_ARCH_IXDP2800 is not set
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# CONFIG_ARCH_IXDP2800 is not set
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# CONFIG_ARCH_IXDP2401 is not set
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# CONFIG_ARCH_IXDP2401 is not set
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# CONFIG_ARCH_IXDP2801 is not set
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# CONFIG_ARCH_IXDP2801 is not set
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# CONFIG_IXP2000_SUPPORT_BROKEN_PCI_IO is not set
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#
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#
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# Processor Type
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# Processor Type
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@ -100,6 +100,7 @@ CONFIG_ARCH_IXDP2400=y
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CONFIG_ARCH_IXDP2X00=y
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CONFIG_ARCH_IXDP2X00=y
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# CONFIG_ARCH_IXDP2401 is not set
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# CONFIG_ARCH_IXDP2401 is not set
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# CONFIG_ARCH_IXDP2801 is not set
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# CONFIG_ARCH_IXDP2801 is not set
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# CONFIG_IXP2000_SUPPORT_BROKEN_PCI_IO is not set
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#
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#
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# Processor Type
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# Processor Type
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@ -100,6 +100,7 @@ CONFIG_ARCH_SUPPORTS_BIG_ENDIAN=y
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CONFIG_ARCH_IXDP2401=y
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CONFIG_ARCH_IXDP2401=y
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# CONFIG_ARCH_IXDP2801 is not set
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# CONFIG_ARCH_IXDP2801 is not set
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CONFIG_ARCH_IXDP2X01=y
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CONFIG_ARCH_IXDP2X01=y
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# CONFIG_IXP2000_SUPPORT_BROKEN_PCI_IO is not set
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#
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#
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# Processor Type
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# Processor Type
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@ -100,6 +100,7 @@ CONFIG_ARCH_IXDP2800=y
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CONFIG_ARCH_IXDP2X00=y
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CONFIG_ARCH_IXDP2X00=y
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# CONFIG_ARCH_IXDP2401 is not set
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# CONFIG_ARCH_IXDP2401 is not set
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# CONFIG_ARCH_IXDP2801 is not set
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# CONFIG_ARCH_IXDP2801 is not set
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# CONFIG_IXP2000_SUPPORT_BROKEN_PCI_IO is not set
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#
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#
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# Processor Type
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# Processor Type
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@ -100,6 +100,7 @@ CONFIG_ARCH_SUPPORTS_BIG_ENDIAN=y
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# CONFIG_ARCH_IXDP2401 is not set
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# CONFIG_ARCH_IXDP2401 is not set
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CONFIG_ARCH_IXDP2801=y
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CONFIG_ARCH_IXDP2801=y
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CONFIG_ARCH_IXDP2X01=y
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CONFIG_ARCH_IXDP2X01=y
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# CONFIG_IXP2000_SUPPORT_BROKEN_PCI_IO is not set
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#
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#
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# Processor Type
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# Processor Type
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@ -54,6 +54,14 @@ config ARCH_IXDP2X01
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depends on ARCH_IXDP2401 || ARCH_IXDP2801
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depends on ARCH_IXDP2401 || ARCH_IXDP2801
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default y
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default y
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config IXP2000_SUPPORT_BROKEN_PCI_IO
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bool "Support broken PCI I/O on older IXP2000s"
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default y
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help
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Say 'N' here if you only intend to run your kernel on an
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IXP2000 B0 or later model and do not need the PCI I/O
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byteswap workaround. Say 'Y' otherwise.
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endmenu
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endmenu
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endif
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endif
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@ -198,6 +198,19 @@ clear_master_aborts(void)
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void __init
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void __init
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ixp2000_pci_preinit(void)
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ixp2000_pci_preinit(void)
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{
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{
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#ifndef CONFIG_IXP2000_SUPPORT_BROKEN_PCI_IO
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/*
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* Configure the PCI unit to properly byteswap I/O transactions,
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* and verify that it worked.
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*/
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ixp2000_reg_write(IXP2000_PCI_CONTROL,
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(*IXP2000_PCI_CONTROL | PCI_CONTROL_IEE));
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if ((*IXP2000_PCI_CONTROL & PCI_CONTROL_IEE) == 0)
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panic("IXP2000: PCI I/O is broken on this ixp model, and "
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"the needed workaround has not been configured in");
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#endif
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hook_fault_code(16+6, ixp2000_pci_abort_handler, SIGBUS,
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hook_fault_code(16+6, ixp2000_pci_abort_handler, SIGBUS,
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"PCI config cycle to non-existent device");
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"PCI config cycle to non-existent device");
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}
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}
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@ -17,16 +17,21 @@
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#define IO_SPACE_LIMIT 0xffffffff
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#define IO_SPACE_LIMIT 0xffffffff
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#define __mem_pci(a) (a)
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#define __mem_pci(a) (a)
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#define ___io(p) ((void __iomem *)((p)+IXP2000_PCI_IO_VIRT_BASE))
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/*
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/*
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* The IXP2400 before revision B0 asserts byte lanes for PCI I/O
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* The A? revisions of the IXP2000s assert byte lanes for PCI I/O
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* transactions the other way round (MEM transactions don't have this
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* transactions the other way round (MEM transactions don't have this
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* issue), so we need to override the standard functions. B0 and later
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* issue), so if we want to support those models, we need to override
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* have a bit that can be set to 1 to get the 'proper' behavior, but
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* the standard I/O functions.
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* since that isn't available on the A? revisions we just keep doing
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*
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* things manually.
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* B0 and later have a bit that can be set to 1 to get the proper
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* behavior for I/O transactions, which then allows us to use the
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* standard I/O functions. This is what we do if the user does not
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* explicitly ask for support for pre-B0.
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*/
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*/
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#ifdef CONFIG_IXP2000_SUPPORT_BROKEN_PCI_IO
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#define ___io(p) ((void __iomem *)((p)+IXP2000_PCI_IO_VIRT_BASE))
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#define alignb(addr) (void __iomem *)((unsigned long)(addr) ^ 3)
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#define alignb(addr) (void __iomem *)((unsigned long)(addr) ^ 3)
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#define alignw(addr) (void __iomem *)((unsigned long)(addr) ^ 2)
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#define alignw(addr) (void __iomem *)((unsigned long)(addr) ^ 2)
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@ -119,6 +124,9 @@
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#define ioport_map(port, nr) ___io(port)
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#define ioport_map(port, nr) ___io(port)
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#define ioport_unmap(addr)
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#define ioport_unmap(addr)
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#else
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#define __io(p) ((void __iomem *)((p)+IXP2000_PCI_IO_VIRT_BASE))
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#endif
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#ifdef CONFIG_ARCH_IXDP2X01
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#ifdef CONFIG_ARCH_IXDP2X01
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@ -241,7 +241,7 @@
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#define PCI_CONTROL_BE_DEI (1 << 21) /* Big Endian Data Enable In */
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#define PCI_CONTROL_BE_DEI (1 << 21) /* Big Endian Data Enable In */
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#define PCI_CONTROL_BE_BEO (1 << 20) /* Big Endian Byte Enable Out */
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#define PCI_CONTROL_BE_BEO (1 << 20) /* Big Endian Byte Enable Out */
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#define PCI_CONTROL_BE_BEI (1 << 19) /* Big Endian Byte Enable In */
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#define PCI_CONTROL_BE_BEI (1 << 19) /* Big Endian Byte Enable In */
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#define PCI_CONTROL_PNR (1 << 17) /* PCI Not Reset bit */
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#define PCI_CONTROL_IEE (1 << 17) /* I/O cycle Endian swap Enable */
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#define IXP2000_PCI_RST_REL (1 << 2)
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#define IXP2000_PCI_RST_REL (1 << 2)
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#define CFG_RST_DIR (*IXP2000_PCI_CONTROL & IXP2000_PCICNTL_PCF)
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#define CFG_RST_DIR (*IXP2000_PCI_CONTROL & IXP2000_PCICNTL_PCF)
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