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drm/nouveau: consolidate handling of dma mask
Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
This commit is contained in:
parent
a220dd7321
commit
325a72827c
3 changed files with 13 additions and 44 deletions
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@ -253,7 +253,6 @@ nouveau_ttm_init(struct nouveau_drm *drm)
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struct nvkm_device *device = nvxx_device(&drm->client.device);
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struct nvkm_pci *pci = device->pci;
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struct drm_device *dev = drm->dev;
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u8 bits;
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int ret;
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if (pci && pci->agp.bridge) {
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@ -263,34 +262,6 @@ nouveau_ttm_init(struct nouveau_drm *drm)
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drm->agp.cma = pci->agp.cma;
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}
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bits = nvxx_mmu(&drm->client.device)->dma_bits;
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if (nvxx_device(&drm->client.device)->func->pci) {
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if (drm->agp.bridge)
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bits = 32;
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} else if (device->func->tegra) {
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struct nvkm_device_tegra *tegra = device->func->tegra(device);
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/*
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* If the platform can use a IOMMU, then the addressable DMA
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* space is constrained by the IOMMU bit
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*/
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if (tegra->func->iommu_bit)
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bits = min(bits, tegra->func->iommu_bit);
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}
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ret = dma_set_mask(dev->dev, DMA_BIT_MASK(bits));
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if (ret && bits != 32) {
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bits = 32;
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ret = dma_set_mask(dev->dev, DMA_BIT_MASK(bits));
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}
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if (ret)
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return ret;
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ret = dma_set_coherent_mask(dev->dev, DMA_BIT_MASK(bits));
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if (ret)
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dma_set_coherent_mask(dev->dev, DMA_BIT_MASK(32));
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ret = nouveau_ttm_global_init(drm);
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if (ret)
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return ret;
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@ -300,7 +271,7 @@ nouveau_ttm_init(struct nouveau_drm *drm)
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&nouveau_bo_driver,
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dev->anon_inode->i_mapping,
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DRM_FILE_PAGE_OFFSET,
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bits <= 32 ? true : false);
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drm->client.mmu.dmabits <= 32 ? true : false);
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if (ret) {
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NV_ERROR(drm, "error initialising bo driver, %d\n", ret);
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return ret;
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@ -1627,7 +1627,7 @@ nvkm_device_pci_new(struct pci_dev *pci_dev, const char *cfg, const char *dbg,
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const struct nvkm_device_pci_vendor *pciv;
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const char *name = NULL;
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struct nvkm_device_pci *pdev;
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int ret;
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int ret, bits;
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ret = pci_enable_device(pci_dev);
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if (ret)
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@ -1679,17 +1679,17 @@ nvkm_device_pci_new(struct pci_dev *pci_dev, const char *cfg, const char *dbg,
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if (ret)
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return ret;
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/*
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* Set a preliminary DMA mask based on the .dma_bits member of the
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* MMU subdevice. This allows other subdevices to create DMA mappings
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* in their init() or oneinit() methods, which may be called before the
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* TTM layer sets the DMA mask definitively.
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* This is necessary for platforms where the default DMA mask of 32
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* does not cover any system memory, i.e., when all RAM is > 4 GB.
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*/
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if (pdev->device.mmu)
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dma_set_mask_and_coherent(&pci_dev->dev,
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DMA_BIT_MASK(pdev->device.mmu->dma_bits));
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/* Set DMA mask based on capabilities reported by the MMU subdev. */
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if (pdev->device.mmu && !pdev->device.pci->agp.bridge)
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bits = pdev->device.mmu->dma_bits;
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else
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bits = 32;
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ret = dma_set_mask_and_coherent(&pci_dev->dev, DMA_BIT_MASK(bits));
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if (ret && bits != 32) {
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dma_set_mask_and_coherent(&pci_dev->dev, DMA_BIT_MASK(32));
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pdev->device.mmu->dma_bits = 32;
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}
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return 0;
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}
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@ -309,8 +309,6 @@ nvkm_device_tegra_new(const struct nvkm_device_tegra_func *func,
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/**
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* The IOMMU bit defines the upper limit of the GPU-addressable space.
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* This will be refined in nouveau_ttm_init but we need to do it early
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* for instmem to behave properly
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*/
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ret = dma_set_mask(&pdev->dev, DMA_BIT_MASK(tdev->func->iommu_bit));
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if (ret)
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