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net: sxgbe: Added rxqueue enable function
This patch adds rxqueue enable function according to number of rxqueue and adds rxqueue disable function for removing. Signed-off-by: Byungho An <bh74.an@samsung.com> Signed-off-by: David S. Miller <davem@davemloft.net>
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0a0347b1e6
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325b94f7e6
4 changed files with 36 additions and 0 deletions
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@ -358,6 +358,8 @@ struct sxgbe_core_ops {
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/* Enable disable checksum offload operations */
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/* Enable disable checksum offload operations */
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void (*enable_rx_csum)(void __iomem *ioaddr);
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void (*enable_rx_csum)(void __iomem *ioaddr);
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void (*disable_rx_csum)(void __iomem *ioaddr);
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void (*disable_rx_csum)(void __iomem *ioaddr);
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void (*enable_rxqueue)(void __iomem *ioaddr, int queue_num);
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void (*disable_rxqueue)(void __iomem *ioaddr, int queue_num);
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};
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};
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const struct sxgbe_core_ops *sxgbe_get_core_ops(void);
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const struct sxgbe_core_ops *sxgbe_get_core_ops(void);
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@ -165,6 +165,26 @@ static void sxgbe_core_set_speed(void __iomem *ioaddr, unsigned char speed)
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writel(tx_cfg, ioaddr + SXGBE_CORE_TX_CONFIG_REG);
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writel(tx_cfg, ioaddr + SXGBE_CORE_TX_CONFIG_REG);
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}
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}
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static void sxgbe_core_enable_rxqueue(void __iomem *ioaddr, int queue_num)
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{
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u32 reg_val;
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reg_val = readl(ioaddr + SXGBE_CORE_RX_CTL0_REG);
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reg_val &= ~(SXGBE_CORE_RXQ_ENABLE_MASK << queue_num);
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reg_val |= SXGBE_CORE_RXQ_ENABLE;
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writel(reg_val, ioaddr + SXGBE_CORE_RX_CTL0_REG);
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}
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static void sxgbe_core_disable_rxqueue(void __iomem *ioaddr, int queue_num)
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{
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u32 reg_val;
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reg_val = readl(ioaddr + SXGBE_CORE_RX_CTL0_REG);
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reg_val &= ~(SXGBE_CORE_RXQ_ENABLE_MASK << queue_num);
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reg_val |= SXGBE_CORE_RXQ_DISABLE;
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writel(reg_val, ioaddr + SXGBE_CORE_RX_CTL0_REG);
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}
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static void sxgbe_set_eee_mode(void __iomem *ioaddr)
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static void sxgbe_set_eee_mode(void __iomem *ioaddr)
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{
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{
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u32 ctrl;
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u32 ctrl;
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@ -254,6 +274,8 @@ static const struct sxgbe_core_ops core_ops = {
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.set_eee_pls = sxgbe_set_eee_pls,
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.set_eee_pls = sxgbe_set_eee_pls,
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.enable_rx_csum = sxgbe_enable_rx_csum,
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.enable_rx_csum = sxgbe_enable_rx_csum,
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.disable_rx_csum = sxgbe_disable_rx_csum,
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.disable_rx_csum = sxgbe_disable_rx_csum,
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.enable_rxqueue = sxgbe_core_enable_rxqueue,
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.disable_rxqueue = sxgbe_core_disable_rxqueue,
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};
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};
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const struct sxgbe_core_ops *sxgbe_get_core_ops(void)
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const struct sxgbe_core_ops *sxgbe_get_core_ops(void)
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@ -1076,6 +1076,9 @@ static int sxgbe_open(struct net_device *dev)
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/* Initialize the MAC Core */
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/* Initialize the MAC Core */
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priv->hw->mac->core_init(priv->ioaddr);
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priv->hw->mac->core_init(priv->ioaddr);
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SXGBE_FOR_EACH_QUEUE(SXGBE_RX_QUEUES, queue_num) {
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priv->hw->mac->enable_rxqueue(priv->ioaddr, queue_num);
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}
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/* Request the IRQ lines */
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/* Request the IRQ lines */
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ret = devm_request_irq(priv->device, priv->irq, sxgbe_common_interrupt,
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ret = devm_request_irq(priv->device, priv->irq, sxgbe_common_interrupt,
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@ -2240,9 +2243,14 @@ struct sxgbe_priv_data *sxgbe_drv_probe(struct device *device,
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int sxgbe_drv_remove(struct net_device *ndev)
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int sxgbe_drv_remove(struct net_device *ndev)
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{
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{
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struct sxgbe_priv_data *priv = netdev_priv(ndev);
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struct sxgbe_priv_data *priv = netdev_priv(ndev);
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u8 queue_num;
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netdev_info(ndev, "%s: removing driver\n", __func__);
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netdev_info(ndev, "%s: removing driver\n", __func__);
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SXGBE_FOR_EACH_QUEUE(SXGBE_RX_QUEUES, queue_num) {
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priv->hw->mac->disable_rxqueue(priv->ioaddr, queue_num);
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}
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priv->hw->dma->stop_rx(priv->ioaddr, SXGBE_RX_QUEUES);
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priv->hw->dma->stop_rx(priv->ioaddr, SXGBE_RX_QUEUES);
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priv->hw->dma->stop_tx(priv->ioaddr, SXGBE_TX_QUEUES);
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priv->hw->dma->stop_tx(priv->ioaddr, SXGBE_TX_QUEUES);
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@ -52,6 +52,10 @@
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#define SXGBE_CORE_RX_CTL2_REG 0x00A8
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#define SXGBE_CORE_RX_CTL2_REG 0x00A8
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#define SXGBE_CORE_RX_CTL3_REG 0x00AC
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#define SXGBE_CORE_RX_CTL3_REG 0x00AC
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#define SXGBE_CORE_RXQ_ENABLE_MASK 0x0003
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#define SXGBE_CORE_RXQ_ENABLE 0x0002
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#define SXGBE_CORE_RXQ_DISABLE 0x0000
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/* Interrupt Registers */
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/* Interrupt Registers */
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#define SXGBE_CORE_INT_STATUS_REG 0x00B0
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#define SXGBE_CORE_INT_STATUS_REG 0x00B0
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#define SXGBE_CORE_INT_ENABLE_REG 0x00B4
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#define SXGBE_CORE_INT_ENABLE_REG 0x00B4
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