[ARM] 3666/1: TRIZEPS4 [1/5] core

Patch from Jrgen Schindele

This patch adds support for Trizeps4 SoM and ConXS-evalboard
from "Keith und Koep" This DIMM-module is based on PXA270.

Signed-off-by: Jrgen Schindele <linux@schindele.name>
Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
This commit is contained in:
Jrgen Schindele 2006-06-29 16:01:43 +01:00 committed by Russell King
parent a144a5633c
commit 326764a85b
10 changed files with 2317 additions and 1 deletions

View file

@ -547,7 +547,7 @@ config LEDS
ARCH_LUBBOCK || MACH_MAINSTONE || ARCH_NETWINDER || \
ARCH_OMAP || ARCH_P720T || ARCH_PXA_IDP || \
ARCH_SA1100 || ARCH_SHARK || ARCH_VERSATILE || \
ARCH_AT91RM9200
ARCH_AT91RM9200 || MACH_TRIZEPS4
help
If you say Y here, the LEDs on your machine will be used
to provide useful information about your current system status.

File diff suppressed because it is too large Load diff

View file

@ -35,6 +35,10 @@ config PXA_SHARPSL
SL-C3000 (Spitz), SL-C3100 (Borzoi) or SL-C6000x (Tosa)
handheld computer.
config MACH_TRIZEPS4
bool "Keith und Koep Trizeps4 DIMM-Module"
select PXA27x
endchoice
if PXA_SHARPSL
@ -55,6 +59,21 @@ endchoice
endif
if MACH_TRIZEPS4
choice
prompt "Select base board for Trizeps 4 module"
config MACH_TRIZEPS4_CONXS
bool "ConXS Eval Board"
config MACH_TRIZEPS4_ANY
bool "another Board"
endchoice
endif
endmenu
config MACH_POODLE

View file

@ -12,6 +12,7 @@ obj-$(CONFIG_ARCH_LUBBOCK) += lubbock.o
obj-$(CONFIG_MACH_LOGICPD_PXA270) += lpd270.o
obj-$(CONFIG_MACH_MAINSTONE) += mainstone.o
obj-$(CONFIG_ARCH_PXA_IDP) += idp.o
obj-$(CONFIG_MACH_TRIZEPS4) += trizeps4.o
obj-$(CONFIG_PXA_SHARP_C7xx) += corgi.o corgi_ssp.o corgi_lcd.o sharpsl_pm.o corgi_pm.o
obj-$(CONFIG_PXA_SHARP_Cxx00) += spitz.o corgi_ssp.o corgi_lcd.o sharpsl_pm.o spitz_pm.o
obj-$(CONFIG_MACH_AKITA) += akita-ioexp.o
@ -23,6 +24,7 @@ led-y := leds.o
led-$(CONFIG_ARCH_LUBBOCK) += leds-lubbock.o
led-$(CONFIG_MACH_MAINSTONE) += leds-mainstone.o
led-$(CONFIG_ARCH_PXA_IDP) += leds-idp.o
led-$(CONFIG_MACH_TRIZEPS4) += leds-trizeps4.o
obj-$(CONFIG_LEDS) += $(led-y)

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@ -0,0 +1,134 @@
/*
* linux/arch/arm/mach-pxa/leds-trizeps4.c
*
* Author: Jürgen Schindele
* Created: 20 02, 2006
* Copyright: Jürgen Schindele
*
* This program is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License version 2 as
* published by the Free Software Foundation.
*/
#include <linux/config.h>
#include <linux/init.h>
#include <asm/hardware.h>
#include <asm/system.h>
#include <asm/types.h>
#include <asm/leds.h>
#include <asm/arch/pxa-regs.h>
#include <asm/arch/trizeps4.h>
#include "leds.h"
#define LED_STATE_ENABLED 1
#define LED_STATE_CLAIMED 2
#define SYS_BUSY 0x01
#define HEARTBEAT 0x02
#define BLINK 0x04
static unsigned int led_state;
static unsigned int hw_led_state;
void trizeps4_leds_event(led_event_t evt)
{
unsigned long flags;
local_irq_save(flags);
switch (evt) {
case led_start:
hw_led_state = 0;
pxa_gpio_mode( GPIO_SYS_BUSY_LED | GPIO_OUT); /* LED1 */
pxa_gpio_mode( GPIO_HEARTBEAT_LED | GPIO_OUT); /* LED2 */
led_state = LED_STATE_ENABLED;
break;
case led_stop:
led_state &= ~LED_STATE_ENABLED;
break;
case led_claim:
led_state |= LED_STATE_CLAIMED;
hw_led_state = 0;
break;
case led_release:
led_state &= ~LED_STATE_CLAIMED;
hw_led_state = 0;
break;
#ifdef CONFIG_LEDS_TIMER
case led_timer:
hw_led_state ^= HEARTBEAT;
break;
#endif
#ifdef CONFIG_LEDS_CPU
case led_idle_start:
hw_led_state &= ~SYS_BUSY;
break;
case led_idle_end:
hw_led_state |= SYS_BUSY;
break;
#endif
case led_halted:
break;
case led_green_on:
hw_led_state |= BLINK;
break;
case led_green_off:
hw_led_state &= ~BLINK;
break;
case led_amber_on:
break;
case led_amber_off:
break;
case led_red_on:
break;
case led_red_off:
break;
default:
break;
}
if (led_state & LED_STATE_ENABLED) {
switch (hw_led_state) {
case 0:
GPSR(GPIO_SYS_BUSY_LED) |= GPIO_bit(GPIO_SYS_BUSY_LED);
GPSR(GPIO_HEARTBEAT_LED) |= GPIO_bit(GPIO_HEARTBEAT_LED);
break;
case 1:
GPCR(GPIO_SYS_BUSY_LED) |= GPIO_bit(GPIO_SYS_BUSY_LED);
GPSR(GPIO_HEARTBEAT_LED) |= GPIO_bit(GPIO_HEARTBEAT_LED);
break;
case 2:
GPSR(GPIO_SYS_BUSY_LED) |= GPIO_bit(GPIO_SYS_BUSY_LED);
GPCR(GPIO_HEARTBEAT_LED) |= GPIO_bit(GPIO_HEARTBEAT_LED);
break;
case 3:
GPCR(GPIO_SYS_BUSY_LED) |= GPIO_bit(GPIO_SYS_BUSY_LED);
GPCR(GPIO_HEARTBEAT_LED) |= GPIO_bit(GPIO_HEARTBEAT_LED);
break;
}
}
else {
/* turn all off */
GPSR(GPIO_SYS_BUSY_LED) |= GPIO_bit(GPIO_SYS_BUSY_LED);
GPSR(GPIO_HEARTBEAT_LED) |= GPIO_bit(GPIO_HEARTBEAT_LED);
}
local_irq_restore(flags);
}

View file

@ -24,6 +24,8 @@ pxa_leds_init(void)
leds_event = mainstone_leds_event;
if (machine_is_pxa_idp())
leds_event = idp_leds_event;
if (machine_is_trizeps4())
leds_event = trizeps4_leds_event;
leds_event(led_start);
return 0;

View file

@ -10,3 +10,4 @@
extern void idp_leds_event(led_event_t evt);
extern void lubbock_leds_event(led_event_t evt);
extern void mainstone_leds_event(led_event_t evt);
extern void trizeps4_leds_event(led_event_t evt);

View file

@ -0,0 +1,471 @@
/*
* linux/arch/arm/mach-pxa/trizeps4.c
*
* Support for the Keith und Koep Trizeps4 Module Platform.
*
* Author: Jürgen Schindele
* Created: 20 02, 2006
* Copyright: Jürgen Schindele
*
* This program is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License version 2 as
* published by the Free Software Foundation.
*/
#include <linux/init.h>
#include <linux/kernel.h>
#include <linux/platform_device.h>
#include <linux/sysdev.h>
#include <linux/interrupt.h>
#include <linux/sched.h>
#include <linux/bitops.h>
#include <linux/fb.h>
#include <linux/ioport.h>
#include <linux/delay.h>
#include <linux/serial_8250.h>
#include <linux/mtd/mtd.h>
#include <linux/mtd/partitions.h>
#include <asm/types.h>
#include <asm/setup.h>
#include <asm/memory.h>
#include <asm/mach-types.h>
#include <asm/hardware.h>
#include <asm/irq.h>
#include <asm/sizes.h>
#include <asm/mach/arch.h>
#include <asm/mach/map.h>
#include <asm/mach/irq.h>
#include <asm/mach/flash.h>
#include <asm/arch/pxa-regs.h>
#include <asm/arch/trizeps4.h>
#include <asm/arch/audio.h>
#include <asm/arch/pxafb.h>
#include <asm/arch/mmc.h>
#include <asm/arch/irda.h>
#include <asm/arch/ohci.h>
#include "generic.h"
/********************************************************************************************
* ONBOARD FLASH
********************************************************************************************/
static struct mtd_partition trizeps4_partitions[] = {
{
.name = "Bootloader",
.size = 0x00040000,
.offset = 0,
.mask_flags = MTD_WRITEABLE /* force read-only */
},{
.name = "Kernel",
.size = 0x00400000,
.offset = 0x00040000
},{
.name = "Filesystem",
.size = MTDPART_SIZ_FULL,
.offset = 0x00440000
}
};
static struct flash_platform_data trizeps4_flash_data[] = {
{
.map_name = "cfi_probe",
.parts = trizeps4_partitions,
.nr_parts = ARRAY_SIZE(trizeps4_partitions)
}
};
static struct resource flash_resource = {
.start = PXA_CS0_PHYS,
.end = PXA_CS0_PHYS + SZ_64M - 1,
.flags = IORESOURCE_MEM,
};
static struct platform_device flash_device = {
.name = "pxa2xx-flash",
.id = 0,
.dev = {
.platform_data = &trizeps4_flash_data,
},
.resource = &flash_resource,
.num_resources = 1,
};
/********************************************************************************************
* DAVICOM DM9000 Ethernet
********************************************************************************************/
static struct resource dm9000_resources[] = {
[0] = {
.start = TRIZEPS4_ETH_PHYS+0x300,
.end = TRIZEPS4_ETH_PHYS+0x400-1,
.flags = IORESOURCE_MEM,
},
[1] = {
.start = TRIZEPS4_ETH_PHYS+0x8300,
.end = TRIZEPS4_ETH_PHYS+0x8400-1,
.flags = IORESOURCE_MEM,
},
[2] = {
.start = TRIZEPS4_ETH_IRQ,
.end = TRIZEPS4_ETH_IRQ,
.flags = (IORESOURCE_IRQ | IRQT_RISING),
},
};
static struct platform_device dm9000_device = {
.name = "dm9000",
.id = -1,
.num_resources = ARRAY_SIZE(dm9000_resources),
.resource = dm9000_resources,
};
/********************************************************************************************
* PXA270 serial ports
********************************************************************************************/
static struct plat_serial8250_port tri_serial_ports[] = {
#ifdef CONFIG_SERIAL_PXA
/* this uses the own PXA driver */
{
0,
},
#else
/* this uses the generic 8520 driver */
[0] = {
.membase = (void *)&FFUART,
.irq = IRQ_FFUART,
.flags = UPF_BOOT_AUTOCONF,
.iotype = UPIO_MEM32,
.regshift = 2,
.uartclk = (921600*16),
},
[1] = {
.membase = (void *)&BTUART,
.irq = IRQ_BTUART,
.flags = UPF_BOOT_AUTOCONF,
.iotype = UPIO_MEM32,
.regshift = 2,
.uartclk = (921600*16),
},
{
0,
},
#endif
};
static struct platform_device uart_devices = {
.name = "serial8250",
.id = 0,
.dev = {
.platform_data = tri_serial_ports,
},
.num_resources = 0,
.resource = NULL,
};
/********************************************************************************************
* PXA270 ac97 sound codec
********************************************************************************************/
static struct platform_device ac97_audio_device = {
.name = "pxa2xx-ac97",
.id = -1,
};
static struct platform_device * trizeps4_devices[] __initdata = {
&flash_device,
&uart_devices,
&dm9000_device,
&ac97_audio_device,
};
#ifdef CONFIG_MACH_TRIZEPS4_CONXS
static short trizeps_conxs_bcr;
/* PCCARD power switching supports only 3,3V */
void board_pcmcia_power(int power)
{
if (power) {
/* switch power on, put in reset and enable buffers */
trizeps_conxs_bcr |= power;
trizeps_conxs_bcr |= ConXS_BCR_CF_RESET;
trizeps_conxs_bcr &= ~(ConXS_BCR_CF_BUF_EN);
ConXS_BCR = trizeps_conxs_bcr;
/* wait a little */
udelay(2000);
/* take reset away */
trizeps_conxs_bcr &= ~(ConXS_BCR_CF_RESET);
ConXS_BCR = trizeps_conxs_bcr;
udelay(2000);
} else {
/* put in reset */
trizeps_conxs_bcr |= ConXS_BCR_CF_RESET;
ConXS_BCR = trizeps_conxs_bcr;
udelay(1000);
/* switch power off */
trizeps_conxs_bcr &= ~(0xf);
ConXS_BCR = trizeps_conxs_bcr;
}
pr_debug("%s: o%s 0x%x\n", __FUNCTION__, power ? "n": "ff", trizeps_conxs_bcr);
}
/* backlight power switching for LCD panel */
static void board_backlight_power(int on)
{
if (on) {
trizeps_conxs_bcr |= ConXS_BCR_L_DISP;
} else {
trizeps_conxs_bcr &= ~ConXS_BCR_L_DISP;
}
pr_debug("%s: o%s 0x%x\n", __FUNCTION__, on ? "n" : "ff", trizeps_conxs_bcr);
ConXS_BCR = trizeps_conxs_bcr;
}
/* Powersupply for MMC/SD cardslot */
static void board_mci_power(struct device *dev, unsigned int vdd)
{
struct pxamci_platform_data* p_d = dev->platform_data;
if (( 1 << vdd) & p_d->ocr_mask) {
pr_debug("%s: on\n", __FUNCTION__);
/* FIXME fill in values here */
} else {
pr_debug("%s: off\n", __FUNCTION__);
/* FIXME fill in values here */
}
}
static short trizeps_conxs_ircr;
/* Switch modes and Power for IRDA receiver */
static void board_irda_mode(struct device *dev, int mode)
{
unsigned long flags;
local_irq_save(flags);
if (mode & IR_SIRMODE) {
/* Slow mode */
trizeps_conxs_ircr &= ~ConXS_IRCR_MODE;
} else if (mode & IR_FIRMODE) {
/* Fast mode */
trizeps_conxs_ircr |= ConXS_IRCR_MODE;
}
if (mode & IR_OFF) {
trizeps_conxs_ircr |= ConXS_IRCR_SD;
} else {
trizeps_conxs_ircr &= ~ConXS_IRCR_SD;
}
/* FIXME write values to register */
local_irq_restore(flags);
}
#else
/* for other baseboards define dummies */
void board_pcmcia_power(int power) {;}
#define board_backlight_power NULL
#define board_mci_power NULL
#define board_irda_mode NULL
#endif /* CONFIG_MACH_TRIZEPS4_CONXS */
EXPORT_SYMBOL(board_pcmcia_power);
static int trizeps4_mci_init(struct device *dev, irqreturn_t (*mci_detect_int)(int, void *, struct pt_regs *), void *data)
{
int err;
/* setup GPIO for PXA27x MMC controller */
pxa_gpio_mode(GPIO32_MMCCLK_MD);
pxa_gpio_mode(GPIO112_MMCCMD_MD);
pxa_gpio_mode(GPIO92_MMCDAT0_MD);
pxa_gpio_mode(GPIO109_MMCDAT1_MD);
pxa_gpio_mode(GPIO110_MMCDAT2_MD);
pxa_gpio_mode(GPIO111_MMCDAT3_MD);
pxa_gpio_mode(GPIO_MMC_DET | GPIO_IN);
err = request_irq(TRIZEPS4_MMC_IRQ, mci_detect_int, SA_INTERRUPT | SA_TRIGGER_RISING, "MMC card detect", data);
if (err) {
printk(KERN_ERR "trizeps4_mci_init: MMC/SD: can't request MMC card detect IRQ\n");
return -1;
}
return 0;
}
static void trizeps4_mci_exit(struct device *dev, void *data)
{
free_irq(TRIZEPS4_MMC_IRQ, data);
}
static struct pxamci_platform_data trizeps4_mci_platform_data = {
.ocr_mask = MMC_VDD_32_33|MMC_VDD_33_34,
.init = trizeps4_mci_init,
.exit = trizeps4_mci_exit,
.setpower = board_mci_power,
};
static struct pxaficp_platform_data trizeps4_ficp_platform_data = {
.transceiver_cap = IR_SIRMODE | IR_FIRMODE | IR_OFF,
.transceiver_mode = board_irda_mode,
};
static int trizeps4_ohci_init(struct device *dev)
{
/* setup Port1 GPIO pin. */
pxa_gpio_mode( 88 | GPIO_ALT_FN_1_IN); /* USBHPWR1 */
pxa_gpio_mode( 89 | GPIO_ALT_FN_2_OUT); /* USBHPEN1 */
/* Set the Power Control Polarity Low and Power Sense
Polarity Low to active low. */
UHCHR = (UHCHR | UHCHR_PCPL | UHCHR_PSPL) &
~(UHCHR_SSEP1 | UHCHR_SSEP2 | UHCHR_SSEP3 | UHCHR_SSE);
return 0;
}
static void trizeps4_ohci_exit(struct device *dev)
{
;
}
static struct pxaohci_platform_data trizeps4_ohci_platform_data = {
.port_mode = PMM_PERPORT_MODE,
.init = trizeps4_ohci_init,
.exit = trizeps4_ohci_exit,
};
static struct map_desc trizeps4_io_desc[] __initdata = {
{ /* ConXS CFSR */
.virtual = TRIZEPS4_CFSR_VIRT,
.pfn = __phys_to_pfn(TRIZEPS4_CFSR_PHYS),
.length = 0x00001000,
.type = MT_DEVICE
},
{ /* ConXS BCR */
.virtual = TRIZEPS4_BOCR_VIRT,
.pfn = __phys_to_pfn(TRIZEPS4_BOCR_PHYS),
.length = 0x00001000,
.type = MT_DEVICE
},
{ /* ConXS IRCR */
.virtual = TRIZEPS4_IRCR_VIRT,
.pfn = __phys_to_pfn(TRIZEPS4_IRCR_PHYS),
.length = 0x00001000,
.type = MT_DEVICE
},
{ /* ConXS DCR */
.virtual = TRIZEPS4_DICR_VIRT,
.pfn = __phys_to_pfn(TRIZEPS4_DICR_PHYS),
.length = 0x00001000,
.type = MT_DEVICE
},
{ /* ConXS UPSR */
.virtual = TRIZEPS4_UPSR_VIRT,
.pfn = __phys_to_pfn(TRIZEPS4_UPSR_PHYS),
.length = 0x00001000,
.type = MT_DEVICE
}
};
static struct pxafb_mach_info sharp_lcd __initdata = {
.pixclock = 78000,
.xres = 640,
.yres = 480,
.bpp = 8,
.hsync_len = 4,
.left_margin = 4,
.right_margin = 4,
.vsync_len = 2,
.upper_margin = 0,
.lower_margin = 0,
.sync = FB_SYNC_HOR_HIGH_ACT | FB_SYNC_VERT_HIGH_ACT,
.cmap_greyscale = 0,
.cmap_inverse = 0,
.cmap_static = 0,
.lccr0 = LCCR0_Color | LCCR0_Pas | LCCR0_Dual,
.lccr3 = 0x0340ff02,
.pxafb_backlight_power = board_backlight_power,
};
static void __init trizeps4_fixup(struct machine_desc *desc, struct tag *tags, char **cmdline, struct meminfo *mi)
{
}
static void __init trizeps4_init(void)
{
platform_add_devices(trizeps4_devices, ARRAY_SIZE(trizeps4_devices));
set_pxa_fb_info(&sharp_lcd);
pxa_set_mci_info(&trizeps4_mci_platform_data);
pxa_set_ficp_info(&trizeps4_ficp_platform_data);
pxa_set_ohci_info(&trizeps4_ohci_platform_data);
}
static void __init trizeps4_map_io(void)
{
pxa_map_io();
iotable_init(trizeps4_io_desc, ARRAY_SIZE(trizeps4_io_desc));
/* for DiskOnChip */
pxa_gpio_mode(GPIO15_nCS_1_MD);
/* for off-module PIC on ConXS board */
pxa_gpio_mode(GPIO_PIC | GPIO_IN);
/* UCB1400 irq */
pxa_gpio_mode(GPIO_UCB1400 | GPIO_IN);
/* for DM9000 LAN */
pxa_gpio_mode(GPIO78_nCS_2_MD);
pxa_gpio_mode(GPIO_DM9000 | GPIO_IN);
/* for PCMCIA device */
pxa_gpio_mode(GPIO_PCD | GPIO_IN);
pxa_gpio_mode(GPIO_PRDY | GPIO_IN);
/* for I2C adapter */
pxa_gpio_mode(GPIO117_I2CSCL_MD);
pxa_gpio_mode(GPIO118_I2CSDA_MD);
/* MMC_DET s.o. */
pxa_gpio_mode(GPIO_MMC_DET | GPIO_IN);
/* whats that for ??? */
pxa_gpio_mode(GPIO79_nCS_3_MD);
pxa_gpio_mode( GPIO_SYS_BUSY_LED | GPIO_OUT); /* LED1 */
pxa_gpio_mode( GPIO_HEARTBEAT_LED | GPIO_OUT); /* LED2 */
#ifdef CONFIG_MACH_TRIZEPS4_CONXS
#ifdef CONFIG_IDE_PXA_CF
/* if boot direct from compact flash dont disable power */
trizeps_conxs_bcr = 0x0009;
#else
/* this is the reset value */
trizeps_conxs_bcr = 0x00A0;
#endif
ConXS_BCR = trizeps_conxs_bcr;
#endif
PWER = 0x00000002;
PFER = 0x00000000;
PRER = 0x00000002;
PGSR0 = 0x0158C000;
PGSR1 = 0x00FF0080;
PGSR2 = 0x0001C004;
/* Stop 3.6MHz and drive HIGH to PCMCIA and CS */
PCFR |= PCFR_OPDE;
}
MACHINE_START(TRIZEPS4, "Keith und Koep Trizeps IV module")
/* MAINTAINER("Jürgen Schindele") */
.phys_io = 0x40000000,
.io_pg_offst = (io_p2v(0x40000000) >> 18) & 0xfffc,
.boot_params = TRIZEPS4_SDRAM_BASE + 0x100,
.fixup = trizeps4_fixup,
.init_machine = trizeps4_init,
.map_io = trizeps4_map_io,
.init_irq = pxa_init_irq,
.timer = &pxa_timer,
MACHINE_END

View file

@ -1329,6 +1329,7 @@
#define GPIO84_NSRXD 84 /* NSSP receive */
#define GPIO85_nPCE_1 85 /* Card Enable for Card Space (PXA27x) */
#define GPIO92_MMCDAT0 92 /* MMC DAT0 (PXA27x) */
#define GPIO102_nPCE_1 102 /* PCMCIA (PXA27x) */
#define GPIO109_MMCDAT1 109 /* MMC DAT1 (PXA27x) */
#define GPIO110_MMCDAT2 110 /* MMC DAT2 (PXA27x) */
#define GPIO110_MMCCS0 110 /* MMC Chip Select 0 (PXA27x) */
@ -1471,6 +1472,7 @@
#define GPIO84_NSSP_RX (84 | GPIO_ALT_FN_2_IN)
#define GPIO85_nPCE_1_MD (85 | GPIO_ALT_FN_1_OUT)
#define GPIO92_MMCDAT0_MD (92 | GPIO_ALT_FN_1_OUT)
#define GPIO102_nPCE_1_MD (102 | GPIO_ALT_FN_1_OUT)
#define GPIO104_pSKTSEL_MD (104 | GPIO_ALT_FN_1_OUT)
#define GPIO109_MMCDAT1_MD (109 | GPIO_ALT_FN_1_OUT)
#define GPIO110_MMCDAT2_MD (110 | GPIO_ALT_FN_1_OUT)

View file

@ -0,0 +1,106 @@
/************************************************************************
* Include file for TRIZEPS4 SoM and ConXS eval-board
* Copyright (c) Jürgen Schindele
* 2006
************************************************************************/
/*
* Includes/Defines
*/
#ifndef _TRIPEPS4_H_
#define _TRIPEPS4_H_
/* physical memory regions */
#define TRIZEPS4_FLASH_PHYS (PXA_CS0_PHYS) /* Flash region */
#define TRIZEPS4_DISK_PHYS (PXA_CS1_PHYS) /* Disk On Chip region */
#define TRIZEPS4_ETH_PHYS (PXA_CS2_PHYS) /* Ethernet DM9000 region */
#define TRIZEPS4_PIC_PHYS (PXA_CS3_PHYS) /* Logic chip on ConXS-Board */
#define TRIZEPS4_SDRAM_BASE 0xa0000000 /* SDRAM region */
#define TRIZEPS4_CFSR_PHYS (PXA_CS3_PHYS) /* Logic chip on ConXS-Board CSFR register */
#define TRIZEPS4_BOCR_PHYS (PXA_CS3_PHYS+0x02000000) /* Logic chip on ConXS-Board BOCR register */
#define TRIZEPS4_IRCR_PHYS (PXA_CS3_PHYS+0x02400000) /* Logic chip on ConXS-Board IRCR register*/
#define TRIZEPS4_UPSR_PHYS (PXA_CS3_PHYS+0x02800000) /* Logic chip on ConXS-Board UPSR register*/
#define TRIZEPS4_DICR_PHYS (PXA_CS3_PHYS+0x03800000) /* Logic chip on ConXS-Board DICR register*/
/* virtual memory regions */
#define TRIZEPS4_DISK_VIRT 0xF0000000 /* Disk On Chip region */
#define TRIZEPS4_PIC_VIRT 0xF0100000 /* not used */
#define TRIZEPS4_CFSR_VIRT 0xF0100000
#define TRIZEPS4_BOCR_VIRT 0xF0200000
#define TRIZEPS4_DICR_VIRT 0xF0300000
#define TRIZEPS4_IRCR_VIRT 0xF0400000
#define TRIZEPS4_UPSR_VIRT 0xF0500000
/* size of flash */
#define TRIZEPS4_FLASH_SIZE 0x02000000 /* Flash size 32 MB */
/* Ethernet Controller Davicom DM9000 */
#define GPIO_DM9000 101
#define TRIZEPS4_ETH_IRQ IRQ_GPIO(GPIO_DM9000)
/* UCB1400 audio / TS-controller */
#define GPIO_UCB1400 1
#define TRIZEPS4_UCB1400_IRQ IRQ_GPIO(GPIO_UCB1400)
/* PCMCIA socket Compact Flash */
#define GPIO_PCD 11 /* PCMCIA Card Detect */
#define TRIZEPS4_CD_IRQ IRQ_GPIO(GPIO_PCD)
#define GPIO_PRDY 13 /* READY / nINT */
#define TRIZEPS4_READY_NINT IRQ_GPIO(GPIO_PRDY)
/* MMC socket */
#define GPIO_MMC_DET 12
#define TRIZEPS4_MMC_IRQ IRQ_GPIO(GPIO_MMC_DET)
/* LEDS using tx2 / rx2 */
#define GPIO_SYS_BUSY_LED 46
#define GPIO_HEARTBEAT_LED 47
/* Off-module PIC on ConXS board */
#define GPIO_PIC 0
#define TRIZEPS4_PIC_IRQ IRQ_GPIO(GPIO_PIC)
#define CFSR_P2V(x) ((x) - TRIZEPS4_CFSR_PHYS + TRIZEPS4_CFSR_VIRT)
#define CFSR_V2P(x) ((x) - TRIZEPS4_CFSR_VIRT + TRIZEPS4_CFSR_PHYS)
#define BCR_P2V(x) ((x) - TRIZEPS4_BOCR_PHYS + TRIZEPS4_BOCR_VIRT)
#define BCR_V2P(x) ((x) - TRIZEPS4_BOCR_VIRT + TRIZEPS4_BOCR_PHYS)
#define DCR_P2V(x) ((x) - TRIZEPS4_DICR_PHYS + TRIZEPS4_DICR_VIRT)
#define DCR_V2P(x) ((x) - TRIZEPS4_DICR_VIRT + TRIZEPS4_DICR_PHYS)
#ifndef __ASSEMBLY__
#define ConXS_CFSR (*((volatile unsigned short *)CFSR_P2V(0x0C000000)))
#define ConXS_BCR (*((volatile unsigned short *)BCR_P2V(0x0E000000)))
#define ConXS_DCR (*((volatile unsigned short *)DCR_P2V(0x0F800000)))
#else
#define ConXS_CFSR CFSR_P2V(0x0C000000)
#define ConXS_BCR BCR_P2V(0x0E000000)
#define ConXS_DCR DCR_P2V(0x0F800000)
#endif
#define ConXS_CFSR_BVD_MASK 0x0003
#define ConXS_CFSR_BVD1 (1 << 0)
#define ConXS_CFSR_BVD2 (1 << 1)
#define ConXS_CFSR_VS_MASK 0x000C
#define ConXS_CFSR_VS1 (1 << 2)
#define ConXS_CFSR_VS2 (1 << 3)
#define ConXS_CFSR_VS_5V (0x3 << 2)
#define ConXS_CFSR_VS_3V3 0x0
#define ConXS_BCR_S0_POW_EN0 (1 << 0)
#define ConXS_BCR_S0_POW_EN1 (1 << 1)
#define ConXS_BCR_L_DISP (1 << 4)
#define ConXS_BCR_CF_BUF_EN (1 << 5)
#define ConXS_BCR_CF_RESET (1 << 7)
#define ConXS_BCR_S0_VCC_3V3 0x1
#define ConXS_BCR_S0_VCC_5V0 0x2
#define ConXS_BCR_S0_VPP_12V 0x4
#define ConXS_BCR_S0_VPP_3V3 0x8
#define ConXS_IRCR_MODE (1 << 0)
#define ConXS_IRCR_SD (1 << 1)
#endif /* _TRIPEPS4_H_ */