Merge branch 'v6.9-armsoc/dtsfixes' of git://git.kernel.org/pub/scm/linux/kernel/git/mmind/linux-rockchip into for-next

* 'v6.9-armsoc/dtsfixes' of git://git.kernel.org/pub/scm/linux/kernel/git/mmind/linux-rockchip:
  arm64: dts: rockchip: Fix USB interface compatible string on kobol-helios64
  arm64: dts: rockchip: regulator for sd needs to be always on for BPI-R2Pro
  dt-bindings: rockchip: grf: Add missing type to 'pcie-phy' node
  arm64: dts: rockchip: drop redundant disable-gpios in Lubancat 2
  arm64: dts: rockchip: drop redundant disable-gpios in Lubancat 1
  arm64: dts: rockchip: drop redundant pcie-reset-suspend in Scarlet Dumo
  arm64: dts: rockchip: mark system power controller and fix typo on orangepi-5-plus
  arm64: dts: rockchip: Designate the system power controller on QuartzPro64
  arm64: dts: rockchip: drop panel port unit address in GRU Scarlet
  arm64: dts: rockchip: Remove unsupported node from the Pinebook Pro dts
  arm64: dts: rockchip: Fix the i2c address of es8316 on Cool Pi CM5
  arm64: dts: rockchip: add regulators for PCIe on RK3399 Puma Haikou
  arm64: dts: rockchip: enable internal pull-up on PCIE_WAKE# for RK3399 Puma
  arm64: dts: rockchip: enable internal pull-up on Q7_USB_ID for RK3399 Puma
  arm64: dts: rockchip: fix alphabetical ordering RK3399 puma
  arm64: dts: rockchip: enable internal pull-up for Q7_THRM# on RK3399 Puma
  arm64: dts: rockchip: set PHY address of MT7531 switch to 0x1f

Link: https://lore.kernel.org/r/3413596.CbtlEUcBR6@phil
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
This commit is contained in:
Arnd Bergmann 2024-04-26 17:58:52 +02:00
commit 32a1eaa986
No known key found for this signature in database
GPG key ID: 60AB47FFC9095227
12 changed files with 61 additions and 17 deletions

View file

@ -171,6 +171,7 @@ allOf:
unevaluatedProperties: false
pcie-phy:
type: object
description:
Documentation/devicetree/bindings/phy/rockchip-pcie-phy.txt

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@ -663,7 +663,7 @@ mipi_in_panel: endpoint {
port@1 {
reg = <1>;
mipi1_in_panel: endpoint@1 {
mipi1_in_panel: endpoint {
remote-endpoint = <&mipi1_out_panel>;
};
};
@ -689,7 +689,6 @@ &pcie0 {
ep-gpios = <&gpio0 3 GPIO_ACTIVE_HIGH>;
/* PERST# asserted in S3 */
pcie-reset-suspend = <1>;
vpcie3v3-supply = <&wlan_3v3>;
vpcie1v8-supply = <&pp1800_pcie>;

View file

@ -611,7 +611,7 @@ device@4 {
#size-cells = <0>;
interface@0 { /* interface 0 of configuration 1 */
compatible = "usbbda,8156.config1.0";
compatible = "usbifbda,8156.config1.0";
reg = <0 1>;
};
};

View file

@ -779,7 +779,6 @@ &pcie_phy {
};
&pcie0 {
bus-scan-delay-ms = <1000>;
ep-gpios = <&gpio2 RK_PD4 GPIO_ACTIVE_HIGH>;
num-lanes = <4>;
pinctrl-names = "default";

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@ -194,6 +194,8 @@ &pcie0 {
num-lanes = <4>;
pinctrl-names = "default";
pinctrl-0 = <&pcie_clkreqn_cpm>;
vpcie3v3-supply = <&vcc3v3_baseboard>;
vpcie12v-supply = <&dc_12v>;
status = "okay";
};

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@ -79,6 +79,26 @@ vcc5v0_sys: vcc5v0-sys {
regulator-max-microvolt = <5000000>;
};
vcca_0v9: vcca-0v9-regulator {
compatible = "regulator-fixed";
regulator-name = "vcca_0v9";
regulator-always-on;
regulator-boot-on;
regulator-min-microvolt = <900000>;
regulator-max-microvolt = <900000>;
vin-supply = <&vcc_1v8>;
};
vcca_1v8: vcca-1v8-regulator {
compatible = "regulator-fixed";
regulator-name = "vcca_1v8";
regulator-always-on;
regulator-boot-on;
regulator-min-microvolt = <1800000>;
regulator-max-microvolt = <1800000>;
vin-supply = <&vcc3v3_sys>;
};
vdd_log: vdd-log {
compatible = "pwm-regulator";
pwms = <&pwm2 0 25000 1>;
@ -416,16 +436,28 @@ &io_domains {
gpio1830-supply = <&vcc_1v8>;
};
&pmu_io_domains {
status = "okay";
pmu1830-supply = <&vcc_1v8>;
&pcie0 {
/* PCIe PHY supplies */
vpcie0v9-supply = <&vcca_0v9>;
vpcie1v8-supply = <&vcca_1v8>;
};
&pwm2 {
status = "okay";
&pcie_clkreqn_cpm {
rockchip,pins =
<2 RK_PD2 RK_FUNC_GPIO &pcfg_pull_up>;
};
&pinctrl {
pinctrl-names = "default";
pinctrl-0 = <&q7_thermal_pin>;
gpios {
q7_thermal_pin: q7-thermal-pin {
rockchip,pins =
<0 RK_PA3 RK_FUNC_GPIO &pcfg_pull_up>;
};
};
i2c8 {
i2c8_xfer_a: i2c8-xfer {
rockchip,pins =
@ -458,11 +490,20 @@ vcc5v0_host_en: vcc5v0-host-en {
usb3 {
usb3_id: usb3-id {
rockchip,pins =
<1 RK_PC2 RK_FUNC_GPIO &pcfg_pull_none>;
<1 RK_PC2 RK_FUNC_GPIO &pcfg_pull_up>;
};
};
};
&pmu_io_domains {
status = "okay";
pmu1830-supply = <&vcc_1v8>;
};
&pwm2 {
status = "okay";
};
&sdhci {
/*
* Signal integrity isn't great at 200MHz but 100MHz has proven stable

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@ -447,7 +447,6 @@ rgmii_phy1: phy@0 {
&pcie2x1 {
reset-gpios = <&gpio0 RK_PB6 GPIO_ACTIVE_HIGH>;
disable-gpios = <&gpio0 RK_PA6 GPIO_ACTIVE_HIGH>;
vpcie3v3-supply = <&vcc3v3_pcie>;
status = "okay";
};

View file

@ -416,6 +416,8 @@ regulator-state-mem {
vccio_sd: LDO_REG5 {
regulator-name = "vccio_sd";
regulator-always-on;
regulator-boot-on;
regulator-min-microvolt = <1800000>;
regulator-max-microvolt = <3300000>;
@ -525,9 +527,9 @@ &mdio0 {
#address-cells = <1>;
#size-cells = <0>;
switch@0 {
switch@1f {
compatible = "mediatek,mt7531";
reg = <0>;
reg = <0x1f>;
ports {
#address-cells = <1>;

View file

@ -523,7 +523,6 @@ &pcie3x2 {
&pcie2x1 {
reset-gpios = <&gpio3 RK_PC1 GPIO_ACTIVE_HIGH>;
disable-gpios = <&gpio3 RK_PC2 GPIO_ACTIVE_HIGH>;
vpcie3v3-supply = <&vcc3v3_mini_pcie>;
status = "okay";
};

View file

@ -216,9 +216,9 @@ &i2c7 {
pinctrl-0 = <&i2c7m0_xfer>;
status = "okay";
es8316: audio-codec@11 {
es8316: audio-codec@10 {
compatible = "everest,es8316";
reg = <0x11>;
reg = <0x10>;
assigned-clocks = <&cru I2S0_8CH_MCLKOUT>;
assigned-clock-rates = <12288000>;
clocks = <&cru I2S0_8CH_MCLKOUT>;

View file

@ -485,6 +485,7 @@ pmic@0 {
pinctrl-0 = <&pmic_pins>, <&rk806_dvs1_null>,
<&rk806_dvs2_null>, <&rk806_dvs3_null>;
spi-max-frequency = <1000000>;
system-power-controller;
vcc1-supply = <&vcc5v0_sys>;
vcc2-supply = <&vcc5v0_sys>;
@ -506,7 +507,7 @@ pmic@0 {
#gpio-cells = <2>;
rk806_dvs1_null: dvs1-null-pins {
pins = "gpio_pwrctrl2";
pins = "gpio_pwrctrl1";
function = "pin_fun0";
};

View file

@ -456,6 +456,7 @@ pmic@0 {
<&rk806_dvs2_null>, <&rk806_dvs3_null>;
pinctrl-names = "default";
spi-max-frequency = <1000000>;
system-power-controller;
vcc1-supply = <&vcc4v0_sys>;
vcc2-supply = <&vcc4v0_sys>;