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ARM: dts: tegra20: Update Memory Controller node to the new binding
Device tree binding of Memory Controller has been changed: GART has been squashed into the MC, there are a new mandatory clock and #iommu-cells properties, the compatible has been changed to 'tegra20-mc-gart'. Signed-off-by: Dmitry Osipenko <digetx@gmail.com> Acked-by: Thierry Reding <treding@nvidia.com> Signed-off-by: Joerg Roedel <jroedel@suse.de>
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1 changed files with 6 additions and 9 deletions
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@ -616,17 +616,14 @@ pmc@7000e400 {
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};
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mc: memory-controller@7000f000 {
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compatible = "nvidia,tegra20-mc";
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reg = <0x7000f000 0x024
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0x7000f03c 0x3c4>;
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compatible = "nvidia,tegra20-mc-gart";
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reg = <0x7000f000 0x400 /* controller registers */
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0x58000000 0x02000000>; /* GART aperture */
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clocks = <&tegra_car TEGRA20_CLK_MC>;
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clock-names = "mc";
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interrupts = <GIC_SPI 77 IRQ_TYPE_LEVEL_HIGH>;
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#reset-cells = <1>;
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};
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iommu@7000f024 {
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compatible = "nvidia,tegra20-gart";
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reg = <0x7000f024 0x00000018 /* controller registers */
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0x58000000 0x02000000>; /* GART aperture */
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#iommu-cells = <0>;
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};
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memory-controller@7000f400 {
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