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clk: sunxi: Fix sun8i-a23-apb0-clk divider flags
The APB0 clock on A23 is a zero-based divider, not a power-of-two based
divider.
Note that this patch does not apply cleanly to kernels before 4.5-rc1,
which added CLK_OF_DECLARE support to this driver.
Fixes: 57a1fbf284
("clk: sunxi: Add A23 APB0 divider clock support")
Signed-off-by: Chen-Yu Tsai <wens@csie.org>
Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com>
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@ -36,7 +36,7 @@ static struct clk *sun8i_a23_apb0_register(struct device_node *node,
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/* The A23 APB0 clock is a standard 2 bit wide divider clock */
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clk = clk_register_divider(NULL, clk_name, clk_parent, 0, reg,
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0, 2, CLK_DIVIDER_POWER_OF_TWO, NULL);
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0, 2, 0, NULL);
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if (IS_ERR(clk))
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return clk;
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