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spi: davinci: remove non-useful "clk_internal" platform data

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The "clk_internal" platform data member which contols the
CLKMOD bit in Global Control Register 1 is not useful
since CLKMOD needs be set to 1 *always* to ensure master
mode operation.

Remove this platform data.

Signed-off-by: Brian Niebuhr <bniebuhr@efjohnson.com>
Tested-By: Michael Williamson <michael.williamson@criticallink.com>
Signed-off-by: Sekhar Nori <nsekhar@ti.com>
This commit is contained in:
Brian Niebuhr 2010-10-06 18:13:31 +05:30 committed by Sekhar Nori
parent 87467bd905
commit 3409e408ab
4 changed files with 1 additions and 11 deletions
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1
arch/arm/mach-davinci/dm355.c
View file

@ -412,7 +412,6 @@ static struct resource dm355_spi0_resources[] = {
static struct davinci_spi_platform_data dm355_spi0_pdata = {
.version = SPI_VERSION_1,
.num_chipselect = 2,
.clk_internal = 1,
.cshold_bug = true,
};
static struct platform_device dm355_spi0_device = {

1
arch/arm/mach-davinci/dm365.c
View file

@ -625,7 +625,6 @@ static u64 dm365_spi0_dma_mask = DMA_BIT_MASK(32);
static struct davinci_spi_platform_data dm365_spi0_pdata = {
.version = SPI_VERSION_1,
.num_chipselect = 2,
.clk_internal = 1,
};
static struct resource dm365_spi0_resources[] = {

1
arch/arm/mach-davinci/include/mach/spi.h
View file

@ -29,7 +29,6 @@ enum {
struct davinci_spi_platform_data {
u8 version;
u8 num_chipselect;
u8 clk_internal;
u8 intr_line;
u8 *chip_sel;
bool cshold_bug;

9
drivers/spi/davinci_spi.c
View file

@ -927,14 +927,6 @@ static int davinci_spi_probe(struct platform_device *pdev)
}
}
/* Clock internal */
if (davinci_spi->pdata->clk_internal)
set_io_bits(davinci_spi->base + SPIGCR1,
SPIGCR1_CLKMOD_MASK);
else
clear_io_bits(davinci_spi->base + SPIGCR1,
SPIGCR1_CLKMOD_MASK);
if (pdata->intr_line)
iowrite32(SPI_INTLVL_1, davinci_spi->base + SPILVL);
else
@ -943,6 +935,7 @@ static int davinci_spi_probe(struct platform_device *pdev)
iowrite32(CS_DEFAULT, davinci_spi->base + SPIDEF);
/* master mode default */
set_io_bits(davinci_spi->base + SPIGCR1, SPIGCR1_CLKMOD_MASK);
set_io_bits(davinci_spi->base + SPIGCR1, SPIGCR1_MASTER_MASK);
ret = spi_bitbang_start(&davinci_spi->bitbang);