mirror of
https://git.kernel.org/pub/scm/linux/kernel/git/stable/linux.git
synced 2024-09-12 13:55:32 +00:00
Merge branch 'linus' into perf/urgent, to pick up the upstream merged bits
Signed-off-by: Ingo Molnar <mingo@kernel.org>
This commit is contained in:
commit
3459f0d78f
1941 changed files with 75348 additions and 59348 deletions
|
@ -55,12 +55,12 @@ Description: Interface for making ib_srp connect to a new target.
|
|||
only safe with partial memory descriptor list support enabled
|
||||
(allow_ext_sg=1).
|
||||
* comp_vector, a number in the range 0..n-1 specifying the
|
||||
MSI-X completion vector. Some HCA's allocate multiple (n)
|
||||
MSI-X vectors per HCA port. If the IRQ affinity masks of
|
||||
these interrupts have been configured such that each MSI-X
|
||||
interrupt is handled by a different CPU then the comp_vector
|
||||
parameter can be used to spread the SRP completion workload
|
||||
over multiple CPU's.
|
||||
MSI-X completion vector of the first RDMA channel. Some
|
||||
HCA's allocate multiple (n) MSI-X vectors per HCA port. If
|
||||
the IRQ affinity masks of these interrupts have been
|
||||
configured such that each MSI-X interrupt is handled by a
|
||||
different CPU then the comp_vector parameter can be used to
|
||||
spread the SRP completion workload over multiple CPU's.
|
||||
* tl_retry_count, a number in the range 2..7 specifying the
|
||||
IB RC retry count.
|
||||
* queue_size, the maximum number of commands that the
|
||||
|
@ -88,6 +88,13 @@ Description: Whether ib_srp is allowed to include a partial memory
|
|||
descriptor list in an SRP_CMD when communicating with an SRP
|
||||
target.
|
||||
|
||||
What: /sys/class/scsi_host/host<n>/ch_count
|
||||
Date: April 1, 2015
|
||||
KernelVersion: 3.19
|
||||
Contact: linux-rdma@vger.kernel.org
|
||||
Description: Number of RDMA channels used for communication with the SRP
|
||||
target.
|
||||
|
||||
What: /sys/class/scsi_host/host<n>/cmd_sg_entries
|
||||
Date: May 19, 2011
|
||||
KernelVersion: 2.6.39
|
||||
|
@ -95,6 +102,12 @@ Contact: linux-rdma@vger.kernel.org
|
|||
Description: Maximum number of data buffer descriptors that may be sent to
|
||||
the target in a single SRP_CMD request.
|
||||
|
||||
What: /sys/class/scsi_host/host<n>/comp_vector
|
||||
Date: September 2, 2013
|
||||
KernelVersion: 3.11
|
||||
Contact: linux-rdma@vger.kernel.org
|
||||
Description: Completion vector used for the first RDMA channel.
|
||||
|
||||
What: /sys/class/scsi_host/host<n>/dgid
|
||||
Date: June 17, 2006
|
||||
KernelVersion: 2.6.17
|
||||
|
|
|
@ -36,7 +36,7 @@ o How can the updater tell when a grace period has completed
|
|||
executed in user mode, or executed in the idle loop, we can
|
||||
safely free up that item.
|
||||
|
||||
Preemptible variants of RCU (CONFIG_TREE_PREEMPT_RCU) get the
|
||||
Preemptible variants of RCU (CONFIG_PREEMPT_RCU) get the
|
||||
same effect, but require that the readers manipulate CPU-local
|
||||
counters. These counters allow limited types of blocking within
|
||||
RCU read-side critical sections. SRCU also uses CPU-local
|
||||
|
@ -81,7 +81,7 @@ o I hear that RCU is patented? What is with that?
|
|||
o I hear that RCU needs work in order to support realtime kernels?
|
||||
|
||||
This work is largely completed. Realtime-friendly RCU can be
|
||||
enabled via the CONFIG_TREE_PREEMPT_RCU kernel configuration
|
||||
enabled via the CONFIG_PREEMPT_RCU kernel configuration
|
||||
parameter. However, work is in progress for enabling priority
|
||||
boosting of preempted RCU read-side critical sections. This is
|
||||
needed if you have CPU-bound realtime threads.
|
||||
|
|
|
@ -26,12 +26,6 @@ CONFIG_RCU_CPU_STALL_TIMEOUT
|
|||
Stall-warning messages may be enabled and disabled completely via
|
||||
/sys/module/rcupdate/parameters/rcu_cpu_stall_suppress.
|
||||
|
||||
CONFIG_RCU_CPU_STALL_VERBOSE
|
||||
|
||||
This kernel configuration parameter causes the stall warning to
|
||||
also dump the stacks of any tasks that are blocking the current
|
||||
RCU-preempt grace period.
|
||||
|
||||
CONFIG_RCU_CPU_STALL_INFO
|
||||
|
||||
This kernel configuration parameter causes the stall warning to
|
||||
|
@ -77,7 +71,7 @@ This message indicates that CPU 5 detected that it was causing a stall,
|
|||
and that the stall was affecting RCU-sched. This message will normally be
|
||||
followed by a stack dump of the offending CPU. On TREE_RCU kernel builds,
|
||||
RCU and RCU-sched are implemented by the same underlying mechanism,
|
||||
while on TREE_PREEMPT_RCU kernel builds, RCU is instead implemented
|
||||
while on PREEMPT_RCU kernel builds, RCU is instead implemented
|
||||
by rcu_preempt_state.
|
||||
|
||||
On the other hand, if the offending CPU fails to print out a stall-warning
|
||||
|
@ -89,7 +83,7 @@ INFO: rcu_bh_state detected stalls on CPUs/tasks: { 3 5 } (detected by 2, 2502 j
|
|||
This message indicates that CPU 2 detected that CPUs 3 and 5 were both
|
||||
causing stalls, and that the stall was affecting RCU-bh. This message
|
||||
will normally be followed by stack dumps for each CPU. Please note that
|
||||
TREE_PREEMPT_RCU builds can be stalled by tasks as well as by CPUs,
|
||||
PREEMPT_RCU builds can be stalled by tasks as well as by CPUs,
|
||||
and that the tasks will be indicated by PID, for example, "P3421".
|
||||
It is even possible for a rcu_preempt_state stall to be caused by both
|
||||
CPUs -and- tasks, in which case the offending CPUs and tasks will all
|
||||
|
@ -205,10 +199,10 @@ o A CPU-bound real-time task in a CONFIG_PREEMPT kernel, which might
|
|||
o A CPU-bound real-time task in a CONFIG_PREEMPT_RT kernel that
|
||||
is running at a higher priority than the RCU softirq threads.
|
||||
This will prevent RCU callbacks from ever being invoked,
|
||||
and in a CONFIG_TREE_PREEMPT_RCU kernel will further prevent
|
||||
and in a CONFIG_PREEMPT_RCU kernel will further prevent
|
||||
RCU grace periods from ever completing. Either way, the
|
||||
system will eventually run out of memory and hang. In the
|
||||
CONFIG_TREE_PREEMPT_RCU case, you might see stall-warning
|
||||
CONFIG_PREEMPT_RCU case, you might see stall-warning
|
||||
messages.
|
||||
|
||||
o A hardware or software issue shuts off the scheduler-clock
|
||||
|
|
|
@ -8,7 +8,7 @@ The following sections describe the debugfs files and formats, first
|
|||
for rcutree and next for rcutiny.
|
||||
|
||||
|
||||
CONFIG_TREE_RCU and CONFIG_TREE_PREEMPT_RCU debugfs Files and Formats
|
||||
CONFIG_TREE_RCU and CONFIG_PREEMPT_RCU debugfs Files and Formats
|
||||
|
||||
These implementations of RCU provide several debugfs directories under the
|
||||
top-level directory "rcu":
|
||||
|
@ -18,7 +18,7 @@ rcu/rcu_preempt
|
|||
rcu/rcu_sched
|
||||
|
||||
Each directory contains files for the corresponding flavor of RCU.
|
||||
Note that rcu/rcu_preempt is only present for CONFIG_TREE_PREEMPT_RCU.
|
||||
Note that rcu/rcu_preempt is only present for CONFIG_PREEMPT_RCU.
|
||||
For CONFIG_TREE_RCU, the RCU flavor maps onto the RCU-sched flavor,
|
||||
so that activity for both appears in rcu/rcu_sched.
|
||||
|
||||
|
|
|
@ -137,7 +137,7 @@ rcu_read_lock()
|
|||
Used by a reader to inform the reclaimer that the reader is
|
||||
entering an RCU read-side critical section. It is illegal
|
||||
to block while in an RCU read-side critical section, though
|
||||
kernels built with CONFIG_TREE_PREEMPT_RCU can preempt RCU
|
||||
kernels built with CONFIG_PREEMPT_RCU can preempt RCU
|
||||
read-side critical sections. Any RCU-protected data structure
|
||||
accessed during an RCU read-side critical section is guaranteed to
|
||||
remain unreclaimed for the full duration of that critical section.
|
||||
|
|
|
@ -7,32 +7,14 @@ world, which changes the way some things have to be initialized. This makes
|
|||
a need to provide an interface for such platforms to specify available firmware
|
||||
operations and call them when needed.
|
||||
|
||||
Firmware operations can be specified using struct firmware_ops
|
||||
|
||||
struct firmware_ops {
|
||||
/*
|
||||
* Enters CPU idle mode
|
||||
*/
|
||||
int (*do_idle)(void);
|
||||
/*
|
||||
* Sets boot address of specified physical CPU
|
||||
*/
|
||||
int (*set_cpu_boot_addr)(int cpu, unsigned long boot_addr);
|
||||
/*
|
||||
* Boots specified physical CPU
|
||||
*/
|
||||
int (*cpu_boot)(int cpu);
|
||||
/*
|
||||
* Initializes L2 cache
|
||||
*/
|
||||
int (*l2x0_init)(void);
|
||||
};
|
||||
|
||||
and then registered with register_firmware_ops function
|
||||
Firmware operations can be specified by filling in a struct firmware_ops
|
||||
with appropriate callbacks and then registering it with register_firmware_ops()
|
||||
function.
|
||||
|
||||
void register_firmware_ops(const struct firmware_ops *ops)
|
||||
|
||||
the ops pointer must be non-NULL.
|
||||
The ops pointer must be non-NULL. More information about struct firmware_ops
|
||||
and its members can be found in arch/arm/include/asm/firmware.h header.
|
||||
|
||||
There is a default, empty set of operations provided, so there is no need to
|
||||
set anything if platform does not require firmware operations.
|
||||
|
|
|
@ -37,16 +37,26 @@ SunXi family
|
|||
http://dl.linux-sunxi.org/A20/A20%20User%20Manual%202013-03-22.pdf
|
||||
|
||||
- Allwinner A23
|
||||
+ Not Supported
|
||||
+ Datasheet
|
||||
http://dl.linux-sunxi.org/A23/A23%20Datasheet%20V1.0%2020130830.pdf
|
||||
+ User Manual
|
||||
http://dl.linux-sunxi.org/A23/A23%20User%20Manual%20V1.0%2020130830.pdf
|
||||
|
||||
* Quad ARM Cortex-A7 based SoCs
|
||||
- Allwinner A31 (sun6i)
|
||||
+ Datasheet
|
||||
http://dl.linux-sunxi.org/A31/A31%20Datasheet%20-%20v1.00%20(2012-12-24).pdf
|
||||
http://dl.linux-sunxi.org/A31/A3x_release_document/A31/IC/A31%20datasheet%20V1.3%2020131106.pdf
|
||||
+ User Manual
|
||||
http://dl.linux-sunxi.org/A31/A3x_release_document/A31/IC/A31%20user%20manual%20V1.1%2020130630.pdf
|
||||
|
||||
- Allwinner A31s (sun6i)
|
||||
+ Not Supported
|
||||
+ Datasheet
|
||||
http://dl.linux-sunxi.org/A31/A3x_release_document/A31s/IC/A31s%20datasheet%20V1.3%2020131106.pdf
|
||||
+ User Manual
|
||||
http://dl.linux-sunxi.org/A31/A3x_release_document/A31s/IC/A31s%20User%20Manual%20%20V1.0%2020130322.pdf
|
||||
|
||||
* Quad ARM Cortex-A15, Quad ARM Cortex-A7 based SoCs
|
||||
- Allwinner A80
|
||||
+ Not Supported
|
||||
+ Datasheet
|
||||
http://dl.linux-sunxi.org/A80/A80_Datasheet_Revision_1.0_0404.pdf
|
||||
|
|
45
Documentation/arm64/legacy_instructions.txt
Normal file
45
Documentation/arm64/legacy_instructions.txt
Normal file
|
@ -0,0 +1,45 @@
|
|||
The arm64 port of the Linux kernel provides infrastructure to support
|
||||
emulation of instructions which have been deprecated, or obsoleted in
|
||||
the architecture. The infrastructure code uses undefined instruction
|
||||
hooks to support emulation. Where available it also allows turning on
|
||||
the instruction execution in hardware.
|
||||
|
||||
The emulation mode can be controlled by writing to sysctl nodes
|
||||
(/proc/sys/abi). The following explains the different execution
|
||||
behaviours and the corresponding values of the sysctl nodes -
|
||||
|
||||
* Undef
|
||||
Value: 0
|
||||
Generates undefined instruction abort. Default for instructions that
|
||||
have been obsoleted in the architecture, e.g., SWP
|
||||
|
||||
* Emulate
|
||||
Value: 1
|
||||
Uses software emulation. To aid migration of software, in this mode
|
||||
usage of emulated instruction is traced as well as rate limited
|
||||
warnings are issued. This is the default for deprecated
|
||||
instructions, .e.g., CP15 barriers
|
||||
|
||||
* Hardware Execution
|
||||
Value: 2
|
||||
Although marked as deprecated, some implementations may support the
|
||||
enabling/disabling of hardware support for the execution of these
|
||||
instructions. Using hardware execution generally provides better
|
||||
performance, but at the loss of ability to gather runtime statistics
|
||||
about the use of the deprecated instructions.
|
||||
|
||||
The default mode depends on the status of the instruction in the
|
||||
architecture. Deprecated instructions should default to emulation
|
||||
while obsolete instructions must be undefined by default.
|
||||
|
||||
Supported legacy instructions
|
||||
-----------------------------
|
||||
* SWP{B}
|
||||
Node: /proc/sys/abi/swp
|
||||
Status: Obsolete
|
||||
Default: Undef (0)
|
||||
|
||||
* CP15 Barriers
|
||||
Node: /proc/sys/abi/cp15_barrier
|
||||
Status: Deprecated
|
||||
Default: Emulate (1)
|
|
@ -7,12 +7,13 @@
|
|||
maintainers on how to implement atomic counter, bitops, and spinlock
|
||||
interfaces properly.
|
||||
|
||||
The atomic_t type should be defined as a signed integer.
|
||||
Also, it should be made opaque such that any kind of cast to a normal
|
||||
C integer type will fail. Something like the following should
|
||||
suffice:
|
||||
The atomic_t type should be defined as a signed integer and
|
||||
the atomic_long_t type as a signed long integer. Also, they should
|
||||
be made opaque such that any kind of cast to a normal C integer type
|
||||
will fail. Something like the following should suffice:
|
||||
|
||||
typedef struct { int counter; } atomic_t;
|
||||
typedef struct { long counter; } atomic_long_t;
|
||||
|
||||
Historically, counter has been declared volatile. This is now discouraged.
|
||||
See Documentation/volatile-considered-harmful.txt for the complete rationale.
|
||||
|
@ -37,6 +38,9 @@ initializer is used before runtime. If the initializer is used at runtime, a
|
|||
proper implicit or explicit read memory barrier is needed before reading the
|
||||
value with atomic_read from another thread.
|
||||
|
||||
As with all of the atomic_ interfaces, replace the leading "atomic_"
|
||||
with "atomic_long_" to operate on atomic_long_t.
|
||||
|
||||
The second interface can be used at runtime, as in:
|
||||
|
||||
struct foo { atomic_t counter; };
|
||||
|
|
|
@ -827,10 +827,6 @@ but in the event of any barrier requests in the tag queue we need to ensure
|
|||
that requests are restarted in the order they were queue. This may happen
|
||||
if the driver needs to use blk_queue_invalidate_tags().
|
||||
|
||||
Tagging also defines a new request flag, REQ_QUEUED. This is set whenever
|
||||
a request is currently tagged. You should not use this flag directly,
|
||||
blk_rq_tagged(rq) is the portable way to do so.
|
||||
|
||||
3.3 I/O Submission
|
||||
|
||||
The routine submit_bio() is used to submit a single io. Higher level i/o
|
||||
|
|
|
@ -47,20 +47,26 @@ Message and constructor argument pairs are:
|
|||
'discard_promote_adjustment <value>'
|
||||
|
||||
The sequential threshold indicates the number of contiguous I/Os
|
||||
required before a stream is treated as sequential. The random threshold
|
||||
required before a stream is treated as sequential. Once a stream is
|
||||
considered sequential it will bypass the cache. The random threshold
|
||||
is the number of intervening non-contiguous I/Os that must be seen
|
||||
before the stream is treated as random again.
|
||||
|
||||
The sequential and random thresholds default to 512 and 4 respectively.
|
||||
|
||||
Large, sequential ios are probably better left on the origin device
|
||||
since spindles tend to have good bandwidth. The io_tracker counts
|
||||
contiguous I/Os to try to spot when the io is in one of these sequential
|
||||
modes.
|
||||
Large, sequential I/Os are probably better left on the origin device
|
||||
since spindles tend to have good sequential I/O bandwidth. The
|
||||
io_tracker counts contiguous I/Os to try to spot when the I/O is in one
|
||||
of these sequential modes. But there are use-cases for wanting to
|
||||
promote sequential blocks to the cache (e.g. fast application startup).
|
||||
If sequential threshold is set to 0 the sequential I/O detection is
|
||||
disabled and sequential I/O will no longer implicitly bypass the cache.
|
||||
Setting the random threshold to 0 does _not_ disable the random I/O
|
||||
stream detection.
|
||||
|
||||
Internally the mq policy maintains a promotion threshold variable. If
|
||||
the hit count of a block not in the cache goes above this threshold it
|
||||
gets promoted to the cache. The read, write and discard promote adjustment
|
||||
Internally the mq policy determines a promotion threshold. If the hit
|
||||
count of a block not in the cache goes above this threshold it gets
|
||||
promoted to the cache. The read, write and discard promote adjustment
|
||||
tunables allow you to tweak the promotion threshold by adding a small
|
||||
value based on the io type. They default to 4, 8 and 1 respectively.
|
||||
If you're trying to quickly warm a new cache device you may wish to
|
||||
|
|
|
@ -2,7 +2,9 @@ Amlogic MesonX device tree bindings
|
|||
-------------------------------------------
|
||||
|
||||
Boards with the Amlogic Meson6 SoC shall have the following properties:
|
||||
Required root node property:
|
||||
compatible: "amlogic,meson6"
|
||||
|
||||
Required root node property:
|
||||
|
||||
compatible = "amlogic,meson6";
|
||||
Boards with the Amlogic Meson8 SoC shall have the following properties:
|
||||
Required root node property:
|
||||
compatible: "amlogic,meson8";
|
||||
|
|
|
@ -22,6 +22,14 @@ to deliver its interrupts via SPIs.
|
|||
- always-on : a boolean property. If present, the timer is powered through an
|
||||
always-on power domain, therefore it never loses context.
|
||||
|
||||
** Optional properties:
|
||||
|
||||
- arm,cpu-registers-not-fw-configured : Firmware does not initialize
|
||||
any of the generic timer CPU registers, which contain their
|
||||
architecturally-defined reset values. Only supported for 32-bit
|
||||
systems which follow the ARMv7 architected reset values.
|
||||
|
||||
|
||||
Example:
|
||||
|
||||
timer {
|
||||
|
|
|
@ -92,3 +92,68 @@ Required nodes:
|
|||
- core-module: the root node to the Versatile platforms must have
|
||||
a core-module with regs and the compatible strings
|
||||
"arm,core-module-versatile", "syscon"
|
||||
|
||||
ARM RealView Boards
|
||||
-------------------
|
||||
The RealView boards cover tailored evaluation boards that are used to explore
|
||||
the ARM11 and Cortex A-8 and Cortex A-9 processors.
|
||||
|
||||
Required properties (in root node):
|
||||
/* RealView Emulation Baseboard */
|
||||
compatible = "arm,realview-eb";
|
||||
/* RealView Platform Baseboard for ARM1176JZF-S */
|
||||
compatible = "arm,realview-pb1176";
|
||||
/* RealView Platform Baseboard for ARM11 MPCore */
|
||||
compatible = "arm,realview-pb11mp";
|
||||
/* RealView Platform Baseboard for Cortex A-8 */
|
||||
compatible = "arm,realview-pba8";
|
||||
/* RealView Platform Baseboard Explore for Cortex A-9 */
|
||||
compatible = "arm,realview-pbx";
|
||||
|
||||
Required nodes:
|
||||
|
||||
- soc: some node of the RealView platforms must be the SoC
|
||||
node that contain the SoC-specific devices, withe the compatible
|
||||
string set to one of these tuples:
|
||||
"arm,realview-eb-soc", "simple-bus"
|
||||
"arm,realview-pb1176-soc", "simple-bus"
|
||||
"arm,realview-pb11mp-soc", "simple-bus"
|
||||
"arm,realview-pba8-soc", "simple-bus"
|
||||
"arm,realview-pbx-soc", "simple-bus"
|
||||
|
||||
- syscon: some subnode of the RealView SoC node must be a
|
||||
system controller node pointing to the control registers,
|
||||
with the compatible string set to one of these tuples:
|
||||
"arm,realview-eb-syscon", "syscon"
|
||||
"arm,realview-pb1176-syscon", "syscon"
|
||||
"arm,realview-pb11mp-syscon", "syscon"
|
||||
"arm,realview-pba8-syscon", "syscon"
|
||||
"arm,realview-pbx-syscon", "syscon"
|
||||
|
||||
Required properties for the system controller:
|
||||
- regs: the location and size of the system controller registers,
|
||||
one range of 0x1000 bytes.
|
||||
|
||||
Example:
|
||||
|
||||
/dts-v1/;
|
||||
#include <dt-bindings/interrupt-controller/irq.h>
|
||||
#include "skeleton.dtsi"
|
||||
|
||||
/ {
|
||||
model = "ARM RealView PB1176 with device tree";
|
||||
compatible = "arm,realview-pb1176";
|
||||
|
||||
soc {
|
||||
#address-cells = <1>;
|
||||
#size-cells = <1>;
|
||||
compatible = "arm,realview-pb1176-soc", "simple-bus";
|
||||
ranges;
|
||||
|
||||
syscon: syscon@10000000 {
|
||||
compatible = "arm,realview-syscon", "syscon";
|
||||
reg = <0x10000000 0x1000>;
|
||||
};
|
||||
|
||||
};
|
||||
};
|
||||
|
|
31
Documentation/devicetree/bindings/arm/bcm/cygnus.txt
Normal file
31
Documentation/devicetree/bindings/arm/bcm/cygnus.txt
Normal file
|
@ -0,0 +1,31 @@
|
|||
Broadcom Cygnus device tree bindings
|
||||
------------------------------------
|
||||
|
||||
|
||||
Boards with Cygnus SoCs shall have the following properties:
|
||||
|
||||
Required root node property:
|
||||
|
||||
BCM11300
|
||||
compatible = "brcm,bcm11300", "brcm,cygnus";
|
||||
|
||||
BCM11320
|
||||
compatible = "brcm,bcm11320", "brcm,cygnus";
|
||||
|
||||
BCM11350
|
||||
compatible = "brcm,bcm11350", "brcm,cygnus";
|
||||
|
||||
BCM11360
|
||||
compatible = "brcm,bcm11360", "brcm,cygnus";
|
||||
|
||||
BCM58300
|
||||
compatible = "brcm,bcm58300", "brcm,cygnus";
|
||||
|
||||
BCM58302
|
||||
compatible = "brcm,bcm58302", "brcm,cygnus";
|
||||
|
||||
BCM58303
|
||||
compatible = "brcm,bcm58303", "brcm,cygnus";
|
||||
|
||||
BCM58305
|
||||
compatible = "brcm,bcm58305", "brcm,cygnus";
|
|
@ -227,6 +227,15 @@ nodes to be present and contain the properties described below.
|
|||
# List of phandles to idle state nodes supported
|
||||
by this cpu [3].
|
||||
|
||||
- rockchip,pmu
|
||||
Usage: optional for systems that have an "enable-method"
|
||||
property value of "rockchip,rk3066-smp"
|
||||
While optional, it is the preferred way to get access to
|
||||
the cpu-core power-domains.
|
||||
Value type: <phandle>
|
||||
Definition: Specifies the syscon node controlling the cpu core
|
||||
power domains.
|
||||
|
||||
Example 1 (dual-cluster big.LITTLE system 32-bit):
|
||||
|
||||
cpus {
|
||||
|
|
|
@ -74,3 +74,41 @@ Required root node properties:
|
|||
i.MX6q generic board
|
||||
Required root node properties:
|
||||
- compatible = "fsl,imx6q";
|
||||
|
||||
|
||||
Freescale LS1021A Platform Device Tree Bindings
|
||||
------------------------------------------------
|
||||
|
||||
Required root node compatible properties:
|
||||
- compatible = "fsl,ls1021a";
|
||||
|
||||
Freescale LS1021A SoC-specific Device Tree Bindings
|
||||
-------------------------------------------
|
||||
|
||||
Freescale SCFG
|
||||
SCFG is the supplemental configuration unit, that provides SoC specific
|
||||
configuration and status registers for the chip. Such as getting PEX port
|
||||
status.
|
||||
Required properties:
|
||||
- compatible: should be "fsl,ls1021a-scfg"
|
||||
- reg: should contain base address and length of SCFG memory-mapped registers
|
||||
|
||||
Example:
|
||||
scfg: scfg@1570000 {
|
||||
compatible = "fsl,ls1021a-scfg";
|
||||
reg = <0x0 0x1570000 0x0 0x10000>;
|
||||
};
|
||||
|
||||
Freescale DCFG
|
||||
DCFG is the device configuration unit, that provides general purpose
|
||||
configuration and status for the device. Such as setting the secondary
|
||||
core start address and release the secondary core from holdoff and startup.
|
||||
Required properties:
|
||||
- compatible: should be "fsl,ls1021a-dcfg"
|
||||
- reg : should contain base address and length of DCFG memory-mapped registers
|
||||
|
||||
Example:
|
||||
dcfg: dcfg@1ee0000 {
|
||||
compatible = "fsl,ls1021a-dcfg";
|
||||
reg = <0x0 0x1ee0000 0x0 0x10000>;
|
||||
};
|
||||
|
|
|
@ -17,6 +17,7 @@ Main node required properties:
|
|||
"arm,cortex-a7-gic"
|
||||
"arm,arm11mp-gic"
|
||||
"brcm,brahma-b15-gic"
|
||||
"arm,arm1176jzf-devchip-gic"
|
||||
- interrupt-controller : Identifies the node as an interrupt controller
|
||||
- #interrupt-cells : Specifies the number of cells needed to encode an
|
||||
interrupt source. The type shall be a <u32> and the value shall be 3.
|
||||
|
|
|
@ -106,11 +106,21 @@ Required subnode-properties:
|
|||
- groups: a list of strings describing the group names.
|
||||
- function: a string describing the function used to mux the groups.
|
||||
|
||||
* Reset controller binding
|
||||
|
||||
A reset controller is part of the chip control registers set. The chip control
|
||||
node also provides the reset. The register set is not at the same offset between
|
||||
Berlin SoCs.
|
||||
|
||||
Required property:
|
||||
- #reset-cells: must be set to 2
|
||||
|
||||
Example:
|
||||
|
||||
chip: chip-control@ea0000 {
|
||||
compatible = "marvell,berlin2-chip-ctrl";
|
||||
#clock-cells = <1>;
|
||||
#reset-cells = <2>;
|
||||
reg = <0xea0000 0x400>;
|
||||
clocks = <&refclk>, <&externaldev 0>;
|
||||
clock-names = "refclk", "video_ext0";
|
||||
|
|
|
@ -1,10 +1,14 @@
|
|||
Mediatek MT6589 Platforms Device Tree Bindings
|
||||
MediaTek mt65xx & mt81xx Platforms Device Tree Bindings
|
||||
|
||||
Boards with a SoC of the Mediatek MT6589 shall have the following property:
|
||||
Boards with a MediaTek mt65xx/mt81xx SoC shall have the following property:
|
||||
|
||||
Required root node property:
|
||||
|
||||
compatible: must contain "mediatek,mt6589"
|
||||
compatible: Must contain one of
|
||||
"mediatek,mt6589"
|
||||
"mediatek,mt6592"
|
||||
"mediatek,mt8127"
|
||||
"mediatek,mt8135"
|
||||
|
||||
|
||||
Supported boards:
|
||||
|
@ -12,3 +16,12 @@ Supported boards:
|
|||
- bq Aquaris5 smart phone:
|
||||
Required root node properties:
|
||||
- compatible = "mundoreader,bq-aquaris5", "mediatek,mt6589";
|
||||
- Evaluation board for MT6592:
|
||||
Required root node properties:
|
||||
- compatible = "mediatek,mt6592-evb", "mediatek,mt6592";
|
||||
- MTK mt8127 tablet moose EVB:
|
||||
Required root node properties:
|
||||
- compatible = "mediatek,mt8127-moose", "mediatek,mt8127";
|
||||
- MTK mt8135 tablet EVB:
|
||||
Required root node properties:
|
||||
- compatible = "mediatek,mt8135-evbp1", "mediatek,mt8135";
|
||||
|
|
|
@ -132,6 +132,9 @@ Boards:
|
|||
- AM335X Bone : Low cost community board
|
||||
compatible = "ti,am335x-bone", "ti,am33xx", "ti,omap3"
|
||||
|
||||
- AM335X OrionLXm : Substation Automation Platform
|
||||
compatible = "novatech,am335x-lxm", "ti,am33xx"
|
||||
|
||||
- OMAP5 EVM : Evaluation Module
|
||||
compatible = "ti,omap5-evm", "ti,omap5"
|
||||
|
||||
|
|
|
@ -1,6 +1,10 @@
|
|||
Rockchip platforms device tree bindings
|
||||
---------------------------------------
|
||||
|
||||
- MarsBoard RK3066 board:
|
||||
Required root node properties:
|
||||
- compatible = "haoyu,marsboard-rk3066", "rockchip,rk3066a";
|
||||
|
||||
- bq Curie 2 tablet:
|
||||
Required root node properties:
|
||||
- compatible = "mundoreader,bq-curie2", "rockchip,rk3066a";
|
||||
|
|
|
@ -1,11 +1,20 @@
|
|||
* Samsung's Exynos4210 based SMDKV310 evaluation board
|
||||
|
||||
SMDKV310 evaluation board is based on Samsung's Exynos4210 SoC.
|
||||
* Samsung's Exynos SoC based boards
|
||||
|
||||
Required root node properties:
|
||||
- compatible = should be one or more of the following.
|
||||
(a) "samsung,smdkv310" - for Samsung's SMDKV310 eval board.
|
||||
(b) "samsung,exynos4210" - for boards based on Exynos4210 SoC.
|
||||
- "samsung,monk" - for Exynos3250-based Samsung Simband board.
|
||||
- "samsung,rinato" - for Exynos3250-based Samsung Gear2 board.
|
||||
- "samsung,smdkv310" - for Exynos4210-based Samsung SMDKV310 eval board.
|
||||
- "samsung,trats" - for Exynos4210-based Tizen Reference board.
|
||||
- "samsung,universal_c210" - for Exynos4210-based Samsung board.
|
||||
- "samsung,smdk4412", - for Exynos4412-based Samsung SMDK4412 eval board.
|
||||
- "samsung,trats2" - for Exynos4412-based Tizen Reference board.
|
||||
- "samsung,smdk5250" - for Exynos5250-based Samsung SMDK5250 eval board.
|
||||
- "samsung,xyref5260" - for Exynos5260-based Samsung board.
|
||||
- "samsung,smdk5410" - for Exynos5410-based Samsung SMDK5410 eval board.
|
||||
- "samsung,smdk5420" - for Exynos5420-based Samsung SMDK5420 eval board.
|
||||
- "samsung,sd5v1" - for Exynos5440-based Samsung board.
|
||||
- "samsung,ssdk5440" - for Exynos5440-based Samsung board.
|
||||
|
||||
Optional:
|
||||
- firmware node, specifying presence and type of secure firmware:
|
||||
|
|
|
@ -10,6 +10,12 @@ Required root node property: src
|
|||
|
||||
Boards with the Nomadik SoC include:
|
||||
|
||||
Nomadik NHK-15 board manufactured by ST Microelectronics:
|
||||
|
||||
Required root node property:
|
||||
|
||||
compatible="st,nomadik-nhk-15";
|
||||
|
||||
S8815 "MiniKit" manufactured by Calao Systems:
|
||||
|
||||
Required root node property:
|
||||
|
|
12
Documentation/devicetree/bindings/arm/sunxi.txt
Normal file
12
Documentation/devicetree/bindings/arm/sunxi.txt
Normal file
|
@ -0,0 +1,12 @@
|
|||
Allwinner sunXi Platforms Device Tree Bindings
|
||||
|
||||
Each device tree must specify which Allwinner SoC it uses,
|
||||
using one of the following compatible strings:
|
||||
|
||||
allwinner,sun4i-a10
|
||||
allwinner,sun5i-a10s
|
||||
allwinner,sun5i-a13
|
||||
allwinner,sun6i-a31
|
||||
allwinner,sun7i-a20
|
||||
allwinner,sun8i-a23
|
||||
allwinner,sun9i-a80
|
35
Documentation/devicetree/bindings/arm/ux500/power_domain.txt
Normal file
35
Documentation/devicetree/bindings/arm/ux500/power_domain.txt
Normal file
|
@ -0,0 +1,35 @@
|
|||
* ST-Ericsson UX500 PM Domains
|
||||
|
||||
UX500 supports multiple PM domains which are used to gate power to one or
|
||||
more peripherals on the SOC.
|
||||
|
||||
The implementation of PM domains for UX500 are based upon the generic PM domain
|
||||
and use the corresponding DT bindings.
|
||||
|
||||
==PM domain providers==
|
||||
|
||||
Required properties:
|
||||
- compatible: Must be "stericsson,ux500-pm-domains".
|
||||
- #power-domain-cells : Number of cells in a power domain specifier, must be 1.
|
||||
|
||||
Example:
|
||||
pm_domains: pm_domains0 {
|
||||
compatible = "stericsson,ux500-pm-domains";
|
||||
#power-domain-cells = <1>;
|
||||
};
|
||||
|
||||
==PM domain consumers==
|
||||
|
||||
Required properties:
|
||||
- power-domains: A phandle and PM domain specifier. Below are the list of
|
||||
valid specifiers:
|
||||
|
||||
Index Specifier
|
||||
----- ---------
|
||||
0 DOMAIN_VAPE
|
||||
|
||||
Example:
|
||||
sdi0_per1@80126000 {
|
||||
compatible = "arm,pl18x", "arm,primecell";
|
||||
power-domains = <&pm_domains DOMAIN_VAPE>
|
||||
};
|
|
@ -2,7 +2,11 @@ Broadcom GISB bus Arbiter controller
|
|||
|
||||
Required properties:
|
||||
|
||||
- compatible: should be "brcm,gisb-arb"
|
||||
- compatible:
|
||||
"brcm,gisb-arb" or "brcm,bcm7445-gisb-arb" for 28nm chips
|
||||
"brcm,bcm7435-gisb-arb" for newer 40nm chips
|
||||
"brcm,bcm7400-gisb-arb" for older 40nm chips and all 65nm chips
|
||||
"brcm,bcm7038-gisb-arb" for 130nm chips
|
||||
- reg: specifies the base physical address and size of the registers
|
||||
- interrupt-parent: specifies the phandle to the parent interrupt controller
|
||||
this arbiter gets interrupt line from
|
||||
|
|
|
@ -48,9 +48,12 @@ Required properties:
|
|||
- compatible: Should be set to "marvell,mbus-controller".
|
||||
|
||||
- reg: Device's register space.
|
||||
Two entries are expected (see the examples below):
|
||||
the first one controls the devices decoding window and
|
||||
the second one controls the SDRAM decoding window.
|
||||
Two or three entries are expected (see the examples below):
|
||||
the first one controls the devices decoding window,
|
||||
the second one controls the SDRAM decoding window and
|
||||
the third controls the MBus bridge (only with the
|
||||
marvell,armada370-mbus and marvell,armadaxp-mbus
|
||||
compatible strings)
|
||||
|
||||
Example:
|
||||
|
||||
|
@ -67,7 +70,7 @@ Example:
|
|||
|
||||
mbusc: mbus-controller@20000 {
|
||||
compatible = "marvell,mbus-controller";
|
||||
reg = <0x20000 0x100>, <0x20180 0x20>;
|
||||
reg = <0x20000 0x100>, <0x20180 0x20>, <0x20250 0x8>;
|
||||
};
|
||||
|
||||
/* more children ...*/
|
||||
|
@ -126,7 +129,7 @@ are skipped.
|
|||
|
||||
mbusc: mbus-controller@20000 {
|
||||
compatible = "marvell,mbus-controller";
|
||||
reg = <0x20000 0x100>, <0x20180 0x20>;
|
||||
reg = <0x20000 0x100>, <0x20180 0x20>, <0x20250 0x8>;
|
||||
};
|
||||
|
||||
/* more children ...*/
|
||||
|
@ -170,7 +173,7 @@ Using this macro, the above example would be:
|
|||
|
||||
mbusc: mbus-controller@20000 {
|
||||
compatible = "marvell,mbus-controller";
|
||||
reg = <0x20000 0x100>, <0x20180 0x20>;
|
||||
reg = <0x20000 0x100>, <0x20180 0x20>, <0x20250 0x8>;
|
||||
};
|
||||
|
||||
/* other children */
|
||||
|
@ -266,7 +269,7 @@ See the example below, where a more complete device tree is shown:
|
|||
ranges = <0 MBUS_ID(0xf0, 0x01) 0 0x100000>;
|
||||
|
||||
mbusc: mbus-controller@20000 {
|
||||
reg = <0x20000 0x100>, <0x20180 0x20>;
|
||||
reg = <0x20000 0x100>, <0x20180 0x20>, <0x20250 0x8>;
|
||||
};
|
||||
|
||||
interrupt-controller@20000 {
|
||||
|
|
34
Documentation/devicetree/bindings/clock/bcm-cygnus-clock.txt
Normal file
34
Documentation/devicetree/bindings/clock/bcm-cygnus-clock.txt
Normal file
|
@ -0,0 +1,34 @@
|
|||
Broadcom Cygnus Clocks
|
||||
|
||||
This binding uses the common clock binding:
|
||||
Documentation/devicetree/bindings/clock/clock-bindings.txt
|
||||
|
||||
Currently various "fixed" clocks are declared for peripheral drivers that use
|
||||
the common clock framework to reference their core clocks. Proper support of
|
||||
these clocks will be added later
|
||||
|
||||
Device tree example:
|
||||
|
||||
clocks {
|
||||
#address-cells = <1>;
|
||||
#size-cells = <1>;
|
||||
ranges;
|
||||
|
||||
osc: oscillator {
|
||||
compatible = "fixed-clock";
|
||||
#clock-cells = <1>;
|
||||
clock-frequency = <25000000>;
|
||||
};
|
||||
|
||||
apb_clk: apb_clk {
|
||||
compatible = "fixed-clock";
|
||||
#clock-cells = <0>;
|
||||
clock-frequency = <1000000000>;
|
||||
};
|
||||
|
||||
periph_clk: periph_clk {
|
||||
compatible = "fixed-clock";
|
||||
#clock-cells = <0>;
|
||||
clock-frequency = <500000000>;
|
||||
};
|
||||
};
|
|
@ -5,6 +5,19 @@ Required properties:
|
|||
- reg: Address and length of the register set
|
||||
- #clock-cells: Should be <1>
|
||||
|
||||
Optional properties:
|
||||
- clocks: list of clock identifiers which are external input clocks to the
|
||||
given clock controller. Please refer the next section to find
|
||||
the input clocks for a given controller.
|
||||
- clock-names: list of names of clocks which are exteral input clocks to the
|
||||
given clock controller.
|
||||
|
||||
Input clocks for top clock controller:
|
||||
- sxosc (external crystal oscillator 32KHz, recommended)
|
||||
- fxosc (external crystal oscillator 24MHz, recommended)
|
||||
- audio_ext
|
||||
- enet_ext
|
||||
|
||||
The clock consumer should specify the desired clock by having the clock
|
||||
ID in its "clocks" phandle cell. See include/dt-bindings/clock/vf610-clock.h
|
||||
for the full list of VF610 clock IDs.
|
||||
|
@ -15,6 +28,8 @@ clks: ccm@4006b000 {
|
|||
compatible = "fsl,vf610-ccm";
|
||||
reg = <0x4006b000 0x1000>;
|
||||
#clock-cells = <1>;
|
||||
clocks = <&sxosc>, <&fxosc>;
|
||||
clock-names = "sxosc", "fxosc";
|
||||
};
|
||||
|
||||
uart1: serial@40028000 {
|
||||
|
|
|
@ -25,7 +25,7 @@ Required child node properties:
|
|||
- compatible: It should be either "xlnx,axi-vdma-mm2s-channel" or
|
||||
"xlnx,axi-vdma-s2mm-channel".
|
||||
- interrupts: Should contain per channel VDMA interrupts.
|
||||
- xlnx,data-width: Should contain the stream data width, take values
|
||||
- xlnx,datawidth: Should contain the stream data width, take values
|
||||
{32,64...1024}.
|
||||
|
||||
Optional child node properties:
|
||||
|
|
39
Documentation/devicetree/bindings/hwmon/ltc2978.txt
Normal file
39
Documentation/devicetree/bindings/hwmon/ltc2978.txt
Normal file
|
@ -0,0 +1,39 @@
|
|||
ltc2978
|
||||
|
||||
Required properties:
|
||||
- compatible: should contain one of:
|
||||
* "lltc,ltc2974"
|
||||
* "lltc,ltc2977"
|
||||
* "lltc,ltc2978"
|
||||
* "lltc,ltc3880"
|
||||
* "lltc,ltc3883"
|
||||
* "lltc,ltm4676"
|
||||
- reg: I2C slave address
|
||||
|
||||
Optional properties:
|
||||
- regulators: A node that houses a sub-node for each regulator controlled by
|
||||
the device. Each sub-node is identified using the node's name, with valid
|
||||
values listed below. The content of each sub-node is defined by the
|
||||
standard binding for regulators; see regulator.txt.
|
||||
|
||||
Valid names of regulators depend on number of supplies supported per device:
|
||||
* ltc2974 : vout0 - vout3
|
||||
* ltc2977 : vout0 - vout7
|
||||
* ltc2978 : vout0 - vout7
|
||||
* ltc3880 : vout0 - vout1
|
||||
* ltc3883 : vout0
|
||||
* ltm4676 : vout0 - vout1
|
||||
|
||||
Example:
|
||||
ltc2978@5e {
|
||||
compatible = "lltc,ltc2978";
|
||||
reg = <0x5e>;
|
||||
regulators {
|
||||
vout0 {
|
||||
regulator-name = "FPGA-2.5V";
|
||||
};
|
||||
vout2 {
|
||||
regulator-name = "FPGA-1.5V";
|
||||
};
|
||||
};
|
||||
};
|
|
@ -32,6 +32,7 @@ Optional properties:
|
|||
specified, default value is 0.
|
||||
- samsung,i2c-max-bus-freq: Desired frequency in Hz of the bus. If not
|
||||
specified, the default value in Hz is 100000.
|
||||
- samsung,sysreg-phandle - handle to syscon used to control the system registers
|
||||
|
||||
Example:
|
||||
|
||||
|
|
|
@ -56,6 +56,8 @@ gmt,g751 G751: Digital Temperature Sensor and Thermal Watchdog with Two-Wire In
|
|||
infineon,slb9635tt Infineon SLB9635 (Soft-) I2C TPM (old protocol, max 100khz)
|
||||
infineon,slb9645tt Infineon SLB9645 I2C TPM (new protocol, max 400khz)
|
||||
isl,isl12057 Intersil ISL12057 I2C RTC Chip
|
||||
isil,isl29028 (deprecated, use isl)
|
||||
isl,isl29028 Intersil ISL29028 Ambient Light and Proximity Sensor
|
||||
maxim,ds1050 5 Bit Programmable, Pulse-Width Modulator
|
||||
maxim,max1237 Low-Power, 4-/12-Channel, 2-Wire Serial, 12-Bit ADCs
|
||||
maxim,max6625 9-Bit/12-Bit Temperature Sensors with I²C-Compatible Serial Interface
|
||||
|
|
|
@ -0,0 +1,21 @@
|
|||
Device Tree bindings for MVEBU SDRAM controllers
|
||||
|
||||
The Marvell EBU SoCs all have a SDRAM controller. The SDRAM controller
|
||||
differs from one SoC variant to another, but they also share a number
|
||||
of commonalities.
|
||||
|
||||
For now, this Device Tree binding documentation only documents the
|
||||
Armada XP SDRAM controller.
|
||||
|
||||
Required properties:
|
||||
|
||||
- compatible: for Armada XP, "marvell,armada-xp-sdram-controller"
|
||||
- reg: a resource specifier for the register space, which should
|
||||
include all SDRAM controller registers as per the datasheet.
|
||||
|
||||
Example:
|
||||
|
||||
sdramc@1400 {
|
||||
compatible = "marvell,armada-xp-sdram-controller";
|
||||
reg = <0x1400 0x500>;
|
||||
};
|
|
@ -0,0 +1,36 @@
|
|||
NVIDIA Tegra Memory Controller device tree bindings
|
||||
===================================================
|
||||
|
||||
Required properties:
|
||||
- compatible: Should be "nvidia,tegra<chip>-mc"
|
||||
- reg: Physical base address and length of the controller's registers.
|
||||
- clocks: Must contain an entry for each entry in clock-names.
|
||||
See ../clocks/clock-bindings.txt for details.
|
||||
- clock-names: Must include the following entries:
|
||||
- mc: the module's clock input
|
||||
- interrupts: The interrupt outputs from the controller.
|
||||
- #iommu-cells: Should be 1. The single cell of the IOMMU specifier defines
|
||||
the SWGROUP of the master.
|
||||
|
||||
This device implements an IOMMU that complies with the generic IOMMU binding.
|
||||
See ../iommu/iommu.txt for details.
|
||||
|
||||
Example:
|
||||
--------
|
||||
|
||||
mc: memory-controller@0,70019000 {
|
||||
compatible = "nvidia,tegra124-mc";
|
||||
reg = <0x0 0x70019000 0x0 0x1000>;
|
||||
clocks = <&tegra_car TEGRA124_CLK_MC>;
|
||||
clock-names = "mc";
|
||||
|
||||
interrupts = <GIC_SPI 77 IRQ_TYPE_LEVEL_HIGH>;
|
||||
|
||||
#iommu-cells = <1>;
|
||||
};
|
||||
|
||||
sdhci@0,700b0000 {
|
||||
compatible = "nvidia,tegra124-sdhci";
|
||||
...
|
||||
iommus = <&mc TEGRA_SWGROUP_SDMMC1A>;
|
||||
};
|
51
Documentation/devicetree/bindings/mfd/atmel-hlcdc.txt
Normal file
51
Documentation/devicetree/bindings/mfd/atmel-hlcdc.txt
Normal file
|
@ -0,0 +1,51 @@
|
|||
Device-Tree bindings for Atmel's HLCDC (High LCD Controller) MFD driver
|
||||
|
||||
Required properties:
|
||||
- compatible: value should be one of the following:
|
||||
"atmel,sama5d3-hlcdc"
|
||||
- reg: base address and size of the HLCDC device registers.
|
||||
- clock-names: the name of the 3 clocks requested by the HLCDC device.
|
||||
Should contain "periph_clk", "sys_clk" and "slow_clk".
|
||||
- clocks: should contain the 3 clocks requested by the HLCDC device.
|
||||
- interrupts: should contain the description of the HLCDC interrupt line
|
||||
|
||||
The HLCDC IP exposes two subdevices:
|
||||
- a PWM chip: see ../pwm/atmel-hlcdc-pwm.txt
|
||||
- a Display Controller: see ../drm/atmel-hlcdc-dc.txt
|
||||
|
||||
Example:
|
||||
|
||||
hlcdc: hlcdc@f0030000 {
|
||||
compatible = "atmel,sama5d3-hlcdc";
|
||||
reg = <0xf0030000 0x2000>;
|
||||
clocks = <&lcdc_clk>, <&lcdck>, <&clk32k>;
|
||||
clock-names = "periph_clk","sys_clk", "slow_clk";
|
||||
interrupts = <36 IRQ_TYPE_LEVEL_HIGH 0>;
|
||||
status = "disabled";
|
||||
|
||||
hlcdc-display-controller {
|
||||
compatible = "atmel,hlcdc-display-controller";
|
||||
pinctrl-names = "default";
|
||||
pinctrl-0 = <&pinctrl_lcd_base &pinctrl_lcd_rgb888>;
|
||||
#address-cells = <1>;
|
||||
#size-cells = <0>;
|
||||
|
||||
port@0 {
|
||||
#address-cells = <1>;
|
||||
#size-cells = <0>;
|
||||
reg = <0>;
|
||||
|
||||
hlcdc_panel_output: endpoint@0 {
|
||||
reg = <0>;
|
||||
remote-endpoint = <&panel_input>;
|
||||
};
|
||||
};
|
||||
};
|
||||
|
||||
hlcdc_pwm: hlcdc-pwm {
|
||||
compatible = "atmel,hlcdc-pwm";
|
||||
pinctrl-names = "default";
|
||||
pinctrl-0 = <&pinctrl_lcd_pwm>;
|
||||
#pwm-cells = <3>;
|
||||
};
|
||||
};
|
|
@ -34,6 +34,12 @@ to get matched with their hardware counterparts as follow:
|
|||
-BUCKn : for BUCKs, where n can lie in range 1 to 9.
|
||||
example: BUCK1, BUCK5, BUCK9.
|
||||
|
||||
Regulators which can be turned off during system suspend:
|
||||
-LDOn : 2, 6-8, 10-12, 14-16,
|
||||
-BUCKn : 1-4.
|
||||
Use standard regulator bindings for it ('regulator-off-in-suspend').
|
||||
|
||||
|
||||
Example:
|
||||
|
||||
max77686@09 {
|
||||
|
|
|
@ -27,6 +27,20 @@ Optional properties:
|
|||
|
||||
[*] refer Documentation/devicetree/bindings/regulator/regulator.txt
|
||||
|
||||
- haptic : The MAX77693 haptic device utilises a PWM controlled motor to provide
|
||||
users with tactile feedback. PWM period and duty-cycle are varied in
|
||||
order to provide the approprite level of feedback.
|
||||
|
||||
Required properties:
|
||||
- compatible : Must be "maxim,max77693-hpatic"
|
||||
- haptic-supply : power supply for the haptic motor
|
||||
[*] refer Documentation/devicetree/bindings/regulator/regulator.txt
|
||||
- pwms : phandle to the physical PWM(Pulse Width Modulation) device.
|
||||
PWM properties should be named "pwms". And number of cell is different
|
||||
for each pwm device.
|
||||
To get more informations, please refer to documentaion.
|
||||
[*] refer Documentation/devicetree/bindings/pwm/pwm.txt
|
||||
|
||||
Example:
|
||||
max77693@66 {
|
||||
compatible = "maxim,max77693";
|
||||
|
@ -52,4 +66,11 @@ Example:
|
|||
regulator-boot-on;
|
||||
};
|
||||
};
|
||||
|
||||
haptic {
|
||||
compatible = "maxim,max77693-haptic";
|
||||
haptic-supply = <&haptic_supply>;
|
||||
pwms = <&pwm 0 40000 0>;
|
||||
pwm-names = "haptic";
|
||||
};
|
||||
};
|
||||
|
|
|
@ -1,5 +1,5 @@
|
|||
|
||||
* Samsung S2MPS11, S2MPS14 and S2MPU02 Voltage and Current Regulator
|
||||
* Samsung S2MPS11, S2MPS13, S2MPS14 and S2MPU02 Voltage and Current Regulator
|
||||
|
||||
The Samsung S2MPS11 is a multi-function device which includes voltage and
|
||||
current regulators, RTC, charger controller and other sub-blocks. It is
|
||||
|
@ -7,8 +7,8 @@ interfaced to the host controller using an I2C interface. Each sub-block is
|
|||
addressed by the host system using different I2C slave addresses.
|
||||
|
||||
Required properties:
|
||||
- compatible: Should be "samsung,s2mps11-pmic" or "samsung,s2mps14-pmic"
|
||||
or "samsung,s2mpu02-pmic".
|
||||
- compatible: Should be "samsung,s2mps11-pmic" or "samsung,s2mps13-pmic"
|
||||
or "samsung,s2mps14-pmic" or "samsung,s2mpu02-pmic".
|
||||
- reg: Specifies the I2C slave address of the pmic block. It should be 0x66.
|
||||
|
||||
Optional properties:
|
||||
|
@ -17,8 +17,8 @@ Optional properties:
|
|||
- interrupts: Interrupt specifiers for interrupt sources.
|
||||
|
||||
Optional nodes:
|
||||
- clocks: s2mps11 and s5m8767 provide three(AP/CP/BT) buffered 32.768 KHz
|
||||
outputs, so to register these as clocks with common clock framework
|
||||
- clocks: s2mps11, s2mps13 and s5m8767 provide three(AP/CP/BT) buffered 32.768
|
||||
KHz outputs, so to register these as clocks with common clock framework
|
||||
instantiate a sub-node named "clocks". It uses the common clock binding
|
||||
documented in :
|
||||
[Documentation/devicetree/bindings/clock/clock-bindings.txt]
|
||||
|
@ -30,12 +30,12 @@ Optional nodes:
|
|||
the clock which they consume.
|
||||
Clock ID Devices
|
||||
----------------------------------------------------------
|
||||
32KhzAP 0 S2MPS11, S2MPS14, S5M8767
|
||||
32KhzCP 1 S2MPS11, S5M8767
|
||||
32KhzBT 2 S2MPS11, S2MPS14, S5M8767
|
||||
32KhzAP 0 S2MPS11, S2MPS13, S2MPS14, S5M8767
|
||||
32KhzCP 1 S2MPS11, S2MPS13, S5M8767
|
||||
32KhzBT 2 S2MPS11, S2MPS13, S2MPS14, S5M8767
|
||||
|
||||
- compatible: Should be one of: "samsung,s2mps11-clk", "samsung,s2mps14-clk",
|
||||
"samsung,s5m8767-clk"
|
||||
- compatible: Should be one of: "samsung,s2mps11-clk", "samsung,s2mps13-clk",
|
||||
"samsung,s2mps14-clk", "samsung,s5m8767-clk"
|
||||
|
||||
- regulators: The regulators of s2mps11 that have to be instantiated should be
|
||||
included in a sub-node named 'regulators'. Regulator nodes included in this
|
||||
|
@ -81,12 +81,14 @@ as per the datasheet of s2mps11.
|
|||
- LDOn
|
||||
- valid values for n are:
|
||||
- S2MPS11: 1 to 38
|
||||
- S2MPS13: 1 to 40
|
||||
- S2MPS14: 1 to 25
|
||||
- S2MPU02: 1 to 28
|
||||
- Example: LDO1, LDO2, LDO28
|
||||
- BUCKn
|
||||
- valid values for n are:
|
||||
- S2MPS11: 1 to 10
|
||||
- S2MPS13: 1 to 10
|
||||
- S2MPS14: 1 to 5
|
||||
- S2MPU02: 1 to 7
|
||||
- Example: BUCK1, BUCK2, BUCK9
|
||||
|
|
|
@ -18,6 +18,10 @@ Required Properties:
|
|||
specific extensions.
|
||||
- "samsung,exynos5420-dw-mshc": for controllers with Samsung Exynos5420
|
||||
specific extensions.
|
||||
- "samsung,exynos7-dw-mshc": for controllers with Samsung Exynos7
|
||||
specific extensions.
|
||||
- "samsung,exynos7-dw-mshc-smu": for controllers with Samsung Exynos7
|
||||
specific extensions having an SMU.
|
||||
|
||||
* samsung,dw-mshc-ciu-div: Specifies the divider value for the card interface
|
||||
unit (ciu) clock. This property is applicable only for Exynos5 SoC's and
|
||||
|
|
29
Documentation/devicetree/bindings/mmc/img-dw-mshc.txt
Normal file
29
Documentation/devicetree/bindings/mmc/img-dw-mshc.txt
Normal file
|
@ -0,0 +1,29 @@
|
|||
* Imagination specific extensions to the Synopsys Designware Mobile Storage
|
||||
Host Controller
|
||||
|
||||
The Synopsys designware mobile storage host controller is used to interface
|
||||
a SoC with storage medium such as eMMC or SD/MMC cards. This file documents
|
||||
differences between the core Synopsys dw mshc controller properties described
|
||||
by synopsys-dw-mshc.txt and the properties used by the Imagination specific
|
||||
extensions to the Synopsys Designware Mobile Storage Host Controller.
|
||||
|
||||
Required Properties:
|
||||
|
||||
* compatible: should be
|
||||
- "img,pistachio-dw-mshc": for Pistachio SoCs
|
||||
|
||||
Example:
|
||||
|
||||
mmc@18142000 {
|
||||
compatible = "img,pistachio-dw-mshc";
|
||||
reg = <0x18142000 0x400>;
|
||||
interrupts = <GIC_SHARED 39 IRQ_TYPE_LEVEL_HIGH>;
|
||||
|
||||
clocks = <&system_clk>, <&sdhost_clk>;
|
||||
clock-names = "biu", "ciu";
|
||||
|
||||
fifo-depth = <0x20>;
|
||||
bus-width = <4>;
|
||||
num-slots = <1>;
|
||||
disable-wp;
|
||||
};
|
|
@ -12,6 +12,10 @@ Required properties:
|
|||
* for "marvell,armada-380-sdhci", two register areas. The first one
|
||||
for the SDHCI registers themselves, and the second one for the
|
||||
AXI/Mbus bridge registers of the SDHCI unit.
|
||||
- clocks: Array of clocks required for SDHCI; requires at least one for
|
||||
I/O clock.
|
||||
- clock-names: Array of names corresponding to clocks property; shall be
|
||||
"io" for I/O clock and "core" for optional core clock.
|
||||
|
||||
Optional properties:
|
||||
- mrvl,clk-delay-cycles: Specify a number of cycles to delay for tuning.
|
||||
|
@ -23,6 +27,8 @@ sdhci@d4280800 {
|
|||
reg = <0xd4280800 0x800>;
|
||||
bus-width = <8>;
|
||||
interrupts = <27>;
|
||||
clocks = <&chip CLKID_SDIO1XIN>, <&chip CLKID_SDIO1>;
|
||||
clock-names = "io", "core";
|
||||
non-removable;
|
||||
mrvl,clk-delay-cycles = <31>;
|
||||
};
|
||||
|
@ -32,5 +38,6 @@ sdhci@d8000 {
|
|||
reg = <0xd8000 0x1000>, <0xdc000 0x100>;
|
||||
interrupts = <0 25 0x4>;
|
||||
clocks = <&gateclk 17>;
|
||||
clock-names = "io";
|
||||
mrvl,clk-delay-cycles = <0x1F>;
|
||||
};
|
||||
|
|
62
Documentation/devicetree/bindings/nios2/nios2.txt
Normal file
62
Documentation/devicetree/bindings/nios2/nios2.txt
Normal file
|
@ -0,0 +1,62 @@
|
|||
* Nios II Processor Binding
|
||||
|
||||
This binding specifies what properties available in the device tree
|
||||
representation of a Nios II Processor Core.
|
||||
|
||||
Users can use sopc2dts tool for generating device tree sources (dts) from a
|
||||
Qsys system. See more detail in: http://www.alterawiki.com/wiki/Sopc2dts
|
||||
|
||||
Required properties:
|
||||
|
||||
- compatible: Compatible property value should be "altr,nios2-1.0".
|
||||
- reg: Contains CPU index.
|
||||
- interrupt-controller: Specifies that the node is an interrupt controller
|
||||
- #interrupt-cells: Specifies the number of cells needed to encode an
|
||||
interrupt source, should be 1.
|
||||
- clock-frequency: Contains the clock frequency for CPU, in Hz.
|
||||
- dcache-line-size: Contains data cache line size.
|
||||
- icache-line-size: Contains instruction line size.
|
||||
- dcache-size: Contains data cache size.
|
||||
- icache-size: Contains instruction cache size.
|
||||
- altr,pid-num-bits: Specifies the number of bits to use to represent the process
|
||||
identifier (PID).
|
||||
- altr,tlb-num-ways: Specifies the number of set-associativity ways in the TLB.
|
||||
- altr,tlb-num-entries: Specifies the number of entries in the TLB.
|
||||
- altr,tlb-ptr-sz: Specifies size of TLB pointer.
|
||||
- altr,has-mul: Specifies CPU hardware multipy support, should be 1.
|
||||
- altr,has-mmu: Specifies CPU support MMU support, should be 1.
|
||||
- altr,has-initda: Specifies CPU support initda instruction, should be 1.
|
||||
- altr,reset-addr: Specifies CPU reset address
|
||||
- altr,fast-tlb-miss-addr: Specifies CPU fast TLB miss exception address
|
||||
- altr,exception-addr: Specifies CPU exception address
|
||||
|
||||
Optional properties:
|
||||
- altr,has-div: Specifies CPU hardware divide support
|
||||
- altr,implementation: Nios II core implementation, this should be "fast";
|
||||
|
||||
Example:
|
||||
|
||||
cpu@0x0 {
|
||||
device_type = "cpu";
|
||||
compatible = "altr,nios2-1.0";
|
||||
reg = <0>;
|
||||
interrupt-controller;
|
||||
#interrupt-cells = <1>;
|
||||
clock-frequency = <125000000>;
|
||||
dcache-line-size = <32>;
|
||||
icache-line-size = <32>;
|
||||
dcache-size = <32768>;
|
||||
icache-size = <32768>;
|
||||
altr,implementation = "fast";
|
||||
altr,pid-num-bits = <8>;
|
||||
altr,tlb-num-ways = <16>;
|
||||
altr,tlb-num-entries = <128>;
|
||||
altr,tlb-ptr-sz = <7>;
|
||||
altr,has-div = <1>;
|
||||
altr,has-mul = <1>;
|
||||
altr,reset-addr = <0xc2800000>;
|
||||
altr,fast-tlb-miss-addr = <0xc7fff400>;
|
||||
altr,exception-addr = <0xd0000020>;
|
||||
altr,has-initda = <1>;
|
||||
altr,has-mmu = <1>;
|
||||
};
|
19
Documentation/devicetree/bindings/nios2/timer.txt
Normal file
19
Documentation/devicetree/bindings/nios2/timer.txt
Normal file
|
@ -0,0 +1,19 @@
|
|||
Altera Timer
|
||||
|
||||
Required properties:
|
||||
|
||||
- compatible : should be "altr,timer-1.0"
|
||||
- reg : Specifies base physical address and size of the registers.
|
||||
- interrupt-parent: phandle of the interrupt controller
|
||||
- interrupts : Should contain the timer interrupt number
|
||||
- clock-frequency : The frequency of the clock that drives the counter, in Hz.
|
||||
|
||||
Example:
|
||||
|
||||
timer {
|
||||
compatible = "altr,timer-1.0";
|
||||
reg = <0x00400000 0x00000020>;
|
||||
interrupt-parent = <&cpu>;
|
||||
interrupts = <11>;
|
||||
clock-frequency = <125000000>;
|
||||
};
|
18
Documentation/devicetree/bindings/power/power-controller.txt
Normal file
18
Documentation/devicetree/bindings/power/power-controller.txt
Normal file
|
@ -0,0 +1,18 @@
|
|||
* Generic system power control capability
|
||||
|
||||
Power-management integrated circuits or miscellaneous hardware components are
|
||||
sometimes able to control the system power. The device driver associated with these
|
||||
components might need to define this capability, which tells the kernel that
|
||||
it can be used to switch off the system. The corresponding device must have the
|
||||
standard property "system-power-controller" in its device node. This property
|
||||
marks the device as able to control the system power. In order to test if this
|
||||
property is found programmatically, use the helper function
|
||||
"of_device_is_system_power_controller" from of.h .
|
||||
|
||||
Example:
|
||||
|
||||
act8846: act8846@5 {
|
||||
compatible = "active-semi,act8846";
|
||||
status = "okay";
|
||||
system-power-controller;
|
||||
}
|
|
@ -0,0 +1,23 @@
|
|||
i.mx6 Poweroff Driver
|
||||
|
||||
SNVS_LPCR in SNVS module can power off the whole system by pull
|
||||
PMIC_ON_REQ low if PMIC_ON_REQ is connected with external PMIC.
|
||||
If you don't want to use PMIC_ON_REQ as power on/off control,
|
||||
please set status='disabled' to disable this driver.
|
||||
|
||||
Required Properties:
|
||||
-compatible: "fsl,sec-v4.0-poweroff"
|
||||
-reg: Specifies the physical address of the SNVS_LPCR register
|
||||
|
||||
Example:
|
||||
snvs@020cc000 {
|
||||
compatible = "fsl,sec-v4.0-mon", "simple-bus";
|
||||
#address-cells = <1>;
|
||||
#size-cells = <1>;
|
||||
ranges = <0 0x020cc000 0x4000>;
|
||||
.....
|
||||
snvs_poweroff: snvs-poweroff@38 {
|
||||
compatible = "fsl,sec-v4.0-poweroff";
|
||||
reg = <0x38 0x4>;
|
||||
};
|
||||
}
|
|
@ -5,6 +5,10 @@ Required properties:
|
|||
- compatible: "active-semi,act8846" or "active-semi,act8865"
|
||||
- reg: I2C slave address
|
||||
|
||||
Optional properties:
|
||||
- system-power-controller: Telling whether or not this pmic is controlling
|
||||
the system power. See Documentation/devicetree/bindings/power/power-controller.txt .
|
||||
|
||||
Any standard regulator properties can be used to configure the single regulator.
|
||||
|
||||
The valid names for regulators are:
|
||||
|
|
|
@ -25,6 +25,29 @@ with their hardware counterparts as follow. The valid names are:
|
|||
example: LDO1, LDO2, LDO35.
|
||||
-BUCKn : for BUCKs, where n can lie in range 1 to 10.
|
||||
example: BUCK1, BUCK5, BUCK10.
|
||||
|
||||
The max77802 regulator supports two different operating modes: Normal and Low
|
||||
Power Mode. Some regulators support the modes to be changed at startup or by
|
||||
the consumers during normal operation while others only support to change the
|
||||
mode during system suspend. The standard regulator suspend states binding can
|
||||
be used to configure the regulator operating mode.
|
||||
|
||||
The regulators that support the standard "regulator-initial-mode" property,
|
||||
changing their mode during normal operation are: LDOs 1, 3, 20 and 21.
|
||||
|
||||
The possible values for "regulator-initial-mode" and "regulator-mode" are:
|
||||
1: Normal regulator voltage output mode.
|
||||
3: Low Power which reduces the quiescent current down to only 1uA
|
||||
|
||||
The list of valid modes are defined in the dt-bindings/clock/maxim,max77802.h
|
||||
header and can be included by device tree source files.
|
||||
|
||||
The standard "regulator-mode" property can only be used for regulators that
|
||||
support changing their mode to Low Power Mode during suspend. These regulators
|
||||
are: BUCKs 2-4 and LDOs 1-35. Also, it only takes effect if the regulator has
|
||||
been enabled for the given suspend state using "regulator-on-in-suspend" and
|
||||
has not been disabled for that state using "regulator-off-in-suspend".
|
||||
|
||||
Example:
|
||||
|
||||
max77802@09 {
|
||||
|
@ -36,11 +59,23 @@ Example:
|
|||
#size-cells = <0>;
|
||||
|
||||
regulators {
|
||||
ldo1_reg: LDO1 {
|
||||
regulator-name = "vdd_1v0";
|
||||
regulator-min-microvolt = <1000000>;
|
||||
regulator-max-microvolt = <1000000>;
|
||||
regulator-always-on;
|
||||
regulator-initial-mode = <MAX77802_OPMODE_LP>;
|
||||
};
|
||||
|
||||
ldo11_reg: LDO11 {
|
||||
regulator-name = "vdd_ldo11";
|
||||
regulator-min-microvolt = <1900000>;
|
||||
regulator-max-microvolt = <1900000>;
|
||||
regulator-always-on;
|
||||
regulator-state-mem {
|
||||
regulator-on-in-suspend;
|
||||
regulator-mode = <MAX77802_OPMODE_LP>;
|
||||
};
|
||||
};
|
||||
|
||||
buck1_reg: BUCK1 {
|
||||
|
|
|
@ -19,6 +19,24 @@ Optional properties:
|
|||
design requires. This property describes the total system ramp time
|
||||
required due to the combination of internal ramping of the regulator itself,
|
||||
and board design issues such as trace capacitance and load on the supply.
|
||||
- regulator-state-mem sub-root node for Suspend-to-RAM mode
|
||||
: suspend to memory, the device goes to sleep, but all data stored in memory,
|
||||
only some external interrupt can wake the device.
|
||||
- regulator-state-disk sub-root node for Suspend-to-DISK mode
|
||||
: suspend to disk, this state operates similarly to Suspend-to-RAM,
|
||||
but includes a final step of writing memory contents to disk.
|
||||
- regulator-state-[mem/disk] node has following common properties:
|
||||
- regulator-on-in-suspend: regulator should be on in suspend state.
|
||||
- regulator-off-in-suspend: regulator should be off in suspend state.
|
||||
- regulator-suspend-microvolt: regulator should be set to this voltage
|
||||
in suspend.
|
||||
- regulator-mode: operating mode in the given suspend state.
|
||||
The set of possible operating modes depends on the capabilities of
|
||||
every hardware so the valid modes are documented on each regulator
|
||||
device tree binding document.
|
||||
- regulator-initial-mode: initial operating mode. The set of possible operating
|
||||
modes depends on the capabilities of every hardware so each device binding
|
||||
documentation explains which values the regulator supports.
|
||||
|
||||
Deprecated properties:
|
||||
- regulator-compatible: If a regulator chip contains multiple
|
||||
|
@ -34,6 +52,10 @@ Example:
|
|||
regulator-max-microvolt = <2500000>;
|
||||
regulator-always-on;
|
||||
vin-supply = <&vin>;
|
||||
|
||||
regulator-state-mem {
|
||||
regulator-on-in-suspend;
|
||||
};
|
||||
};
|
||||
|
||||
Regulator Consumers:
|
||||
|
|
|
@ -1,6 +1,7 @@
|
|||
SKY81452 voltage regulator
|
||||
|
||||
Required properties:
|
||||
- regulator node named lout.
|
||||
- any required generic properties defined in regulator.txt
|
||||
|
||||
Optional properties:
|
||||
|
@ -9,8 +10,9 @@ Optional properties:
|
|||
Example:
|
||||
|
||||
regulator {
|
||||
/* generic regulator properties */
|
||||
regulator-name = "touch_en";
|
||||
regulator-min-microvolt = <4500000>;
|
||||
regulator-max-microvolt = <8000000>;
|
||||
lout {
|
||||
regulator-name = "sky81452-lout";
|
||||
regulator-min-microvolt = <4500000>;
|
||||
regulator-max-microvolt = <8000000>;
|
||||
};
|
||||
};
|
||||
|
|
|
@ -0,0 +1,42 @@
|
|||
STMicroelectronics STi family Sysconfig Picophy SoftReset Controller
|
||||
=============================================================================
|
||||
|
||||
This binding describes a reset controller device that is used to enable and
|
||||
disable on-chip PicoPHY USB2 phy(s) using "softreset" control bits found in
|
||||
the STi family SoC system configuration registers.
|
||||
|
||||
The actual action taken when softreset is asserted is hardware dependent.
|
||||
However, when asserted it may not be possible to access the hardware's
|
||||
registers and after an assert/deassert sequence the hardware's previous state
|
||||
may no longer be valid.
|
||||
|
||||
Please refer to Documentation/devicetree/bindings/reset/reset.txt
|
||||
for common reset controller binding usage.
|
||||
|
||||
Required properties:
|
||||
- compatible: Should be "st,stih407-picophyreset"
|
||||
- #reset-cells: 1, see below
|
||||
|
||||
Example:
|
||||
|
||||
picophyreset: picophyreset-controller {
|
||||
compatible = "st,stih407-picophyreset";
|
||||
#reset-cells = <1>;
|
||||
};
|
||||
|
||||
Specifying picophyreset control of devices
|
||||
=======================================
|
||||
|
||||
Device nodes should specify the reset channel required in their "resets"
|
||||
property, containing a phandle to the picophyreset device node and an
|
||||
index specifying which channel to use, as described in
|
||||
Documentation/devicetree/bindings/reset/reset.txt.
|
||||
|
||||
Example:
|
||||
|
||||
usb2_picophy0: usbpicophy@0 {
|
||||
resets = <&picophyreset STIH407_PICOPHY0_RESET>;
|
||||
};
|
||||
|
||||
Macro definitions for the supported reset channels can be found in:
|
||||
include/dt-bindings/reset-controller/stih407-resets.h
|
23
Documentation/devicetree/bindings/rtc/atmel,at91sam9-rtc.txt
Normal file
23
Documentation/devicetree/bindings/rtc/atmel,at91sam9-rtc.txt
Normal file
|
@ -0,0 +1,23 @@
|
|||
Atmel AT91SAM9260 Real Time Timer
|
||||
|
||||
Required properties:
|
||||
- compatible: should be: "atmel,at91sam9260-rtt"
|
||||
- reg: should encode the memory region of the RTT controller
|
||||
- interrupts: rtt alarm/event interrupt
|
||||
- clocks: should contain the 32 KHz slow clk that will drive the RTT block.
|
||||
- atmel,rtt-rtc-time-reg: should encode the GPBR register used to store
|
||||
the time base when the RTT is used as an RTC.
|
||||
The first cell should point to the GPBR node and the second one
|
||||
encode the offset within the GPBR block (or in other words, the
|
||||
GPBR register used to store the time base).
|
||||
|
||||
|
||||
Example:
|
||||
|
||||
rtt@fffffd20 {
|
||||
compatible = "atmel,at91sam9260-rtt";
|
||||
reg = <0xfffffd20 0x10>;
|
||||
interrupts = <1 4 7>;
|
||||
clocks = <&clk32k>;
|
||||
atmel,rtt-rtc-time-reg = <&gpbr 0x0>;
|
||||
};
|
|
@ -1,4 +1,4 @@
|
|||
* Renesas R-Car Multi-Function Timer Pulse Unit 2 (MTU2)
|
||||
* Renesas Multi-Function Timer Pulse Unit 2 (MTU2)
|
||||
|
||||
The MTU2 is a multi-purpose, multi-channel timer/counter with configurable
|
||||
clock inputs and programmable compare match.
|
||||
|
|
|
@ -1,4 +1,4 @@
|
|||
* Renesas R-Car Timer Unit (TMU)
|
||||
* Renesas R-Mobile/R-Car Timer Unit (TMU)
|
||||
|
||||
The TMU is a 32-bit timer/counter with configurable clock inputs and
|
||||
programmable compare match.
|
||||
|
@ -9,6 +9,8 @@ are independent. The TMU hardware supports up to three channels.
|
|||
Required Properties:
|
||||
|
||||
- compatible: must contain one or more of the following:
|
||||
- "renesas,tmu-r8a7740" for the r8a7740 TMU
|
||||
- "renesas,tmu-r8a7778" for the r8a7778 TMU
|
||||
- "renesas,tmu-r8a7779" for the r8a7779 TMU
|
||||
- "renesas,tmu" for any TMU.
|
||||
This is a fallback for the above renesas,tmu-* entries
|
||||
|
|
|
@ -41,6 +41,7 @@ dallas Maxim Integrated Products (formerly Dallas Semiconductor)
|
|||
davicom DAVICOM Semiconductor, Inc.
|
||||
denx Denx Software Engineering
|
||||
digi Digi International Inc.
|
||||
digilent Diglent, Inc.
|
||||
dlg Dialog Semiconductor
|
||||
dlink D-Link Corporation
|
||||
dmo Data Modul AG
|
||||
|
@ -78,6 +79,7 @@ innolux Innolux Corporation
|
|||
intel Intel Corporation
|
||||
intercontrol Inter Control Group
|
||||
isee ISEE 2007 S.L.
|
||||
isil Intersil (deprecated, use isl)
|
||||
isl Intersil
|
||||
karo Ka-Ro electronics GmbH
|
||||
keymile Keymile GmbH
|
||||
|
@ -91,6 +93,7 @@ lltc Linear Technology Corporation
|
|||
marvell Marvell Technology Group Ltd.
|
||||
maxim Maxim Integrated Products
|
||||
mediatek MediaTek Inc.
|
||||
merrii Merrii Technology Co., Ltd.
|
||||
micrel Micrel Inc.
|
||||
microchip Microchip Technology Inc.
|
||||
micron Micron Technology Inc.
|
||||
|
@ -149,6 +152,7 @@ st STMicroelectronics
|
|||
ste ST-Ericsson
|
||||
stericsson ST-Ericsson
|
||||
synology Synology, Inc.
|
||||
tbs TBS Technologies
|
||||
thine THine Electronics, Inc.
|
||||
ti Texas Instruments
|
||||
tlm Trusted Logic Mobility
|
||||
|
|
17
Documentation/devicetree/bindings/w1/omap-hdq.txt
Normal file
17
Documentation/devicetree/bindings/w1/omap-hdq.txt
Normal file
|
@ -0,0 +1,17 @@
|
|||
* OMAP HDQ One wire bus master controller
|
||||
|
||||
Required properties:
|
||||
- compatible : should be "ti,omap3-1w"
|
||||
- reg : Address and length of the register set for the device
|
||||
- interrupts : interrupt line.
|
||||
- ti,hwmods : "hdq1w"
|
||||
|
||||
Example:
|
||||
|
||||
- From omap3.dtsi
|
||||
hdqw1w: 1w@480b2000 {
|
||||
compatible = "ti,omap3-1w";
|
||||
reg = <0x480b2000 0x1000>;
|
||||
interrupts = <58>;
|
||||
ti,hwmods = "hdq1w";
|
||||
};
|
|
@ -53,6 +53,11 @@ Supported chips:
|
|||
http://www.ti.com/product/tmp75
|
||||
http://www.ti.com/product/tmp175
|
||||
http://www.ti.com/product/tmp275
|
||||
* NXP LM75B
|
||||
Prefix: 'lm75b'
|
||||
Addresses scanned: none
|
||||
Datasheet: Publicly available at the NXP website
|
||||
http://www.nxp.com/documents/data_sheet/LM75B.pdf
|
||||
|
||||
Author: Frodo Looijaard <frodol@dds.nl>
|
||||
|
||||
|
|
|
@ -2,6 +2,10 @@ Kernel driver lm95234
|
|||
=====================
|
||||
|
||||
Supported chips:
|
||||
* National Semiconductor / Texas Instruments LM95233
|
||||
Addresses scanned: I2C 0x18, 0x2a, 0x2b
|
||||
Datasheet: Publicly available at the Texas Instruments website
|
||||
http://www.ti.com/product/lm95233
|
||||
* National Semiconductor / Texas Instruments LM95234
|
||||
Addresses scanned: I2C 0x18, 0x4d, 0x4e
|
||||
Datasheet: Publicly available at the Texas Instruments website
|
||||
|
@ -13,11 +17,12 @@ Author: Guenter Roeck <linux@roeck-us.net>
|
|||
Description
|
||||
-----------
|
||||
|
||||
LM95234 is an 11-bit digital temperature sensor with a 2-wire System Management
|
||||
Bus (SMBus) interface and TrueTherm technology that can very accurately monitor
|
||||
the temperature of four remote diodes as well as its own temperature.
|
||||
The four remote diodes can be external devices such as microprocessors,
|
||||
graphics processors or diode-connected 2N3904s. The LM95234's TruTherm
|
||||
LM95233 and LM95234 are 11-bit digital temperature sensors with a 2-wire
|
||||
System Management Bus (SMBus) interface and TrueTherm technology
|
||||
that can very accurately monitor the temperature of two (LM95233)
|
||||
or four (LM95234) remote diodes as well as its own temperature.
|
||||
The remote diodes can be external devices such as microprocessors,
|
||||
graphics processors or diode-connected 2N3904s. The chip's TruTherm
|
||||
beta compensation technology allows sensing of 90 nm or 65 nm process
|
||||
thermal diodes accurately.
|
||||
|
||||
|
|
|
@ -2,10 +2,14 @@ Kernel driver lm95245
|
|||
==================
|
||||
|
||||
Supported chips:
|
||||
* National Semiconductor LM95245
|
||||
* TI LM95235
|
||||
Addresses scanned: I2C 0x18, 0x29, 0x4c
|
||||
Datasheet: Publicly available at the TI website
|
||||
http://www.ti.com/lit/ds/symlink/lm95235.pdf
|
||||
* TI / National Semiconductor LM95245
|
||||
Addresses scanned: I2C 0x18, 0x19, 0x29, 0x4c, 0x4d
|
||||
Datasheet: Publicly available at the National Semiconductor website
|
||||
http://www.national.com/mpf/LM/LM95245.html
|
||||
Datasheet: Publicly available at the TI website
|
||||
http://www.ti.com/lit/ds/symlink/lm95245.pdf
|
||||
|
||||
|
||||
Author: Alexander Stein <alexander.stein@systec-electronic.com>
|
||||
|
@ -13,10 +17,10 @@ Author: Alexander Stein <alexander.stein@systec-electronic.com>
|
|||
Description
|
||||
-----------
|
||||
|
||||
The LM95245 is an 11-bit digital temperature sensor with a 2-wire System
|
||||
LM95235 and LM95245 are 11-bit digital temperature sensors with a 2-wire System
|
||||
Management Bus (SMBus) interface and TruTherm technology that can monitor
|
||||
the temperature of a remote diode as well as its own temperature.
|
||||
The LM95245 can be used to very accurately monitor the temperature of
|
||||
The chips can be used to very accurately monitor the temperature of
|
||||
external devices such as microprocessors.
|
||||
|
||||
All temperature values are given in millidegrees Celsius. Local temperature
|
||||
|
|
|
@ -8,11 +8,15 @@ Kernel driver NCT6775
|
|||
=====================
|
||||
|
||||
Supported chips:
|
||||
* Nuvoton NCT6102D/NCT6104D/NCT6106D
|
||||
Prefix: 'nct6106'
|
||||
Addresses scanned: ISA address retrieved from Super I/O registers
|
||||
Datasheet: Available from the Nuvoton web site
|
||||
* Nuvoton NCT5572D/NCT6771F/NCT6772F/NCT6775F/W83677HG-I
|
||||
Prefix: 'nct6775'
|
||||
Addresses scanned: ISA address retrieved from Super I/O registers
|
||||
Datasheet: Available from Nuvoton upon request
|
||||
* Nuvoton NCT5577D/NCT6776D/NCT6776F
|
||||
* Nuvoton NCT5573D/NCT5577D/NCT6776D/NCT6776F
|
||||
Prefix: 'nct6776'
|
||||
Addresses scanned: ISA address retrieved from Super I/O registers
|
||||
Datasheet: Available from Nuvoton upon request
|
||||
|
@ -20,6 +24,14 @@ Supported chips:
|
|||
Prefix: 'nct6779'
|
||||
Addresses scanned: ISA address retrieved from Super I/O registers
|
||||
Datasheet: Available from Nuvoton upon request
|
||||
* Nuvoton NCT6791D
|
||||
Prefix: 'nct6791'
|
||||
Addresses scanned: ISA address retrieved from Super I/O registers
|
||||
Datasheet: Available from Nuvoton upon request
|
||||
* Nuvoton NCT6792D
|
||||
Prefix: 'nct6792'
|
||||
Addresses scanned: ISA address retrieved from Super I/O registers
|
||||
Datasheet: Available from Nuvoton upon request
|
||||
|
||||
Authors:
|
||||
Guenter Roeck <linux@roeck-us.net>
|
||||
|
|
32
Documentation/hwmon/nct7802
Normal file
32
Documentation/hwmon/nct7802
Normal file
|
@ -0,0 +1,32 @@
|
|||
Kernel driver nct7802
|
||||
=====================
|
||||
|
||||
Supported chips:
|
||||
* Nuvoton NCT7802Y
|
||||
Prefix: 'nct7802'
|
||||
Addresses scanned: I2C 0x28..0x2f
|
||||
Datasheet: Available from Nuvoton web site
|
||||
|
||||
Authors:
|
||||
Guenter Roeck <linux@roeck-us.net>
|
||||
|
||||
Description
|
||||
-----------
|
||||
|
||||
This driver implements support for the Nuvoton NCT7802Y hardware monitoring
|
||||
chip. NCT7802Y supports 6 temperature sensors, 5 voltage sensors, and 3 fan
|
||||
speed sensors.
|
||||
|
||||
The chip also supports intelligent fan speed control. This functionality is
|
||||
not currently supported by the driver.
|
||||
|
||||
Tested Boards and BIOS Versions
|
||||
-------------------------------
|
||||
|
||||
The driver has been reported to work with the following boards and
|
||||
BIOS versions.
|
||||
|
||||
Board BIOS version
|
||||
---------------------------------------------------------------
|
||||
Kontron COMe-bSC2 CHR2E934.001.GGO
|
||||
Kontron COMe-bIP2 CCR2E212
|
|
@ -18,6 +18,10 @@ Supported chips:
|
|||
Prefix: 'tmp432'
|
||||
Addresses scanned: I2C 0x4c, 0x4d
|
||||
Datasheet: http://focus.ti.com/docs/prod/folders/print/tmp432.html
|
||||
* Texas Instruments TMP435
|
||||
Prefix: 'tmp435'
|
||||
Addresses scanned: I2C 0x37, 0x48 - 0x4f
|
||||
Datasheet: http://focus.ti.com/docs/prod/folders/print/tmp435.html
|
||||
|
||||
Authors:
|
||||
Hans de Goede <hdegoede@redhat.com>
|
||||
|
@ -27,8 +31,8 @@ Description
|
|||
-----------
|
||||
|
||||
This driver implements support for Texas Instruments TMP401, TMP411,
|
||||
TMP431, and TMP432 chips. These chips implement one or two remote and
|
||||
one local temperature sensors. Temperature is measured in degrees
|
||||
TMP431, TMP432 and TMP435 chips. These chips implement one or two remote
|
||||
and one local temperature sensors. Temperature is measured in degrees
|
||||
Celsius. Resolution of the remote sensor is 0.0625 degree. Local
|
||||
sensor resolution can be set to 0.5, 0.25, 0.125 or 0.0625 degree (not
|
||||
supported by the driver so far, so using the default resolution of 0.5
|
||||
|
|
|
@ -2940,6 +2940,13 @@ bytes respectively. Such letter suffixes can also be entirely omitted.
|
|||
quiescent states. Units are jiffies, minimum
|
||||
value is one, and maximum value is HZ.
|
||||
|
||||
rcutree.kthread_prio= [KNL,BOOT]
|
||||
Set the SCHED_FIFO priority of the RCU
|
||||
per-CPU kthreads (rcuc/N). This value is also
|
||||
used for the priority of the RCU boost threads
|
||||
(rcub/N). Valid values are 1-99 and the default
|
||||
is 1 (the least-favored priority).
|
||||
|
||||
rcutree.rcu_nocb_leader_stride= [KNL]
|
||||
Set the number of NOCB kthread groups, which
|
||||
defaults to the square root of the number of
|
||||
|
@ -3089,6 +3096,15 @@ bytes respectively. Such letter suffixes can also be entirely omitted.
|
|||
messages. Disable with a value less than or equal
|
||||
to zero.
|
||||
|
||||
rcupdate.rcu_self_test= [KNL]
|
||||
Run the RCU early boot self tests
|
||||
|
||||
rcupdate.rcu_self_test_bh= [KNL]
|
||||
Run the RCU bh early boot self tests
|
||||
|
||||
rcupdate.rcu_self_test_sched= [KNL]
|
||||
Run the RCU sched early boot self tests
|
||||
|
||||
rdinit= [KNL]
|
||||
Format: <full_path>
|
||||
Run specified binary instead of /init from the ramdisk,
|
||||
|
|
166
Documentation/locking/lglock.txt
Normal file
166
Documentation/locking/lglock.txt
Normal file
|
@ -0,0 +1,166 @@
|
|||
lglock - local/global locks for mostly local access patterns
|
||||
------------------------------------------------------------
|
||||
|
||||
Origin: Nick Piggin's VFS scalability series introduced during
|
||||
2.6.35++ [1] [2]
|
||||
Location: kernel/locking/lglock.c
|
||||
include/linux/lglock.h
|
||||
Users: currently only the VFS and stop_machine related code
|
||||
|
||||
Design Goal:
|
||||
------------
|
||||
|
||||
Improve scalability of globally used large data sets that are
|
||||
distributed over all CPUs as per_cpu elements.
|
||||
|
||||
To manage global data structures that are partitioned over all CPUs
|
||||
as per_cpu elements but can be mostly handled by CPU local actions
|
||||
lglock will be used where the majority of accesses are cpu local
|
||||
reading and occasional cpu local writing with very infrequent
|
||||
global write access.
|
||||
|
||||
|
||||
* deal with things locally whenever possible
|
||||
- very fast access to the local per_cpu data
|
||||
- reasonably fast access to specific per_cpu data on a different
|
||||
CPU
|
||||
* while making global action possible when needed
|
||||
- by expensive access to all CPUs locks - effectively
|
||||
resulting in a globally visible critical section.
|
||||
|
||||
Design:
|
||||
-------
|
||||
|
||||
Basically it is an array of per_cpu spinlocks with the
|
||||
lg_local_lock/unlock accessing the local CPUs lock object and the
|
||||
lg_local_lock_cpu/unlock_cpu accessing a remote CPUs lock object
|
||||
the lg_local_lock has to disable preemption as migration protection so
|
||||
that the reference to the local CPUs lock does not go out of scope.
|
||||
Due to the lg_local_lock/unlock only touching cpu-local resources it
|
||||
is fast. Taking the local lock on a different CPU will be more
|
||||
expensive but still relatively cheap.
|
||||
|
||||
One can relax the migration constraints by acquiring the current
|
||||
CPUs lock with lg_local_lock_cpu, remember the cpu, and release that
|
||||
lock at the end of the critical section even if migrated. This should
|
||||
give most of the performance benefits without inhibiting migration
|
||||
though needs careful considerations for nesting of lglocks and
|
||||
consideration of deadlocks with lg_global_lock.
|
||||
|
||||
The lg_global_lock/unlock locks all underlying spinlocks of all
|
||||
possible CPUs (including those off-line). The preemption disable/enable
|
||||
are needed in the non-RT kernels to prevent deadlocks like:
|
||||
|
||||
on cpu 1
|
||||
|
||||
task A task B
|
||||
lg_global_lock
|
||||
got cpu 0 lock
|
||||
<<<< preempt <<<<
|
||||
lg_local_lock_cpu for cpu 0
|
||||
spin on cpu 0 lock
|
||||
|
||||
On -RT this deadlock scenario is resolved by the arch_spin_locks in the
|
||||
lglocks being replaced by rt_mutexes which resolve the above deadlock
|
||||
by boosting the lock-holder.
|
||||
|
||||
|
||||
Implementation:
|
||||
---------------
|
||||
|
||||
The initial lglock implementation from Nick Piggin used some complex
|
||||
macros to generate the lglock/brlock in lglock.h - they were later
|
||||
turned into a set of functions by Andi Kleen [7]. The change to functions
|
||||
was motivated by the presence of multiple lock users and also by them
|
||||
being easier to maintain than the generating macros. This change to
|
||||
functions is also the basis to eliminated the restriction of not
|
||||
being initializeable in kernel modules (the remaining problem is that
|
||||
locks are not explicitly initialized - see lockdep-design.txt)
|
||||
|
||||
Declaration and initialization:
|
||||
-------------------------------
|
||||
|
||||
#include <linux/lglock.h>
|
||||
|
||||
DEFINE_LGLOCK(name)
|
||||
or:
|
||||
DEFINE_STATIC_LGLOCK(name);
|
||||
|
||||
lg_lock_init(&name, "lockdep_name_string");
|
||||
|
||||
on UP this is mapped to DEFINE_SPINLOCK(name) in both cases, note
|
||||
also that as of 3.18-rc6 all declaration in use are of the _STATIC_
|
||||
variant (and it seems that the non-static was never in use).
|
||||
lg_lock_init is initializing the lockdep map only.
|
||||
|
||||
Usage:
|
||||
------
|
||||
|
||||
From the locking semantics it is a spinlock. It could be called a
|
||||
locality aware spinlock. lg_local_* behaves like a per_cpu
|
||||
spinlock and lg_global_* like a global spinlock.
|
||||
No surprises in the API.
|
||||
|
||||
lg_local_lock(*lglock);
|
||||
access to protected per_cpu object on this CPU
|
||||
lg_local_unlock(*lglock);
|
||||
|
||||
lg_local_lock_cpu(*lglock, cpu);
|
||||
access to protected per_cpu object on other CPU cpu
|
||||
lg_local_unlock_cpu(*lglock, cpu);
|
||||
|
||||
lg_global_lock(*lglock);
|
||||
access all protected per_cpu objects on all CPUs
|
||||
lg_global_unlock(*lglock);
|
||||
|
||||
There are no _trylock variants of the lglocks.
|
||||
|
||||
Note that the lg_global_lock/unlock has to iterate over all possible
|
||||
CPUs rather than the actually present CPUs or a CPU could go off-line
|
||||
with a held lock [4] and that makes it very expensive. A discussion on
|
||||
these issues can be found at [5]
|
||||
|
||||
Constraints:
|
||||
------------
|
||||
|
||||
* currently the declaration of lglocks in kernel modules is not
|
||||
possible, though this should be doable with little change.
|
||||
* lglocks are not recursive.
|
||||
* suitable for code that can do most operations on the CPU local
|
||||
data and will very rarely need the global lock
|
||||
* lg_global_lock/unlock is *very* expensive and does not scale
|
||||
* on UP systems all lg_* primitives are simply spinlocks
|
||||
* in PREEMPT_RT the spinlock becomes an rt-mutex and can sleep but
|
||||
does not change the tasks state while sleeping [6].
|
||||
* in PREEMPT_RT the preempt_disable/enable in lg_local_lock/unlock
|
||||
is downgraded to a migrate_disable/enable, the other
|
||||
preempt_disable/enable are downgraded to barriers [6].
|
||||
The deadlock noted for non-RT above is resolved due to rt_mutexes
|
||||
boosting the lock-holder in this case which arch_spin_locks do
|
||||
not do.
|
||||
|
||||
lglocks were designed for very specific problems in the VFS and probably
|
||||
only are the right answer in these corner cases. Any new user that looks
|
||||
at lglocks probably wants to look at the seqlock and RCU alternatives as
|
||||
her first choice. There are also efforts to resolve the RCU issues that
|
||||
currently prevent using RCU in place of view remaining lglocks.
|
||||
|
||||
Note on brlock history:
|
||||
-----------------------
|
||||
|
||||
The 'Big Reader' read-write spinlocks were originally introduced by
|
||||
Ingo Molnar in 2000 (2.4/2.5 kernel series) and removed in 2003. They
|
||||
later were introduced by the VFS scalability patch set in 2.6 series
|
||||
again as the "big reader lock" brlock [2] variant of lglock which has
|
||||
been replaced by seqlock primitives or by RCU based primitives in the
|
||||
3.13 kernel series as was suggested in [3] in 2003. The brlock was
|
||||
entirely removed in the 3.13 kernel series.
|
||||
|
||||
Link: 1 http://lkml.org/lkml/2010/8/2/81
|
||||
Link: 2 http://lwn.net/Articles/401738/
|
||||
Link: 3 http://lkml.org/lkml/2003/3/9/205
|
||||
Link: 4 https://lkml.org/lkml/2011/8/24/185
|
||||
Link: 5 http://lkml.org/lkml/2011/12/18/189
|
||||
Link: 6 https://www.kernel.org/pub/linux/kernel/projects/rt/
|
||||
patch series - lglocks-rt.patch.patch
|
||||
Link: 7 http://lkml.org/lkml/2012/3/5/26
|
|
@ -121,22 +121,22 @@ For example, consider the following sequence of events:
|
|||
The set of accesses as seen by the memory system in the middle can be arranged
|
||||
in 24 different combinations:
|
||||
|
||||
STORE A=3, STORE B=4, x=LOAD A->3, y=LOAD B->4
|
||||
STORE A=3, STORE B=4, y=LOAD B->4, x=LOAD A->3
|
||||
STORE A=3, x=LOAD A->3, STORE B=4, y=LOAD B->4
|
||||
STORE A=3, x=LOAD A->3, y=LOAD B->2, STORE B=4
|
||||
STORE A=3, y=LOAD B->2, STORE B=4, x=LOAD A->3
|
||||
STORE A=3, y=LOAD B->2, x=LOAD A->3, STORE B=4
|
||||
STORE B=4, STORE A=3, x=LOAD A->3, y=LOAD B->4
|
||||
STORE A=3, STORE B=4, y=LOAD A->3, x=LOAD B->4
|
||||
STORE A=3, STORE B=4, x=LOAD B->4, y=LOAD A->3
|
||||
STORE A=3, y=LOAD A->3, STORE B=4, x=LOAD B->4
|
||||
STORE A=3, y=LOAD A->3, x=LOAD B->2, STORE B=4
|
||||
STORE A=3, x=LOAD B->2, STORE B=4, y=LOAD A->3
|
||||
STORE A=3, x=LOAD B->2, y=LOAD A->3, STORE B=4
|
||||
STORE B=4, STORE A=3, y=LOAD A->3, x=LOAD B->4
|
||||
STORE B=4, ...
|
||||
...
|
||||
|
||||
and can thus result in four different combinations of values:
|
||||
|
||||
x == 1, y == 2
|
||||
x == 1, y == 4
|
||||
x == 3, y == 2
|
||||
x == 3, y == 4
|
||||
x == 2, y == 1
|
||||
x == 2, y == 3
|
||||
x == 4, y == 1
|
||||
x == 4, y == 3
|
||||
|
||||
|
||||
Furthermore, the stores committed by a CPU to the memory system may not be
|
||||
|
@ -694,6 +694,24 @@ Please note once again that the stores to 'b' differ. If they were
|
|||
identical, as noted earlier, the compiler could pull this store outside
|
||||
of the 'if' statement.
|
||||
|
||||
You must also be careful not to rely too much on boolean short-circuit
|
||||
evaluation. Consider this example:
|
||||
|
||||
q = ACCESS_ONCE(a);
|
||||
if (a || 1 > 0)
|
||||
ACCESS_ONCE(b) = 1;
|
||||
|
||||
Because the second condition is always true, the compiler can transform
|
||||
this example as following, defeating control dependency:
|
||||
|
||||
q = ACCESS_ONCE(a);
|
||||
ACCESS_ONCE(b) = 1;
|
||||
|
||||
This example underscores the need to ensure that the compiler cannot
|
||||
out-guess your code. More generally, although ACCESS_ONCE() does force
|
||||
the compiler to actually emit code for a given load, it does not force
|
||||
the compiler to use the results.
|
||||
|
||||
Finally, control dependencies do -not- provide transitivity. This is
|
||||
demonstrated by two related examples, with the initial values of
|
||||
x and y both being zero:
|
||||
|
@ -2465,10 +2483,15 @@ functions:
|
|||
Please refer to the PCI specification for more information on interactions
|
||||
between PCI transactions.
|
||||
|
||||
(*) readX_relaxed()
|
||||
(*) readX_relaxed(), writeX_relaxed()
|
||||
|
||||
These are similar to readX(), but are not guaranteed to be ordered in any
|
||||
way. Be aware that there is no I/O read barrier available.
|
||||
These are similar to readX() and writeX(), but provide weaker memory
|
||||
ordering guarantees. Specifically, they do not guarantee ordering with
|
||||
respect to normal memory accesses (e.g. DMA buffers) nor do they guarantee
|
||||
ordering with respect to LOCK or UNLOCK operations. If the latter is
|
||||
required, an mmiowb() barrier can be used. Note that relaxed accesses to
|
||||
the same peripheral are guaranteed to be ordered with respect to each
|
||||
other.
|
||||
|
||||
(*) ioreadX(), iowriteX()
|
||||
|
||||
|
|
|
@ -136,7 +136,7 @@ SOF_TIMESTAMPING_OPT_ID:
|
|||
|
||||
This option is implemented only for transmit timestamps. There, the
|
||||
timestamp is always looped along with a struct sock_extended_err.
|
||||
The option modifies field ee_info to pass an id that is unique
|
||||
The option modifies field ee_data to pass an id that is unique
|
||||
among all possibly concurrently outstanding timestamp requests for
|
||||
that socket. In practice, it is a monotonically increasing u32
|
||||
(that wraps).
|
||||
|
|
23
Documentation/nios2/README
Normal file
23
Documentation/nios2/README
Normal file
|
@ -0,0 +1,23 @@
|
|||
Linux on the Nios II architecture
|
||||
=================================
|
||||
|
||||
This is a port of Linux to Nios II (nios2) processor.
|
||||
|
||||
In order to compile for Nios II, you need a version of GCC with support for the generic
|
||||
system call ABI. Please see this link for more information on how compiling and booting
|
||||
software for the Nios II platform:
|
||||
http://www.rocketboards.org/foswiki/Documentation/NiosIILinuxUserManual
|
||||
|
||||
For reference, please see the following link:
|
||||
http://www.altera.com/literature/lit-nio2.jsp
|
||||
|
||||
What is Nios II?
|
||||
================
|
||||
Nios II is a 32-bit embedded-processor architecture designed specifically for the
|
||||
Altera family of FPGAs. In order to support Linux, Nios II needs to be configured
|
||||
with MMU and hardware multiplier enabled.
|
||||
|
||||
Nios II ABI
|
||||
===========
|
||||
Please refer to chapter "Application Binary Interface" in Nios II Processor Reference
|
||||
Handbook.
|
|
@ -226,9 +226,6 @@ static int register_sas_ha(struct my_sas_ha *my_ha)
|
|||
my_ha->sas_ha.lldd_dev_found = my_dev_found;
|
||||
my_ha->sas_ha.lldd_dev_gone = my_dev_gone;
|
||||
|
||||
my_ha->sas_ha.lldd_max_execute_num = lldd_max_execute_num; (1)
|
||||
|
||||
my_ha->sas_ha.lldd_queue_size = ha_can_queue;
|
||||
my_ha->sas_ha.lldd_execute_task = my_execute_task;
|
||||
|
||||
my_ha->sas_ha.lldd_abort_task = my_abort_task;
|
||||
|
@ -247,28 +244,6 @@ static int register_sas_ha(struct my_sas_ha *my_ha)
|
|||
return sas_register_ha(&my_ha->sas_ha);
|
||||
}
|
||||
|
||||
(1) This is normally a LLDD parameter, something of the
|
||||
lines of a task collector. What it tells the SAS Layer is
|
||||
whether the SAS layer should run in Direct Mode (default:
|
||||
value 0 or 1) or Task Collector Mode (value greater than 1).
|
||||
|
||||
In Direct Mode, the SAS Layer calls Execute Task as soon as
|
||||
it has a command to send to the SDS, _and_ this is a single
|
||||
command, i.e. not linked.
|
||||
|
||||
Some hardware (e.g. aic94xx) has the capability to DMA more
|
||||
than one task at a time (interrupt) from host memory. Task
|
||||
Collector Mode is an optional feature for HAs which support
|
||||
this in their hardware. (Again, it is completely optional
|
||||
even if your hardware supports it.)
|
||||
|
||||
In Task Collector Mode, the SAS Layer would do _natural_
|
||||
coalescing of tasks and at the appropriate moment it would
|
||||
call your driver to DMA more than one task in a single HA
|
||||
interrupt. DMBS may want to use this by insmod/modprobe
|
||||
setting the lldd_max_execute_num to something greater than
|
||||
1.
|
||||
|
||||
(2) SAS 1.1 does not define I_T Nexus Reset TMF.
|
||||
|
||||
Events
|
||||
|
@ -325,71 +300,22 @@ PHYE_SPINUP_HOLD -- SATA is present, COMWAKE not sent.
|
|||
|
||||
The Execute Command SCSI RPC:
|
||||
|
||||
int (*lldd_execute_task)(struct sas_task *, int num,
|
||||
unsigned long gfp_flags);
|
||||
int (*lldd_execute_task)(struct sas_task *, gfp_t gfp_flags);
|
||||
|
||||
Used to queue a task to the SAS LLDD. @task is the tasks to
|
||||
be executed. @num should be the number of tasks being
|
||||
queued at this function call (they are linked listed via
|
||||
task::list), @gfp_mask should be the gfp_mask defining the
|
||||
context of the caller.
|
||||
Used to queue a task to the SAS LLDD. @task is the task to be executed.
|
||||
@gfp_mask is the gfp_mask defining the context of the caller.
|
||||
|
||||
This function should implement the Execute Command SCSI RPC,
|
||||
or if you're sending a SCSI Task as linked commands, you
|
||||
should also use this function.
|
||||
|
||||
That is, when lldd_execute_task() is called, the command(s)
|
||||
That is, when lldd_execute_task() is called, the command
|
||||
go out on the transport *immediately*. There is *no*
|
||||
queuing of any sort and at any level in a SAS LLDD.
|
||||
|
||||
The use of task::list is two-fold, one for linked commands,
|
||||
the other discussed below.
|
||||
|
||||
It is possible to queue up more than one task at a time, by
|
||||
initializing the list element of struct sas_task, and
|
||||
passing the number of tasks enlisted in this manner in num.
|
||||
|
||||
Returns: -SAS_QUEUE_FULL, -ENOMEM, nothing was queued;
|
||||
0, the task(s) were queued.
|
||||
|
||||
If you want to pass num > 1, then either
|
||||
A) you're the only caller of this function and keep track
|
||||
of what you've queued to the LLDD, or
|
||||
B) you know what you're doing and have a strategy of
|
||||
retrying.
|
||||
|
||||
As opposed to queuing one task at a time (function call),
|
||||
batch queuing of tasks, by having num > 1, greatly
|
||||
simplifies LLDD code, sequencer code, and _hardware design_,
|
||||
and has some performance advantages in certain situations
|
||||
(DBMS).
|
||||
|
||||
The LLDD advertises if it can take more than one command at
|
||||
a time at lldd_execute_task(), by setting the
|
||||
lldd_max_execute_num parameter (controlled by "collector"
|
||||
module parameter in aic94xx SAS LLDD).
|
||||
|
||||
You should leave this to the default 1, unless you know what
|
||||
you're doing.
|
||||
|
||||
This is a function of the LLDD, to which the SAS layer can
|
||||
cater to.
|
||||
|
||||
int lldd_queue_size
|
||||
The host adapter's queue size. This is the maximum
|
||||
number of commands the lldd can have pending to domain
|
||||
devices on behalf of all upper layers submitting through
|
||||
lldd_execute_task().
|
||||
|
||||
You really want to set this to something (much) larger than
|
||||
1.
|
||||
|
||||
This _really_ has absolutely nothing to do with queuing.
|
||||
There is no queuing in SAS LLDDs.
|
||||
|
||||
struct sas_task {
|
||||
dev -- the device this task is destined to
|
||||
list -- must be initialized (INIT_LIST_HEAD)
|
||||
task_proto -- _one_ of enum sas_proto
|
||||
scatter -- pointer to scatter gather list array
|
||||
num_scatter -- number of elements in scatter
|
||||
|
|
|
@ -149,7 +149,7 @@ scsi_add_host() ---->
|
|||
scsi_scan_host() -------+
|
||||
|
|
||||
slave_alloc()
|
||||
slave_configure() --> scsi_adjust_queue_depth()
|
||||
slave_configure() --> scsi_change_queue_depth()
|
||||
|
|
||||
slave_alloc()
|
||||
slave_configure()
|
||||
|
@ -159,7 +159,7 @@ scsi_scan_host() -------+
|
|||
------------------------------------------------------------
|
||||
|
||||
If the LLD wants to adjust the default queue settings, it can invoke
|
||||
scsi_adjust_queue_depth() in its slave_configure() routine.
|
||||
scsi_change_queue_depth() in its slave_configure() routine.
|
||||
|
||||
*** For scsi devices that the mid level tries to scan but do not
|
||||
respond, a slave_alloc(), slave_destroy() pair is called.
|
||||
|
@ -203,7 +203,7 @@ LLD mid level LLD
|
|||
scsi_add_device() ------+
|
||||
|
|
||||
slave_alloc()
|
||||
slave_configure() [--> scsi_adjust_queue_depth()]
|
||||
slave_configure() [--> scsi_change_queue_depth()]
|
||||
------------------------------------------------------------
|
||||
|
||||
In a similar fashion, an LLD may become aware that a SCSI device has been
|
||||
|
@ -261,7 +261,7 @@ init_this_scsi_driver() ----+
|
|||
| scsi_register()
|
||||
|
|
||||
slave_alloc()
|
||||
slave_configure() --> scsi_adjust_queue_depth()
|
||||
slave_configure() --> scsi_change_queue_depth()
|
||||
slave_alloc() ***
|
||||
slave_destroy() ***
|
||||
|
|
||||
|
@ -271,9 +271,9 @@ init_this_scsi_driver() ----+
|
|||
slave_destroy() ***
|
||||
------------------------------------------------------------
|
||||
|
||||
The mid level invokes scsi_adjust_queue_depth() with tagged queuing off and
|
||||
"cmd_per_lun" for that host as the queue length. These settings can be
|
||||
overridden by a slave_configure() supplied by the LLD.
|
||||
The mid level invokes scsi_change_queue_depth() with "cmd_per_lun" for that
|
||||
host as the queue length. These settings can be overridden by a
|
||||
slave_configure() supplied by the LLD.
|
||||
|
||||
*** For scsi devices that the mid level tries to scan but do not
|
||||
respond, a slave_alloc(), slave_destroy() pair is called.
|
||||
|
@ -366,13 +366,11 @@ is initialized. The functions below are listed alphabetically and their
|
|||
names all start with "scsi_".
|
||||
|
||||
Summary:
|
||||
scsi_activate_tcq - turn on tag command queueing
|
||||
scsi_add_device - creates new scsi device (lu) instance
|
||||
scsi_add_host - perform sysfs registration and set up transport class
|
||||
scsi_adjust_queue_depth - change the queue depth on a SCSI device
|
||||
scsi_change_queue_depth - change the queue depth on a SCSI device
|
||||
scsi_bios_ptable - return copy of block device's partition table
|
||||
scsi_block_requests - prevent further commands being queued to given host
|
||||
scsi_deactivate_tcq - turn off tag command queueing
|
||||
scsi_host_alloc - return a new scsi_host instance whose refcount==1
|
||||
scsi_host_get - increments Scsi_Host instance's refcount
|
||||
scsi_host_put - decrements Scsi_Host instance's refcount (free if 0)
|
||||
|
@ -389,24 +387,6 @@ Summary:
|
|||
|
||||
Details:
|
||||
|
||||
/**
|
||||
* scsi_activate_tcq - turn on tag command queueing ("ordered" task attribute)
|
||||
* @sdev: device to turn on TCQ for
|
||||
* @depth: queue depth
|
||||
*
|
||||
* Returns nothing
|
||||
*
|
||||
* Might block: no
|
||||
*
|
||||
* Notes: Eventually, it is hoped depth would be the maximum depth
|
||||
* the device could cope with and the real queue depth
|
||||
* would be adjustable from 0 to depth.
|
||||
*
|
||||
* Defined (inline) in: include/scsi/scsi_tcq.h
|
||||
**/
|
||||
void scsi_activate_tcq(struct scsi_device *sdev, int depth)
|
||||
|
||||
|
||||
/**
|
||||
* scsi_add_device - creates new scsi device (lu) instance
|
||||
* @shost: pointer to scsi host instance
|
||||
|
@ -456,11 +436,8 @@ int scsi_add_host(struct Scsi_Host *shost, struct device * dev)
|
|||
|
||||
|
||||
/**
|
||||
* scsi_adjust_queue_depth - allow LLD to change queue depth on a SCSI device
|
||||
* scsi_change_queue_depth - allow LLD to change queue depth on a SCSI device
|
||||
* @sdev: pointer to SCSI device to change queue depth on
|
||||
* @tagged: 0 - no tagged queuing
|
||||
* MSG_SIMPLE_TAG - simple tagged queuing
|
||||
* MSG_ORDERED_TAG - ordered tagged queuing
|
||||
* @tags Number of tags allowed if tagged queuing enabled,
|
||||
* or number of commands the LLD can queue up
|
||||
* in non-tagged mode (as per cmd_per_lun).
|
||||
|
@ -471,15 +448,12 @@ int scsi_add_host(struct Scsi_Host *shost, struct device * dev)
|
|||
*
|
||||
* Notes: Can be invoked any time on a SCSI device controlled by this
|
||||
* LLD. [Specifically during and after slave_configure() and prior to
|
||||
* slave_destroy().] Can safely be invoked from interrupt code. Actual
|
||||
* queue depth change may be delayed until the next command is being
|
||||
* processed. See also scsi_activate_tcq() and scsi_deactivate_tcq().
|
||||
* slave_destroy().] Can safely be invoked from interrupt code.
|
||||
*
|
||||
* Defined in: drivers/scsi/scsi.c [see source code for more notes]
|
||||
*
|
||||
**/
|
||||
void scsi_adjust_queue_depth(struct scsi_device * sdev, int tagged,
|
||||
int tags)
|
||||
int scsi_change_queue_depth(struct scsi_device *sdev, int tags)
|
||||
|
||||
|
||||
/**
|
||||
|
@ -514,20 +488,6 @@ unsigned char *scsi_bios_ptable(struct block_device *dev)
|
|||
void scsi_block_requests(struct Scsi_Host * shost)
|
||||
|
||||
|
||||
/**
|
||||
* scsi_deactivate_tcq - turn off tag command queueing
|
||||
* @sdev: device to turn off TCQ for
|
||||
* @depth: queue depth (stored in sdev)
|
||||
*
|
||||
* Returns nothing
|
||||
*
|
||||
* Might block: no
|
||||
*
|
||||
* Defined (inline) in: include/scsi/scsi_tcq.h
|
||||
**/
|
||||
void scsi_deactivate_tcq(struct scsi_device *sdev, int depth)
|
||||
|
||||
|
||||
/**
|
||||
* scsi_host_alloc - create a scsi host adapter instance and perform basic
|
||||
* initialization.
|
||||
|
@ -1254,7 +1214,7 @@ of interest:
|
|||
for disk firmware uploads.
|
||||
cmd_per_lun - maximum number of commands that can be queued on devices
|
||||
controlled by the host. Overridden by LLD calls to
|
||||
scsi_adjust_queue_depth().
|
||||
scsi_change_queue_depth().
|
||||
unchecked_isa_dma - 1=>only use bottom 16 MB of ram (ISA DMA addressing
|
||||
restriction), 0=>can use full 32 bit (or better) DMA
|
||||
address space
|
||||
|
@ -1294,7 +1254,7 @@ struct scsi_cmnd
|
|||
Instances of this structure convey SCSI commands to the LLD and responses
|
||||
back to the mid level. The SCSI mid level will ensure that no more SCSI
|
||||
commands become queued against the LLD than are indicated by
|
||||
scsi_adjust_queue_depth() (or struct Scsi_Host::cmd_per_lun). There will
|
||||
scsi_change_queue_depth() (or struct Scsi_Host::cmd_per_lun). There will
|
||||
be at least one instance of struct scsi_cmnd available for each SCSI device.
|
||||
Members of interest:
|
||||
cmnd - array containing SCSI command
|
||||
|
|
|
@ -506,9 +506,11 @@ user does not request data that far.)
|
|||
|
||||
DEBUGGING HINTS
|
||||
|
||||
To enable debugging messages, edit st.c and #define DEBUG 1. As seen
|
||||
above, debugging can be switched off with an ioctl if debugging is
|
||||
compiled into the driver. The debugging output is not voluminous.
|
||||
Debugging code is now compiled in by default but debugging is turned off
|
||||
with the kernel module parameter debug_flag defaulting to 0. Debugging
|
||||
can still be switched on and off with an ioctl. To enable debug at
|
||||
module load time add debug_flag=1 to the module load options, the
|
||||
debugging output is not voluminous.
|
||||
|
||||
If the tape seems to hang, I would be very interested to hear where
|
||||
the driver is waiting. With the command 'ps -l' you can see the state
|
||||
|
|
21
Documentation/scsi/wd719x.txt
Normal file
21
Documentation/scsi/wd719x.txt
Normal file
|
@ -0,0 +1,21 @@
|
|||
Driver for Western Digital WD7193, WD7197 and WD7296 SCSI cards
|
||||
---------------------------------------------------------------
|
||||
|
||||
The card requires firmware that can be cut out of the Windows NT driver that
|
||||
can be downloaded from WD at:
|
||||
http://support.wdc.com/product/download.asp?groupid=801&sid=27&lang=en
|
||||
|
||||
There is no license anywhere in the file or on the page - so the firmware
|
||||
probably cannot be added to linux-firmware.
|
||||
|
||||
This script downloads and extracts the firmware, creating wd719x-risc.bin and
|
||||
d719x-wcs.bin files. Put them in /lib/firmware/.
|
||||
|
||||
#!/bin/sh
|
||||
wget http://support.wdc.com/download/archive/pciscsi.exe
|
||||
lha xi pciscsi.exe pci-scsi.exe
|
||||
lha xi pci-scsi.exe nt/wd7296a.sys
|
||||
rm pci-scsi.exe
|
||||
dd if=wd7296a.sys of=wd719x-risc.bin bs=1 skip=5760 count=14336
|
||||
dd if=wd7296a.sys of=wd719x-wcs.bin bs=1 skip=20096 count=514
|
||||
rm wd7296a.sys
|
120
MAINTAINERS
120
MAINTAINERS
|
@ -861,6 +861,7 @@ W: http://maxim.org.za/at91_26.html
|
|||
W: http://www.linux4sam.org
|
||||
S: Supported
|
||||
F: arch/arm/mach-at91/
|
||||
F: include/soc/at91/
|
||||
F: arch/arm/boot/dts/at91*.dts
|
||||
F: arch/arm/boot/dts/at91*.dtsi
|
||||
F: arch/arm/boot/dts/sama*.dts
|
||||
|
@ -1308,30 +1309,22 @@ F: drivers/*/*rockchip*
|
|||
F: drivers/*/*/*rockchip*
|
||||
F: sound/soc/rockchip/
|
||||
|
||||
ARM/SAMSUNG ARM ARCHITECTURES
|
||||
M: Ben Dooks <ben-linux@fluff.org>
|
||||
M: Kukjin Kim <kgene.kim@samsung.com>
|
||||
ARM/SAMSUNG EXYNOS ARM ARCHITECTURES
|
||||
M: Kukjin Kim <kgene@kernel.org>
|
||||
L: linux-arm-kernel@lists.infradead.org (moderated for non-subscribers)
|
||||
L: linux-samsung-soc@vger.kernel.org (moderated for non-subscribers)
|
||||
W: http://www.fluff.org/ben/linux/
|
||||
S: Maintained
|
||||
F: arch/arm/boot/dts/s3c*
|
||||
F: arch/arm/boot/dts/exynos*
|
||||
F: arch/arm/plat-samsung/
|
||||
F: arch/arm/mach-s3c24*/
|
||||
F: arch/arm/mach-s3c64xx/
|
||||
F: arch/arm/mach-s5p*/
|
||||
F: arch/arm/mach-exynos*/
|
||||
F: drivers/*/*s3c2410*
|
||||
F: drivers/*/*/*s3c2410*
|
||||
F: drivers/spi/spi-s3c*
|
||||
F: sound/soc/samsung/*
|
||||
|
||||
ARM/S5P EXYNOS ARM ARCHITECTURES
|
||||
M: Kukjin Kim <kgene.kim@samsung.com>
|
||||
L: linux-arm-kernel@lists.infradead.org (moderated for non-subscribers)
|
||||
L: linux-samsung-soc@vger.kernel.org (moderated for non-subscribers)
|
||||
S: Maintained
|
||||
F: arch/arm/mach-s5p*/
|
||||
F: arch/arm/mach-exynos*/
|
||||
N: exynos
|
||||
|
||||
ARM/SAMSUNG MOBILE MACHINE SUPPORT
|
||||
|
@ -1381,12 +1374,12 @@ F: arch/arm/boot/dts/sh*
|
|||
F: arch/arm/configs/ape6evm_defconfig
|
||||
F: arch/arm/configs/armadillo800eva_defconfig
|
||||
F: arch/arm/configs/bockw_defconfig
|
||||
F: arch/arm/configs/koelsch_defconfig
|
||||
F: arch/arm/configs/kzm9g_defconfig
|
||||
F: arch/arm/configs/lager_defconfig
|
||||
F: arch/arm/configs/mackerel_defconfig
|
||||
F: arch/arm/configs/marzen_defconfig
|
||||
F: arch/arm/configs/shmobile_defconfig
|
||||
F: arch/arm/include/debug/renesas-scif.S
|
||||
F: arch/arm/mach-shmobile/
|
||||
F: drivers/sh/
|
||||
|
||||
|
@ -1430,6 +1423,7 @@ F: drivers/tty/serial/st-asc.c
|
|||
F: drivers/usb/dwc3/dwc3-st.c
|
||||
F: drivers/usb/host/ehci-st.c
|
||||
F: drivers/usb/host/ohci-st.c
|
||||
F: drivers/ata/ahci_st.c
|
||||
|
||||
ARM/TECHNOLOGIC SYSTEMS TS7250 MACHINE SUPPORT
|
||||
M: Lennert Buytenhek <kernel@wantstofly.org>
|
||||
|
@ -1503,6 +1497,19 @@ S: Maintained
|
|||
F: drivers/clk/ux500/
|
||||
F: include/linux/platform_data/clk-ux500.h
|
||||
|
||||
ARM/VERSATILE EXPRESS PLATFORM
|
||||
M: Liviu Dudau <liviu.dudau@arm.com>
|
||||
M: Sudeep Holla <sudeep.holla@arm.com>
|
||||
M: Lorenzo Pieralisi <lorenzo.pieralisi@arm.com>
|
||||
L: linux-arm-kernel@lists.infradead.org (moderated for non-subscribers)
|
||||
S: Maintained
|
||||
F: arch/arm/boot/dts/vexpress*
|
||||
F: arch/arm/mach-vexpress/
|
||||
F: */*/vexpress*
|
||||
F: */*/*/vexpress*
|
||||
F: drivers/clk/versatile/clk-vexpress-osc.c
|
||||
F: drivers/clocksource/versatile.c
|
||||
|
||||
ARM/VFP SUPPORT
|
||||
M: Russell King <linux@arm.linux.org.uk>
|
||||
L: linux-arm-kernel@lists.infradead.org (moderated for non-subscribers)
|
||||
|
@ -1828,7 +1835,7 @@ F: include/net/ax25.h
|
|||
F: net/ax25/
|
||||
|
||||
AZ6007 DVB DRIVER
|
||||
M: Mauro Carvalho Chehab <m.chehab@samsung.com>
|
||||
M: Mauro Carvalho Chehab <mchehab@osg.samsung.com>
|
||||
L: linux-media@vger.kernel.org
|
||||
W: http://linuxtv.org
|
||||
T: git git://linuxtv.org/media_tree.git
|
||||
|
@ -2097,10 +2104,13 @@ F: arch/arm/include/debug/bcm63xx.S
|
|||
BROADCOM BCM7XXX ARM ARCHITECTURE
|
||||
M: Marc Carino <marc.ceeeee@gmail.com>
|
||||
M: Brian Norris <computersforpeace@gmail.com>
|
||||
M: Gregory Fong <gregory.0xf0@gmail.com>
|
||||
M: Florian Fainelli <f.fainelli@gmail.com>
|
||||
L: linux-arm-kernel@lists.infradead.org (moderated for non-subscribers)
|
||||
S: Maintained
|
||||
F: arch/arm/mach-bcm/*brcmstb*
|
||||
F: arch/arm/boot/dts/bcm7*.dts*
|
||||
F: drivers/bus/brcmstb_gisb.c
|
||||
|
||||
BROADCOM TG3 GIGABIT ETHERNET DRIVER
|
||||
M: Prashant Sreedharan <prashant@broadcom.com>
|
||||
|
@ -2131,6 +2141,20 @@ L: linux-scsi@vger.kernel.org
|
|||
S: Supported
|
||||
F: drivers/scsi/bnx2i/
|
||||
|
||||
BROADCOM CYGNUS/IPROC ARM ARCHITECTURE
|
||||
M: Ray Jui <rjui@broadcom.com>
|
||||
M: Scott Branden <sbranden@broadcom.com>
|
||||
L: linux-arm-kernel@lists.infradead.org (moderated for non-subscribers)
|
||||
L: bcm-kernel-feedback-list@broadcom.com
|
||||
T: git git://git.github.com/brcm/linux.git
|
||||
S: Maintained
|
||||
N: iproc
|
||||
N: cygnus
|
||||
N: bcm9113*
|
||||
N: bcm9583*
|
||||
N: bcm583*
|
||||
N: bcm113*
|
||||
|
||||
BROADCOM KONA GPIO DRIVER
|
||||
M: Ray Jui <rjui@broadcom.com>
|
||||
L: bcm-kernel-feedback-list@broadcom.com
|
||||
|
@ -2198,7 +2222,7 @@ F: Documentation/filesystems/btrfs.txt
|
|||
F: fs/btrfs/
|
||||
|
||||
BTTV VIDEO4LINUX DRIVER
|
||||
M: Mauro Carvalho Chehab <m.chehab@samsung.com>
|
||||
M: Mauro Carvalho Chehab <mchehab@osg.samsung.com>
|
||||
L: linux-media@vger.kernel.org
|
||||
W: http://linuxtv.org
|
||||
T: git git://linuxtv.org/media_tree.git
|
||||
|
@ -2719,7 +2743,7 @@ F: drivers/media/common/cx2341x*
|
|||
F: include/media/cx2341x*
|
||||
|
||||
CX88 VIDEO4LINUX DRIVER
|
||||
M: Mauro Carvalho Chehab <m.chehab@samsung.com>
|
||||
M: Mauro Carvalho Chehab <mchehab@osg.samsung.com>
|
||||
L: linux-media@vger.kernel.org
|
||||
W: http://linuxtv.org
|
||||
T: git git://linuxtv.org/media_tree.git
|
||||
|
@ -2862,11 +2886,10 @@ F: Documentation/networking/dmfe.txt
|
|||
F: drivers/net/ethernet/dec/tulip/dmfe.c
|
||||
|
||||
DC390/AM53C974 SCSI driver
|
||||
M: Kurt Garloff <garloff@suse.de>
|
||||
W: http://www.garloff.de/kurt/linux/dc390/
|
||||
M: Guennadi Liakhovetski <g.liakhovetski@gmx.de>
|
||||
M: Hannes Reinecke <hare@suse.de>
|
||||
L: linux-scsi@vger.kernel.org
|
||||
S: Maintained
|
||||
F: drivers/scsi/tmscsim.*
|
||||
F: drivers/scsi/am53c974.c
|
||||
|
||||
DC395x SCSI driver
|
||||
M: Oliver Neukum <oliver@neukum.org>
|
||||
|
@ -3402,7 +3425,7 @@ F: fs/ecryptfs/
|
|||
EDAC-CORE
|
||||
M: Doug Thompson <dougthompson@xmission.com>
|
||||
M: Borislav Petkov <bp@alien8.de>
|
||||
M: Mauro Carvalho Chehab <m.chehab@samsung.com>
|
||||
M: Mauro Carvalho Chehab <mchehab@osg.samsung.com>
|
||||
L: linux-edac@vger.kernel.org
|
||||
W: bluesmoke.sourceforge.net
|
||||
S: Supported
|
||||
|
@ -3451,7 +3474,7 @@ S: Maintained
|
|||
F: drivers/edac/e7xxx_edac.c
|
||||
|
||||
EDAC-GHES
|
||||
M: Mauro Carvalho Chehab <m.chehab@samsung.com>
|
||||
M: Mauro Carvalho Chehab <mchehab@osg.samsung.com>
|
||||
L: linux-edac@vger.kernel.org
|
||||
W: bluesmoke.sourceforge.net
|
||||
S: Maintained
|
||||
|
@ -3479,21 +3502,21 @@ S: Maintained
|
|||
F: drivers/edac/i5000_edac.c
|
||||
|
||||
EDAC-I5400
|
||||
M: Mauro Carvalho Chehab <m.chehab@samsung.com>
|
||||
M: Mauro Carvalho Chehab <mchehab@osg.samsung.com>
|
||||
L: linux-edac@vger.kernel.org
|
||||
W: bluesmoke.sourceforge.net
|
||||
S: Maintained
|
||||
F: drivers/edac/i5400_edac.c
|
||||
|
||||
EDAC-I7300
|
||||
M: Mauro Carvalho Chehab <m.chehab@samsung.com>
|
||||
M: Mauro Carvalho Chehab <mchehab@osg.samsung.com>
|
||||
L: linux-edac@vger.kernel.org
|
||||
W: bluesmoke.sourceforge.net
|
||||
S: Maintained
|
||||
F: drivers/edac/i7300_edac.c
|
||||
|
||||
EDAC-I7CORE
|
||||
M: Mauro Carvalho Chehab <m.chehab@samsung.com>
|
||||
M: Mauro Carvalho Chehab <mchehab@osg.samsung.com>
|
||||
L: linux-edac@vger.kernel.org
|
||||
W: bluesmoke.sourceforge.net
|
||||
S: Maintained
|
||||
|
@ -3536,7 +3559,7 @@ S: Maintained
|
|||
F: drivers/edac/r82600_edac.c
|
||||
|
||||
EDAC-SBRIDGE
|
||||
M: Mauro Carvalho Chehab <m.chehab@samsung.com>
|
||||
M: Mauro Carvalho Chehab <mchehab@osg.samsung.com>
|
||||
L: linux-edac@vger.kernel.org
|
||||
W: bluesmoke.sourceforge.net
|
||||
S: Maintained
|
||||
|
@ -3596,7 +3619,7 @@ S: Maintained
|
|||
F: drivers/net/ethernet/ibm/ehea/
|
||||
|
||||
EM28XX VIDEO4LINUX DRIVER
|
||||
M: Mauro Carvalho Chehab <m.chehab@samsung.com>
|
||||
M: Mauro Carvalho Chehab <mchehab@osg.samsung.com>
|
||||
L: linux-media@vger.kernel.org
|
||||
W: http://linuxtv.org
|
||||
T: git git://linuxtv.org/media_tree.git
|
||||
|
@ -5962,7 +5985,7 @@ S: Maintained
|
|||
F: drivers/media/radio/radio-maxiradio*
|
||||
|
||||
MEDIA INPUT INFRASTRUCTURE (V4L/DVB)
|
||||
M: Mauro Carvalho Chehab <m.chehab@samsung.com>
|
||||
M: Mauro Carvalho Chehab <mchehab@osg.samsung.com>
|
||||
P: LinuxTV.org Project
|
||||
L: linux-media@vger.kernel.org
|
||||
W: http://linuxtv.org
|
||||
|
@ -5991,10 +6014,13 @@ W: http://linuxtv.org
|
|||
S: Odd Fixes
|
||||
F: drivers/media/parport/pms*
|
||||
|
||||
MEGARAID SCSI DRIVERS
|
||||
M: Neela Syam Kolli <megaraidlinux@lsi.com>
|
||||
MEGARAID SCSI/SAS DRIVERS
|
||||
M: Kashyap Desai <kashyap.desai@avagotech.com>
|
||||
M: Sumit Saxena <sumit.saxena@avagotech.com>
|
||||
M: Uday Lingala <uday.lingala@avagotech.com>
|
||||
L: megaraidlinux.pdl@avagotech.com
|
||||
L: linux-scsi@vger.kernel.org
|
||||
W: http://megaraid.lsilogic.com
|
||||
W: http://www.lsi.com
|
||||
S: Maintained
|
||||
F: Documentation/scsi/megaraid.txt
|
||||
F: drivers/scsi/megaraid.*
|
||||
|
@ -6305,7 +6331,6 @@ F: drivers/scsi/g_NCR5380.*
|
|||
F: drivers/scsi/g_NCR5380_mmio.c
|
||||
F: drivers/scsi/mac_scsi.*
|
||||
F: drivers/scsi/pas16.*
|
||||
F: drivers/scsi/sun3_NCR5380.c
|
||||
F: drivers/scsi/sun3_scsi.*
|
||||
F: drivers/scsi/sun3_scsi_vme.c
|
||||
F: drivers/scsi/t128.*
|
||||
|
@ -6561,6 +6586,13 @@ S: Maintained
|
|||
F: Documentation/scsi/NinjaSCSI.txt
|
||||
F: drivers/scsi/nsp32*
|
||||
|
||||
NIOS2 ARCHITECTURE
|
||||
M: Ley Foon Tan <lftan@altera.com>
|
||||
L: nios2-dev@lists.rocketboards.org (moderated for non-subscribers)
|
||||
T: git git://git.rocketboards.org/linux-socfpga.git
|
||||
S: Maintained
|
||||
F: arch/nios2/
|
||||
|
||||
NTB DRIVER
|
||||
M: Jon Mason <jdmason@kudzu.us>
|
||||
M: Dave Jiang <dave.jiang@intel.com>
|
||||
|
@ -6670,6 +6702,14 @@ L: linux-omap@vger.kernel.org
|
|||
S: Maintained
|
||||
F: sound/soc/omap/
|
||||
|
||||
OMAP GENERAL PURPOSE MEMORY CONTROLLER SUPPORT
|
||||
M: Roger Quadros <rogerq@ti.com>
|
||||
M: Tony Lindgren <tony@atomide.com>
|
||||
L: linux-omap@vger.kernel.org
|
||||
S: Maintained
|
||||
F: drivers/memory/omap-gpmc.c
|
||||
F: arch/arm/mach-omap2/*gpmc*
|
||||
|
||||
OMAP FRAMEBUFFER SUPPORT
|
||||
M: Tomi Valkeinen <tomi.valkeinen@ti.com>
|
||||
L: linux-fbdev@vger.kernel.org
|
||||
|
@ -8013,7 +8053,7 @@ S: Odd Fixes
|
|||
F: drivers/media/i2c/saa6588*
|
||||
|
||||
SAA7134 VIDEO4LINUX DRIVER
|
||||
M: Mauro Carvalho Chehab <m.chehab@samsung.com>
|
||||
M: Mauro Carvalho Chehab <mchehab@osg.samsung.com>
|
||||
L: linux-media@vger.kernel.org
|
||||
W: http://linuxtv.org
|
||||
T: git git://linuxtv.org/media_tree.git
|
||||
|
@ -8471,7 +8511,7 @@ S: Maintained
|
|||
F: drivers/media/radio/si4713/radio-usb-si4713.c
|
||||
|
||||
SIANO DVB DRIVER
|
||||
M: Mauro Carvalho Chehab <m.chehab@samsung.com>
|
||||
M: Mauro Carvalho Chehab <mchehab@osg.samsung.com>
|
||||
L: linux-media@vger.kernel.org
|
||||
W: http://linuxtv.org
|
||||
T: git git://linuxtv.org/media_tree.git
|
||||
|
@ -8682,7 +8722,9 @@ S: Maintained
|
|||
F: drivers/leds/leds-net48xx.c
|
||||
|
||||
SOFTLOGIC 6x10 MPEG CODEC
|
||||
M: Ismael Luceno <ismael.luceno@corp.bluecherry.net>
|
||||
M: Bluecherry Maintainers <maintainers@bluecherrydvr.com>
|
||||
M: Andrey Utkin <andrey.utkin@corp.bluecherry.net>
|
||||
M: Andrey Utkin <andrey.krieger.utkin@gmail.com>
|
||||
L: linux-media@vger.kernel.org
|
||||
S: Supported
|
||||
F: drivers/media/pci/solo6x10/
|
||||
|
@ -9156,7 +9198,7 @@ S: Maintained
|
|||
F: drivers/media/i2c/tda9840*
|
||||
|
||||
TEA5761 TUNER DRIVER
|
||||
M: Mauro Carvalho Chehab <m.chehab@samsung.com>
|
||||
M: Mauro Carvalho Chehab <mchehab@osg.samsung.com>
|
||||
L: linux-media@vger.kernel.org
|
||||
W: http://linuxtv.org
|
||||
T: git git://linuxtv.org/media_tree.git
|
||||
|
@ -9164,7 +9206,7 @@ S: Odd fixes
|
|||
F: drivers/media/tuners/tea5761.*
|
||||
|
||||
TEA5767 TUNER DRIVER
|
||||
M: Mauro Carvalho Chehab <m.chehab@samsung.com>
|
||||
M: Mauro Carvalho Chehab <mchehab@osg.samsung.com>
|
||||
L: linux-media@vger.kernel.org
|
||||
W: http://linuxtv.org
|
||||
T: git git://linuxtv.org/media_tree.git
|
||||
|
@ -9476,7 +9518,7 @@ F: include/linux/shmem_fs.h
|
|||
F: mm/shmem.c
|
||||
|
||||
TM6000 VIDEO4LINUX DRIVER
|
||||
M: Mauro Carvalho Chehab <m.chehab@samsung.com>
|
||||
M: Mauro Carvalho Chehab <mchehab@osg.samsung.com>
|
||||
L: linux-media@vger.kernel.org
|
||||
W: http://linuxtv.org
|
||||
T: git git://linuxtv.org/media_tree.git
|
||||
|
@ -10297,7 +10339,7 @@ S: Maintained
|
|||
F: arch/x86/kernel/cpu/mcheck/*
|
||||
|
||||
XC2028/3028 TUNER DRIVER
|
||||
M: Mauro Carvalho Chehab <m.chehab@samsung.com>
|
||||
M: Mauro Carvalho Chehab <mchehab@osg.samsung.com>
|
||||
L: linux-media@vger.kernel.org
|
||||
W: http://linuxtv.org
|
||||
T: git git://linuxtv.org/media_tree.git
|
||||
|
|
2
Makefile
2
Makefile
|
@ -1,7 +1,7 @@
|
|||
VERSION = 3
|
||||
PATCHLEVEL = 18
|
||||
SUBLEVEL = 0
|
||||
EXTRAVERSION = -rc6
|
||||
EXTRAVERSION =
|
||||
NAME = Diseased Newt
|
||||
|
||||
# *DOCUMENTATION*
|
||||
|
|
|
@ -13,8 +13,6 @@
|
|||
#include <asm/byteorder.h>
|
||||
#include <asm/page.h>
|
||||
|
||||
#define PCI_IOBASE ((void __iomem *)0)
|
||||
|
||||
extern void __iomem *ioremap(unsigned long physaddr, unsigned long size);
|
||||
extern void __iomem *ioremap_prot(phys_addr_t offset, unsigned long size,
|
||||
unsigned long flags);
|
||||
|
|
|
@ -320,24 +320,6 @@ config ARCH_MULTIPLATFORM
|
|||
select SPARSE_IRQ
|
||||
select USE_OF
|
||||
|
||||
config ARCH_INTEGRATOR
|
||||
bool "ARM Ltd. Integrator family"
|
||||
select ARM_AMBA
|
||||
select ARM_PATCH_PHYS_VIRT if MMU
|
||||
select AUTO_ZRELADDR
|
||||
select COMMON_CLK
|
||||
select COMMON_CLK_VERSATILE
|
||||
select GENERIC_CLOCKEVENTS
|
||||
select HAVE_TCM
|
||||
select ICST
|
||||
select MULTI_IRQ_HANDLER
|
||||
select PLAT_VERSATILE
|
||||
select SPARSE_IRQ
|
||||
select USE_OF
|
||||
select VERSATILE_FPGA_IRQ
|
||||
help
|
||||
Support for ARM's Integrator platform.
|
||||
|
||||
config ARCH_REALVIEW
|
||||
bool "ARM Ltd. RealView family"
|
||||
select ARCH_WANT_OPTIONAL_GPIOLIB
|
||||
|
@ -350,6 +332,7 @@ config ARCH_REALVIEW
|
|||
select ICST
|
||||
select NEED_MACH_MEMORY_H
|
||||
select PLAT_VERSATILE
|
||||
select PLAT_VERSATILE_SCHED_CLOCK
|
||||
help
|
||||
This enables support for ARM Ltd RealView boards.
|
||||
|
||||
|
@ -365,6 +348,7 @@ config ARCH_VERSATILE
|
|||
select ICST
|
||||
select PLAT_VERSATILE
|
||||
select PLAT_VERSATILE_CLOCK
|
||||
select PLAT_VERSATILE_SCHED_CLOCK
|
||||
select VERSATILE_FPGA_IRQ
|
||||
help
|
||||
This enables support for ARM Ltd Versatile board.
|
||||
|
@ -376,10 +360,11 @@ config ARCH_AT91
|
|||
select IRQ_DOMAIN
|
||||
select NEED_MACH_IO_H if PCCARD
|
||||
select PINCTRL
|
||||
select PINCTRL_AT91 if USE_OF
|
||||
select PINCTRL_AT91
|
||||
select USE_OF
|
||||
help
|
||||
This enables support for systems based on Atmel
|
||||
AT91RM9200 and AT91SAM9* processors.
|
||||
AT91RM9200, AT91SAM9 and SAMA5 processors.
|
||||
|
||||
config ARCH_CLPS711X
|
||||
bool "Cirrus Logic CLPS711x/EP721x/EP731x-based"
|
||||
|
@ -854,6 +839,8 @@ config ARCH_VIRT
|
|||
#
|
||||
source "arch/arm/mach-mvebu/Kconfig"
|
||||
|
||||
source "arch/arm/mach-asm9260/Kconfig"
|
||||
|
||||
source "arch/arm/mach-at91/Kconfig"
|
||||
|
||||
source "arch/arm/mach-axxia/Kconfig"
|
||||
|
@ -1259,9 +1246,6 @@ source "arch/arm/common/Kconfig"
|
|||
|
||||
menu "Bus support"
|
||||
|
||||
config ARM_AMBA
|
||||
bool
|
||||
|
||||
config ISA
|
||||
bool
|
||||
help
|
||||
|
|
|
@ -93,6 +93,27 @@ choice
|
|||
prompt "Kernel low-level debugging port"
|
||||
depends on DEBUG_LL
|
||||
|
||||
config DEBUG_ASM9260_UART
|
||||
bool "Kernel low-level debugging via asm9260 UART"
|
||||
depends on MACH_ASM9260
|
||||
help
|
||||
Say Y here if you want the debug print routines to direct
|
||||
their output to an UART or USART port on asm9260 based
|
||||
machines.
|
||||
|
||||
DEBUG_UART_PHYS | DEBUG_UART_VIRT
|
||||
|
||||
0x80000000 | 0xf0000000 | UART0
|
||||
0x80004000 | 0xf0004000 | UART1
|
||||
0x80008000 | 0xf0008000 | UART2
|
||||
0x8000c000 | 0xf000c000 | UART3
|
||||
0x80010000 | 0xf0010000 | UART4
|
||||
0x80014000 | 0xf0014000 | UART5
|
||||
0x80018000 | 0xf0018000 | UART6
|
||||
0x8001c000 | 0xf001c000 | UART7
|
||||
0x80020000 | 0xf0020000 | UART8
|
||||
0x80024000 | 0xf0024000 | UART9
|
||||
|
||||
config AT91_DEBUG_LL_DBGU0
|
||||
bool "Kernel low-level debugging on rm9200, 9260/9g20, 9261/9g10 and 9rl"
|
||||
depends on HAVE_AT91_DBGU0
|
||||
|
@ -113,7 +134,7 @@ choice
|
|||
config DEBUG_BCM_5301X
|
||||
bool "Kernel low-level debugging on BCM5301X UART1"
|
||||
depends on ARCH_BCM_5301X
|
||||
select DEBUG_UART_PL01X
|
||||
select DEBUG_UART_8250
|
||||
|
||||
config DEBUG_BCM_KONA_UART
|
||||
bool "Kernel low-level debugging messages via BCM KONA UART"
|
||||
|
@ -139,6 +160,17 @@ choice
|
|||
Say Y here if you want kernel low-level debugging support
|
||||
on Marvell Berlin SoC based platforms.
|
||||
|
||||
config DEBUG_BRCMSTB_UART
|
||||
bool "Use BRCMSTB UART for low-level debug"
|
||||
depends on ARCH_BRCMSTB
|
||||
select DEBUG_UART_8250
|
||||
help
|
||||
Say Y here if you want the debug print routines to direct
|
||||
their output to the first serial port on these devices.
|
||||
|
||||
If you have a Broadcom STB chip and would like early print
|
||||
messages to appear over the UART, select this option.
|
||||
|
||||
config DEBUG_CLPS711X_UART1
|
||||
bool "Kernel low-level debugging messages via UART1"
|
||||
depends on ARCH_CLPS711X
|
||||
|
@ -653,6 +685,64 @@ choice
|
|||
Say Y here if you want kernel low-level debugging support
|
||||
on Rockchip RK32xx based platforms.
|
||||
|
||||
config DEBUG_R7S72100_SCIF2
|
||||
bool "Kernel low-level debugging messages via SCIF2 on R7S72100"
|
||||
depends on ARCH_R7S72100
|
||||
help
|
||||
Say Y here if you want kernel low-level debugging support
|
||||
via SCIF2 on Renesas RZ/A1H (R7S72100).
|
||||
|
||||
config DEBUG_RCAR_GEN1_SCIF0
|
||||
bool "Kernel low-level debugging messages via SCIF0 on R8A7778"
|
||||
depends on ARCH_R8A7778
|
||||
help
|
||||
Say Y here if you want kernel low-level debugging support
|
||||
via SCIF0 on Renesas R-Car M1A (R8A7778).
|
||||
|
||||
config DEBUG_RCAR_GEN1_SCIF2
|
||||
bool "Kernel low-level debugging messages via SCIF2 on R8A7779"
|
||||
depends on ARCH_R8A7779
|
||||
help
|
||||
Say Y here if you want kernel low-level debugging support
|
||||
via SCIF2 on Renesas R-Car H1 (R8A7779).
|
||||
|
||||
config DEBUG_RCAR_GEN2_SCIF0
|
||||
bool "Kernel low-level debugging messages via SCIF0 on R8A7790/R8A7791/R8A7793)"
|
||||
depends on ARCH_R8A7790 || ARCH_R8A7791 || ARCH_R8A7793
|
||||
help
|
||||
Say Y here if you want kernel low-level debugging support
|
||||
via SCIF0 on Renesas R-Car H2 (R8A7790), M2-W (R8A7791), or
|
||||
M2-N (R8A7793).
|
||||
|
||||
config DEBUG_RCAR_GEN2_SCIF2
|
||||
bool "Kernel low-level debugging messages via SCIF2 on R8A7794"
|
||||
depends on ARCH_R8A7794
|
||||
help
|
||||
Say Y here if you want kernel low-level debugging support
|
||||
via SCIF2 on Renesas R-Car E2 (R8A7794).
|
||||
|
||||
config DEBUG_RMOBILE_SCIFA0
|
||||
bool "Kernel low-level debugging messages via SCIFA0 on R8A73A4/SH7372"
|
||||
depends on ARCH_R8A73A4 || ARCH_SH7372
|
||||
help
|
||||
Say Y here if you want kernel low-level debugging support
|
||||
via SCIFA0 on Renesas R-Mobile APE6 (R8A73A4) or SH-Mobile
|
||||
AP4 (SH7372).
|
||||
|
||||
config DEBUG_RMOBILE_SCIFA1
|
||||
bool "Kernel low-level debugging messages via SCIFA1 on R8A7740"
|
||||
depends on ARCH_R8A7740
|
||||
help
|
||||
Say Y here if you want kernel low-level debugging support
|
||||
via SCIFA1 on Renesas R-Mobile A1 (R8A7740).
|
||||
|
||||
config DEBUG_RMOBILE_SCIFA4
|
||||
bool "Kernel low-level debugging messages via SCIFA4 on SH73A0"
|
||||
depends on ARCH_SH73A0
|
||||
help
|
||||
Say Y here if you want kernel low-level debugging support
|
||||
via SCIFA4 on Renesas SH-Mobile AG5 (SH73A0).
|
||||
|
||||
config DEBUG_S3C_UART0
|
||||
depends on PLAT_SAMSUNG
|
||||
select DEBUG_EXYNOS_UART if ARCH_EXYNOS
|
||||
|
@ -723,6 +813,14 @@ choice
|
|||
their output to UART 2. The port must have been initialised
|
||||
by the boot-loader before use.
|
||||
|
||||
config DEBUG_SA1100
|
||||
depends on ARCH_SA1100
|
||||
bool "Use SA1100 UARTs for low-level debug"
|
||||
help
|
||||
Say Y here if you want kernel low-level debugging support
|
||||
on SA-11x0 UART ports. The kernel will check for the first
|
||||
enabled UART in a sequence 3-1-2.
|
||||
|
||||
config DEBUG_SOCFPGA_UART
|
||||
depends on ARCH_SOCFPGA
|
||||
bool "Use SOCFPGA UART for low-level debug"
|
||||
|
@ -731,6 +829,14 @@ choice
|
|||
Say Y here if you want kernel low-level debugging support
|
||||
on SOCFPGA based platforms.
|
||||
|
||||
config DEBUG_SUN9I_UART0
|
||||
bool "Kernel low-level debugging messages via sun9i UART0"
|
||||
depends on MACH_SUN9I
|
||||
select DEBUG_UART_8250
|
||||
help
|
||||
Say Y here if you want kernel low-level debugging support
|
||||
on Allwinner A80 based platforms on the UART0.
|
||||
|
||||
config DEBUG_SUNXI_UART0
|
||||
bool "Kernel low-level debugging messages via sunXi UART0"
|
||||
depends on ARCH_SUNXI
|
||||
|
@ -866,6 +972,22 @@ choice
|
|||
Say Y here if you want kernel low-level debugging support
|
||||
for Mediatek mt6589 based platforms on UART0.
|
||||
|
||||
config DEBUG_MT8127_UART0
|
||||
bool "Mediatek mt8127 UART0"
|
||||
depends on ARCH_MEDIATEK
|
||||
select DEBUG_UART_8250
|
||||
help
|
||||
Say Y here if you want kernel low-level debugging support
|
||||
for Mediatek mt8127 based platforms on UART0.
|
||||
|
||||
config DEBUG_MT8135_UART3
|
||||
bool "Mediatek mt8135 UART3"
|
||||
depends on ARCH_MEDIATEK
|
||||
select DEBUG_UART_8250
|
||||
help
|
||||
Say Y here if you want kernel low-level debugging support
|
||||
for Mediatek mt8135 based platforms on UART3.
|
||||
|
||||
config DEBUG_VEXPRESS_UART0_DETECT
|
||||
bool "Autodetect UART0 on Versatile Express Cortex-A core tiles"
|
||||
depends on ARCH_VEXPRESS && CPU_CP15_MMU
|
||||
|
@ -1041,7 +1163,9 @@ config DEBUG_STI_UART
|
|||
|
||||
config DEBUG_LL_INCLUDE
|
||||
string
|
||||
default "debug/sa1100.S" if DEBUG_SA1100
|
||||
default "debug/8250.S" if DEBUG_LL_UART_8250 || DEBUG_UART_8250
|
||||
default "debug/asm9260.S" if DEBUG_ASM9260_UART
|
||||
default "debug/clps711x.S" if DEBUG_CLPS711X_UART1 || DEBUG_CLPS711X_UART2
|
||||
default "debug/meson.S" if DEBUG_MESON_UARTAO
|
||||
default "debug/pl01x.S" if DEBUG_LL_UART_PL01X || DEBUG_UART_PL01X
|
||||
|
@ -1061,6 +1185,14 @@ config DEBUG_LL_INCLUDE
|
|||
DEBUG_IMX6SX_UART
|
||||
default "debug/msm.S" if DEBUG_MSM_UART || DEBUG_QCOM_UARTDM
|
||||
default "debug/omap2plus.S" if DEBUG_OMAP2PLUS_UART
|
||||
default "debug/renesas-scif.S" if DEBUG_R7S72100_SCIF2
|
||||
default "debug/renesas-scif.S" if DEBUG_RCAR_GEN1_SCIF0
|
||||
default "debug/renesas-scif.S" if DEBUG_RCAR_GEN1_SCIF2
|
||||
default "debug/renesas-scif.S" if DEBUG_RCAR_GEN2_SCIF0
|
||||
default "debug/renesas-scif.S" if DEBUG_RCAR_GEN2_SCIF2
|
||||
default "debug/renesas-scif.S" if DEBUG_RMOBILE_SCIFA0
|
||||
default "debug/renesas-scif.S" if DEBUG_RMOBILE_SCIFA1
|
||||
default "debug/renesas-scif.S" if DEBUG_RMOBILE_SCIFA4
|
||||
default "debug/s3c24xx.S" if DEBUG_S3C24XX_UART
|
||||
default "debug/s5pv210.S" if DEBUG_S5PV210_UART
|
||||
default "debug/sirf.S" if DEBUG_SIRFPRIMA2_UART1 || DEBUG_SIRFMARCO_UART1
|
||||
|
@ -1106,6 +1238,7 @@ config DEBUG_UART_PHYS
|
|||
default 0x02530c00 if DEBUG_KEYSTONE_UART0
|
||||
default 0x02531000 if DEBUG_KEYSTONE_UART1
|
||||
default 0x03010fe0 if ARCH_RPC
|
||||
default 0x07000000 if DEBUG_SUN9I_UART0
|
||||
default 0x10009000 if DEBUG_REALVIEW_STD_PORT || \
|
||||
DEBUG_VEXPRESS_UART0_CA9
|
||||
default 0x1010c000 if DEBUG_REALVIEW_PB1176_PORT
|
||||
|
@ -1113,7 +1246,9 @@ config DEBUG_UART_PHYS
|
|||
default 0x10126000 if DEBUG_RK3X_UART1
|
||||
default 0x101f1000 if ARCH_VERSATILE
|
||||
default 0x101fb000 if DEBUG_NOMADIK_UART
|
||||
default 0x11002000 if DEBUG_MT8127_UART0
|
||||
default 0x11006000 if DEBUG_MT6589_UART0
|
||||
default 0x11009000 if DEBUG_MT8135_UART3
|
||||
default 0x16000000 if ARCH_INTEGRATOR
|
||||
default 0x18000300 if DEBUG_BCM_5301X
|
||||
default 0x1c090000 if DEBUG_VEXPRESS_UART0_RS1
|
||||
|
@ -1135,6 +1270,7 @@ config DEBUG_UART_PHYS
|
|||
default 0x78000000 if DEBUG_CNS3XXX
|
||||
default 0x7c0003f8 if FOOTBRIDGE
|
||||
default 0x78000000 if DEBUG_CNS3XXX
|
||||
default 0x80010000 if DEBUG_ASM9260_UART
|
||||
default 0x80070000 if DEBUG_IMX23_UART
|
||||
default 0x80074000 if DEBUG_IMX28_UART
|
||||
default 0x80230000 if DEBUG_PICOXCELL_UART
|
||||
|
@ -1152,7 +1288,14 @@ config DEBUG_UART_PHYS
|
|||
default 0xd4018000 if DEBUG_MMP_UART3
|
||||
default 0xe0000000 if ARCH_SPEAR13XX
|
||||
default 0xe4007000 if DEBUG_HIP04_UART
|
||||
default 0xe6c40000 if DEBUG_RMOBILE_SCIFA0
|
||||
default 0xe6c50000 if DEBUG_RMOBILE_SCIFA1
|
||||
default 0xe6c80000 if DEBUG_RMOBILE_SCIFA4
|
||||
default 0xe6e58000 if DEBUG_RCAR_GEN2_SCIF2
|
||||
default 0xe6e60000 if DEBUG_RCAR_GEN2_SCIF0
|
||||
default 0xe8008000 if DEBUG_R7S72100_SCIF2
|
||||
default 0xf0000be0 if ARCH_EBSA110
|
||||
default 0xf040ab00 if DEBUG_BRCMSTB_UART
|
||||
default 0xf1012000 if DEBUG_MVEBU_UART_ALTERNATE
|
||||
default 0xf1012000 if ARCH_DOVE || ARCH_MV78XX0 || \
|
||||
ARCH_ORION5X
|
||||
|
@ -1164,24 +1307,33 @@ config DEBUG_UART_PHYS
|
|||
default 0xff690000 if DEBUG_RK32_UART2
|
||||
default 0xffc02000 if DEBUG_SOCFPGA_UART
|
||||
default 0xffd82340 if ARCH_IOP13XX
|
||||
default 0xffe40000 if DEBUG_RCAR_GEN1_SCIF0
|
||||
default 0xffe42000 if DEBUG_RCAR_GEN1_SCIF2
|
||||
default 0xfff36000 if DEBUG_HIGHBANK_UART
|
||||
default 0xfffe8600 if DEBUG_UART_BCM63XX
|
||||
default 0xfffff700 if ARCH_IOP33X
|
||||
depends on DEBUG_LL_UART_8250 || DEBUG_LL_UART_PL01X || \
|
||||
DEBUG_LL_UART_EFM32 || \
|
||||
DEBUG_UART_8250 || DEBUG_UART_PL01X || DEBUG_MESON_UARTAO || \
|
||||
DEBUG_MSM_UART || DEBUG_QCOM_UARTDM || DEBUG_S3C24XX_UART || \
|
||||
DEBUG_UART_BCM63XX
|
||||
DEBUG_MSM_UART || DEBUG_QCOM_UARTDM || DEBUG_R7S72100_SCIF2 || \
|
||||
DEBUG_RCAR_GEN1_SCIF0 || DEBUG_RCAR_GEN1_SCIF2 || \
|
||||
DEBUG_RCAR_GEN2_SCIF0 || DEBUG_RCAR_GEN2_SCIF2 || \
|
||||
DEBUG_RMOBILE_SCIFA0 || DEBUG_RMOBILE_SCIFA1 || \
|
||||
DEBUG_RMOBILE_SCIFA4 || DEBUG_S3C24XX_UART || \
|
||||
DEBUG_UART_BCM63XX || DEBUG_ASM9260_UART
|
||||
|
||||
config DEBUG_UART_VIRT
|
||||
hex "Virtual base address of debug UART"
|
||||
default 0xe0010fe0 if ARCH_RPC
|
||||
default 0xe1000000 if DEBUG_MSM_UART
|
||||
default 0xf0000be0 if ARCH_EBSA110
|
||||
default 0xf0010000 if DEBUG_ASM9260_UART
|
||||
default 0xf01fb000 if DEBUG_NOMADIK_UART
|
||||
default 0xf0201000 if DEBUG_BCM2835
|
||||
default 0xf1000300 if DEBUG_BCM_5301X
|
||||
default 0xf1002000 if DEBUG_MT8127_UART0
|
||||
default 0xf1006000 if DEBUG_MT6589_UART0
|
||||
default 0xf1009000 if DEBUG_MT8135_UART3
|
||||
default 0xf11f1000 if ARCH_VERSATILE
|
||||
default 0xf1600000 if ARCH_INTEGRATOR
|
||||
default 0xf1c28000 if DEBUG_SUNXI_UART0
|
||||
|
@ -1190,6 +1342,7 @@ config DEBUG_UART_VIRT
|
|||
default 0xf6200000 if DEBUG_PXA_UART1
|
||||
default 0xf4090000 if ARCH_LPC32XX
|
||||
default 0xf4200000 if ARCH_GEMINI
|
||||
default 0xf7000000 if DEBUG_SUN9I_UART0
|
||||
default 0xf7000000 if DEBUG_S3C24XX_UART && (DEBUG_S3C_UART0 || \
|
||||
DEBUG_S3C2410_UART0)
|
||||
default 0xf7004000 if DEBUG_S3C24XX_UART && (DEBUG_S3C_UART1 || \
|
||||
|
@ -1204,6 +1357,7 @@ config DEBUG_UART_VIRT
|
|||
default 0xfb002000 if DEBUG_CNS3XXX
|
||||
default 0xfb009000 if DEBUG_REALVIEW_STD_PORT
|
||||
default 0xfb10c000 if DEBUG_REALVIEW_PB1176_PORT
|
||||
default 0xfc40ab00 if DEBUG_BRCMSTB_UART
|
||||
default 0xfcfe8600 if DEBUG_UART_BCM63XX
|
||||
default 0xfd000000 if ARCH_SPEAR3XX || ARCH_SPEAR6XX
|
||||
default 0xfd000000 if ARCH_SPEAR13XX
|
||||
|
@ -1244,12 +1398,12 @@ config DEBUG_UART_VIRT
|
|||
depends on DEBUG_LL_UART_8250 || DEBUG_LL_UART_PL01X || \
|
||||
DEBUG_UART_8250 || DEBUG_UART_PL01X || DEBUG_MESON_UARTAO || \
|
||||
DEBUG_MSM_UART || DEBUG_QCOM_UARTDM || DEBUG_S3C24XX_UART || \
|
||||
DEBUG_UART_BCM63XX
|
||||
DEBUG_UART_BCM63XX || DEBUG_ASM9260_UART
|
||||
|
||||
config DEBUG_UART_8250_SHIFT
|
||||
int "Register offset shift for the 8250 debug UART"
|
||||
depends on DEBUG_LL_UART_8250 || DEBUG_UART_8250
|
||||
default 0 if FOOTBRIDGE || ARCH_IOP32X
|
||||
default 0 if FOOTBRIDGE || ARCH_IOP32X || DEBUG_BCM_5301X
|
||||
default 2
|
||||
|
||||
config DEBUG_UART_8250_WORD
|
||||
|
@ -1260,7 +1414,8 @@ config DEBUG_UART_8250_WORD
|
|||
ARCH_KEYSTONE || \
|
||||
DEBUG_DAVINCI_DMx_UART0 || DEBUG_DAVINCI_DA8XX_UART1 || \
|
||||
DEBUG_DAVINCI_DA8XX_UART2 || \
|
||||
DEBUG_BCM_KONA_UART || DEBUG_RK32_UART2
|
||||
DEBUG_BCM_KONA_UART || DEBUG_RK32_UART2 || \
|
||||
DEBUG_BRCMSTB_UART
|
||||
|
||||
config DEBUG_UART_8250_FLOW_CONTROL
|
||||
bool "Enable flow control for 8250 UART"
|
||||
|
|
|
@ -312,8 +312,12 @@ $(INSTALL_TARGETS):
|
|||
$(Q)$(MAKE) $(build)=$(boot)/dts MACHINE=$(MACHINE) $(boot)/dts/$@
|
||||
|
||||
PHONY += dtbs dtbs_install
|
||||
dtbs dtbs_install: prepare scripts
|
||||
$(Q)$(MAKE) $(build)=$(boot)/dts MACHINE=$(MACHINE) $@
|
||||
|
||||
dtbs: prepare scripts
|
||||
$(Q)$(MAKE) $(build)=$(boot)/dts
|
||||
|
||||
dtbs_install:
|
||||
$(Q)$(MAKE) $(dtbinst)=$(boot)/dts
|
||||
|
||||
# We use MRPROPER_FILES and CLEAN_FILES now
|
||||
archclean:
|
||||
|
|
|
@ -54,8 +54,17 @@ dtb-$(CONFIG_ARCH_AT91) += at91-sama5d4ek.dtb
|
|||
dtb-$(CONFIG_ARCH_ATLAS6) += atlas6-evb.dtb
|
||||
dtb-$(CONFIG_ARCH_AXXIA) += axm5516-amarillo.dtb
|
||||
dtb-$(CONFIG_ARCH_BCM2835) += bcm2835-rpi-b.dtb
|
||||
dtb-$(CONFIG_ARCH_BCM_5301X) += bcm4708-netgear-r6250.dtb
|
||||
dtb-$(CONFIG_ARCH_BCM2835) += bcm2835-rpi-b-plus.dtb
|
||||
dtb-$(CONFIG_ARCH_BCM_5301X) += \
|
||||
bcm4708-buffalo-wzr-1750dhp.dtb \
|
||||
bcm4708-netgear-r6250.dtb \
|
||||
bcm4708-netgear-r6300-v2.dtb \
|
||||
bcm47081-asus-rt-n18u.dtb \
|
||||
bcm47081-buffalo-wzr-600dhp2.dtb
|
||||
dtb-$(CONFIG_ARCH_BCM_63XX) += bcm963138dvt.dtb
|
||||
dtb-$(CONFIG_ARCH_BCM_CYGNUS) += bcm911360_entphn.dtb \
|
||||
bcm911360k.dtb \
|
||||
bcm958300k.dtb
|
||||
dtb-$(CONFIG_ARCH_BCM_MOBILE) += bcm28155-ap.dtb \
|
||||
bcm21664-garnet.dtb
|
||||
dtb-$(CONFIG_ARCH_BERLIN) += \
|
||||
|
@ -67,7 +76,9 @@ dtb-$(CONFIG_ARCH_BRCMSTB) += \
|
|||
dtb-$(CONFIG_ARCH_DAVINCI) += da850-enbw-cmc.dtb \
|
||||
da850-evm.dtb
|
||||
dtb-$(CONFIG_ARCH_EFM32) += efm32gg-dk3750.dtb
|
||||
dtb-$(CONFIG_ARCH_EXYNOS) += exynos4210-origen.dtb \
|
||||
dtb-$(CONFIG_ARCH_EXYNOS) += exynos3250-monk.dtb \
|
||||
exynos3250-rinato.dtb \
|
||||
exynos4210-origen.dtb \
|
||||
exynos4210-smdkv310.dtb \
|
||||
exynos4210-trats.dtb \
|
||||
exynos4210-universal_c210.dtb \
|
||||
|
@ -81,6 +92,7 @@ dtb-$(CONFIG_ARCH_EXYNOS) += exynos4210-origen.dtb \
|
|||
exynos5250-arndale.dtb \
|
||||
exynos5250-smdk5250.dtb \
|
||||
exynos5250-snow.dtb \
|
||||
exynos5250-spring.dtb \
|
||||
exynos5260-xyref5260.dtb \
|
||||
exynos5410-smdk5410.dtb \
|
||||
exynos5420-arndale-octa.dtb \
|
||||
|
@ -104,6 +116,7 @@ dtb-$(CONFIG_MACH_KIRKWOOD) += kirkwood-b3.dtb \
|
|||
kirkwood-d2net.dtb \
|
||||
kirkwood-db-88f6281.dtb \
|
||||
kirkwood-db-88f6282.dtb \
|
||||
kirkwood-dir665.dtb \
|
||||
kirkwood-dns320.dtb \
|
||||
kirkwood-dns325.dtb \
|
||||
kirkwood-dockstar.dtb \
|
||||
|
@ -240,6 +253,7 @@ dtb-$(CONFIG_ARCH_MXC) += \
|
|||
imx6q-sabrelite.dtb \
|
||||
imx6q-sabresd.dtb \
|
||||
imx6q-sbc6x.dtb \
|
||||
imx6q-tbs2910.dtb \
|
||||
imx6q-udoo.dtb \
|
||||
imx6q-wandboard.dtb \
|
||||
imx6q-wandboard-revb1.dtb \
|
||||
|
@ -250,6 +264,9 @@ dtb-$(CONFIG_ARCH_MXC) += \
|
|||
imx6q-tx6q-1110.dtb \
|
||||
imx6sl-evk.dtb \
|
||||
imx6sx-sdb.dtb \
|
||||
ls1021a-qds.dtb \
|
||||
ls1021a-twr.dtb \
|
||||
vf500-colibri-eval-v3.dtb \
|
||||
vf610-colibri-eval-v3.dtb \
|
||||
vf610-cosmic.dtb \
|
||||
vf610-twr.dtb
|
||||
|
@ -274,7 +291,8 @@ dtb-$(CONFIG_ARCH_MXS) += imx23-evk.dtb \
|
|||
imx28-m28evk.dtb \
|
||||
imx28-sps1.dtb \
|
||||
imx28-tx28.dtb
|
||||
dtb-$(CONFIG_ARCH_NOMADIK) += ste-nomadik-s8815.dtb
|
||||
dtb-$(CONFIG_ARCH_NOMADIK) += ste-nomadik-s8815.dtb \
|
||||
ste-nomadik-nhk15.dtb
|
||||
dtb-$(CONFIG_ARCH_NSPIRE) += nspire-cx.dtb \
|
||||
nspire-tp.dtb \
|
||||
nspire-clp.dtb
|
||||
|
@ -302,7 +320,9 @@ dtb-$(CONFIG_ARCH_OMAP3) += am3517-craneboard.dtb \
|
|||
omap3-ha.dtb \
|
||||
omap3-ha-lcd.dtb \
|
||||
omap3-igep0020.dtb \
|
||||
omap3-igep0020-rev-f.dtb \
|
||||
omap3-igep0030.dtb \
|
||||
omap3-igep0030-rev-g.dtb \
|
||||
omap3-ldp.dtb \
|
||||
omap3-lilly-dbb056.dtb \
|
||||
omap3-n900.dtb \
|
||||
|
@ -331,7 +351,8 @@ dtb-$(CONFIG_SOC_AM33XX) += am335x-base0033.dtb \
|
|||
am335x-evm.dtb \
|
||||
am335x-evmsk.dtb \
|
||||
am335x-nano.dtb \
|
||||
am335x-pepper.dtb
|
||||
am335x-pepper.dtb \
|
||||
am335x-lxm.dtb
|
||||
dtb-$(CONFIG_ARCH_OMAP4) += omap4-duovero-parlor.dtb \
|
||||
omap4-panda.dtb \
|
||||
omap4-panda-a4.dtb \
|
||||
|
@ -347,6 +368,7 @@ dtb-$(CONFIG_SOC_OMAP5) += omap5-cm-t54.dtb \
|
|||
omap5-sbc-t54.dtb \
|
||||
omap5-uevm.dtb
|
||||
dtb-$(CONFIG_SOC_DRA7XX) += dra7-evm.dtb \
|
||||
am57xx-beagle-x15.dtb \
|
||||
dra72-evm.dtb
|
||||
dtb-$(CONFIG_ARCH_ORION5X) += orion5x-lacie-d2-network.dtb \
|
||||
orion5x-lacie-ethernet-disk-mini-v2.dtb \
|
||||
|
@ -363,8 +385,10 @@ dtb-$(CONFIG_ARCH_QCOM) += \
|
|||
qcom-msm8660-surf.dtb \
|
||||
qcom-msm8960-cdp.dtb \
|
||||
qcom-msm8974-sony-xperia-honami.dtb
|
||||
dtb-$(CONFIG_ARCH_REALVIEW) += arm-realview-pb1176.dtb
|
||||
dtb-$(CONFIG_ARCH_ROCKCHIP) += \
|
||||
rk3066a-bqcurie2.dtb \
|
||||
rk3066a-marsboard.dtb \
|
||||
rk3188-radxarock.dtb \
|
||||
rk3288-evb-act8846.dtb \
|
||||
rk3288-evb-rk808.dtb
|
||||
|
@ -376,27 +400,27 @@ dtb-$(CONFIG_ARCH_S5PV210) += s5pv210-aquila.dtb \
|
|||
s5pv210-smdkc110.dtb \
|
||||
s5pv210-smdkv210.dtb \
|
||||
s5pv210-torbreck.dtb
|
||||
dtb-$(CONFIG_ARCH_SHMOBILE_LEGACY) += r7s72100-genmai.dtb \
|
||||
dtb-$(CONFIG_ARCH_SHMOBILE_LEGACY) += \
|
||||
r8a73a4-ape6evm.dtb \
|
||||
r8a73a4-ape6evm-reference.dtb \
|
||||
r8a7740-armadillo800eva.dtb \
|
||||
r8a7778-bockw.dtb \
|
||||
r8a7778-bockw-reference.dtb \
|
||||
r8a7779-marzen.dtb \
|
||||
r8a7791-koelsch.dtb \
|
||||
r8a7790-lager.dtb \
|
||||
sh7372-mackerel.dtb \
|
||||
sh73a0-kzm9g.dtb \
|
||||
sh73a0-kzm9g-reference.dtb \
|
||||
r8a73a4-ape6evm.dtb \
|
||||
r8a73a4-ape6evm-reference.dtb \
|
||||
sh7372-mackerel.dtb
|
||||
sh73a0-kzm9g-reference.dtb
|
||||
dtb-$(CONFIG_ARCH_SHMOBILE_MULTI) += emev2-kzm9d.dtb \
|
||||
r7s72100-genmai.dtb \
|
||||
r8a7740-armadillo800eva.dtb \
|
||||
r8a7779-marzen.dtb \
|
||||
r8a7790-lager.dtb \
|
||||
r8a7791-henninger.dtb \
|
||||
r8a7791-koelsch.dtb \
|
||||
r8a7790-lager.dtb \
|
||||
r8a7779-marzen.dtb \
|
||||
r8a7794-alt.dtb
|
||||
dtb-$(CONFIG_ARCH_SOCFPGA) += socfpga_arria5_socdk.dtb \
|
||||
socfpga_arria10_socdk.dtb \
|
||||
socfpga_cyclone5_socdk.dtb \
|
||||
socfpga_cyclone5_sockit.dtb \
|
||||
socfpga_cyclone5_socrates.dtb \
|
||||
|
@ -409,6 +433,7 @@ dtb-$(CONFIG_ARCH_SPEAR3XX)+= spear300-evb.dtb \
|
|||
spear320-hmi.dtb
|
||||
dtb-$(CONFIG_ARCH_SPEAR6XX)+= spear600-evb.dtb
|
||||
dtb-$(CONFIG_ARCH_STI)+= stih407-b2120.dtb \
|
||||
stih410-b2120.dtb \
|
||||
stih415-b2000.dtb \
|
||||
stih415-b2020.dtb \
|
||||
stih416-b2000.dtb \
|
||||
|
@ -435,15 +460,20 @@ dtb-$(CONFIG_MACH_SUN6I) += \
|
|||
sun6i-a31-hummingbird.dtb \
|
||||
sun6i-a31-m9.dtb
|
||||
dtb-$(CONFIG_MACH_SUN7I) += \
|
||||
sun7i-a20-bananapi.dtb \
|
||||
sun7i-a20-cubieboard2.dtb \
|
||||
sun7i-a20-cubietruck.dtb \
|
||||
sun7i-a20-hummingbird.dtb \
|
||||
sun7i-a20-i12-tvbox.dtb \
|
||||
sun7i-a20-m3.dtb \
|
||||
sun7i-a20-olinuxino-lime.dtb \
|
||||
sun7i-a20-olinuxino-lime2.dtb \
|
||||
sun7i-a20-olinuxino-micro.dtb \
|
||||
sun7i-a20-pcduino3.dtb
|
||||
dtb-$(CONFIG_MACH_SUN8I) += \
|
||||
sun8i-a23-ippo-q8h-v5.dtb
|
||||
dtb-$(CONFIG_MACH_SUN9I) += \
|
||||
sun9i-a80-optimus.dtb
|
||||
dtb-$(CONFIG_ARCH_TEGRA) += tegra20-harmony.dtb \
|
||||
tegra20-iris-512.dtb \
|
||||
tegra20-medcom-wide.dtb \
|
||||
|
@ -489,13 +519,15 @@ dtb-$(CONFIG_ARCH_ZYNQ) += \
|
|||
zynq-parallella.dtb \
|
||||
zynq-zc702.dtb \
|
||||
zynq-zc706.dtb \
|
||||
zynq-zed.dtb
|
||||
zynq-zed.dtb \
|
||||
zynq-zybo.dtb
|
||||
dtb-$(CONFIG_MACH_ARMADA_370) += \
|
||||
armada-370-db.dtb \
|
||||
armada-370-mirabox.dtb \
|
||||
armada-370-netgear-rn102.dtb \
|
||||
armada-370-netgear-rn104.dtb \
|
||||
armada-370-rd.dtb
|
||||
armada-370-rd.dtb \
|
||||
armada-370-synology-ds213j.dtb
|
||||
dtb-$(CONFIG_MACH_ARMADA_375) += \
|
||||
armada-375-db.dtb
|
||||
dtb-$(CONFIG_MACH_ARMADA_38X) += \
|
||||
|
@ -508,24 +540,20 @@ dtb-$(CONFIG_MACH_ARMADA_XP) += \
|
|||
armada-xp-lenovo-ix4-300d.dtb \
|
||||
armada-xp-matrix.dtb \
|
||||
armada-xp-netgear-rn2120.dtb \
|
||||
armada-xp-openblocks-ax3-4.dtb
|
||||
armada-xp-openblocks-ax3-4.dtb \
|
||||
armada-xp-synology-ds414.dtb
|
||||
dtb-$(CONFIG_MACH_DOVE) += dove-cm-a510.dtb \
|
||||
dove-cubox.dtb \
|
||||
dove-cubox-es.dtb \
|
||||
dove-d2plug.dtb \
|
||||
dove-d3plug.dtb \
|
||||
dove-dove-db.dtb
|
||||
dtb-$(CONFIG_ARCH_MEDIATEK) += mt6589-aquaris5.dtb
|
||||
dtb-$(CONFIG_ARCH_MEDIATEK) += mt6589-aquaris5.dtb \
|
||||
mt6592-evb.dtb \
|
||||
mt8127-moose.dtb \
|
||||
mt8135-evbp1.dtb
|
||||
|
||||
targets += dtbs dtbs_install
|
||||
targets += $(dtb-y)
|
||||
endif
|
||||
|
||||
# *.dtb used to be generated in the directory above. Clean out the
|
||||
# old build results so people don't accidentally use them.
|
||||
dtbs: $(addprefix $(obj)/, $(dtb-y))
|
||||
$(Q)rm -f $(obj)/../*.dtb
|
||||
|
||||
clean-files := *.dtb
|
||||
|
||||
dtbs_install: $(addsuffix _dtbinst_, $(dtb-y))
|
||||
always := $(dtb-y)
|
||||
clean-files := *.dtb
|
||||
|
|
|
@ -307,6 +307,13 @@ am335x_evm_audio_pins: am335x_evm_audio_pins {
|
|||
0x144 (PIN_INPUT_PULLDOWN | MUX_MODE4) /* rmii1_ref_clk.mcasp1_axr3 */
|
||||
>;
|
||||
};
|
||||
|
||||
dcan1_pins_default: dcan1_pins_default {
|
||||
pinctrl-single,pins = <
|
||||
0x168 (PIN_OUTPUT | MUX_MODE2) /* uart0_ctsn.d_can1_tx */
|
||||
0x16c (PIN_INPUT_PULLDOWN | MUX_MODE2) /* uart0_rtsn.d_can1_rx */
|
||||
>;
|
||||
};
|
||||
};
|
||||
|
||||
&uart0 {
|
||||
|
@ -437,9 +444,9 @@ &gpmc {
|
|||
status = "okay";
|
||||
pinctrl-names = "default";
|
||||
pinctrl-0 = <&nandflash_pins_s0>;
|
||||
ranges = <0 0 0x08000000 0x10000000>; /* CS0: NAND */
|
||||
ranges = <0 0 0x08000000 0x1000000>; /* CS0: 16MB for NAND */
|
||||
nand@0,0 {
|
||||
reg = <0 0 0>; /* CS0, offset 0 */
|
||||
reg = <0 0 4>; /* CS0, offset 0, IO size 4 */
|
||||
ti,nand-ecc-opt = "bch8";
|
||||
ti,elm-id = <&elm>;
|
||||
nand-bus-width = <8>;
|
||||
|
@ -664,3 +671,9 @@ &sham {
|
|||
&aes {
|
||||
status = "okay";
|
||||
};
|
||||
|
||||
&dcan1 {
|
||||
status = "disabled"; /* Enable only if Profile 1 is selected */
|
||||
pinctrl-names = "default";
|
||||
pinctrl-0 = <&dcan1_pins_default>;
|
||||
};
|
||||
|
|
|
@ -126,10 +126,10 @@ &gpmc {
|
|||
pinctrl-names = "default";
|
||||
pinctrl-0 = <&nandflash_pins>;
|
||||
|
||||
ranges = <0 0 0x08000000 0x10000000>; /* CS0: NAND */
|
||||
ranges = <0 0 0x08000000 0x1000000>; /* CS0: 16MB for NAND */
|
||||
|
||||
nand@0,0 {
|
||||
reg = <0 0 0>; /* CS0, offset 0 */
|
||||
reg = <0 0 4>; /* CS0, offset 0, IO size 4 */
|
||||
nand-bus-width = <8>;
|
||||
ti,nand-ecc-opt = "bch8";
|
||||
gpmc,device-width = <1>;
|
||||
|
|
362
arch/arm/boot/dts/am335x-lxm.dts
Normal file
362
arch/arm/boot/dts/am335x-lxm.dts
Normal file
|
@ -0,0 +1,362 @@
|
|||
/*
|
||||
* Copyright (C) 2014 NovaTech LLC - http://www.novatechweb.com
|
||||
*
|
||||
* This program is free software; you can redistribute it and/or modify
|
||||
* it under the terms of the GNU General Public License version 2 as
|
||||
* published by the Free Software Foundation.
|
||||
*/
|
||||
/dts-v1/;
|
||||
|
||||
#include "am33xx.dtsi"
|
||||
|
||||
/ {
|
||||
model = "NovaTech OrionLXm";
|
||||
compatible = "novatech,am335x-lxm", "ti,am33xx";
|
||||
|
||||
cpus {
|
||||
cpu@0 {
|
||||
cpu0-supply = <&vdd1_reg>;
|
||||
};
|
||||
};
|
||||
|
||||
memory {
|
||||
device_type = "memory";
|
||||
reg = <0x80000000 0x20000000>; /* 512 MB */
|
||||
};
|
||||
|
||||
/* Power supply provides a fixed 5V @2A */
|
||||
vbat: fixedregulator@0 {
|
||||
compatible = "regulator-fixed";
|
||||
regulator-name = "vbat";
|
||||
regulator-min-microvolt = <5000000>;
|
||||
regulator-max-microvolt = <5000000>;
|
||||
regulator-boot-on;
|
||||
};
|
||||
|
||||
/* Power supply provides a fixed 3.3V @3A */
|
||||
vmmcsd_fixed: fixedregulator@1 {
|
||||
compatible = "regulator-fixed";
|
||||
regulator-name = "vmmcsd_fixed";
|
||||
regulator-min-microvolt = <3300000>;
|
||||
regulator-max-microvolt = <3300000>;
|
||||
regulator-boot-on;
|
||||
};
|
||||
};
|
||||
|
||||
&am33xx_pinmux {
|
||||
mmc1_pins: pinmux_mmc1_pins {
|
||||
pinctrl-single,pins = <
|
||||
0xf0 (PIN_INPUT_PULLUP | MUX_MODE0) /* mmc0_dat3 */
|
||||
0xf4 (PIN_INPUT_PULLUP | MUX_MODE0) /* mmc0_dat2 */
|
||||
0xf8 (PIN_INPUT_PULLUP | MUX_MODE0) /* mmc0_dat1 */
|
||||
0xfc (PIN_INPUT_PULLUP | MUX_MODE0) /* mmc0_dat0 */
|
||||
0x100 (PIN_INPUT_PULLUP | MUX_MODE0) /* mmc0_clk */
|
||||
0x104 (PIN_INPUT_PULLUP | MUX_MODE0) /* mmc0_cmd */
|
||||
>;
|
||||
};
|
||||
|
||||
i2c0_pins: pinmux_i2c0_pins {
|
||||
pinctrl-single,pins = <
|
||||
0x188 (PIN_INPUT | MUX_MODE0) /* i2c0_sda.i2c0_sda */
|
||||
0x18c (PIN_INPUT | MUX_MODE0) /* i2c0_scl.i2c0_scl */
|
||||
>;
|
||||
};
|
||||
|
||||
cpsw_default: cpsw_default {
|
||||
pinctrl-single,pins = <
|
||||
/* Slave 1 */
|
||||
0x64 (PIN_INPUT_PULLDOWN | MUX_MODE7) /* rmii1_int */
|
||||
0x10c (PIN_INPUT_PULLDOWN | MUX_MODE1) /* rmii1_crs_dv */
|
||||
0x110 (PIN_INPUT_PULLDOWN | MUX_MODE1) /* rmii1_rxer */
|
||||
0x114 (PIN_OUTPUT_PULLDOWN | MUX_MODE1) /* rmii1_txen */
|
||||
0x124 (PIN_OUTPUT_PULLDOWN | MUX_MODE1) /* rmii1_td1 */
|
||||
0x128 (PIN_OUTPUT_PULLDOWN | MUX_MODE1) /* rmii1_td0 */
|
||||
0x13c (PIN_INPUT_PULLDOWN | MUX_MODE1) /* rmii1_rd1 */
|
||||
0x140 (PIN_INPUT_PULLDOWN | MUX_MODE1) /* rmii1_rd0 */
|
||||
0x144 (PIN_INPUT_PULLDOWN | MUX_MODE0) /* rmii1_refclk */
|
||||
|
||||
/* Slave 2 */
|
||||
0x40 (PIN_OUTPUT_PULLDOWN | MUX_MODE3) /* rmii2_txen */
|
||||
0x50 (PIN_OUTPUT_PULLDOWN | MUX_MODE3) /* rmii2_td1 */
|
||||
0x54 (PIN_OUTPUT_PULLDOWN | MUX_MODE3) /* rmii2_td0 */
|
||||
0x68 (PIN_INPUT_PULLDOWN | MUX_MODE3) /* rmii2_rd1 */
|
||||
0x6c (PIN_INPUT_PULLDOWN | MUX_MODE3) /* rmii2_rd0 */
|
||||
0x70 (PIN_INPUT_PULLDOWN | MUX_MODE3) /* rmii2_crs_dv */
|
||||
0x74 (PIN_INPUT_PULLDOWN | MUX_MODE3) /* rmii2_rxer */
|
||||
0x78 (PIN_INPUT_PULLDOWN | MUX_MODE7) /* rmii2_int */
|
||||
0x108 (PIN_INPUT_PULLDOWN | MUX_MODE1) /* rmii2_refclk */
|
||||
>;
|
||||
};
|
||||
|
||||
cpsw_sleep: cpsw_sleep {
|
||||
pinctrl-single,pins = <
|
||||
/* Slave 1 reset value */
|
||||
0x64 (PIN_INPUT_PULLDOWN | MUX_MODE7) /* rmii1_int */
|
||||
0x10c (PIN_INPUT_PULLDOWN | MUX_MODE7) /* rmii1_crs_dv */
|
||||
0x110 (PIN_INPUT_PULLDOWN | MUX_MODE7) /* rmii1_rxer */
|
||||
0x114 (PIN_INPUT_PULLDOWN | MUX_MODE7) /* rmii1_txen */
|
||||
0x124 (PIN_INPUT_PULLDOWN | MUX_MODE7) /* rmii1_td1 */
|
||||
0x128 (PIN_INPUT_PULLDOWN | MUX_MODE7) /* rmii1_td0 */
|
||||
0x13c (PIN_INPUT_PULLDOWN | MUX_MODE7) /* rmii1_rd1 */
|
||||
0x140 (PIN_INPUT_PULLDOWN | MUX_MODE7) /* rmii1_rd0 */
|
||||
0x144 (PIN_INPUT_PULLDOWN | MUX_MODE7) /* rmii1_refclk */
|
||||
|
||||
/* Slave 2 reset value*/
|
||||
0x40 (PIN_INPUT_PULLDOWN | MUX_MODE7) /* rmii2_txen */
|
||||
0x50 (PIN_INPUT_PULLDOWN | MUX_MODE7) /* rmii2_td1 */
|
||||
0x54 (PIN_INPUT_PULLDOWN | MUX_MODE7) /* rmii2_td0 */
|
||||
0x68 (PIN_INPUT_PULLDOWN | MUX_MODE7) /* rmii2_rd1 */
|
||||
0x6c (PIN_INPUT_PULLDOWN | MUX_MODE7) /* rmii2_rd0 */
|
||||
0x70 (PIN_INPUT_PULLDOWN | MUX_MODE7) /* rmii2_crs_dv */
|
||||
0x74 (PIN_INPUT_PULLDOWN | MUX_MODE7) /* rmii2_rxer */
|
||||
0x78 (PIN_INPUT_PULLDOWN | MUX_MODE7) /* rmii2_int */
|
||||
0x108 (PIN_INPUT_PULLDOWN | MUX_MODE7) /* rmii2_refclk */
|
||||
>;
|
||||
};
|
||||
|
||||
davinci_mdio_default: davinci_mdio_default {
|
||||
pinctrl-single,pins = <
|
||||
/* MDIO */
|
||||
0x148 (PIN_INPUT_PULLUP | SLEWCTRL_FAST | MUX_MODE0) /* mdio_data.mdio_data */
|
||||
0x14c (PIN_OUTPUT_PULLUP | MUX_MODE0) /* mdio_clk.mdio_clk */
|
||||
>;
|
||||
};
|
||||
|
||||
davinci_mdio_sleep: davinci_mdio_sleep {
|
||||
pinctrl-single,pins = <
|
||||
/* MDIO reset value */
|
||||
0x148 (PIN_INPUT_PULLDOWN | MUX_MODE7)
|
||||
0x14c (PIN_INPUT_PULLDOWN | MUX_MODE7)
|
||||
>;
|
||||
};
|
||||
|
||||
emmc_pins: pinmux_emmc_pins {
|
||||
pinctrl-single,pins = <
|
||||
0x80 (PIN_INPUT_PULLUP | MUX_MODE2) /* gpmc_csn1.mmc1_clk */
|
||||
0x84 (PIN_INPUT_PULLUP | MUX_MODE2) /* gpmc_csn2.mmc1_cmd */
|
||||
0x00 (PIN_INPUT_PULLUP | MUX_MODE1) /* gpmc_ad0.mmc1_dat0 */
|
||||
0x04 (PIN_INPUT_PULLUP | MUX_MODE1) /* gpmc_ad1.mmc1_dat1 */
|
||||
0x08 (PIN_INPUT_PULLUP | MUX_MODE1) /* gpmc_ad2.mmc1_dat2 */
|
||||
0x0c (PIN_INPUT_PULLUP | MUX_MODE1) /* gpmc_ad3.mmc1_dat3 */
|
||||
0x10 (PIN_INPUT_PULLUP | MUX_MODE1) /* gpmc_ad4.mmc1_dat4 */
|
||||
0x14 (PIN_INPUT_PULLUP | MUX_MODE1) /* gpmc_ad5.mmc1_dat5 */
|
||||
0x18 (PIN_INPUT_PULLUP | MUX_MODE1) /* gpmc_ad6.mmc1_dat6 */
|
||||
0x1c (PIN_INPUT_PULLUP | MUX_MODE1) /* gpmc_ad7.mmc1_dat7 */
|
||||
>;
|
||||
};
|
||||
|
||||
uart0_pins: pinmux_uart0_pins {
|
||||
pinctrl-single,pins = <
|
||||
0x170 (PIN_INPUT_PULLUP | MUX_MODE0) /* uart0_rxd.uart0_rxd */
|
||||
0x174 (PIN_OUTPUT_PULLDOWN | MUX_MODE0) /* uart0_txd.uart0_txd */
|
||||
>;
|
||||
};
|
||||
};
|
||||
|
||||
&i2c0 {
|
||||
pinctrl-names = "default";
|
||||
pinctrl-0 = <&i2c0_pins>;
|
||||
|
||||
status = "okay";
|
||||
clock-frequency = <400000>;
|
||||
|
||||
serial_config1: serial_config1@20 {
|
||||
compatible = "nxp,pca9539";
|
||||
reg = <0x20>;
|
||||
};
|
||||
|
||||
serial_config2: serial_config2@21 {
|
||||
compatible = "nxp,pca9539";
|
||||
reg = <0x21>;
|
||||
};
|
||||
|
||||
tps: tps@2d {
|
||||
compatible = "ti,tps65910";
|
||||
reg = <0x2d>;
|
||||
};
|
||||
};
|
||||
|
||||
/include/ "tps65910.dtsi"
|
||||
|
||||
&tps {
|
||||
vcc1-supply = <&vbat>;
|
||||
vcc2-supply = <&vbat>;
|
||||
vcc3-supply = <&vbat>;
|
||||
vcc4-supply = <&vbat>;
|
||||
vcc5-supply = <&vbat>;
|
||||
vcc6-supply = <&vbat>;
|
||||
vcc7-supply = <&vbat>;
|
||||
vccio-supply = <&vbat>;
|
||||
|
||||
regulators {
|
||||
/* vrtc - unused */
|
||||
|
||||
vio_reg: regulator@1 {
|
||||
regulator-name = "vio_1v5,ddr";
|
||||
regulator-min-microvolt = <1500000>;
|
||||
regulator-max-microvolt = <1500000>;
|
||||
regulator-boot-on;
|
||||
regulator-always-on;
|
||||
};
|
||||
|
||||
vdd1_reg: regulator@2 {
|
||||
regulator-name = "vdd1,mpu";
|
||||
regulator-min-microvolt = <600000>;
|
||||
regulator-max-microvolt = <1500000>;
|
||||
regulator-boot-on;
|
||||
regulator-always-on;
|
||||
};
|
||||
|
||||
vdd2_reg: regulator@3 {
|
||||
regulator-name = "vdd2_1v1,core";
|
||||
regulator-min-microvolt = <1100000>;
|
||||
regulator-max-microvolt = <1100000>;
|
||||
regulator-boot-on;
|
||||
regulator-always-on;
|
||||
};
|
||||
|
||||
/* vdd3 - unused */
|
||||
|
||||
/* vdig1 - unused */
|
||||
|
||||
vdig2_reg: regulator@6 {
|
||||
regulator-name = "vdig2_1v8,vdds_pll";
|
||||
regulator-min-microvolt = <1800000>;
|
||||
regulator-max-microvolt = <1800000>;
|
||||
regulator-boot-on;
|
||||
regulator-always-on;
|
||||
};
|
||||
|
||||
/* vpll - unused */
|
||||
|
||||
vdac_reg: regulator@8 {
|
||||
regulator-name = "vdac_1v8,vdds";
|
||||
regulator-min-microvolt = <1800000>;
|
||||
regulator-max-microvolt = <1800000>;
|
||||
regulator-boot-on;
|
||||
regulator-always-on;
|
||||
};
|
||||
|
||||
vaux1_reg: regulator@9 {
|
||||
regulator-name = "vaux1_1v8,usb";
|
||||
regulator-min-microvolt = <1800000>;
|
||||
regulator-max-microvolt = <1800000>;
|
||||
regulator-boot-on;
|
||||
regulator-always-on;
|
||||
};
|
||||
|
||||
vaux2_reg: regulator@10 {
|
||||
regulator-name = "vaux2_3v3,io";
|
||||
regulator-min-microvolt = <3300000>;
|
||||
regulator-max-microvolt = <3300000>;
|
||||
regulator-boot-on;
|
||||
regulator-always-on;
|
||||
};
|
||||
|
||||
vaux33_reg: regulator@11 {
|
||||
regulator-name = "vaux33_3v3,usb";
|
||||
regulator-min-microvolt = <3300000>;
|
||||
regulator-max-microvolt = <3300000>;
|
||||
regulator-boot-on;
|
||||
regulator-always-on;
|
||||
};
|
||||
|
||||
vmmc_reg: regulator@12 {
|
||||
regulator-name = "vmmc_3v3,io";
|
||||
regulator-min-microvolt = <3300000>;
|
||||
regulator-max-microvolt = <3300000>;
|
||||
regulator-boot-on;
|
||||
regulator-always-on;
|
||||
};
|
||||
};
|
||||
};
|
||||
|
||||
&sham {
|
||||
status = "okay";
|
||||
};
|
||||
|
||||
&aes {
|
||||
status = "okay";
|
||||
};
|
||||
|
||||
&uart0 {
|
||||
pinctrl-names = "default";
|
||||
pinctrl-0 = <&uart0_pins>;
|
||||
|
||||
status = "okay";
|
||||
};
|
||||
|
||||
&usb {
|
||||
status = "okay";
|
||||
};
|
||||
|
||||
&usb_ctrl_mod {
|
||||
status = "okay";
|
||||
};
|
||||
|
||||
&usb0_phy {
|
||||
status = "okay";
|
||||
};
|
||||
|
||||
&usb1_phy {
|
||||
status = "okay";
|
||||
};
|
||||
|
||||
&usb0 {
|
||||
status = "okay";
|
||||
dr_mode = "host";
|
||||
};
|
||||
|
||||
&usb1 {
|
||||
status = "okay";
|
||||
dr_mode = "host";
|
||||
};
|
||||
|
||||
&cppi41dma {
|
||||
status = "okay";
|
||||
};
|
||||
|
||||
&cpsw_emac0 {
|
||||
phy_id = <&davinci_mdio>, <5>;
|
||||
phy-mode = "rmii";
|
||||
dual_emac_res_vlan = <2>;
|
||||
};
|
||||
|
||||
&cpsw_emac1 {
|
||||
phy_id = <&davinci_mdio>, <4>;
|
||||
phy-mode = "rmii";
|
||||
dual_emac_res_vlan = <3>;
|
||||
};
|
||||
|
||||
&mac {
|
||||
pinctrl-names = "default", "sleep";
|
||||
pinctrl-0 = <&cpsw_default>;
|
||||
pinctrl-1 = <&cpsw_sleep>;
|
||||
dual_emac = <1>;
|
||||
status = "okay";
|
||||
};
|
||||
|
||||
&davinci_mdio {
|
||||
pinctrl-names = "default", "sleep";
|
||||
pinctrl-0 = <&davinci_mdio_default>;
|
||||
pinctrl-1 = <&davinci_mdio_sleep>;
|
||||
status = "okay";
|
||||
};
|
||||
|
||||
&mmc1 {
|
||||
pinctrl-names = "default";
|
||||
pinctrl-0 = <&mmc1_pins>;
|
||||
vmmc-supply = <&vmmcsd_fixed>;
|
||||
bus-width = <4>;
|
||||
status = "okay";
|
||||
};
|
||||
|
||||
&mmc2 {
|
||||
pinctrl-names = "default";
|
||||
pinctrl-0 = <&emmc_pins>;
|
||||
vmmc-supply = <&vmmcsd_fixed>;
|
||||
bus-width = <8>;
|
||||
ti,non-removable;
|
||||
status = "okay";
|
||||
};
|
||||
|
|
@ -83,6 +83,11 @@ mpu {
|
|||
};
|
||||
};
|
||||
|
||||
am33xx_control_module: control_module@4a002000 {
|
||||
compatible = "syscon";
|
||||
reg = <0x44e10000 0x7fc>;
|
||||
};
|
||||
|
||||
am33xx_pinmux: pinmux@44e10800 {
|
||||
compatible = "pinctrl-single";
|
||||
reg = <0x44e10800 0x0238>;
|
||||
|
@ -204,6 +209,8 @@ uart0: serial@44e09000 {
|
|||
reg = <0x44e09000 0x2000>;
|
||||
interrupts = <72>;
|
||||
status = "disabled";
|
||||
dmas = <&edma 26>, <&edma 27>;
|
||||
dma-names = "tx", "rx";
|
||||
};
|
||||
|
||||
uart1: serial@48022000 {
|
||||
|
@ -213,6 +220,8 @@ uart1: serial@48022000 {
|
|||
reg = <0x48022000 0x2000>;
|
||||
interrupts = <73>;
|
||||
status = "disabled";
|
||||
dmas = <&edma 28>, <&edma 29>;
|
||||
dma-names = "tx", "rx";
|
||||
};
|
||||
|
||||
uart2: serial@48024000 {
|
||||
|
@ -222,6 +231,8 @@ uart2: serial@48024000 {
|
|||
reg = <0x48024000 0x2000>;
|
||||
interrupts = <74>;
|
||||
status = "disabled";
|
||||
dmas = <&edma 30>, <&edma 31>;
|
||||
dma-names = "tx", "rx";
|
||||
};
|
||||
|
||||
uart3: serial@481a6000 {
|
||||
|
@ -333,20 +344,24 @@ wdt2: wdt@44e35000 {
|
|||
interrupts = <91>;
|
||||
};
|
||||
|
||||
dcan0: d_can@481cc000 {
|
||||
compatible = "bosch,d_can";
|
||||
dcan0: can@481cc000 {
|
||||
compatible = "ti,am3352-d_can";
|
||||
ti,hwmods = "d_can0";
|
||||
reg = <0x481cc000 0x2000
|
||||
0x44e10644 0x4>;
|
||||
reg = <0x481cc000 0x2000>;
|
||||
clocks = <&dcan0_fck>;
|
||||
clock-names = "fck";
|
||||
syscon-raminit = <&am33xx_control_module 0x644 0>;
|
||||
interrupts = <52>;
|
||||
status = "disabled";
|
||||
};
|
||||
|
||||
dcan1: d_can@481d0000 {
|
||||
compatible = "bosch,d_can";
|
||||
dcan1: can@481d0000 {
|
||||
compatible = "ti,am3352-d_can";
|
||||
ti,hwmods = "d_can1";
|
||||
reg = <0x481d0000 0x2000
|
||||
0x44e10644 0x4>;
|
||||
reg = <0x481d0000 0x2000>;
|
||||
clocks = <&dcan1_fck>;
|
||||
clock-names = "fck";
|
||||
syscon-raminit = <&am33xx_control_module 0x644 1>;
|
||||
interrupts = <55>;
|
||||
status = "disabled";
|
||||
};
|
||||
|
@ -356,6 +371,7 @@ mailbox: mailbox@480C8000 {
|
|||
reg = <0x480C8000 0x200>;
|
||||
interrupts = <77>;
|
||||
ti,hwmods = "mailbox";
|
||||
#mbox-cells = <1>;
|
||||
ti,mbox-num-users = <4>;
|
||||
ti,mbox-num-fifos = <8>;
|
||||
mbox_wkupm3: wkup_m3 {
|
||||
|
|
|
@ -57,6 +57,11 @@ l2-cache-controller@48242000 {
|
|||
cache-level = <2>;
|
||||
};
|
||||
|
||||
am43xx_control_module: control_module@4a002000 {
|
||||
compatible = "syscon";
|
||||
reg = <0x44e10000 0x7f4>;
|
||||
};
|
||||
|
||||
am43xx_pinmux: pinmux@44e10800 {
|
||||
compatible = "ti,am437-padconf", "pinctrl-single";
|
||||
reg = <0x44e10800 0x31c>;
|
||||
|
@ -168,6 +173,7 @@ mailbox: mailbox@480C8000 {
|
|||
reg = <0x480C8000 0x200>;
|
||||
interrupts = <GIC_SPI 77 IRQ_TYPE_LEVEL_HIGH>;
|
||||
ti,hwmods = "mailbox";
|
||||
#mbox-cells = <1>;
|
||||
ti,mbox-num-users = <4>;
|
||||
ti,mbox-num-fifos = <8>;
|
||||
mbox_wkupm3: wkup_m3 {
|
||||
|
@ -667,6 +673,26 @@ ehrpwm5: ehrpwm@4830a200 {
|
|||
};
|
||||
};
|
||||
|
||||
tscadc: tscadc@44e0d000 {
|
||||
compatible = "ti,am3359-tscadc";
|
||||
reg = <0x44e0d000 0x1000>;
|
||||
ti,hwmods = "adc_tsc";
|
||||
interrupts = <GIC_SPI 16 IRQ_TYPE_LEVEL_HIGH>;
|
||||
clocks = <&adc_tsc_fck>;
|
||||
clock-names = "fck";
|
||||
status = "disabled";
|
||||
|
||||
tsc {
|
||||
compatible = "ti,am3359-tsc";
|
||||
};
|
||||
|
||||
adc {
|
||||
#io-channel-cells = <1>;
|
||||
compatible = "ti,am3359-adc";
|
||||
};
|
||||
|
||||
};
|
||||
|
||||
sham: sham@53100000 {
|
||||
compatible = "ti,omap5-sham";
|
||||
ti,hwmods = "sham";
|
||||
|
@ -896,6 +922,28 @@ ocmcram: ocmcram@40300000 {
|
|||
compatible = "mmio-sram";
|
||||
reg = <0x40300000 0x40000>; /* 256k */
|
||||
};
|
||||
|
||||
dcan0: can@481cc000 {
|
||||
compatible = "ti,am4372-d_can", "ti,am3352-d_can";
|
||||
ti,hwmods = "d_can0";
|
||||
clocks = <&dcan0_fck>;
|
||||
clock-names = "fck";
|
||||
reg = <0x481cc000 0x2000>;
|
||||
syscon-raminit = <&am43xx_control_module 0x644 0>;
|
||||
interrupts = <GIC_SPI 52 IRQ_TYPE_LEVEL_HIGH>;
|
||||
status = "disabled";
|
||||
};
|
||||
|
||||
dcan1: can@481d0000 {
|
||||
compatible = "ti,am4372-d_can", "ti,am3352-d_can";
|
||||
ti,hwmods = "d_can1";
|
||||
clocks = <&dcan1_fck>;
|
||||
clock-names = "fck";
|
||||
reg = <0x481d0000 0x2000>;
|
||||
syscon-raminit = <&am43xx_control_module 0x644 1>;
|
||||
interrupts = <GIC_SPI 49 IRQ_TYPE_LEVEL_HIGH>;
|
||||
status = "disabled";
|
||||
};
|
||||
};
|
||||
};
|
||||
|
||||
|
|
|
@ -254,6 +254,20 @@ lcd_pins: lcd_pins {
|
|||
0x238 (PIN_OUTPUT_PULLUP | MUX_MODE7)
|
||||
>;
|
||||
};
|
||||
|
||||
dcan0_default: dcan0_default_pins {
|
||||
pinctrl-single,pins = <
|
||||
0x178 (PIN_OUTPUT | MUX_MODE2) /* uart1_ctsn.d_can0_tx */
|
||||
0x17c (PIN_INPUT_PULLUP | MUX_MODE2) /* uart1_rtsn.d_can0_rx */
|
||||
>;
|
||||
};
|
||||
|
||||
dcan1_default: dcan1_default_pins {
|
||||
pinctrl-single,pins = <
|
||||
0x180 (PIN_OUTPUT | MUX_MODE2) /* uart1_rxd.d_can1_tx */
|
||||
0x184 (PIN_INPUT_PULLUP | MUX_MODE2) /* uart1_txd.d_can1_rx */
|
||||
>;
|
||||
};
|
||||
};
|
||||
|
||||
&i2c0 {
|
||||
|
@ -343,6 +357,14 @@ &epwmss0 {
|
|||
status = "okay";
|
||||
};
|
||||
|
||||
&tscadc {
|
||||
status = "okay";
|
||||
|
||||
adc {
|
||||
ti,adc-channels = <0 1 2 3 4 5 6 7>;
|
||||
};
|
||||
};
|
||||
|
||||
&ecap0 {
|
||||
status = "okay";
|
||||
pinctrl-names = "default";
|
||||
|
@ -511,3 +533,15 @@ dpi_out: endpoint@0 {
|
|||
};
|
||||
};
|
||||
};
|
||||
|
||||
&dcan0 {
|
||||
pinctrl-names = "default";
|
||||
pinctrl-0 = <&dcan0_default>;
|
||||
status = "okay";
|
||||
};
|
||||
|
||||
&dcan1 {
|
||||
pinctrl-names = "default";
|
||||
pinctrl-0 = <&dcan1_default>;
|
||||
status = "okay";
|
||||
};
|
||||
|
|
|
@ -438,9 +438,9 @@ &gpmc {
|
|||
status = "okay"; /* Disable QSPI when enabling GPMC (NAND) */
|
||||
pinctrl-names = "default";
|
||||
pinctrl-0 = <&nand_flash_x8>;
|
||||
ranges = <0 0 0x08000000 0x10000000>; /* CS0: NAND */
|
||||
ranges = <0 0 0x08000000 0x1000000>; /* CS0: 16MB for NAND */
|
||||
nand@0,0 {
|
||||
reg = <0 0 0>; /* CS0, offset 0 */
|
||||
reg = <0 0 4>; /* CS0, offset 0, IO size 4 */
|
||||
ti,nand-ecc-opt = "bch16";
|
||||
ti,elm-id = <&elm>;
|
||||
nand-bus-width = <8>;
|
||||
|
@ -519,6 +519,14 @@ &epwmss0 {
|
|||
status = "okay";
|
||||
};
|
||||
|
||||
&tscadc {
|
||||
status = "okay";
|
||||
|
||||
adc {
|
||||
ti,adc-channels = <0 1 2 3 4 5 6 7>;
|
||||
};
|
||||
};
|
||||
|
||||
&ecap0 {
|
||||
status = "okay";
|
||||
pinctrl-names = "default";
|
||||
|
|
405
arch/arm/boot/dts/am57xx-beagle-x15.dts
Normal file
405
arch/arm/boot/dts/am57xx-beagle-x15.dts
Normal file
|
@ -0,0 +1,405 @@
|
|||
/*
|
||||
* Copyright (C) 2014 Texas Instruments Incorporated - http://www.ti.com/
|
||||
*
|
||||
* This program is free software; you can redistribute it and/or modify
|
||||
* it under the terms of the GNU General Public License version 2 as
|
||||
* published by the Free Software Foundation.
|
||||
*/
|
||||
/dts-v1/;
|
||||
|
||||
#include "dra74x.dtsi"
|
||||
#include <dt-bindings/clk/ti-dra7-atl.h>
|
||||
#include <dt-bindings/gpio/gpio.h>
|
||||
#include <dt-bindings/interrupt-controller/irq.h>
|
||||
|
||||
/ {
|
||||
model = "TI AM5728 BeagleBoard-X15";
|
||||
compatible = "ti,am572x-beagle-x15", "ti,am5728", "ti,dra742", "ti,dra74", "ti,dra7";
|
||||
|
||||
aliases {
|
||||
rtc0 = &mcp_rtc;
|
||||
rtc1 = &tps659038_rtc;
|
||||
};
|
||||
|
||||
memory {
|
||||
device_type = "memory";
|
||||
reg = <0x80000000 0x80000000>;
|
||||
};
|
||||
|
||||
vdd_3v3: fixedregulator-vdd_3v3 {
|
||||
compatible = "regulator-fixed";
|
||||
regulator-name = "vdd_3v3";
|
||||
vin-supply = <®en1>;
|
||||
regulator-min-microvolt = <3300000>;
|
||||
regulator-max-microvolt = <3300000>;
|
||||
};
|
||||
|
||||
vtt_fixed: fixedregulator-vtt {
|
||||
/* TPS51200 */
|
||||
compatible = "regulator-fixed";
|
||||
regulator-name = "vtt_fixed";
|
||||
vin-supply = <&smps3_reg>;
|
||||
regulator-min-microvolt = <3300000>;
|
||||
regulator-max-microvolt = <3300000>;
|
||||
regulator-always-on;
|
||||
regulator-boot-on;
|
||||
enable-active-high;
|
||||
gpio = <&gpio7 11 GPIO_ACTIVE_HIGH>;
|
||||
};
|
||||
|
||||
leds {
|
||||
compatible = "gpio-leds";
|
||||
pinctrl-names = "default";
|
||||
pinctrl-0 = <&leds_pins_default>;
|
||||
|
||||
led@0 {
|
||||
label = "beagle-x15:usr0";
|
||||
gpios = <&gpio7 9 GPIO_ACTIVE_HIGH>;
|
||||
linux,default-trigger = "heartbeat";
|
||||
default-state = "off";
|
||||
};
|
||||
|
||||
led@1 {
|
||||
label = "beagle-x15:usr1";
|
||||
gpios = <&gpio7 8 GPIO_ACTIVE_HIGH>;
|
||||
linux,default-trigger = "cpu0";
|
||||
default-state = "off";
|
||||
};
|
||||
|
||||
led@2 {
|
||||
label = "beagle-x15:usr2";
|
||||
gpios = <&gpio7 14 GPIO_ACTIVE_HIGH>;
|
||||
linux,default-trigger = "mmc0";
|
||||
default-state = "off";
|
||||
};
|
||||
|
||||
led@3 {
|
||||
label = "beagle-x15:usr3";
|
||||
gpios = <&gpio7 15 GPIO_ACTIVE_HIGH>;
|
||||
linux,default-trigger = "ide-disk";
|
||||
default-state = "off";
|
||||
};
|
||||
};
|
||||
};
|
||||
|
||||
&dra7_pmx_core {
|
||||
leds_pins_default: leds_pins_default {
|
||||
pinctrl-single,pins = <
|
||||
0x3a8 (PIN_OUTPUT | MUX_MODE14) /* spi1_d1.gpio7_8 */
|
||||
0x3ac (PIN_OUTPUT | MUX_MODE14) /* spi1_d0.gpio7_9 */
|
||||
0x3c0 (PIN_OUTPUT | MUX_MODE14) /* spi2_sclk.gpio7_14 */
|
||||
0x3c4 (PIN_OUTPUT | MUX_MODE14) /* spi2_d1.gpio7_15 */
|
||||
>;
|
||||
};
|
||||
|
||||
i2c1_pins_default: i2c1_pins_default {
|
||||
pinctrl-single,pins = <
|
||||
0x400 (PIN_INPUT_PULLUP | MUX_MODE0) /* i2c1_sda.sda */
|
||||
0x404 (PIN_INPUT_PULLUP | MUX_MODE0) /* i2c1_scl.scl */
|
||||
>;
|
||||
};
|
||||
|
||||
i2c3_pins_default: i2c3_pins_default {
|
||||
pinctrl-single,pins = <
|
||||
0x2a4 (PIN_INPUT| MUX_MODE10) /* mcasp1_aclkx.i2c3_sda */
|
||||
0x2a8 (PIN_INPUT| MUX_MODE10) /* mcasp1_fsx.i2c3_scl */
|
||||
>;
|
||||
};
|
||||
|
||||
uart3_pins_default: uart3_pins_default {
|
||||
pinctrl-single,pins = <
|
||||
0x248 (PIN_INPUT_SLEW | MUX_MODE0) /* uart3_rxd.rxd */
|
||||
0x24c (PIN_INPUT_SLEW | MUX_MODE0) /* uart3_txd.txd */
|
||||
>;
|
||||
};
|
||||
|
||||
mmc1_pins_default: mmc1_pins_default {
|
||||
pinctrl-single,pins = <
|
||||
0x36c (PIN_INPUT | MUX_MODE14) /* mmc1sdcd.gpio219 */
|
||||
0x354 (PIN_INPUT_PULLUP | MUX_MODE0) /* mmc1_clk.clk */
|
||||
0x358 (PIN_INPUT_PULLUP | MUX_MODE0) /* mmc1_cmd.cmd */
|
||||
0x35c (PIN_INPUT_PULLUP | MUX_MODE0) /* mmc1_dat0.dat0 */
|
||||
0x360 (PIN_INPUT_PULLUP | MUX_MODE0) /* mmc1_dat1.dat1 */
|
||||
0x364 (PIN_INPUT_PULLUP | MUX_MODE0) /* mmc1_dat2.dat2 */
|
||||
0x368 (PIN_INPUT_PULLUP | MUX_MODE0) /* mmc1_dat3.dat3 */
|
||||
>;
|
||||
};
|
||||
|
||||
mmc2_pins_default: mmc2_pins_default {
|
||||
pinctrl-single,pins = <
|
||||
0x9c (PIN_INPUT_PULLUP | MUX_MODE1) /* gpmc_a23.mmc2_clk */
|
||||
0xb0 (PIN_INPUT_PULLUP | MUX_MODE1) /* gpmc_cs1.mmc2_cmd */
|
||||
0xa0 (PIN_INPUT_PULLUP | MUX_MODE1) /* gpmc_a24.mmc2_dat0 */
|
||||
0xa4 (PIN_INPUT_PULLUP | MUX_MODE1) /* gpmc_a25.mmc2_dat1 */
|
||||
0xa8 (PIN_INPUT_PULLUP | MUX_MODE1) /* gpmc_a26.mmc2_dat2 */
|
||||
0xac (PIN_INPUT_PULLUP | MUX_MODE1) /* gpmc_a27.mmc2_dat3 */
|
||||
0x8c (PIN_INPUT_PULLUP | MUX_MODE1) /* gpmc_a19.mmc2_dat4 */
|
||||
0x90 (PIN_INPUT_PULLUP | MUX_MODE1) /* gpmc_a20.mmc2_dat5 */
|
||||
0x94 (PIN_INPUT_PULLUP | MUX_MODE1) /* gpmc_a21.mmc2_dat6 */
|
||||
0x98 (PIN_INPUT_PULLUP | MUX_MODE1) /* gpmc_a22.mmc2_dat7 */
|
||||
>;
|
||||
};
|
||||
|
||||
tps659038_pins_default: tps659038_pins_default {
|
||||
pinctrl-single,pins = <
|
||||
0x418 (PIN_INPUT_PULLUP | MUX_MODE14) /* wakeup0.gpio1_0 */
|
||||
>;
|
||||
};
|
||||
|
||||
tmp102_pins_default: tmp102_pins_default {
|
||||
pinctrl-single,pins = <
|
||||
0x3C8 (PIN_INPUT_PULLUP | MUX_MODE14) /* spi2_d0.gpio7_16 */
|
||||
>;
|
||||
};
|
||||
|
||||
mcp79410_pins_default: mcp79410_pins_default {
|
||||
pinctrl-single,pins = <
|
||||
0x424 (PIN_INPUT_PULLUP | MUX_MODE1) /* wakeup3.sys_nirq1 */
|
||||
>;
|
||||
};
|
||||
|
||||
usb1_pins: pinmux_usb1_pins {
|
||||
pinctrl-single,pins = <
|
||||
0x280 (PIN_INPUT_SLEW | MUX_MODE0) /* usb1_drvvbus */
|
||||
>;
|
||||
};
|
||||
|
||||
};
|
||||
|
||||
&i2c1 {
|
||||
status = "okay";
|
||||
pinctrl-names = "default";
|
||||
pinctrl-0 = <&i2c1_pins_default>;
|
||||
clock-frequency = <400000>;
|
||||
|
||||
tps659038: tps659038@58 {
|
||||
compatible = "ti,tps659038";
|
||||
reg = <0x58>;
|
||||
interrupt-parent = <&gpio1>;
|
||||
interrupts = <0 IRQ_TYPE_LEVEL_LOW>;
|
||||
|
||||
pinctrl-names = "default";
|
||||
pinctrl-0 = <&tps659038_pins_default>;
|
||||
|
||||
#interrupt-cells = <2>;
|
||||
interrupt-controller;
|
||||
|
||||
ti,system-power-controller;
|
||||
|
||||
tps659038_pmic {
|
||||
compatible = "ti,tps659038-pmic";
|
||||
|
||||
regulators {
|
||||
smps12_reg: smps12 {
|
||||
/* VDD_MPU */
|
||||
regulator-name = "smps12";
|
||||
regulator-min-microvolt = < 850000>;
|
||||
regulator-max-microvolt = <1250000>;
|
||||
regulator-always-on;
|
||||
regulator-boot-on;
|
||||
};
|
||||
|
||||
smps3_reg: smps3 {
|
||||
/* VDD_DDR */
|
||||
regulator-name = "smps3";
|
||||
regulator-min-microvolt = <1350000>;
|
||||
regulator-max-microvolt = <1350000>;
|
||||
regulator-always-on;
|
||||
regulator-boot-on;
|
||||
};
|
||||
|
||||
smps45_reg: smps45 {
|
||||
/* VDD_DSPEVE, VDD_IVA, VDD_GPU */
|
||||
regulator-name = "smps45";
|
||||
regulator-min-microvolt = < 850000>;
|
||||
regulator-max-microvolt = <1150000>;
|
||||
regulator-always-on;
|
||||
regulator-boot-on;
|
||||
};
|
||||
|
||||
smps6_reg: smps6 {
|
||||
/* VDD_CORE */
|
||||
regulator-name = "smps6";
|
||||
regulator-min-microvolt = <850000>;
|
||||
regulator-max-microvolt = <1030000>;
|
||||
regulator-always-on;
|
||||
regulator-boot-on;
|
||||
};
|
||||
|
||||
/* SMPS7 unused */
|
||||
|
||||
smps8_reg: smps8 {
|
||||
/* VDD_1V8 */
|
||||
regulator-name = "smps8";
|
||||
regulator-min-microvolt = <1800000>;
|
||||
regulator-max-microvolt = <1800000>;
|
||||
regulator-always-on;
|
||||
regulator-boot-on;
|
||||
};
|
||||
|
||||
/* SMPS9 unused */
|
||||
|
||||
ldo1_reg: ldo1 {
|
||||
/* VDD_SD */
|
||||
regulator-name = "ldo1";
|
||||
regulator-min-microvolt = <1800000>;
|
||||
regulator-max-microvolt = <3300000>;
|
||||
regulator-boot-on;
|
||||
};
|
||||
|
||||
ldo2_reg: ldo2 {
|
||||
/* VDD_SHV5 */
|
||||
regulator-name = "ldo2";
|
||||
regulator-min-microvolt = <3300000>;
|
||||
regulator-max-microvolt = <3300000>;
|
||||
regulator-always-on;
|
||||
regulator-boot-on;
|
||||
};
|
||||
|
||||
ldo3_reg: ldo3 {
|
||||
/* VDDA_1V8_PHY */
|
||||
regulator-name = "ldo3";
|
||||
regulator-min-microvolt = <1800000>;
|
||||
regulator-max-microvolt = <1800000>;
|
||||
regulator-always-on;
|
||||
regulator-boot-on;
|
||||
};
|
||||
|
||||
ldo9_reg: ldo9 {
|
||||
/* VDD_RTC */
|
||||
regulator-name = "ldo9";
|
||||
regulator-min-microvolt = <1050000>;
|
||||
regulator-max-microvolt = <1050000>;
|
||||
regulator-always-on;
|
||||
regulator-boot-on;
|
||||
};
|
||||
|
||||
ldoln_reg: ldoln {
|
||||
/* VDDA_1V8_PLL */
|
||||
regulator-name = "ldoln";
|
||||
regulator-min-microvolt = <1800000>;
|
||||
regulator-max-microvolt = <1800000>;
|
||||
regulator-always-on;
|
||||
regulator-boot-on;
|
||||
};
|
||||
|
||||
ldousb_reg: ldousb {
|
||||
/* VDDA_3V_USB: VDDA_USBHS33 */
|
||||
regulator-name = "ldousb";
|
||||
regulator-min-microvolt = <3300000>;
|
||||
regulator-max-microvolt = <3300000>;
|
||||
regulator-boot-on;
|
||||
};
|
||||
|
||||
regen1: regen1 {
|
||||
/* VDD_3V3_ON */
|
||||
regulator-name = "regen1";
|
||||
regulator-boot-on;
|
||||
regulator-always-on;
|
||||
};
|
||||
};
|
||||
};
|
||||
|
||||
tps659038_rtc: tps659038_rtc {
|
||||
compatible = "ti,palmas-rtc";
|
||||
interrupt-parent = <&tps659038>;
|
||||
interrupts = <8 IRQ_TYPE_EDGE_FALLING>;
|
||||
wakeup-source;
|
||||
};
|
||||
|
||||
tps659038_pwr_button: tps659038_pwr_button {
|
||||
compatible = "ti,palmas-pwrbutton";
|
||||
interrupt-parent = <&tps659038>;
|
||||
interrupts = <1 IRQ_TYPE_EDGE_FALLING>;
|
||||
wakeup-source;
|
||||
ti,palmas-long-press-seconds = <12>;
|
||||
};
|
||||
};
|
||||
|
||||
tmp102: tmp102@48 {
|
||||
compatible = "ti,tmp102";
|
||||
reg = <0x48>;
|
||||
pinctrl-names = "default";
|
||||
pinctrl-0 = <&tmp102_pins_default>;
|
||||
interrupt-parent = <&gpio7>;
|
||||
interrupts = <16 IRQ_TYPE_LEVEL_LOW>;
|
||||
};
|
||||
};
|
||||
|
||||
&i2c3 {
|
||||
status = "okay";
|
||||
pinctrl-names = "default";
|
||||
pinctrl-0 = <&i2c3_pins_default>;
|
||||
clock-frequency = <400000>;
|
||||
|
||||
mcp_rtc: rtc@6f {
|
||||
compatible = "microchip,mcp7941x";
|
||||
reg = <0x6f>;
|
||||
interrupt-parent = <&gic>;
|
||||
interrupts = <GIC_SPI 2 IRQ_TYPE_LEVEL_LOW>; /* IRQ_SYS_1N */
|
||||
|
||||
pinctrl-names = "default";
|
||||
pinctrl-0 = <&mcp79410_pins_default>;
|
||||
|
||||
vcc-supply = <&vdd_3v3>;
|
||||
wakeup-source;
|
||||
};
|
||||
};
|
||||
|
||||
&gpio7 {
|
||||
ti,no-reset-on-init;
|
||||
ti,no-idle-on-init;
|
||||
};
|
||||
|
||||
&cpu0 {
|
||||
cpu0-supply = <&smps12_reg>;
|
||||
voltage-tolerance = <1>;
|
||||
};
|
||||
|
||||
&uart3 {
|
||||
status = "okay";
|
||||
interrupts-extended = <&gic GIC_SPI 69 IRQ_TYPE_LEVEL_HIGH>,
|
||||
<&dra7_pmx_core 0x248>;
|
||||
|
||||
pinctrl-names = "default";
|
||||
pinctrl-0 = <&uart3_pins_default>;
|
||||
};
|
||||
|
||||
&mmc1 {
|
||||
status = "okay";
|
||||
|
||||
pinctrl-names = "default";
|
||||
pinctrl-0 = <&mmc1_pins_default>;
|
||||
|
||||
vmmc-supply = <&ldo1_reg>;
|
||||
vmmc_aux-supply = <&vdd_3v3>;
|
||||
pbias-supply = <&pbias_mmc_reg>;
|
||||
bus-width = <4>;
|
||||
cd-gpios = <&gpio6 27 0>; /* gpio 219 */
|
||||
};
|
||||
|
||||
&mmc2 {
|
||||
status = "okay";
|
||||
|
||||
pinctrl-names = "default";
|
||||
pinctrl-0 = <&mmc2_pins_default>;
|
||||
|
||||
vmmc-supply = <&vdd_3v3>;
|
||||
bus-width = <8>;
|
||||
ti,non-removable;
|
||||
cap-mmc-dual-data-rate;
|
||||
};
|
||||
|
||||
&sata {
|
||||
status = "okay";
|
||||
};
|
||||
|
||||
&usb2_phy1 {
|
||||
phy-supply = <&ldousb_reg>;
|
||||
};
|
||||
|
||||
&usb1 {
|
||||
dr_mode = "host";
|
||||
pinctrl-names = "default";
|
||||
pinctrl-0 = <&usb1_pins>;
|
||||
};
|
412
arch/arm/boot/dts/arm-realview-pb1176.dts
Normal file
412
arch/arm/boot/dts/arm-realview-pb1176.dts
Normal file
|
@ -0,0 +1,412 @@
|
|||
/*
|
||||
* Copyright 2014 Linaro Ltd
|
||||
*
|
||||
* Permission is hereby granted, free of charge, to any person obtaining a copy
|
||||
* of this software and associated documentation files (the "Software"), to deal
|
||||
* in the Software without restriction, including without limitation the rights
|
||||
* to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
|
||||
* copies of the Software, and to permit persons to whom the Software is
|
||||
* furnished to do so, subject to the following conditions:
|
||||
*
|
||||
* The above copyright notice and this permission notice shall be included in
|
||||
* all copies or substantial portions of the Software.
|
||||
*
|
||||
* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
|
||||
* IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
|
||||
* FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
|
||||
* THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
|
||||
* LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
|
||||
* OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN
|
||||
* THE SOFTWARE.
|
||||
*/
|
||||
|
||||
/dts-v1/;
|
||||
#include <dt-bindings/interrupt-controller/irq.h>
|
||||
#include <dt-bindings/gpio/gpio.h>
|
||||
#include "skeleton.dtsi"
|
||||
|
||||
/ {
|
||||
model = "ARM RealView PB1176";
|
||||
compatible = "arm,realview-pb1176";
|
||||
|
||||
chosen { };
|
||||
|
||||
aliases {
|
||||
serial0 = &pb1176_serial0;
|
||||
serial1 = &pb1176_serial1;
|
||||
serial2 = &pb1176_serial2;
|
||||
serial3 = &pb1176_serial3;
|
||||
serial4 = &fpga_serial;
|
||||
};
|
||||
|
||||
memory {
|
||||
/* 128 MiB memory @ 0x0 */
|
||||
reg = <0x00000000 0x08000000>;
|
||||
};
|
||||
|
||||
/* The voltage to the MMC card is hardwired at 3.3V */
|
||||
vmmc: fixedregulator@0 {
|
||||
compatible = "regulator-fixed";
|
||||
regulator-name = "vmmc";
|
||||
regulator-min-microvolt = <3300000>;
|
||||
regulator-max-microvolt = <3300000>;
|
||||
regulator-boot-on;
|
||||
};
|
||||
|
||||
xtal24mhz: xtal24mhz@24M {
|
||||
#clock-cells = <0>;
|
||||
compatible = "fixed-clock";
|
||||
clock-frequency = <24000000>;
|
||||
};
|
||||
|
||||
timclk: timclk@1M {
|
||||
#clock-cells = <0>;
|
||||
compatible = "fixed-factor-clock";
|
||||
clock-div = <24>;
|
||||
clock-mult = <1>;
|
||||
clocks = <&xtal24mhz>;
|
||||
};
|
||||
|
||||
mclk: mclk@24M {
|
||||
#clock-cells = <0>;
|
||||
compatible = "fixed-factor-clock";
|
||||
clock-div = <1>;
|
||||
clock-mult = <1>;
|
||||
clocks = <&xtal24mhz>;
|
||||
};
|
||||
|
||||
kmiclk: kmiclk@24M {
|
||||
#clock-cells = <0>;
|
||||
compatible = "fixed-factor-clock";
|
||||
clock-div = <1>;
|
||||
clock-mult = <1>;
|
||||
clocks = <&xtal24mhz>;
|
||||
};
|
||||
|
||||
sspclk: sspclk@24M {
|
||||
#clock-cells = <0>;
|
||||
compatible = "fixed-factor-clock";
|
||||
clock-div = <1>;
|
||||
clock-mult = <1>;
|
||||
clocks = <&xtal24mhz>;
|
||||
};
|
||||
|
||||
uartclk: uartclk@24M {
|
||||
#clock-cells = <0>;
|
||||
compatible = "fixed-factor-clock";
|
||||
clock-div = <1>;
|
||||
clock-mult = <1>;
|
||||
clocks = <&xtal24mhz>;
|
||||
};
|
||||
|
||||
/* FIXME: this actually hangs off the PLL clocks */
|
||||
pclk: pclk@0 {
|
||||
#clock-cells = <0>;
|
||||
compatible = "fixed-clock";
|
||||
clock-frequency = <0>;
|
||||
};
|
||||
|
||||
soc {
|
||||
#address-cells = <1>;
|
||||
#size-cells = <1>;
|
||||
compatible = "arm,realview-pb1176-soc", "simple-bus";
|
||||
regmap = <&syscon>;
|
||||
ranges;
|
||||
|
||||
syscon: syscon@10000000 {
|
||||
compatible = "arm,realview-pb1176-syscon", "syscon";
|
||||
reg = <0x10000000 0x1000>;
|
||||
|
||||
led@08.0 {
|
||||
compatible = "register-bit-led";
|
||||
offset = <0x08>;
|
||||
mask = <0x01>;
|
||||
label = "versatile:0";
|
||||
linux,default-trigger = "heartbeat";
|
||||
default-state = "on";
|
||||
};
|
||||
led@08.1 {
|
||||
compatible = "register-bit-led";
|
||||
offset = <0x08>;
|
||||
mask = <0x02>;
|
||||
label = "versatile:1";
|
||||
linux,default-trigger = "mmc0";
|
||||
default-state = "off";
|
||||
};
|
||||
led@08.2 {
|
||||
compatible = "register-bit-led";
|
||||
offset = <0x08>;
|
||||
mask = <0x04>;
|
||||
label = "versatile:2";
|
||||
linux,default-trigger = "cpu0";
|
||||
default-state = "off";
|
||||
};
|
||||
led@08.3 {
|
||||
compatible = "register-bit-led";
|
||||
offset = <0x08>;
|
||||
mask = <0x08>;
|
||||
label = "versatile:3";
|
||||
default-state = "off";
|
||||
};
|
||||
led@08.4 {
|
||||
compatible = "register-bit-led";
|
||||
offset = <0x08>;
|
||||
mask = <0x10>;
|
||||
label = "versatile:4";
|
||||
default-state = "off";
|
||||
};
|
||||
led@08.5 {
|
||||
compatible = "register-bit-led";
|
||||
offset = <0x08>;
|
||||
mask = <0x20>;
|
||||
label = "versatile:5";
|
||||
default-state = "off";
|
||||
};
|
||||
led@08.6 {
|
||||
compatible = "register-bit-led";
|
||||
offset = <0x08>;
|
||||
mask = <0x40>;
|
||||
label = "versatile:6";
|
||||
default-state = "off";
|
||||
};
|
||||
led@08.7 {
|
||||
compatible = "register-bit-led";
|
||||
offset = <0x08>;
|
||||
mask = <0x80>;
|
||||
label = "versatile:7";
|
||||
default-state = "off";
|
||||
};
|
||||
};
|
||||
|
||||
/* Primary DevChip GIC synthesized with the CPU */
|
||||
intc_dc1176: interrupt-controller@10120000 {
|
||||
compatible = "arm,arm1176jzf-devchip-gic", "arm,arm11mp-gic";
|
||||
#interrupt-cells = <3>;
|
||||
#address-cells = <1>;
|
||||
interrupt-controller;
|
||||
reg = <0x10121000 0x1000>,
|
||||
<0x10120000 0x100>;
|
||||
};
|
||||
|
||||
L2: l2-cache {
|
||||
compatible = "arm,l220-cache";
|
||||
reg = <0x10110000 0x1000>;
|
||||
interrupt-parent = <&intc_dc1176>;
|
||||
interrupts = <0 13 IRQ_TYPE_LEVEL_HIGH>;
|
||||
cache-unified;
|
||||
cache-level = <2>;
|
||||
/*
|
||||
* Override default cache size, sets and
|
||||
* associativity as these may be erroneously set
|
||||
* up by boot loader(s).
|
||||
*/
|
||||
arm,override-auxreg;
|
||||
cache-size = <131072>; // 128kB
|
||||
cache-sets = <512>;
|
||||
cache-line-size = <32>;
|
||||
};
|
||||
|
||||
pmu {
|
||||
compatible = "arm,arm1176-pmu";
|
||||
interrupt-parent = <&intc_dc1176>;
|
||||
interrupts = <0 7 IRQ_TYPE_LEVEL_HIGH>;
|
||||
};
|
||||
|
||||
timer01: timer@10104000 {
|
||||
compatible = "arm,sp804", "arm,primecell";
|
||||
reg = <0x10104000 0x1000>;
|
||||
interrupt-parent = <&intc_dc1176>;
|
||||
interrupts = <0 8 IRQ_TYPE_LEVEL_HIGH>, <0 9 IRQ_TYPE_LEVEL_HIGH>;
|
||||
clocks = <&timclk>, <&timclk>, <&pclk>;
|
||||
clock-names = "timer1", "timer2", "apb_pclk";
|
||||
};
|
||||
|
||||
timer23: timer@10105000 {
|
||||
compatible = "arm,sp804", "arm,primecell";
|
||||
reg = <0x10105000 0x1000>;
|
||||
interrupt-parent = <&intc_dc1176>;
|
||||
interrupts = <0 10 IRQ_TYPE_LEVEL_HIGH>;
|
||||
arm,sp804-has-irq = <1>;
|
||||
clocks = <&timclk>, <&timclk>, <&pclk>;
|
||||
clock-names = "timer1", "timer2", "apb_pclk";
|
||||
};
|
||||
|
||||
pb1176_rtc: rtc@10108000 {
|
||||
compatible = "arm,pl031", "arm,primecell";
|
||||
reg = <0x10108000 0x1000>;
|
||||
interrupt-parent = <&intc_dc1176>;
|
||||
interrupts = <0 14 IRQ_TYPE_LEVEL_HIGH>;
|
||||
clocks = <&pclk>;
|
||||
clock-names = "apb_pclk";
|
||||
};
|
||||
|
||||
pb1176_gpio0: gpio@1010a000 {
|
||||
compatible = "arm,pl061", "arm,primecell";
|
||||
reg = <0x1010a000 0x1000>;
|
||||
gpio-controller;
|
||||
interrupt-parent = <&intc_dc1176>;
|
||||
interrupts = <0 16 IRQ_TYPE_LEVEL_HIGH>;
|
||||
#gpio-cells = <2>;
|
||||
interrupt-controller;
|
||||
#interrupt-cells = <2>;
|
||||
clocks = <&pclk>;
|
||||
clock-names = "apb_pclk";
|
||||
};
|
||||
|
||||
pb1176_ssp: ssp@1010b000 {
|
||||
compatible = "arm,pl022", "arm,primecell";
|
||||
reg = <0x1010b000 0x1000>;
|
||||
interrupt-parent = <&intc_dc1176>;
|
||||
interrupts = <0 17 IRQ_TYPE_LEVEL_HIGH>;
|
||||
clocks = <&sspclk>, <&pclk>;
|
||||
clock-names = "SSPCLK", "apb_pclk";
|
||||
};
|
||||
|
||||
pb1176_serial0: serial@1010c000 {
|
||||
compatible = "arm,pl011", "arm,primecell";
|
||||
reg = <0x1010c000 0x1000>;
|
||||
interrupt-parent = <&intc_dc1176>;
|
||||
interrupts = <0 18 IRQ_TYPE_LEVEL_HIGH>;
|
||||
clocks = <&uartclk>, <&pclk>;
|
||||
clock-names = "uartclk", "apb_pclk";
|
||||
};
|
||||
|
||||
pb1176_serial1: serial@1010d000 {
|
||||
compatible = "arm,pl011", "arm,primecell";
|
||||
reg = <0x1010d000 0x1000>;
|
||||
interrupt-parent = <&intc_dc1176>;
|
||||
interrupts = <0 19 IRQ_TYPE_LEVEL_HIGH>;
|
||||
clocks = <&uartclk>, <&pclk>;
|
||||
clock-names = "uartclk", "apb_pclk";
|
||||
};
|
||||
|
||||
pb1176_serial2: serial@1010e000 {
|
||||
compatible = "arm,pl011", "arm,primecell";
|
||||
reg = <0x1010e000 0x1000>;
|
||||
interrupt-parent = <&intc_dc1176>;
|
||||
interrupts = <0 20 IRQ_TYPE_LEVEL_HIGH>;
|
||||
clocks = <&uartclk>, <&pclk>;
|
||||
clock-names = "uartclk", "apb_pclk";
|
||||
};
|
||||
|
||||
pb1176_serial3: serial@1010f000 {
|
||||
compatible = "arm,pl011", "arm,primecell";
|
||||
reg = <0x1010f000 0x1000>;
|
||||
interrupt-parent = <&intc_dc1176>;
|
||||
interrupts = <0 21 IRQ_TYPE_LEVEL_HIGH>;
|
||||
clocks = <&uartclk>, <&pclk>;
|
||||
clock-names = "uartclk", "apb_pclk";
|
||||
};
|
||||
};
|
||||
|
||||
/* These peripherals are inside the FPGA rather than the DevChip */
|
||||
fpga {
|
||||
#address-cells = <1>;
|
||||
#size-cells = <1>;
|
||||
compatible = "simple-bus";
|
||||
ranges;
|
||||
|
||||
fpga_mci: mmcsd@10005000 {
|
||||
compatible = "arm,pl18x", "arm,primecell";
|
||||
reg = <0x10005000 0x1000>;
|
||||
interrupt-parent = <&intc_fpga1176>;
|
||||
interrupts = <0 1 IRQ_TYPE_LEVEL_HIGH>,
|
||||
<0 2 IRQ_TYPE_LEVEL_HIGH>;
|
||||
/* Due to frequent FIFO overruns, use just 500 kHz */
|
||||
max-frequency = <500000>;
|
||||
bus-width = <4>;
|
||||
cap-sd-highspeed;
|
||||
cap-mmc-highspeed;
|
||||
clocks = <&mclk>, <&pclk>;
|
||||
clock-names = "mclk", "apb_pclk";
|
||||
vmmc-supply = <&vmmc>;
|
||||
cd-gpios = <&fpga_gpio1 0 GPIO_ACTIVE_LOW>;
|
||||
wp-gpios = <&fpga_gpio1 1 GPIO_ACTIVE_HIGH>;
|
||||
};
|
||||
|
||||
fpga_kmi0: kmi@10006000 {
|
||||
compatible = "arm,pl050", "arm,primecell";
|
||||
reg = <0x10006000 0x1000>;
|
||||
interrupt-parent = <&intc_fpga1176>;
|
||||
interrupts = <0 3 IRQ_TYPE_LEVEL_HIGH>;
|
||||
clocks = <&kmiclk>, <&pclk>;
|
||||
clock-names = "KMIREFCLK", "apb_pclk";
|
||||
};
|
||||
|
||||
fpga_kmi1: kmi@10007000 {
|
||||
compatible = "arm,pl050", "arm,primecell";
|
||||
reg = <0x10007000 0x1000>;
|
||||
interrupt-parent = <&intc_fpga1176>;
|
||||
interrupts = <0 4 IRQ_TYPE_LEVEL_HIGH>;
|
||||
clocks = <&kmiclk>, <&pclk>;
|
||||
clock-names = "KMIREFCLK", "apb_pclk";
|
||||
};
|
||||
|
||||
fpga_charlcd: charlcd@10008000 {
|
||||
compatible = "arm,versatile-lcd";
|
||||
reg = <0x10008000 0x1000>;
|
||||
interrupt-parent = <&intc_fpga1176>;
|
||||
interrupts = <0 7 IRQ_TYPE_LEVEL_HIGH>;
|
||||
clocks = <&pclk>;
|
||||
clock-names = "apb_pclk";
|
||||
};
|
||||
|
||||
fpga_serial: serial@10009000 {
|
||||
compatible = "arm,pl011", "arm,primecell";
|
||||
reg = <0x10009000 0x1000>;
|
||||
interrupt-parent = <&intc_fpga1176>;
|
||||
interrupts = <0 6 IRQ_TYPE_LEVEL_HIGH>;
|
||||
clocks = <&uartclk>, <&pclk>;
|
||||
clock-names = "uartclk", "apb_pclk";
|
||||
};
|
||||
|
||||
/* This GIC on the board is cascaded off the DevChip GIC */
|
||||
intc_fpga1176: interrupt-controller@10040000 {
|
||||
compatible = "arm,arm1176jzf-devchip-gic", "arm,arm11mp-gic";
|
||||
#interrupt-cells = <3>;
|
||||
#address-cells = <1>;
|
||||
interrupt-controller;
|
||||
reg = <0x10041000 0x1000>,
|
||||
<0x10040000 0x100>;
|
||||
interrupt-parent = <&intc_dc1176>;
|
||||
interrupts = <0 31 IRQ_TYPE_LEVEL_HIGH>;
|
||||
};
|
||||
|
||||
fpga_gpio0: gpio@10014000 {
|
||||
compatible = "arm,pl061", "arm,primecell";
|
||||
reg = <0x10014000 0x1000>;
|
||||
gpio-controller;
|
||||
interrupt-parent = <&intc_fpga1176>;
|
||||
interrupts = <0 8 IRQ_TYPE_LEVEL_HIGH>;
|
||||
#gpio-cells = <2>;
|
||||
interrupt-controller;
|
||||
#interrupt-cells = <2>;
|
||||
clocks = <&pclk>;
|
||||
clock-names = "apb_pclk";
|
||||
};
|
||||
|
||||
fpga_gpio1: gpio@10015000 {
|
||||
compatible = "arm,pl061", "arm,primecell";
|
||||
reg = <0x10015000 0x1000>;
|
||||
gpio-controller;
|
||||
interrupt-parent = <&intc_fpga1176>;
|
||||
interrupts = <0 9 IRQ_TYPE_LEVEL_HIGH>;
|
||||
#gpio-cells = <2>;
|
||||
interrupt-controller;
|
||||
#interrupt-cells = <2>;
|
||||
clocks = <&pclk>;
|
||||
clock-names = "apb_pclk";
|
||||
};
|
||||
|
||||
fpga_rtc: rtc@10017000 {
|
||||
compatible = "arm,pl031", "arm,primecell";
|
||||
reg = <0x10017000 0x1000>;
|
||||
interrupt-parent = <&intc_fpga1176>;
|
||||
interrupts = <0 25 IRQ_TYPE_LEVEL_HIGH>;
|
||||
clocks = <&pclk>;
|
||||
clock-names = "apb_pclk";
|
||||
};
|
||||
|
||||
|
||||
};
|
||||
};
|
|
@ -75,6 +75,7 @@ i2c@11000 {
|
|||
clock-frequency = <100000>;
|
||||
status = "okay";
|
||||
audio_codec: audio-codec@4a {
|
||||
#sound-dai-cells = <0>;
|
||||
compatible = "cirrus,cs42l51";
|
||||
reg = <0x4a>;
|
||||
};
|
||||
|
@ -102,30 +103,6 @@ mvsdio@d4000 {
|
|||
broken-cd;
|
||||
};
|
||||
|
||||
pinctrl {
|
||||
/*
|
||||
* These pins might be muxed as I2S by
|
||||
* the bootloader, but it conflicts
|
||||
* with the real I2S pins that are
|
||||
* muxed using i2s_pins. We must mux
|
||||
* those pins to a function other than
|
||||
* I2S.
|
||||
*/
|
||||
pinctrl-0 = <&hog_pins1 &hog_pins2>;
|
||||
pinctrl-names = "default";
|
||||
|
||||
hog_pins1: hog-pins1 {
|
||||
marvell,pins = "mpp6", "mpp8", "mpp10",
|
||||
"mpp12", "mpp13";
|
||||
marvell,function = "gpio";
|
||||
};
|
||||
|
||||
hog_pins2: hog-pins2 {
|
||||
marvell,pins = "mpp5", "mpp7", "mpp9";
|
||||
marvell,function = "gpo";
|
||||
};
|
||||
};
|
||||
|
||||
usb@50000 {
|
||||
status = "okay";
|
||||
};
|
||||
|
@ -135,6 +112,8 @@ usb@51000 {
|
|||
};
|
||||
|
||||
spi0: spi@10600 {
|
||||
pinctrl-0 = <&spi0_pins2>;
|
||||
pinctrl-names = "default";
|
||||
status = "okay";
|
||||
|
||||
spi-flash@0 {
|
||||
|
@ -167,17 +146,84 @@ pcie@2,0 {
|
|||
};
|
||||
|
||||
sound {
|
||||
compatible = "marvell,a370db-audio";
|
||||
marvell,audio-controller = <&audio_controller>;
|
||||
marvell,audio-codec = <&audio_codec &spdif_out &spdif_in>;
|
||||
status = "okay";
|
||||
compatible = "simple-audio-card";
|
||||
simple-audio-card,name = "Armada 370 DB Audio";
|
||||
simple-audio-card,mclk-fs = <256>;
|
||||
simple-audio-card,widgets =
|
||||
"Headphone", "Out Jack",
|
||||
"Line", "In Jack";
|
||||
simple-audio-card,routing =
|
||||
"Out Jack", "HPL",
|
||||
"Out Jack", "HPR",
|
||||
"AIN1L", "In Jack",
|
||||
"AIN1L", "In Jack";
|
||||
status = "okay";
|
||||
|
||||
simple-audio-card,dai-link@0 {
|
||||
format = "i2s";
|
||||
cpu {
|
||||
sound-dai = <&audio_controller 0>;
|
||||
};
|
||||
|
||||
codec {
|
||||
sound-dai = <&audio_codec>;
|
||||
};
|
||||
};
|
||||
|
||||
simple-audio-card,dai-link@1 {
|
||||
format = "i2s";
|
||||
cpu {
|
||||
sound-dai = <&audio_controller 1>;
|
||||
};
|
||||
|
||||
codec {
|
||||
sound-dai = <&spdif_out>;
|
||||
};
|
||||
};
|
||||
|
||||
simple-audio-card,dai-link@2 {
|
||||
format = "i2s";
|
||||
cpu {
|
||||
sound-dai = <&audio_controller 1>;
|
||||
};
|
||||
|
||||
codec {
|
||||
sound-dai = <&spdif_in>;
|
||||
};
|
||||
};
|
||||
};
|
||||
|
||||
spdif_out: spdif-out {
|
||||
compatible = "linux,spdif-dit";
|
||||
#sound-dai-cells = <0>;
|
||||
compatible = "linux,spdif-dit";
|
||||
};
|
||||
|
||||
spdif_in: spdif-in {
|
||||
compatible = "linux,spdif-dir";
|
||||
#sound-dai-cells = <0>;
|
||||
compatible = "linux,spdif-dir";
|
||||
};
|
||||
};
|
||||
|
||||
&pinctrl {
|
||||
/*
|
||||
* These pins might be muxed as I2S by
|
||||
* the bootloader, but it conflicts
|
||||
* with the real I2S pins that are
|
||||
* muxed using i2s_pins. We must mux
|
||||
* those pins to a function other than
|
||||
* I2S.
|
||||
*/
|
||||
pinctrl-0 = <&hog_pins1 &hog_pins2>;
|
||||
pinctrl-names = "default";
|
||||
|
||||
hog_pins1: hog-pins1 {
|
||||
marvell,pins = "mpp6", "mpp8", "mpp10",
|
||||
"mpp12", "mpp13";
|
||||
marvell,function = "gpio";
|
||||
};
|
||||
|
||||
hog_pins2: hog-pins2 {
|
||||
marvell,pins = "mpp5", "mpp7", "mpp9";
|
||||
marvell,function = "gpo";
|
||||
};
|
||||
};
|
||||
|
|
|
@ -54,18 +54,6 @@ timer@20300 {
|
|||
status = "okay";
|
||||
};
|
||||
|
||||
pinctrl {
|
||||
pwr_led_pin: pwr-led-pin {
|
||||
marvell,pins = "mpp63";
|
||||
marvell,function = "gpo";
|
||||
};
|
||||
|
||||
stat_led_pins: stat-led-pins {
|
||||
marvell,pins = "mpp64", "mpp65";
|
||||
marvell,function = "gpio";
|
||||
};
|
||||
};
|
||||
|
||||
gpio_leds {
|
||||
compatible = "gpio-leds";
|
||||
pinctrl-names = "default";
|
||||
|
@ -169,3 +157,16 @@ partition@800000 {
|
|||
};
|
||||
};
|
||||
};
|
||||
|
||||
&pinctrl {
|
||||
pwr_led_pin: pwr-led-pin {
|
||||
marvell,pins = "mpp63";
|
||||
marvell,function = "gpo";
|
||||
};
|
||||
|
||||
stat_led_pins: stat-led-pins {
|
||||
marvell,pins = "mpp64", "mpp65";
|
||||
marvell,function = "gpio";
|
||||
};
|
||||
};
|
||||
|
||||
|
|
|
@ -35,7 +35,7 @@ soc {
|
|||
pcie-controller {
|
||||
status = "okay";
|
||||
|
||||
/* Connected to Marvell SATA controller */
|
||||
/* Connected to Marvell 88SE9170 SATA controller */
|
||||
pcie@1,0 {
|
||||
/* Port 0, Lane 0 */
|
||||
status = "okay";
|
||||
|
@ -53,53 +53,12 @@ serial@12000 {
|
|||
status = "okay";
|
||||
};
|
||||
|
||||
/* eSATA interface */
|
||||
sata@a0000 {
|
||||
nr-ports = <2>;
|
||||
nr-ports = <1>;
|
||||
status = "okay";
|
||||
};
|
||||
|
||||
pinctrl {
|
||||
power_led_pin: power-led-pin {
|
||||
marvell,pins = "mpp57";
|
||||
marvell,function = "gpio";
|
||||
};
|
||||
|
||||
sata1_led_pin: sata1-led-pin {
|
||||
marvell,pins = "mpp15";
|
||||
marvell,function = "gpio";
|
||||
};
|
||||
|
||||
sata2_led_pin: sata2-led-pin {
|
||||
marvell,pins = "mpp14";
|
||||
marvell,function = "gpio";
|
||||
};
|
||||
|
||||
backup_led_pin: backup-led-pin {
|
||||
marvell,pins = "mpp56";
|
||||
marvell,function = "gpio";
|
||||
};
|
||||
|
||||
backup_button_pin: backup-button-pin {
|
||||
marvell,pins = "mpp58";
|
||||
marvell,function = "gpio";
|
||||
};
|
||||
|
||||
power_button_pin: power-button-pin {
|
||||
marvell,pins = "mpp62";
|
||||
marvell,function = "gpio";
|
||||
};
|
||||
|
||||
reset_button_pin: reset-button-pin {
|
||||
marvell,pins = "mpp6";
|
||||
marvell,function = "gpio";
|
||||
};
|
||||
|
||||
poweroff: poweroff {
|
||||
marvell,pins = "mpp8";
|
||||
marvell,function = "gpio";
|
||||
};
|
||||
};
|
||||
|
||||
mdio {
|
||||
pinctrl-0 = <&mdio_pins>;
|
||||
pinctrl-names = "default";
|
||||
|
@ -204,20 +163,20 @@ blue-power-led {
|
|||
default-state = "keep";
|
||||
};
|
||||
|
||||
green-sata1-led {
|
||||
label = "rn102:green:sata1";
|
||||
blue-sata1-led {
|
||||
label = "rn102:blue:sata1";
|
||||
gpios = <&gpio0 15 GPIO_ACTIVE_LOW>;
|
||||
default-state = "on";
|
||||
};
|
||||
|
||||
green-sata2-led {
|
||||
label = "rn102:green:sata2";
|
||||
blue-sata2-led {
|
||||
label = "rn102:blue:sata2";
|
||||
gpios = <&gpio0 14 GPIO_ACTIVE_LOW>;
|
||||
default-state = "on";
|
||||
};
|
||||
|
||||
green-backup-led {
|
||||
label = "rn102:green:backup";
|
||||
blue-backup-led {
|
||||
label = "rn102:blue:backup";
|
||||
gpios = <&gpio1 24 GPIO_ACTIVE_LOW>;
|
||||
default-state = "on";
|
||||
};
|
||||
|
@ -256,3 +215,45 @@ gpio-poweroff {
|
|||
gpios = <&gpio0 8 GPIO_ACTIVE_LOW>;
|
||||
};
|
||||
};
|
||||
|
||||
&pinctrl {
|
||||
power_led_pin: power-led-pin {
|
||||
marvell,pins = "mpp57";
|
||||
marvell,function = "gpio";
|
||||
};
|
||||
|
||||
sata1_led_pin: sata1-led-pin {
|
||||
marvell,pins = "mpp15";
|
||||
marvell,function = "gpio";
|
||||
};
|
||||
|
||||
sata2_led_pin: sata2-led-pin {
|
||||
marvell,pins = "mpp14";
|
||||
marvell,function = "gpio";
|
||||
};
|
||||
|
||||
backup_led_pin: backup-led-pin {
|
||||
marvell,pins = "mpp56";
|
||||
marvell,function = "gpio";
|
||||
};
|
||||
|
||||
backup_button_pin: backup-button-pin {
|
||||
marvell,pins = "mpp58";
|
||||
marvell,function = "gpio";
|
||||
};
|
||||
|
||||
power_button_pin: power-button-pin {
|
||||
marvell,pins = "mpp62";
|
||||
marvell,function = "gpio";
|
||||
};
|
||||
|
||||
reset_button_pin: reset-button-pin {
|
||||
marvell,pins = "mpp6";
|
||||
marvell,function = "gpio";
|
||||
};
|
||||
|
||||
poweroff: poweroff {
|
||||
marvell,pins = "mpp8";
|
||||
marvell,function = "gpio";
|
||||
};
|
||||
};
|
||||
|
|
|
@ -53,38 +53,6 @@ serial@12000 {
|
|||
status = "okay";
|
||||
};
|
||||
|
||||
pinctrl {
|
||||
poweroff: poweroff {
|
||||
marvell,pins = "mpp60";
|
||||
marvell,function = "gpio";
|
||||
};
|
||||
|
||||
backup_button_pin: backup-button-pin {
|
||||
marvell,pins = "mpp52";
|
||||
marvell,function = "gpio";
|
||||
};
|
||||
|
||||
power_button_pin: power-button-pin {
|
||||
marvell,pins = "mpp62";
|
||||
marvell,function = "gpio";
|
||||
};
|
||||
|
||||
backup_led_pin: backup-led-pin {
|
||||
marvell,pins = "mpp63";
|
||||
marvell,function = "gpo";
|
||||
};
|
||||
|
||||
power_led_pin: power-led-pin {
|
||||
marvell,pins = "mpp64";
|
||||
marvell,function = "gpio";
|
||||
};
|
||||
|
||||
reset_button_pin: reset-button-pin {
|
||||
marvell,pins = "mpp65";
|
||||
marvell,function = "gpio";
|
||||
};
|
||||
};
|
||||
|
||||
mdio {
|
||||
pinctrl-0 = <&mdio_pins>;
|
||||
pinctrl-names = "default";
|
||||
|
@ -269,3 +237,35 @@ gpio-poweroff {
|
|||
gpios = <&gpio1 28 GPIO_ACTIVE_LOW>;
|
||||
};
|
||||
};
|
||||
|
||||
&pinctrl {
|
||||
poweroff: poweroff {
|
||||
marvell,pins = "mpp60";
|
||||
marvell,function = "gpio";
|
||||
};
|
||||
|
||||
backup_button_pin: backup-button-pin {
|
||||
marvell,pins = "mpp52";
|
||||
marvell,function = "gpio";
|
||||
};
|
||||
|
||||
power_button_pin: power-button-pin {
|
||||
marvell,pins = "mpp62";
|
||||
marvell,function = "gpio";
|
||||
};
|
||||
|
||||
backup_led_pin: backup-led-pin {
|
||||
marvell,pins = "mpp63";
|
||||
marvell,function = "gpo";
|
||||
};
|
||||
|
||||
power_led_pin: power-led-pin {
|
||||
marvell,pins = "mpp64";
|
||||
marvell,function = "gpio";
|
||||
};
|
||||
|
||||
reset_button_pin: reset-button-pin {
|
||||
marvell,pins = "mpp65";
|
||||
marvell,function = "gpio";
|
||||
};
|
||||
};
|
||||
|
|
|
@ -59,18 +59,6 @@ pcie@2,0 {
|
|||
};
|
||||
|
||||
internal-regs {
|
||||
pinctrl {
|
||||
fan_pins: fan-pins {
|
||||
marvell,pins = "mpp8";
|
||||
marvell,function = "gpio";
|
||||
};
|
||||
|
||||
led_pins: led-pins {
|
||||
marvell,pins = "mpp32";
|
||||
marvell,function = "gpio";
|
||||
};
|
||||
};
|
||||
|
||||
serial@12000 {
|
||||
status = "okay";
|
||||
};
|
||||
|
@ -85,10 +73,6 @@ mdio {
|
|||
phy0: ethernet-phy@0 {
|
||||
reg = <0>;
|
||||
};
|
||||
|
||||
phy1: ethernet-phy@1 {
|
||||
reg = <1>;
|
||||
};
|
||||
};
|
||||
|
||||
ethernet@70000 {
|
||||
|
@ -100,8 +84,11 @@ ethernet@74000 {
|
|||
pinctrl-0 = <&ge1_rgmii_pins>;
|
||||
pinctrl-names = "default";
|
||||
status = "okay";
|
||||
phy = <&phy1>;
|
||||
phy-mode = "rgmii-id";
|
||||
fixed-link {
|
||||
speed = <1000>;
|
||||
full-duplex;
|
||||
};
|
||||
};
|
||||
|
||||
mvsdio@d4000 {
|
||||
|
@ -173,4 +160,56 @@ partition@1000000 {
|
|||
};
|
||||
};
|
||||
};
|
||||
|
||||
dsa@0 {
|
||||
compatible = "marvell,dsa";
|
||||
#address-cells = <2>;
|
||||
#size-cells = <0>;
|
||||
|
||||
dsa,ethernet = <ð1>;
|
||||
dsa,mii-bus = <&mdio>;
|
||||
|
||||
switch@0 {
|
||||
#address-cells = <1>;
|
||||
#size-cells = <0>;
|
||||
reg = <0x10 0>; /* MDIO address 16, switch 0 in tree */
|
||||
|
||||
port@0 {
|
||||
reg = <0>;
|
||||
label = "lan0";
|
||||
};
|
||||
|
||||
port@1 {
|
||||
reg = <1>;
|
||||
label = "lan1";
|
||||
};
|
||||
|
||||
port@2 {
|
||||
reg = <2>;
|
||||
label = "lan2";
|
||||
};
|
||||
|
||||
port@3 {
|
||||
reg = <3>;
|
||||
label = "lan3";
|
||||
};
|
||||
|
||||
port@5 {
|
||||
reg = <5>;
|
||||
label = "cpu";
|
||||
};
|
||||
};
|
||||
};
|
||||
};
|
||||
|
||||
&pinctrl {
|
||||
fan_pins: fan-pins {
|
||||
marvell,pins = "mpp8";
|
||||
marvell,function = "gpio";
|
||||
};
|
||||
|
||||
led_pins: led-pins {
|
||||
marvell,pins = "mpp32";
|
||||
marvell,function = "gpio";
|
||||
};
|
||||
};
|
||||
|
|
316
arch/arm/boot/dts/armada-370-synology-ds213j.dts
Normal file
316
arch/arm/boot/dts/armada-370-synology-ds213j.dts
Normal file
|
@ -0,0 +1,316 @@
|
|||
/*
|
||||
* Device Tree file for Synology DS213j
|
||||
*
|
||||
* Copyright (C) 2014, Arnaud EBALARD <arno@natisbad.org>
|
||||
*
|
||||
* This program is free software; you can redistribute it and/or
|
||||
* modify it under the terms of the GNU General Public License
|
||||
* as published by the Free Software Foundation; either version
|
||||
* 2 of the License, or (at your option) any later version.
|
||||
*
|
||||
* Note: this Device Tree assumes that the bootloader has remapped the
|
||||
* internal registers to 0xf1000000 (instead of the old 0xd0000000).
|
||||
* The 0xf1000000 is the default used by the recent, DT-capable, U-Boot
|
||||
* bootloaders provided by Marvell. It is used in recent versions of
|
||||
* DSM software provided by Synology. Nonetheless, some earlier boards
|
||||
* were delivered with an older version of u-boot that left internal
|
||||
* registers mapped at 0xd0000000. If you have such a device you will
|
||||
* not be able to directly boot a kernel based on this Device Tree. In
|
||||
* that case, the preferred solution is to update your bootloader (e.g.
|
||||
* by upgrading to latest version of DSM, or building a new one and
|
||||
* installing it from u-boot prompt) or adjust the Devive Tree
|
||||
* (s/0xf1000000/0xd0000000/ in 'ranges' below).
|
||||
*/
|
||||
|
||||
/dts-v1/;
|
||||
|
||||
#include <dt-bindings/input/input.h>
|
||||
#include <dt-bindings/gpio/gpio.h>
|
||||
#include "armada-370.dtsi"
|
||||
|
||||
/ {
|
||||
model = "Synology DS213j";
|
||||
compatible = "synology,ds213j", "marvell,armada370",
|
||||
"marvell,armada-370-xp";
|
||||
|
||||
chosen {
|
||||
bootargs = "console=ttyS0,115200 earlyprintk";
|
||||
stdout-path = &uart0;
|
||||
};
|
||||
|
||||
memory {
|
||||
device_type = "memory";
|
||||
reg = <0x00000000 0x20000000>; /* 512 MB */
|
||||
};
|
||||
|
||||
soc {
|
||||
ranges = <MBUS_ID(0xf0, 0x01) 0 0xf1000000 0x100000
|
||||
MBUS_ID(0x01, 0xe0) 0 0xfff00000 0x100000>;
|
||||
|
||||
internal-regs {
|
||||
|
||||
/* RTC provided by Seiko S-35390A I2C RTC chip below */
|
||||
rtc@10300 {
|
||||
status = "disabled";
|
||||
};
|
||||
|
||||
spi0: spi@10600 {
|
||||
status = "okay";
|
||||
|
||||
spi-flash@0 {
|
||||
#address-cells = <1>;
|
||||
#size-cells = <1>;
|
||||
compatible = "micron,n25q064";
|
||||
reg = <0>; /* Chip select 0 */
|
||||
spi-max-frequency = <20000000>;
|
||||
|
||||
/*
|
||||
* Warning!
|
||||
*
|
||||
* Synology u-boot uses its compiled-in environment
|
||||
* and it seems Synology did not care to change u-boot
|
||||
* default configuration in order to allow saving a
|
||||
* modified environment at a sensible location. So,
|
||||
* if you do a 'saveenv' under u-boot, your modified
|
||||
* environment will be saved at 1MB after the start
|
||||
* of the flash, i.e. in the middle of the uImage.
|
||||
* For that reason, it is strongly advised not to
|
||||
* change the default environment, unless you know
|
||||
* what you are doing.
|
||||
*/
|
||||
partition@00000000 { /* u-boot */
|
||||
label = "RedBoot";
|
||||
reg = <0x00000000 0x000c0000>; /* 768KB */
|
||||
};
|
||||
|
||||
partition@000c0000 { /* uImage */
|
||||
label = "zImage";
|
||||
reg = <0x000c0000 0x002d0000>; /* 2880KB */
|
||||
};
|
||||
|
||||
partition@00390000 { /* uInitramfs */
|
||||
label = "rd.gz";
|
||||
reg = <0x00390000 0x00440000>; /* 4250KB */
|
||||
};
|
||||
|
||||
partition@007d0000 { /* MAC address and serial number */
|
||||
label = "vendor";
|
||||
reg = <0x007d0000 0x00010000>; /* 64KB */
|
||||
};
|
||||
|
||||
partition@007e0000 {
|
||||
label = "RedBoot config";
|
||||
reg = <0x007e0000 0x00010000>; /* 64KB */
|
||||
};
|
||||
|
||||
partition@007f0000 {
|
||||
label = "FIS directory";
|
||||
reg = <0x007f0000 0x00010000>; /* 64KB */
|
||||
};
|
||||
};
|
||||
};
|
||||
|
||||
i2c@11000 {
|
||||
compatible = "marvell,mv64xxx-i2c";
|
||||
pinctrl-0 = <&i2c0_pins>;
|
||||
pinctrl-names = "default";
|
||||
clock-frequency = <400000>;
|
||||
status = "okay";
|
||||
|
||||
/* Main device RTC chip */
|
||||
s35390a: s35390a@30 {
|
||||
compatible = "sii,s35390a";
|
||||
reg = <0x30>;
|
||||
};
|
||||
};
|
||||
|
||||
/* Connected to a header on device's PCB */
|
||||
serial@12000 {
|
||||
status = "okay";
|
||||
};
|
||||
|
||||
/* Connected to a TI MSP430F2111 for power control */
|
||||
serial@12100 {
|
||||
status = "okay";
|
||||
};
|
||||
|
||||
poweroff@12100 {
|
||||
compatible = "synology,power-off";
|
||||
reg = <0x12100 0x100>;
|
||||
clocks = <&coreclk 0>;
|
||||
};
|
||||
|
||||
/* rear USB port, near reset button */
|
||||
usb@50000 {
|
||||
status = "okay";
|
||||
};
|
||||
|
||||
/* rear USB port, near RJ45 port */
|
||||
usb@51000 {
|
||||
status = "okay";
|
||||
};
|
||||
|
||||
mdio {
|
||||
phy1: ethernet-phy@1 { /* Marvell 88E1512 */
|
||||
reg = <1>;
|
||||
};
|
||||
};
|
||||
|
||||
ethernet@70000 {
|
||||
status = "okay";
|
||||
phy = <&phy1>;
|
||||
phy-mode = "sgmii";
|
||||
};
|
||||
|
||||
sata@a0000 {
|
||||
nr-ports = <2>;
|
||||
status = "okay";
|
||||
};
|
||||
};
|
||||
};
|
||||
|
||||
gpio-fan-32-38 {
|
||||
status = "okay";
|
||||
compatible = "gpio-fan";
|
||||
pinctrl-0 = <&fan_ctrl_low_pin &fan_ctrl_mid_pin
|
||||
&fan_ctrl_high_pin &fan_alarm_pin>;
|
||||
pinctrl-names = "default";
|
||||
gpios = <&gpio1 31 GPIO_ACTIVE_HIGH
|
||||
&gpio2 0 GPIO_ACTIVE_HIGH
|
||||
&gpio2 1 GPIO_ACTIVE_HIGH>;
|
||||
alarm-gpios = <&gpio1 6 GPIO_ACTIVE_HIGH>;
|
||||
gpio-fan,speed-map = < 0 0
|
||||
1000 1
|
||||
1150 2
|
||||
1350 4
|
||||
1500 3
|
||||
1650 5
|
||||
1750 6
|
||||
1900 7 >;
|
||||
};
|
||||
|
||||
gpio-leds {
|
||||
compatible = "gpio-leds";
|
||||
pinctrl-0 = <&disk1_led_pin
|
||||
&disk2_led_pin>;
|
||||
pinctrl-names = "default";
|
||||
|
||||
disk1-led-amber {
|
||||
label = "synology:amber:disk1";
|
||||
gpios = <&gpio0 31 GPIO_ACTIVE_LOW>;
|
||||
default-state = "keep";
|
||||
};
|
||||
|
||||
disk2-led-amber {
|
||||
label = "synology:amber:disk2";
|
||||
gpios = <&gpio1 0 GPIO_ACTIVE_LOW>;
|
||||
default-state = "keep";
|
||||
};
|
||||
};
|
||||
|
||||
regulators {
|
||||
compatible = "simple-bus";
|
||||
#address-cells = <1>;
|
||||
#size-cells = <0>;
|
||||
pinctrl-0 = <&sata1_pwr_pin &sata2_pwr_pin>;
|
||||
pinctrl-names = "default";
|
||||
|
||||
sata1_regulator: sata1-regulator {
|
||||
compatible = "regulator-fixed";
|
||||
reg = <1>;
|
||||
regulator-name = "SATA1 Power";
|
||||
regulator-min-microvolt = <5000000>;
|
||||
regulator-max-microvolt = <5000000>;
|
||||
startup-delay-us = <2000000>;
|
||||
enable-active-high;
|
||||
regulator-always-on;
|
||||
regulator-boot-on;
|
||||
gpio = <&gpio1 5 GPIO_ACTIVE_HIGH>;
|
||||
};
|
||||
|
||||
sata2_regulator: sata2-regulator {
|
||||
compatible = "regulator-fixed";
|
||||
reg = <2>;
|
||||
regulator-name = "SATA2 Power";
|
||||
regulator-min-microvolt = <5000000>;
|
||||
regulator-max-microvolt = <5000000>;
|
||||
startup-delay-us = <4000000>;
|
||||
enable-active-high;
|
||||
regulator-always-on;
|
||||
regulator-boot-on;
|
||||
gpio = <&gpio1 30 GPIO_ACTIVE_HIGH>;
|
||||
};
|
||||
};
|
||||
};
|
||||
|
||||
&pinctrl {
|
||||
disk1_led_pin: disk1-led-pin {
|
||||
marvell,pins = "mpp31";
|
||||
marvell,function = "gpio";
|
||||
};
|
||||
|
||||
disk2_led_pin: disk2-led-pin {
|
||||
marvell,pins = "mpp32";
|
||||
marvell,function = "gpio";
|
||||
};
|
||||
|
||||
sata1_pwr_pin: sata1-pwr-pin {
|
||||
marvell,pins = "mpp37";
|
||||
marvell,function = "gpio";
|
||||
};
|
||||
|
||||
sata2_pwr_pin: sata2-pwr-pin {
|
||||
marvell,pins = "mpp62";
|
||||
marvell,function = "gpio";
|
||||
};
|
||||
|
||||
sata1_pres_pin: sata1-pres-pin {
|
||||
marvell,pins = "mpp60";
|
||||
marvell,function = "gpio";
|
||||
};
|
||||
|
||||
sata2_pres_pin: sata2-pres-pin {
|
||||
marvell,pins = "mpp48";
|
||||
marvell,function = "gpio";
|
||||
};
|
||||
|
||||
syno_id_bit0_pin: syno-id-bit0-pin {
|
||||
marvell,pins = "mpp55";
|
||||
marvell,function = "gpio";
|
||||
};
|
||||
|
||||
syno_id_bit1_pin: syno-id-bit1-pin {
|
||||
marvell,pins = "mpp56";
|
||||
marvell,function = "gpio";
|
||||
};
|
||||
|
||||
syno_id_bit2_pin: syno-id-bit2-pin {
|
||||
marvell,pins = "mpp57";
|
||||
marvell,function = "gpio";
|
||||
};
|
||||
|
||||
syno_id_bit3_pin: syno-id-bit3-pin {
|
||||
marvell,pins = "mpp58";
|
||||
marvell,function = "gpio";
|
||||
};
|
||||
|
||||
fan_ctrl_low_pin: fan-ctrl-low-pin {
|
||||
marvell,pins = "mpp65";
|
||||
marvell,function = "gpio";
|
||||
};
|
||||
|
||||
fan_ctrl_mid_pin: fan-ctrl-mid-pin {
|
||||
marvell,pins = "mpp64";
|
||||
marvell,function = "gpio";
|
||||
};
|
||||
|
||||
fan_ctrl_high_pin: fan-ctrl-high-pin {
|
||||
marvell,pins = "mpp63";
|
||||
marvell,function = "gpo";
|
||||
};
|
||||
|
||||
fan_alarm_pin: fan-alarm-pin {
|
||||
marvell,pins = "mpp38";
|
||||
marvell,function = "gpio";
|
||||
};
|
||||
};
|
|
@ -151,7 +151,7 @@ i2c1: i2c@11100 {
|
|||
status = "disabled";
|
||||
};
|
||||
|
||||
serial@12000 {
|
||||
uart0: serial@12000 {
|
||||
compatible = "snps,dw-apb-uart";
|
||||
reg = <0x12000 0x100>;
|
||||
reg-shift = <2>;
|
||||
|
@ -160,7 +160,8 @@ serial@12000 {
|
|||
clocks = <&coreclk 0>;
|
||||
status = "disabled";
|
||||
};
|
||||
serial@12100 {
|
||||
|
||||
uart1: serial@12100 {
|
||||
compatible = "snps,dw-apb-uart";
|
||||
reg = <0x12100 0x100>;
|
||||
reg-shift = <2>;
|
||||
|
@ -170,6 +171,10 @@ serial@12100 {
|
|||
status = "disabled";
|
||||
};
|
||||
|
||||
pinctrl: pin-ctrl@18000 {
|
||||
reg = <0x18000 0x38>;
|
||||
};
|
||||
|
||||
coredivclk: corediv-clock@18740 {
|
||||
compatible = "marvell,armada-370-corediv-clock";
|
||||
reg = <0x18740 0xc>;
|
||||
|
@ -180,7 +185,8 @@ coredivclk: corediv-clock@18740 {
|
|||
|
||||
mbusc: mbus-controller@20000 {
|
||||
compatible = "marvell,mbus-controller";
|
||||
reg = <0x20000 0x100>, <0x20180 0x20>;
|
||||
reg = <0x20000 0x100>, <0x20180 0x20>,
|
||||
<0x20250 0x8>;
|
||||
};
|
||||
|
||||
mpic: interrupt-controller@20000 {
|
||||
|
@ -232,7 +238,7 @@ eth0: ethernet@70000 {
|
|||
status = "disabled";
|
||||
};
|
||||
|
||||
mdio {
|
||||
mdio: mdio {
|
||||
#address-cells = <1>;
|
||||
#size-cells = <0>;
|
||||
compatible = "marvell,orion-mdio";
|
||||
|
|
|
@ -95,9 +95,24 @@ L2: l2-cache {
|
|||
compatible = "marvell,aurora-outer-cache";
|
||||
reg = <0x08000 0x1000>;
|
||||
cache-id-part = <0x100>;
|
||||
cache-unified;
|
||||
wt-override;
|
||||
};
|
||||
|
||||
/*
|
||||
* Default SPI pinctrl setting, can be overwritten on
|
||||
* board level if a different configuration is used.
|
||||
*/
|
||||
spi0: spi@10600 {
|
||||
pinctrl-0 = <&spi0_pins1>;
|
||||
pinctrl-names = "default";
|
||||
};
|
||||
|
||||
spi1: spi@10680 {
|
||||
pinctrl-0 = <&spi1_pins>;
|
||||
pinctrl-names = "default";
|
||||
};
|
||||
|
||||
i2c0: i2c@11000 {
|
||||
reg = <0x11000 0x20>;
|
||||
};
|
||||
|
@ -106,72 +121,6 @@ i2c1: i2c@11100 {
|
|||
reg = <0x11100 0x20>;
|
||||
};
|
||||
|
||||
system-controller@18200 {
|
||||
compatible = "marvell,armada-370-xp-system-controller";
|
||||
reg = <0x18200 0x100>;
|
||||
};
|
||||
|
||||
pinctrl {
|
||||
compatible = "marvell,mv88f6710-pinctrl";
|
||||
reg = <0x18000 0x38>;
|
||||
|
||||
sdio_pins1: sdio-pins1 {
|
||||
marvell,pins = "mpp9", "mpp11", "mpp12",
|
||||
"mpp13", "mpp14", "mpp15";
|
||||
marvell,function = "sd0";
|
||||
};
|
||||
|
||||
sdio_pins2: sdio-pins2 {
|
||||
marvell,pins = "mpp47", "mpp48", "mpp49",
|
||||
"mpp50", "mpp51", "mpp52";
|
||||
marvell,function = "sd0";
|
||||
};
|
||||
|
||||
sdio_pins3: sdio-pins3 {
|
||||
marvell,pins = "mpp48", "mpp49", "mpp50",
|
||||
"mpp51", "mpp52", "mpp53";
|
||||
marvell,function = "sd0";
|
||||
};
|
||||
|
||||
i2c0_pins: i2c0-pins {
|
||||
marvell,pins = "mpp2", "mpp3";
|
||||
marvell,function = "i2c0";
|
||||
};
|
||||
|
||||
i2s_pins1: i2s-pins1 {
|
||||
marvell,pins = "mpp5", "mpp6", "mpp7",
|
||||
"mpp8", "mpp9", "mpp10",
|
||||
"mpp12", "mpp13";
|
||||
marvell,function = "audio";
|
||||
};
|
||||
|
||||
i2s_pins2: i2s-pins2 {
|
||||
marvell,pins = "mpp49", "mpp47", "mpp50",
|
||||
"mpp59", "mpp57", "mpp61",
|
||||
"mpp62", "mpp60", "mpp58";
|
||||
marvell,function = "audio";
|
||||
};
|
||||
|
||||
mdio_pins: mdio-pins {
|
||||
marvell,pins = "mpp17", "mpp18";
|
||||
marvell,function = "ge";
|
||||
};
|
||||
|
||||
ge0_rgmii_pins: ge0-rgmii-pins {
|
||||
marvell,pins = "mpp5", "mpp6", "mpp7", "mpp8",
|
||||
"mpp9", "mpp10", "mpp11", "mpp12",
|
||||
"mpp13", "mpp14", "mpp15", "mpp16";
|
||||
marvell,function = "ge0";
|
||||
};
|
||||
|
||||
ge1_rgmii_pins: ge1-rgmii-pins {
|
||||
marvell,pins = "mpp19", "mpp20", "mpp21", "mpp22",
|
||||
"mpp23", "mpp24", "mpp25", "mpp26",
|
||||
"mpp27", "mpp28", "mpp29", "mpp30";
|
||||
marvell,function = "ge1";
|
||||
};
|
||||
};
|
||||
|
||||
gpio0: gpio@18100 {
|
||||
compatible = "marvell,orion-gpio";
|
||||
reg = <0x18100 0x40>;
|
||||
|
@ -205,6 +154,26 @@ gpio2: gpio@18180 {
|
|||
interrupts = <91>;
|
||||
};
|
||||
|
||||
/*
|
||||
* Default UART pinctrl setting without RTS/CTS, can
|
||||
* be overwritten on board level if a different
|
||||
* configuration is used.
|
||||
*/
|
||||
uart0: serial@12000 {
|
||||
pinctrl-0 = <&uart0_pins>;
|
||||
pinctrl-names = "default";
|
||||
};
|
||||
|
||||
uart1: serial@12100 {
|
||||
pinctrl-0 = <&uart1_pins>;
|
||||
pinctrl-names = "default";
|
||||
};
|
||||
|
||||
system-controller@18200 {
|
||||
compatible = "marvell,armada-370-xp-system-controller";
|
||||
reg = <0x18200 0x100>;
|
||||
};
|
||||
|
||||
gateclk: clock-gating-control@18220 {
|
||||
compatible = "marvell,armada-370-gating-clock";
|
||||
reg = <0x18220 0x4>;
|
||||
|
@ -249,6 +218,7 @@ cpurst@20800 {
|
|||
};
|
||||
|
||||
audio_controller: audio-controller@30000 {
|
||||
#sound-dai-cells = <1>;
|
||||
compatible = "marvell,armada370-audio";
|
||||
reg = <0x30000 0x4000>;
|
||||
interrupts = <93>;
|
||||
|
@ -305,3 +275,91 @@ xor11 {
|
|||
};
|
||||
};
|
||||
};
|
||||
|
||||
&pinctrl {
|
||||
compatible = "marvell,mv88f6710-pinctrl";
|
||||
|
||||
spi0_pins1: spi0-pins1 {
|
||||
marvell,pins = "mpp33", "mpp34",
|
||||
"mpp35", "mpp36";
|
||||
marvell,function = "spi0";
|
||||
};
|
||||
|
||||
spi0_pins2: spi0_pins2 {
|
||||
marvell,pins = "mpp32", "mpp63",
|
||||
"mpp64", "mpp65";
|
||||
marvell,function = "spi0";
|
||||
};
|
||||
|
||||
spi1_pins: spi1-pins {
|
||||
marvell,pins = "mpp49", "mpp50",
|
||||
"mpp51", "mpp52";
|
||||
marvell,function = "spi1";
|
||||
};
|
||||
|
||||
uart0_pins: uart0-pins {
|
||||
marvell,pins = "mpp0", "mpp1";
|
||||
marvell,function = "uart0";
|
||||
};
|
||||
|
||||
uart1_pins: uart1-pins {
|
||||
marvell,pins = "mpp41", "mpp42";
|
||||
marvell,function = "uart1";
|
||||
};
|
||||
|
||||
sdio_pins1: sdio-pins1 {
|
||||
marvell,pins = "mpp9", "mpp11", "mpp12",
|
||||
"mpp13", "mpp14", "mpp15";
|
||||
marvell,function = "sd0";
|
||||
};
|
||||
|
||||
sdio_pins2: sdio-pins2 {
|
||||
marvell,pins = "mpp47", "mpp48", "mpp49",
|
||||
"mpp50", "mpp51", "mpp52";
|
||||
marvell,function = "sd0";
|
||||
};
|
||||
|
||||
sdio_pins3: sdio-pins3 {
|
||||
marvell,pins = "mpp48", "mpp49", "mpp50",
|
||||
"mpp51", "mpp52", "mpp53";
|
||||
marvell,function = "sd0";
|
||||
};
|
||||
|
||||
i2c0_pins: i2c0-pins {
|
||||
marvell,pins = "mpp2", "mpp3";
|
||||
marvell,function = "i2c0";
|
||||
};
|
||||
|
||||
i2s_pins1: i2s-pins1 {
|
||||
marvell,pins = "mpp5", "mpp6", "mpp7",
|
||||
"mpp8", "mpp9", "mpp10",
|
||||
"mpp12", "mpp13";
|
||||
marvell,function = "audio";
|
||||
};
|
||||
|
||||
i2s_pins2: i2s-pins2 {
|
||||
marvell,pins = "mpp49", "mpp47", "mpp50",
|
||||
"mpp59", "mpp57", "mpp61",
|
||||
"mpp62", "mpp60", "mpp58";
|
||||
marvell,function = "audio";
|
||||
};
|
||||
|
||||
mdio_pins: mdio-pins {
|
||||
marvell,pins = "mpp17", "mpp18";
|
||||
marvell,function = "ge";
|
||||
};
|
||||
|
||||
ge0_rgmii_pins: ge0-rgmii-pins {
|
||||
marvell,pins = "mpp5", "mpp6", "mpp7", "mpp8",
|
||||
"mpp9", "mpp10", "mpp11", "mpp12",
|
||||
"mpp13", "mpp14", "mpp15", "mpp16";
|
||||
marvell,function = "ge0";
|
||||
};
|
||||
|
||||
ge1_rgmii_pins: ge1-rgmii-pins {
|
||||
marvell,pins = "mpp19", "mpp20", "mpp21", "mpp22",
|
||||
"mpp23", "mpp24", "mpp25", "mpp26",
|
||||
"mpp27", "mpp28", "mpp29", "mpp30";
|
||||
marvell,function = "ge1";
|
||||
};
|
||||
};
|
||||
|
|
|
@ -36,6 +36,12 @@ mainpll: mainpll {
|
|||
#clock-cells = <0>;
|
||||
clock-frequency = <2000000000>;
|
||||
};
|
||||
/* 25 MHz reference crystal */
|
||||
refclk: oscillator {
|
||||
compatible = "fixed-clock";
|
||||
#clock-cells = <0>;
|
||||
clock-frequency = <25000000>;
|
||||
};
|
||||
};
|
||||
|
||||
cpus {
|
||||
|
@ -366,13 +372,15 @@ timer@20300 {
|
|||
<&gic GIC_SPI 11 IRQ_TYPE_LEVEL_HIGH>,
|
||||
<&mpic 5>,
|
||||
<&mpic 6>;
|
||||
clocks = <&coreclk 0>;
|
||||
clocks = <&coreclk 0>, <&refclk>;
|
||||
clock-names = "nbclk", "fixed";
|
||||
};
|
||||
|
||||
watchdog@20300 {
|
||||
compatible = "marvell,armada-375-wdt";
|
||||
reg = <0x20300 0x34>, <0x20704 0x4>, <0x18254 0x4>;
|
||||
clocks = <&coreclk 0>;
|
||||
clocks = <&coreclk 0>, <&refclk>;
|
||||
clock-names = "nbclk", "fixed";
|
||||
};
|
||||
|
||||
cpurst@20800 {
|
||||
|
|
|
@ -116,11 +116,11 @@ partition@1000000 {
|
|||
};
|
||||
|
||||
sdhci@d8000 {
|
||||
clock-frequency = <200000000>;
|
||||
broken-cd;
|
||||
wp-inverted;
|
||||
bus-width = <8>;
|
||||
status = "okay";
|
||||
no-1-8-v;
|
||||
};
|
||||
|
||||
usb3@f0000 {
|
||||
|
|
|
@ -25,9 +25,9 @@ / {
|
|||
aliases {
|
||||
gpio0 = &gpio0;
|
||||
gpio1 = &gpio1;
|
||||
eth0 = ð0;
|
||||
eth1 = ð1;
|
||||
eth2 = ð2;
|
||||
ethernet0 = ð0;
|
||||
ethernet1 = ð1;
|
||||
ethernet2 = ð2;
|
||||
};
|
||||
|
||||
soc {
|
||||
|
|
|
@ -60,40 +60,6 @@ pcie@3,0 {
|
|||
};
|
||||
|
||||
internal-regs {
|
||||
pinctrl {
|
||||
pinctrl-0 = <&pmx_phy_int>;
|
||||
pinctrl-names = "default";
|
||||
|
||||
pmx_ge0: pmx-ge0 {
|
||||
marvell,pins = "mpp0", "mpp1", "mpp2", "mpp3",
|
||||
"mpp4", "mpp5", "mpp6", "mpp7",
|
||||
"mpp8", "mpp9", "mpp10", "mpp11";
|
||||
marvell,function = "ge0";
|
||||
};
|
||||
|
||||
pmx_ge1: pmx-ge1 {
|
||||
marvell,pins = "mpp12", "mpp13", "mpp14", "mpp15",
|
||||
"mpp16", "mpp17", "mpp18", "mpp19",
|
||||
"mpp20", "mpp21", "mpp22", "mpp23";
|
||||
marvell,function = "ge1";
|
||||
};
|
||||
|
||||
pmx_keys: pmx-keys {
|
||||
marvell,pins = "mpp33";
|
||||
marvell,function = "gpio";
|
||||
};
|
||||
|
||||
pmx_spi: pmx-spi {
|
||||
marvell,pins = "mpp36", "mpp37", "mpp38", "mpp39";
|
||||
marvell,function = "spi";
|
||||
};
|
||||
|
||||
pmx_phy_int: pmx-phy-int {
|
||||
marvell,pins = "mpp32";
|
||||
marvell,function = "gpio";
|
||||
};
|
||||
};
|
||||
|
||||
serial@12000 {
|
||||
status = "okay";
|
||||
};
|
||||
|
@ -118,14 +84,14 @@ phy1: ethernet-phy@1 {
|
|||
};
|
||||
|
||||
ethernet@70000 {
|
||||
pinctrl-0 = <&pmx_ge0>;
|
||||
pinctrl-0 = <&ge0_rgmii_pins>;
|
||||
pinctrl-names = "default";
|
||||
status = "okay";
|
||||
phy = <&phy0>;
|
||||
phy-mode = "rgmii-id";
|
||||
};
|
||||
ethernet@74000 {
|
||||
pinctrl-0 = <&pmx_ge1>;
|
||||
pinctrl-0 = <&ge1_rgmii_pins>;
|
||||
pinctrl-names = "default";
|
||||
status = "okay";
|
||||
phy = <&phy1>;
|
||||
|
@ -134,8 +100,6 @@ ethernet@74000 {
|
|||
|
||||
spi0: spi@10600 {
|
||||
status = "okay";
|
||||
pinctrl-0 = <&pmx_spi>;
|
||||
pinctrl-names = "default";
|
||||
|
||||
spi-flash@0 {
|
||||
#address-cells = <1>;
|
||||
|
@ -152,7 +116,7 @@ gpio_keys {
|
|||
compatible = "gpio-keys";
|
||||
#address-cells = <1>;
|
||||
#size-cells = <0>;
|
||||
pinctrl-0 = <&pmx_keys>;
|
||||
pinctrl-0 = <&keys_pin>;
|
||||
pinctrl-names = "default";
|
||||
|
||||
button@1 {
|
||||
|
@ -162,3 +126,18 @@ button@1 {
|
|||
};
|
||||
};
|
||||
};
|
||||
|
||||
&pinctrl {
|
||||
pinctrl-0 = <&phy_int_pin>;
|
||||
pinctrl-names = "default";
|
||||
|
||||
keys_pin: keys-pin {
|
||||
marvell,pins = "mpp33";
|
||||
marvell,function = "gpio";
|
||||
};
|
||||
|
||||
phy_int_pin: phy-int-pin {
|
||||
marvell,pins = "mpp32";
|
||||
marvell,function = "gpio";
|
||||
};
|
||||
};
|
||||
|
|
Some files were not shown because too many files have changed in this diff Show more
Loading…
Reference in a new issue