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drm/amd/display: fix dcc swath size calculations on dcn1
[ Upstream commit a0275dfc82
]
[Why]
Swath sizes are being calculated incorrectly. The horizontal swath size
should be the product of block height, viewport width, and bytes per
element, but the calculation uses viewport height instead of width. The
vertical swath size is similarly incorrectly calculated. The effect of
this is that we report the wrong DCC caps.
[How]
Use viewport width in the horizontal swath size calculation and viewport
height in the vertical swath size calculation.
Signed-off-by: Josip Pavic <Josip.Pavic@amd.com>
Reviewed-by: Aric Cyr <Aric.Cyr@amd.com>
Acked-by: Rodrigo Siqueira <Rodrigo.Siqueira@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Sasha Levin <sashal@kernel.org>
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1 changed files with 2 additions and 2 deletions
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@ -684,8 +684,8 @@ static void hubbub1_det_request_size(
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hubbub1_get_blk256_size(&blk256_width, &blk256_height, bpe);
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swath_bytes_horz_wc = height * blk256_height * bpe;
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swath_bytes_vert_wc = width * blk256_width * bpe;
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swath_bytes_horz_wc = width * blk256_height * bpe;
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swath_bytes_vert_wc = height * blk256_width * bpe;
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*req128_horz_wc = (2 * swath_bytes_horz_wc <= detile_buf_size) ?
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false : /* full 256B request */
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