mirror of
https://git.kernel.org/pub/scm/linux/kernel/git/stable/linux.git
synced 2024-08-23 01:10:04 +00:00
Merge branch 'for-tony' of git://git.kernel.org/pub/scm/linux/kernel/git/balbi/usb into omap-for-v4.4/soc
This commit is contained in:
commit
346cc220a8
9 changed files with 215 additions and 99 deletions
|
@ -96,6 +96,7 @@ config ARCH_OMAP2PLUS
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select SOC_BUS
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select TI_PRIV_EDMA
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select OMAP_IRQCHIP
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select CLKSRC_TI_32K
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help
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Systems based on OMAP2, OMAP3, OMAP4 or OMAP5
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||||
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@ -46,7 +46,7 @@ DT_MACHINE_START(OMAP242X_DT, "Generic OMAP2420 (Flattened Device Tree)")
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.map_io = omap242x_map_io,
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.init_early = omap2420_init_early,
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.init_machine = omap_generic_init,
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.init_time = omap2_sync32k_timer_init,
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.init_time = omap_init_time,
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.dt_compat = omap242x_boards_compat,
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.restart = omap2xxx_restart,
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MACHINE_END
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@ -63,7 +63,7 @@ DT_MACHINE_START(OMAP243X_DT, "Generic OMAP2430 (Flattened Device Tree)")
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.map_io = omap243x_map_io,
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.init_early = omap2430_init_early,
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.init_machine = omap_generic_init,
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.init_time = omap2_sync32k_timer_init,
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.init_time = omap_init_time,
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.dt_compat = omap243x_boards_compat,
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.restart = omap2xxx_restart,
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MACHINE_END
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@ -82,7 +82,7 @@ DT_MACHINE_START(OMAP3_N900_DT, "Nokia RX-51 board")
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.init_early = omap3430_init_early,
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.init_machine = omap_generic_init,
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.init_late = omap3_init_late,
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.init_time = omap3_sync32k_timer_init,
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.init_time = omap_init_time,
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.dt_compat = n900_boards_compat,
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.restart = omap3xxx_restart,
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MACHINE_END
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@ -100,7 +100,7 @@ DT_MACHINE_START(OMAP3_DT, "Generic OMAP3 (Flattened Device Tree)")
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.init_early = omap3430_init_early,
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.init_machine = omap_generic_init,
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.init_late = omap3_init_late,
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.init_time = omap3_sync32k_timer_init,
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.init_time = omap_init_time,
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.dt_compat = omap3_boards_compat,
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.restart = omap3xxx_restart,
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MACHINE_END
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@ -116,7 +116,7 @@ DT_MACHINE_START(OMAP36XX_DT, "Generic OMAP36xx (Flattened Device Tree)")
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.init_early = omap3630_init_early,
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.init_machine = omap_generic_init,
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.init_late = omap3_init_late,
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.init_time = omap3_sync32k_timer_init,
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.init_time = omap_init_time,
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.dt_compat = omap36xx_boards_compat,
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.restart = omap3xxx_restart,
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MACHINE_END
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@ -424,6 +424,6 @@ MACHINE_START(OMAP_LDP, "OMAP LDP board")
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.init_irq = omap3_init_irq,
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.init_machine = omap_ldp_init,
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.init_late = omap3430_init_late,
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.init_time = omap3_sync32k_timer_init,
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.init_time = omap_init_time,
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.restart = omap3xxx_restart,
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MACHINE_END
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@ -136,6 +136,6 @@ MACHINE_START(NOKIA_RX51, "Nokia RX-51 board")
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.init_irq = omap3_init_irq,
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.init_machine = rx51_init,
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.init_late = omap3430_init_late,
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.init_time = omap3_sync32k_timer_init,
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.init_time = omap_init_time,
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.restart = omap3xxx_restart,
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MACHINE_END
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@ -88,8 +88,7 @@ static inline int omap_mux_late_init(void)
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extern void omap2_init_common_infrastructure(void);
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extern void omap2_sync32k_timer_init(void);
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extern void omap3_sync32k_timer_init(void);
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extern void omap_init_time(void);
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extern void omap3_secure_sync32k_timer_init(void);
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extern void omap3_gptimer_timer_init(void);
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extern void omap4_local_timer_init(void);
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@ -183,7 +183,8 @@ static struct device_node * __init omap_get_timer_dt(const struct of_device_id *
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of_get_property(np, "ti,timer-secure", NULL)))
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continue;
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of_add_property(np, &device_disabled);
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if (!of_device_is_compatible(np, "ti,omap-counter32k"))
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of_add_property(np, &device_disabled);
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return np;
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}
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@ -394,7 +395,6 @@ static int __init __maybe_unused omap2_sync32k_clocksource_init(void)
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int ret;
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struct device_node *np = NULL;
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struct omap_hwmod *oh;
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void __iomem *vbase;
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const char *oh_name = "counter_32k";
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/*
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@ -420,18 +420,6 @@ static int __init __maybe_unused omap2_sync32k_clocksource_init(void)
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omap_hwmod_setup_one(oh_name);
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if (np) {
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vbase = of_iomap(np, 0);
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of_node_put(np);
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} else {
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vbase = omap_hwmod_get_mpu_rt_va(oh);
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}
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if (!vbase) {
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pr_warn("%s: failed to get counter_32k resource\n", __func__);
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return -ENXIO;
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}
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ret = omap_hwmod_enable(oh);
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if (ret) {
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pr_warn("%s: failed to enable counter_32k module (%d)\n",
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@ -439,13 +427,18 @@ static int __init __maybe_unused omap2_sync32k_clocksource_init(void)
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return ret;
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}
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ret = omap_init_clocksource_32k(vbase);
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if (ret) {
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pr_warn("%s: failed to initialize counter_32k as a clocksource (%d)\n",
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__func__, ret);
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omap_hwmod_idle(oh);
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}
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if (!of_have_populated_dt()) {
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void __iomem *vbase;
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vbase = omap_hwmod_get_mpu_rt_va(oh);
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ret = omap_init_clocksource_32k(vbase);
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if (ret) {
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pr_warn("%s: failed to initialize counter_32k as a clocksource (%d)\n",
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__func__, ret);
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omap_hwmod_idle(oh);
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}
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}
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return ret;
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}
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@ -476,7 +469,64 @@ static void __init omap2_gptimer_clocksource_init(int gptimer_id,
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clocksource_gpt.name, clksrc.rate);
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}
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#ifdef CONFIG_SOC_HAS_REALTIME_COUNTER
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static void __init __omap_sync32k_timer_init(int clkev_nr, const char *clkev_src,
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const char *clkev_prop, int clksrc_nr, const char *clksrc_src,
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const char *clksrc_prop, bool gptimer)
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{
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omap_clk_init();
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omap_dmtimer_init();
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omap2_gp_clockevent_init(clkev_nr, clkev_src, clkev_prop);
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/* Enable the use of clocksource="gp_timer" kernel parameter */
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if (use_gptimer_clksrc || gptimer)
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omap2_gptimer_clocksource_init(clksrc_nr, clksrc_src,
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clksrc_prop);
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else
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omap2_sync32k_clocksource_init();
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}
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void __init omap_init_time(void)
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{
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__omap_sync32k_timer_init(1, "timer_32k_ck", "ti,timer-alwon",
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2, "timer_sys_ck", NULL, false);
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if (of_have_populated_dt())
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clocksource_of_init();
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}
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#if defined(CONFIG_ARCH_OMAP3) || defined(CONFIG_SOC_AM43XX)
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void __init omap3_secure_sync32k_timer_init(void)
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{
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__omap_sync32k_timer_init(12, "secure_32k_fck", "ti,timer-secure",
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2, "timer_sys_ck", NULL, false);
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}
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#endif /* CONFIG_ARCH_OMAP3 */
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#if defined(CONFIG_ARCH_OMAP3) || defined(CONFIG_SOC_AM33XX)
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void __init omap3_gptimer_timer_init(void)
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{
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__omap_sync32k_timer_init(2, "timer_sys_ck", NULL,
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1, "timer_sys_ck", "ti,timer-alwon", true);
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}
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#endif
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#if defined(CONFIG_ARCH_OMAP4) || defined(CONFIG_SOC_OMAP5) || \
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defined(CONFIG_SOC_DRA7XX) || defined(CONFIG_SOC_AM43XX)
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static void __init omap4_sync32k_timer_init(void)
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{
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__omap_sync32k_timer_init(1, "timer_32k_ck", "ti,timer-alwon",
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2, "sys_clkin_ck", NULL, false);
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}
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void __init omap4_local_timer_init(void)
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{
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omap4_sync32k_timer_init();
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clocksource_of_init();
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}
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#endif
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#if defined(CONFIG_SOC_OMAP5) || defined(CONFIG_SOC_DRA7XX)
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/*
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* The realtime counter also called master counter, is a free-running
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* counter, which is related to real time. It produces the count used
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@ -488,6 +538,7 @@ static void __init omap2_gptimer_clocksource_init(int gptimer_id,
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*/
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static void __init realtime_counter_init(void)
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{
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#ifdef CONFIG_SOC_HAS_REALTIME_COUNTER
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void __iomem *base;
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static struct clk *sys_clk;
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unsigned long rate;
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@ -586,78 +637,9 @@ static void __init realtime_counter_init(void)
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set_cntfreq();
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iounmap(base);
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}
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#else
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static inline void __init realtime_counter_init(void)
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{}
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#endif
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#define OMAP_SYS_GP_TIMER_INIT(name, clkev_nr, clkev_src, clkev_prop, \
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clksrc_nr, clksrc_src, clksrc_prop) \
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void __init omap##name##_gptimer_timer_init(void) \
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{ \
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omap_clk_init(); \
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omap_dmtimer_init(); \
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omap2_gp_clockevent_init((clkev_nr), clkev_src, clkev_prop); \
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omap2_gptimer_clocksource_init((clksrc_nr), clksrc_src, \
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clksrc_prop); \
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}
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#define OMAP_SYS_32K_TIMER_INIT(name, clkev_nr, clkev_src, clkev_prop, \
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clksrc_nr, clksrc_src, clksrc_prop) \
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void __init omap##name##_sync32k_timer_init(void) \
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{ \
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omap_clk_init(); \
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omap_dmtimer_init(); \
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omap2_gp_clockevent_init((clkev_nr), clkev_src, clkev_prop); \
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/* Enable the use of clocksource="gp_timer" kernel parameter */ \
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if (use_gptimer_clksrc) \
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omap2_gptimer_clocksource_init((clksrc_nr), clksrc_src, \
|
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clksrc_prop); \
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else \
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omap2_sync32k_clocksource_init(); \
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}
|
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|
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#ifdef CONFIG_ARCH_OMAP2
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OMAP_SYS_32K_TIMER_INIT(2, 1, "timer_32k_ck", "ti,timer-alwon",
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2, "timer_sys_ck", NULL);
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#endif /* CONFIG_ARCH_OMAP2 */
|
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|
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#if defined(CONFIG_ARCH_OMAP3) || defined(CONFIG_SOC_AM43XX)
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OMAP_SYS_32K_TIMER_INIT(3, 1, "timer_32k_ck", "ti,timer-alwon",
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2, "timer_sys_ck", NULL);
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OMAP_SYS_32K_TIMER_INIT(3_secure, 12, "secure_32k_fck", "ti,timer-secure",
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2, "timer_sys_ck", NULL);
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#endif /* CONFIG_ARCH_OMAP3 */
|
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|
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#if defined(CONFIG_ARCH_OMAP3) || defined(CONFIG_SOC_AM33XX) || \
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defined(CONFIG_SOC_AM43XX)
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OMAP_SYS_GP_TIMER_INIT(3, 2, "timer_sys_ck", NULL,
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1, "timer_sys_ck", "ti,timer-alwon");
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#endif
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#if defined(CONFIG_ARCH_OMAP4) || defined(CONFIG_SOC_OMAP5) || \
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defined(CONFIG_SOC_DRA7XX)
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static OMAP_SYS_32K_TIMER_INIT(4, 1, "timer_32k_ck", "ti,timer-alwon",
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2, "sys_clkin_ck", NULL);
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#endif
|
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|
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#ifdef CONFIG_ARCH_OMAP4
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#ifdef CONFIG_HAVE_ARM_TWD
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void __init omap4_local_timer_init(void)
|
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{
|
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omap4_sync32k_timer_init();
|
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clocksource_of_init();
|
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}
|
||||
#else
|
||||
void __init omap4_local_timer_init(void)
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{
|
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omap4_sync32k_timer_init();
|
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}
|
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#endif /* CONFIG_HAVE_ARM_TWD */
|
||||
#endif /* CONFIG_ARCH_OMAP4 */
|
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|
||||
#if defined(CONFIG_SOC_OMAP5) || defined(CONFIG_SOC_DRA7XX)
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void __init omap5_realtime_timer_init(void)
|
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{
|
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omap4_sync32k_timer_init();
|
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|
|
|
@ -115,6 +115,13 @@ config CLKSRC_PISTACHIO
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bool
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||||
select CLKSRC_OF
|
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|
||||
config CLKSRC_TI_32K
|
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bool "Texas Instruments 32.768 Hz Clocksource" if COMPILE_TEST
|
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select CLKSRC_OF if OF
|
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help
|
||||
This option enables support for Texas Instruments 32.768 Hz clocksource
|
||||
available on many OMAP-like platforms.
|
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|
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config CLKSRC_STM32
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bool "Clocksource for STM32 SoCs" if !ARCH_STM32
|
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depends on OF && ARM && (ARCH_STM32 || COMPILE_TEST)
|
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|
|
|
@ -45,6 +45,7 @@ obj-$(CONFIG_VF_PIT_TIMER) += vf_pit_timer.o
|
|||
obj-$(CONFIG_CLKSRC_QCOM) += qcom-timer.o
|
||||
obj-$(CONFIG_MTK_TIMER) += mtk_timer.o
|
||||
obj-$(CONFIG_CLKSRC_PISTACHIO) += time-pistachio.o
|
||||
obj-$(CONFIG_CLKSRC_TI_32K) += timer-ti-32k.o
|
||||
|
||||
obj-$(CONFIG_ARM_ARCH_TIMER) += arm_arch_timer.o
|
||||
obj-$(CONFIG_ARM_GLOBAL_TIMER) += arm_global_timer.o
|
||||
|
|
126
drivers/clocksource/timer-ti-32k.c
Normal file
126
drivers/clocksource/timer-ti-32k.c
Normal file
|
@ -0,0 +1,126 @@
|
|||
/**
|
||||
* timer-ti-32k.c - OMAP2 32k Timer Support
|
||||
*
|
||||
* Copyright (C) 2009 Nokia Corporation
|
||||
*
|
||||
* Update to use new clocksource/clockevent layers
|
||||
* Author: Kevin Hilman, MontaVista Software, Inc. <source@mvista.com>
|
||||
* Copyright (C) 2007 MontaVista Software, Inc.
|
||||
*
|
||||
* Original driver:
|
||||
* Copyright (C) 2005 Nokia Corporation
|
||||
* Author: Paul Mundt <paul.mundt@nokia.com>
|
||||
* Juha Yrjölä <juha.yrjola@nokia.com>
|
||||
* OMAP Dual-mode timer framework support by Timo Teras
|
||||
*
|
||||
* Some parts based off of TI's 24xx code:
|
||||
*
|
||||
* Copyright (C) 2004-2009 Texas Instruments, Inc.
|
||||
*
|
||||
* Roughly modelled after the OMAP1 MPU timer code.
|
||||
* Added OMAP4 support - Santosh Shilimkar <santosh.shilimkar@ti.com>
|
||||
*
|
||||
* Copyright (C) 2015 Texas Instruments Incorporated - http://www.ti.com
|
||||
*
|
||||
* This program is free software: you can redistribute it and/or modify
|
||||
* it under the terms of the GNU General Public License version 2 of
|
||||
* the License as published by the Free Software Foundation.
|
||||
*
|
||||
* This program is distributed in the hope that it will be useful,
|
||||
* but WITHOUT ANY WARRANTY; without even the implied warranty of
|
||||
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
|
||||
* GNU General Public License for more details.
|
||||
*
|
||||
* You should have received a copy of the GNU General Public License
|
||||
* along with this program. If not, see <http://www.gnu.org/licenses/>.
|
||||
*/
|
||||
|
||||
#include <linux/init.h>
|
||||
#include <linux/time.h>
|
||||
#include <linux/sched_clock.h>
|
||||
#include <linux/clocksource.h>
|
||||
#include <linux/of.h>
|
||||
#include <linux/of_address.h>
|
||||
|
||||
/*
|
||||
* 32KHz clocksource ... always available, on pretty most chips except
|
||||
* OMAP 730 and 1510. Other timers could be used as clocksources, with
|
||||
* higher resolution in free-running counter modes (e.g. 12 MHz xtal),
|
||||
* but systems won't necessarily want to spend resources that way.
|
||||
*/
|
||||
|
||||
#define OMAP2_32KSYNCNT_REV_OFF 0x0
|
||||
#define OMAP2_32KSYNCNT_REV_SCHEME (0x3 << 30)
|
||||
#define OMAP2_32KSYNCNT_CR_OFF_LOW 0x10
|
||||
#define OMAP2_32KSYNCNT_CR_OFF_HIGH 0x30
|
||||
|
||||
struct ti_32k {
|
||||
void __iomem *base;
|
||||
void __iomem *counter;
|
||||
struct clocksource cs;
|
||||
};
|
||||
|
||||
static inline struct ti_32k *to_ti_32k(struct clocksource *cs)
|
||||
{
|
||||
return container_of(cs, struct ti_32k, cs);
|
||||
}
|
||||
|
||||
static cycle_t ti_32k_read_cycles(struct clocksource *cs)
|
||||
{
|
||||
struct ti_32k *ti = to_ti_32k(cs);
|
||||
|
||||
return (cycle_t)readl_relaxed(ti->counter);
|
||||
}
|
||||
|
||||
static struct ti_32k ti_32k_timer = {
|
||||
.cs = {
|
||||
.name = "32k_counter",
|
||||
.rating = 250,
|
||||
.read = ti_32k_read_cycles,
|
||||
.mask = CLOCKSOURCE_MASK(32),
|
||||
.flags = CLOCK_SOURCE_IS_CONTINUOUS |
|
||||
CLOCK_SOURCE_SUSPEND_NONSTOP,
|
||||
},
|
||||
};
|
||||
|
||||
static u64 notrace omap_32k_read_sched_clock(void)
|
||||
{
|
||||
return ti_32k_read_cycles(&ti_32k_timer.cs);
|
||||
}
|
||||
|
||||
static void __init ti_32k_timer_init(struct device_node *np)
|
||||
{
|
||||
int ret;
|
||||
|
||||
ti_32k_timer.base = of_iomap(np, 0);
|
||||
if (!ti_32k_timer.base) {
|
||||
pr_err("Can't ioremap 32k timer base\n");
|
||||
return;
|
||||
}
|
||||
|
||||
ti_32k_timer.counter = ti_32k_timer.base;
|
||||
|
||||
/*
|
||||
* 32k sync Counter IP register offsets vary between the highlander
|
||||
* version and the legacy ones.
|
||||
*
|
||||
* The 'SCHEME' bits(30-31) of the revision register is used to identify
|
||||
* the version.
|
||||
*/
|
||||
if (readl_relaxed(ti_32k_timer.base + OMAP2_32KSYNCNT_REV_OFF) &
|
||||
OMAP2_32KSYNCNT_REV_SCHEME)
|
||||
ti_32k_timer.counter += OMAP2_32KSYNCNT_CR_OFF_HIGH;
|
||||
else
|
||||
ti_32k_timer.counter += OMAP2_32KSYNCNT_CR_OFF_LOW;
|
||||
|
||||
ret = clocksource_register_hz(&ti_32k_timer.cs, 32768);
|
||||
if (ret) {
|
||||
pr_err("32k_counter: can't register clocksource\n");
|
||||
return;
|
||||
}
|
||||
|
||||
sched_clock_register(omap_32k_read_sched_clock, 32, 32768);
|
||||
pr_info("OMAP clocksource: 32k_counter at 32768 Hz\n");
|
||||
}
|
||||
CLOCKSOURCE_OF_DECLARE(ti_32k_timer, "ti,omap-counter32k",
|
||||
ti_32k_timer_init);
|
Loading…
Reference in a new issue