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ASoC: SOF: ipc: replace fw ready bitfield with explicit bit ordering
Previously the structure used bitfields, which do not guarantee bit ordering. This change makes sure the order is clearly defined. It also renames and repurposes the field for general use. Signed-off-by: Slawomir Blauciak <slawomir.blauciak@linux.intel.com> Signed-off-by: Pierre-Louis Bossart <pierre-louis.bossart@linux.intel.com> Signed-off-by: Mark Brown <broonie@kernel.org>
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2 changed files with 17 additions and 14 deletions
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@ -18,6 +18,14 @@
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#define SOF_IPC_MAX_ELEMS 16
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/*
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* Firmware boot info flag bits (64-bit)
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*/
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#define SOF_IPC_INFO_BUILD BIT(0)
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#define SOF_IPC_INFO_LOCKS BIT(1)
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#define SOF_IPC_INFO_LOCKSV BIT(2)
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#define SOF_IPC_INFO_GDB BIT(3)
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/* extended data types that can be appended onto end of sof_ipc_fw_ready */
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enum sof_ipc_ext_data {
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SOF_IPC_EXT_DMA_BUFFER = 0,
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@ -49,16 +57,8 @@ struct sof_ipc_fw_ready {
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uint32_t hostbox_size;
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struct sof_ipc_fw_version version;
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/* Miscellaneous debug flags showing build/debug features enabled */
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union {
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uint64_t reserved;
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struct {
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uint64_t build:1;
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uint64_t locks:1;
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uint64_t locks_verbose:1;
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uint64_t gdb:1;
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} bits;
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} debug;
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/* Miscellaneous flags */
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uint64_t flags;
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/* reserved for future use */
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uint32_t reserved[4];
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@ -763,16 +763,19 @@ int snd_sof_ipc_valid(struct snd_sof_dev *sdev)
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}
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}
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if (ready->debug.bits.build) {
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if (ready->flags & SOF_IPC_INFO_BUILD) {
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dev_info(sdev->dev,
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"Firmware debug build %d on %s-%s - options:\n"
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" GDB: %s\n"
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" lock debug: %s\n"
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" lock vdebug: %s\n",
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v->build, v->date, v->time,
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ready->debug.bits.gdb ? "enabled" : "disabled",
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ready->debug.bits.locks ? "enabled" : "disabled",
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ready->debug.bits.locks_verbose ? "enabled" : "disabled");
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ready->flags & SOF_IPC_INFO_GDB ?
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"enabled" : "disabled",
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ready->flags & SOF_IPC_INFO_LOCKS ?
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"enabled" : "disabled",
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ready->flags & SOF_IPC_INFO_LOCKSV ?
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"enabled" : "disabled");
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}
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/* copy the fw_version into debugfs at first boot */
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