ARM: dts: r8a7794: Fix W=1 dtc warnings

Warning (unit_address_vs_reg): Node /cache-controller@1 has a unit name, but no reg property

Move the cache-controller node under the cpus node, and make its unit
name and reg property match the MPIDR value.

Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
This commit is contained in:
Geert Uytterhoeven 2016-05-20 09:09:59 +02:00 committed by Simon Horman
parent ad53f5f00b
commit 34ea4b4a82

View file

@ -55,13 +55,14 @@ cpu1: cpu@1 {
power-domains = <&sysc R8A7794_PD_CA7_CPU1>;
next-level-cache = <&L2_CA7>;
};
};
L2_CA7: cache-controller@1 {
compatible = "cache";
power-domains = <&sysc R8A7794_PD_CA7_SCU>;
cache-unified;
cache-level = <2>;
L2_CA7: cache-controller@0 {
compatible = "cache";
reg = <0>;
power-domains = <&sysc R8A7794_PD_CA7_SCU>;
cache-unified;
cache-level = <2>;
};
};
gic: interrupt-controller@f1001000 {