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ARM i.MX fixes for 3.7-rc
-----BEGIN PGP SIGNATURE----- Version: GnuPG v1.4.12 (GNU/Linux) iQIcBAABCAAGBQJQh55QAAoJEPFlmONMx+ezdQIP/30/TXP/l/i7T5VYfR0XhTFl US0emCkYhkOBdm5uyG23HHRnmYjiyc6MFON31ZKSfopijwqkGKPUdg3O7w3MGaAQ wAcKMD7D3kMdpHtMtvcT5aRFMq9FAS/od0vM5EiUALMACWLi+4tl0oi0YSbsjaCh V44Dx+jZuT/9FNIltFjkVauAQ8g6J94ShtlAOJ4sDMbPfp+Z0Q0c6VIXLIJFAQqg IGnoDh1Xs6e1RDyCIlaeGW2ikYuAJsXyy8/SeKANSgFb3y7nJIt4EvQC4T4FB7mO +95KC4DSv9KWNT5wMFmZJzSsgbC5L8ubr3DbhnNlLzH3ZnYA9RYDN4jHobC6ivhU VBSf96mFlepdpMc0vze7rmBXc8fjryAaFz3XBNoURj7CyRBsqXL9grcppEEV9HxR AHB1rSNaGAWazIBnF2XriJG0xz//vBtk4cen6RIRMrjRiqrEtPzNPDUHfeV/6qGX EkY38//TghQAI+bzugs52iyOqlQp8oAgp6FOiUndSAkTGJnDG+hlpbiWkPeehteS gS61Vda7PD5aqWWNQ7gvTDocANHLeOG9aRP6tRZtQmuVWwW2Llk2LNzyY5+tLD6m caanARdUnNogrU6GBEy/PjTfTPNZvV1fQ2gyZluRBwrwRiWxjVScLulUeG6+of6d TAXHCgLqTsAkvVbUhqOE =bFo9 -----END PGP SIGNATURE----- Merge tag 'imx-fixes' of git://git.pengutronix.de/git/imx/linux-2.6 into fixes Patches from Sascha Hauer <s.hauer@pengutronix.de>: ARM i.MX fixes for 3.7-rc * tag 'imx-fixes' of git://git.pengutronix.de/git/imx/linux-2.6: ARM i.MX25: Fix PWM per clock lookups ARM i.MX25 clk: Fix nfc_ipg_per parent ARM i.MX25: Fix lcdc_ipg_per parent clock ARM: mxc: platform-mxc-mmc: Fix register region size ARM: imx: clk-imx27: Fix divider width field ARM: imx: fix the return value check in imx_clk_busy_divider() ARM: imx_v6_v7_defconfig: Enable CONFIG_GPIO_MC9S08DZ60 ARM: imx: fix return value check in imx3_init_l2x0() Signed-off-by: Arnd Bergmann <arnd@arndb.de>
This commit is contained in:
commit
3529e730b5
6 changed files with 14 additions and 13 deletions
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@ -139,6 +139,7 @@ CONFIG_I2C_IMX=y
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CONFIG_SPI=y
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CONFIG_SPI=y
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CONFIG_SPI_IMX=y
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CONFIG_SPI_IMX=y
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CONFIG_GPIO_SYSFS=y
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CONFIG_GPIO_SYSFS=y
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CONFIG_GPIO_MC9S08DZ60=y
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# CONFIG_HWMON is not set
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# CONFIG_HWMON is not set
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CONFIG_WATCHDOG=y
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CONFIG_WATCHDOG=y
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CONFIG_IMX2_WDT=y
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CONFIG_IMX2_WDT=y
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@ -155,6 +156,7 @@ CONFIG_SOC_CAMERA=y
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CONFIG_SOC_CAMERA_OV2640=y
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CONFIG_SOC_CAMERA_OV2640=y
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CONFIG_VIDEO_MX3=y
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CONFIG_VIDEO_MX3=y
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CONFIG_FB=y
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CONFIG_FB=y
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CONFIG_LCD_PLATFORM=y
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CONFIG_BACKLIGHT_LCD_SUPPORT=y
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CONFIG_BACKLIGHT_LCD_SUPPORT=y
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CONFIG_LCD_CLASS_DEVICE=y
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CONFIG_LCD_CLASS_DEVICE=y
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CONFIG_LCD_L4F00242T03=y
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CONFIG_LCD_L4F00242T03=y
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@ -108,7 +108,7 @@ struct clk *imx_clk_busy_divider(const char *name, const char *parent_name,
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busy->div.hw.init = &init;
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busy->div.hw.init = &init;
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clk = clk_register(NULL, &busy->div.hw);
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clk = clk_register(NULL, &busy->div.hw);
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if (!clk)
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if (IS_ERR(clk))
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kfree(busy);
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kfree(busy);
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return clk;
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return clk;
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@ -127,8 +127,8 @@ int __init mx25_clocks_init(void)
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clk[esdhc2_ipg_per] = imx_clk_gate("esdhc2_ipg_per", "per4", ccm(CCM_CGCR0), 4);
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clk[esdhc2_ipg_per] = imx_clk_gate("esdhc2_ipg_per", "per4", ccm(CCM_CGCR0), 4);
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clk[gpt_ipg_per] = imx_clk_gate("gpt_ipg_per", "per5", ccm(CCM_CGCR0), 5);
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clk[gpt_ipg_per] = imx_clk_gate("gpt_ipg_per", "per5", ccm(CCM_CGCR0), 5);
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clk[i2c_ipg_per] = imx_clk_gate("i2c_ipg_per", "per6", ccm(CCM_CGCR0), 6);
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clk[i2c_ipg_per] = imx_clk_gate("i2c_ipg_per", "per6", ccm(CCM_CGCR0), 6);
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clk[lcdc_ipg_per] = imx_clk_gate("lcdc_ipg_per", "per8", ccm(CCM_CGCR0), 7);
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clk[lcdc_ipg_per] = imx_clk_gate("lcdc_ipg_per", "per7", ccm(CCM_CGCR0), 7);
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clk[nfc_ipg_per] = imx_clk_gate("nfc_ipg_per", "ipg_per", ccm(CCM_CGCR0), 8);
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clk[nfc_ipg_per] = imx_clk_gate("nfc_ipg_per", "per8", ccm(CCM_CGCR0), 8);
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clk[ssi1_ipg_per] = imx_clk_gate("ssi1_ipg_per", "per13", ccm(CCM_CGCR0), 13);
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clk[ssi1_ipg_per] = imx_clk_gate("ssi1_ipg_per", "per13", ccm(CCM_CGCR0), 13);
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clk[ssi2_ipg_per] = imx_clk_gate("ssi2_ipg_per", "per14", ccm(CCM_CGCR0), 14);
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clk[ssi2_ipg_per] = imx_clk_gate("ssi2_ipg_per", "per14", ccm(CCM_CGCR0), 14);
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clk[uart_ipg_per] = imx_clk_gate("uart_ipg_per", "per15", ccm(CCM_CGCR0), 15);
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clk[uart_ipg_per] = imx_clk_gate("uart_ipg_per", "per15", ccm(CCM_CGCR0), 15);
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@ -203,13 +203,13 @@ int __init mx25_clocks_init(void)
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clk_register_clkdev(clk[cspi2_ipg], NULL, "imx35-cspi.1");
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clk_register_clkdev(clk[cspi2_ipg], NULL, "imx35-cspi.1");
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clk_register_clkdev(clk[cspi3_ipg], NULL, "imx35-cspi.2");
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clk_register_clkdev(clk[cspi3_ipg], NULL, "imx35-cspi.2");
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clk_register_clkdev(clk[pwm1_ipg], "ipg", "mxc_pwm.0");
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clk_register_clkdev(clk[pwm1_ipg], "ipg", "mxc_pwm.0");
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clk_register_clkdev(clk[per10], "per", "mxc_pwm.0");
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clk_register_clkdev(clk[pwm_ipg_per], "per", "mxc_pwm.0");
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clk_register_clkdev(clk[pwm1_ipg], "ipg", "mxc_pwm.1");
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clk_register_clkdev(clk[pwm1_ipg], "ipg", "mxc_pwm.1");
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clk_register_clkdev(clk[per10], "per", "mxc_pwm.1");
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clk_register_clkdev(clk[pwm_ipg_per], "per", "mxc_pwm.1");
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clk_register_clkdev(clk[pwm1_ipg], "ipg", "mxc_pwm.2");
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clk_register_clkdev(clk[pwm1_ipg], "ipg", "mxc_pwm.2");
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clk_register_clkdev(clk[per10], "per", "mxc_pwm.2");
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clk_register_clkdev(clk[pwm_ipg_per], "per", "mxc_pwm.2");
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clk_register_clkdev(clk[pwm1_ipg], "ipg", "mxc_pwm.3");
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clk_register_clkdev(clk[pwm1_ipg], "ipg", "mxc_pwm.3");
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clk_register_clkdev(clk[per10], "per", "mxc_pwm.3");
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clk_register_clkdev(clk[pwm_ipg_per], "per", "mxc_pwm.3");
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clk_register_clkdev(clk[kpp_ipg], NULL, "imx-keypad");
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clk_register_clkdev(clk[kpp_ipg], NULL, "imx-keypad");
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clk_register_clkdev(clk[tsc_ipg], NULL, "mx25-adc");
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clk_register_clkdev(clk[tsc_ipg], NULL, "mx25-adc");
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clk_register_clkdev(clk[i2c_ipg_per], NULL, "imx-i2c.0");
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clk_register_clkdev(clk[i2c_ipg_per], NULL, "imx-i2c.0");
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@ -109,7 +109,7 @@ int __init mx27_clocks_init(unsigned long fref)
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clk[per3_div] = imx_clk_divider("per3_div", "mpll_main2", CCM_PCDR1, 16, 6);
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clk[per3_div] = imx_clk_divider("per3_div", "mpll_main2", CCM_PCDR1, 16, 6);
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clk[per4_div] = imx_clk_divider("per4_div", "mpll_main2", CCM_PCDR1, 24, 6);
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clk[per4_div] = imx_clk_divider("per4_div", "mpll_main2", CCM_PCDR1, 24, 6);
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clk[vpu_sel] = imx_clk_mux("vpu_sel", CCM_CSCR, 21, 1, vpu_sel_clks, ARRAY_SIZE(vpu_sel_clks));
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clk[vpu_sel] = imx_clk_mux("vpu_sel", CCM_CSCR, 21, 1, vpu_sel_clks, ARRAY_SIZE(vpu_sel_clks));
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clk[vpu_div] = imx_clk_divider("vpu_div", "vpu_sel", CCM_PCDR0, 10, 3);
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clk[vpu_div] = imx_clk_divider("vpu_div", "vpu_sel", CCM_PCDR0, 10, 6);
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clk[usb_div] = imx_clk_divider("usb_div", "spll", CCM_CSCR, 28, 3);
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clk[usb_div] = imx_clk_divider("usb_div", "spll", CCM_CSCR, 28, 3);
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clk[cpu_sel] = imx_clk_mux("cpu_sel", CCM_CSCR, 15, 1, cpu_sel_clks, ARRAY_SIZE(cpu_sel_clks));
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clk[cpu_sel] = imx_clk_mux("cpu_sel", CCM_CSCR, 15, 1, cpu_sel_clks, ARRAY_SIZE(cpu_sel_clks));
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clk[clko_sel] = imx_clk_mux("clko_sel", CCM_CCSR, 0, 5, clko_sel_clks, ARRAY_SIZE(clko_sel_clks));
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clk[clko_sel] = imx_clk_mux("clko_sel", CCM_CCSR, 0, 5, clko_sel_clks, ARRAY_SIZE(clko_sel_clks));
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@ -121,7 +121,7 @@ int __init mx27_clocks_init(unsigned long fref)
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clk[ssi1_sel] = imx_clk_mux("ssi1_sel", CCM_CSCR, 22, 1, ssi_sel_clks, ARRAY_SIZE(ssi_sel_clks));
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clk[ssi1_sel] = imx_clk_mux("ssi1_sel", CCM_CSCR, 22, 1, ssi_sel_clks, ARRAY_SIZE(ssi_sel_clks));
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clk[ssi2_sel] = imx_clk_mux("ssi2_sel", CCM_CSCR, 23, 1, ssi_sel_clks, ARRAY_SIZE(ssi_sel_clks));
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clk[ssi2_sel] = imx_clk_mux("ssi2_sel", CCM_CSCR, 23, 1, ssi_sel_clks, ARRAY_SIZE(ssi_sel_clks));
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clk[ssi1_div] = imx_clk_divider("ssi1_div", "ssi1_sel", CCM_PCDR0, 16, 6);
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clk[ssi1_div] = imx_clk_divider("ssi1_div", "ssi1_sel", CCM_PCDR0, 16, 6);
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clk[ssi2_div] = imx_clk_divider("ssi2_div", "ssi2_sel", CCM_PCDR0, 26, 3);
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clk[ssi2_div] = imx_clk_divider("ssi2_div", "ssi2_sel", CCM_PCDR0, 26, 6);
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clk[clko_en] = imx_clk_gate("clko_en", "clko_div", CCM_PCCR0, 0);
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clk[clko_en] = imx_clk_gate("clko_en", "clko_div", CCM_PCCR0, 0);
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clk[ssi2_ipg_gate] = imx_clk_gate("ssi2_ipg_gate", "ipg", CCM_PCCR0, 0);
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clk[ssi2_ipg_gate] = imx_clk_gate("ssi2_ipg_gate", "ipg", CCM_PCCR0, 0);
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clk[ssi1_ipg_gate] = imx_clk_gate("ssi1_ipg_gate", "ipg", CCM_PCCR0, 1);
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clk[ssi1_ipg_gate] = imx_clk_gate("ssi1_ipg_gate", "ipg", CCM_PCCR0, 1);
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@ -108,9 +108,8 @@ void __init imx3_init_l2x0(void)
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}
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}
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l2x0_base = ioremap(MX3x_L2CC_BASE_ADDR, 4096);
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l2x0_base = ioremap(MX3x_L2CC_BASE_ADDR, 4096);
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if (IS_ERR(l2x0_base)) {
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if (!l2x0_base) {
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printk(KERN_ERR "remapping L2 cache area failed with %ld\n",
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printk(KERN_ERR "remapping L2 cache area failed\n");
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PTR_ERR(l2x0_base));
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return;
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return;
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}
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}
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@ -55,7 +55,7 @@ struct platform_device *__init imx_add_mxc_mmc(
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struct resource res[] = {
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struct resource res[] = {
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{
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{
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.start = data->iobase,
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.start = data->iobase,
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.end = data->iobase + SZ_4K - 1,
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.end = data->iobase + data->iosize - 1,
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.flags = IORESOURCE_MEM,
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.flags = IORESOURCE_MEM,
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}, {
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}, {
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.start = data->irq,
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.start = data->irq,
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