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Merge branch 'topic/api_caps' into for-linus
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commit
355cdafe14
2 changed files with 71 additions and 0 deletions
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@ -2870,6 +2870,32 @@ static irqreturn_t pl330_irq_handler(int irq, void *data)
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return IRQ_NONE;
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}
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#define PL330_DMA_BUSWIDTHS \
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BIT(DMA_SLAVE_BUSWIDTH_UNDEFINED) | \
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BIT(DMA_SLAVE_BUSWIDTH_1_BYTE) | \
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BIT(DMA_SLAVE_BUSWIDTH_2_BYTES) | \
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BIT(DMA_SLAVE_BUSWIDTH_4_BYTES) | \
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BIT(DMA_SLAVE_BUSWIDTH_8_BYTES)
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static int pl330_dma_device_slave_caps(struct dma_chan *dchan,
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struct dma_slave_caps *caps)
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{
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caps->src_addr_widths = PL330_DMA_BUSWIDTHS;
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caps->dstn_addr_widths = PL330_DMA_BUSWIDTHS;
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caps->directions = BIT(DMA_DEV_TO_MEM) | BIT(DMA_MEM_TO_DEV);
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caps->cmd_pause = false;
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caps->cmd_terminate = true;
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/*
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* This is the limit for transfers with a buswidth of 1, larger
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* buswidths will have larger limits.
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*/
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caps->max_sg_len = 1900800;
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caps->max_sg_nr = 0;
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return 0;
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}
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static int
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pl330_probe(struct amba_device *adev, const struct amba_id *id)
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{
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@ -2975,6 +3001,7 @@ pl330_probe(struct amba_device *adev, const struct amba_id *id)
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pd->device_prep_slave_sg = pl330_prep_slave_sg;
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pd->device_control = pl330_control;
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pd->device_issue_pending = pl330_issue_pending;
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pd->device_slave_caps = pl330_dma_device_slave_caps;
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ret = dma_async_device_register(pd);
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if (ret) {
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@ -370,6 +370,33 @@ struct dma_slave_config {
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unsigned int slave_id;
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};
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/* struct dma_slave_caps - expose capabilities of a slave channel only
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*
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* @src_addr_widths: bit mask of src addr widths the channel supports
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* @dstn_addr_widths: bit mask of dstn addr widths the channel supports
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* @directions: bit mask of slave direction the channel supported
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* since the enum dma_transfer_direction is not defined as bits for each
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* type of direction, the dma controller should fill (1 << <TYPE>) and same
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* should be checked by controller as well
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* @cmd_pause: true, if pause and thereby resume is supported
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* @cmd_terminate: true, if terminate cmd is supported
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*
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* @max_sg_nr: maximum number of SG segments supported
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* 0 for no maximum
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* @max_sg_len: maximum length of a SG segment supported
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* 0 for no maximum
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*/
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struct dma_slave_caps {
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u32 src_addr_widths;
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u32 dstn_addr_widths;
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u32 directions;
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bool cmd_pause;
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bool cmd_terminate;
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u32 max_sg_nr;
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u32 max_sg_len;
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};
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static inline const char *dma_chan_name(struct dma_chan *chan)
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{
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return dev_name(&chan->dev->device);
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@ -532,6 +559,7 @@ struct dma_tx_state {
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* struct with auxiliary transfer status information, otherwise the call
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* will just return a simple status code
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* @device_issue_pending: push pending transactions to hardware
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* @device_slave_caps: return the slave channel capabilities
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*/
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struct dma_device {
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@ -597,6 +625,7 @@ struct dma_device {
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dma_cookie_t cookie,
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struct dma_tx_state *txstate);
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void (*device_issue_pending)(struct dma_chan *chan);
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int (*device_slave_caps)(struct dma_chan *chan, struct dma_slave_caps *caps);
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};
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static inline int dmaengine_device_control(struct dma_chan *chan,
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@ -670,6 +699,21 @@ static inline struct dma_async_tx_descriptor *dmaengine_prep_interleaved_dma(
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return chan->device->device_prep_interleaved_dma(chan, xt, flags);
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}
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static inline int dma_get_slave_caps(struct dma_chan *chan, struct dma_slave_caps *caps)
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{
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if (!chan || !caps)
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return -EINVAL;
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/* check if the channel supports slave transactions */
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if (!test_bit(DMA_SLAVE, chan->device->cap_mask.bits))
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return -ENXIO;
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if (chan->device->device_slave_caps)
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return chan->device->device_slave_caps(chan, caps);
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return -ENXIO;
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}
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static inline int dmaengine_terminate_all(struct dma_chan *chan)
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{
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return dmaengine_device_control(chan, DMA_TERMINATE_ALL, 0);
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