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https://git.kernel.org/pub/scm/linux/kernel/git/stable/linux.git
synced 2024-09-27 12:57:53 +00:00
ARM: dts: stm32: Enable stm32mp1 clock driver on stm32mp157c
This patch enables stm32mp1 clock driver. Signed-off-by: Gabriel Fernandez <gabriel.fernandez@st.com> Signed-off-by: Alexandre Torgue <alexandre.torgue@st.com>
This commit is contained in:
parent
60cc43fc88
commit
3599a8af1c
2 changed files with 28 additions and 44 deletions
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@ -20,7 +20,7 @@ gpioa: gpio@50002000 {
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interrupt-controller;
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#interrupt-cells = <2>;
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reg = <0x0 0x400>;
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clocks = <&clk_pll3_p>;
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clocks = <&rcc GPIOA>;
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st,bank-name = "GPIOA";
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ngpios = <16>;
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gpio-ranges = <&pinctrl 0 0 16>;
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@ -32,7 +32,7 @@ gpiob: gpio@50003000 {
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interrupt-controller;
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#interrupt-cells = <2>;
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reg = <0x1000 0x400>;
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clocks = <&clk_pll3_p>;
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clocks = <&rcc GPIOB>;
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st,bank-name = "GPIOB";
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ngpios = <16>;
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gpio-ranges = <&pinctrl 0 16 16>;
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@ -44,7 +44,7 @@ gpioc: gpio@50004000 {
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interrupt-controller;
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#interrupt-cells = <2>;
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reg = <0x2000 0x400>;
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clocks = <&clk_pll3_p>;
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clocks = <&rcc GPIOC>;
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st,bank-name = "GPIOC";
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ngpios = <16>;
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gpio-ranges = <&pinctrl 0 32 16>;
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@ -56,7 +56,7 @@ gpiod: gpio@50005000 {
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interrupt-controller;
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#interrupt-cells = <2>;
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reg = <0x3000 0x400>;
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clocks = <&clk_pll3_p>;
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clocks = <&rcc GPIOD>;
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st,bank-name = "GPIOD";
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ngpios = <16>;
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gpio-ranges = <&pinctrl 0 48 16>;
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@ -68,7 +68,7 @@ gpioe: gpio@50006000 {
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interrupt-controller;
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#interrupt-cells = <2>;
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reg = <0x4000 0x400>;
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clocks = <&clk_pll3_p>;
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clocks = <&rcc GPIOE>;
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st,bank-name = "GPIOE";
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ngpios = <16>;
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gpio-ranges = <&pinctrl 0 64 16>;
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@ -80,7 +80,7 @@ gpiof: gpio@50007000 {
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interrupt-controller;
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#interrupt-cells = <2>;
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reg = <0x5000 0x400>;
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clocks = <&clk_pll3_p>;
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clocks = <&rcc GPIOF>;
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st,bank-name = "GPIOF";
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ngpios = <16>;
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gpio-ranges = <&pinctrl 0 80 16>;
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@ -92,7 +92,7 @@ gpiog: gpio@50008000 {
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interrupt-controller;
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#interrupt-cells = <2>;
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reg = <0x6000 0x400>;
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clocks = <&clk_pll3_p>;
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clocks = <&rcc GPIOG>;
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st,bank-name = "GPIOG";
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ngpios = <16>;
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gpio-ranges = <&pinctrl 0 96 16>;
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@ -104,7 +104,7 @@ gpioh: gpio@50009000 {
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interrupt-controller;
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#interrupt-cells = <2>;
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reg = <0x7000 0x400>;
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clocks = <&clk_pll3_p>;
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clocks = <&rcc GPIOH>;
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st,bank-name = "GPIOH";
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ngpios = <16>;
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gpio-ranges = <&pinctrl 0 112 16>;
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@ -116,7 +116,7 @@ gpioi: gpio@5000a000 {
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interrupt-controller;
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#interrupt-cells = <2>;
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reg = <0x8000 0x400>;
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clocks = <&clk_pll3_p>;
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clocks = <&rcc GPIOI>;
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st,bank-name = "GPIOI";
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ngpios = <16>;
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gpio-ranges = <&pinctrl 0 128 16>;
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@ -128,7 +128,7 @@ gpioj: gpio@5000b000 {
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interrupt-controller;
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#interrupt-cells = <2>;
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reg = <0x9000 0x400>;
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clocks = <&clk_pll3_p>;
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clocks = <&rcc GPIOJ>;
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st,bank-name = "GPIOJ";
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ngpios = <16>;
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gpio-ranges = <&pinctrl 0 144 16>;
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@ -140,7 +140,7 @@ gpiok: gpio@5000c000 {
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interrupt-controller;
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#interrupt-cells = <2>;
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reg = <0xa000 0x400>;
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clocks = <&clk_pll3_p>;
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clocks = <&rcc GPIOK>;
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st,bank-name = "GPIOK";
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ngpios = <8>;
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gpio-ranges = <&pinctrl 0 160 8>;
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@ -174,7 +174,7 @@ gpioz: gpio@54004000 {
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interrupt-controller;
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#interrupt-cells = <2>;
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reg = <0 0x400>;
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clocks = <&clk_pll2_p>;
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clocks = <&rcc GPIOZ>;
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st,bank-name = "GPIOZ";
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st,bank-ioport = <11>;
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ngpios = <8>;
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@ -4,6 +4,7 @@
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* Author: Ludovic Barre <ludovic.barre@st.com> for STMicroelectronics.
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*/
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#include <dt-bindings/interrupt-controller/arm-gic.h>
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#include <dt-bindings/clock/stm32mp1-clks.h>
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/ {
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#address-cells = <1>;
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@ -71,12 +72,6 @@ clk_hse: clk-hse {
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clock-frequency = <24000000>;
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};
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clk_pll_per: clk-pll-per {
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#clock-cells = <0>;
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compatible = "fixed-clock";
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clock-frequency = <64000000>;
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};
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clk_hsi: clk-hsi {
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#clock-cells = <0>;
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compatible = "fixed-clock";
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@ -100,24 +95,6 @@ clk_csi: clk-csi {
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compatible = "fixed-clock";
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clock-frequency = <4000000>;
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};
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clk_pclk1: clk-pclk1 {
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#clock-cells = <0>;
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compatible = "fixed-clock";
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clock-frequency = <86000000>;
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};
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clk_pll3_p: clk-pll3_p {
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#clock-cells = <0>;
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compatible = "fixed-clock";
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clock-frequency = <172000000>;
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};
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clk_pll2_p: clk-pll2_p {
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#clock-cells = <0>;
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compatible = "fixed-clock";
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clock-frequency = <264000000>;
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};
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};
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soc {
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@ -131,7 +108,7 @@ usart2: serial@4000e000 {
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compatible = "st,stm32h7-uart";
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reg = <0x4000e000 0x400>;
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interrupts = <GIC_SPI 38 IRQ_TYPE_NONE>;
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clocks = <&clk_pclk1>;
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clocks = <&rcc USART2_K>;
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status = "disabled";
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};
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@ -139,7 +116,7 @@ usart3: serial@4000f000 {
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compatible = "st,stm32h7-uart";
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reg = <0x4000f000 0x400>;
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interrupts = <GIC_SPI 39 IRQ_TYPE_NONE>;
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clocks = <&clk_pclk1>;
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clocks = <&rcc USART3_K>;
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status = "disabled";
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};
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@ -147,7 +124,7 @@ uart4: serial@40010000 {
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compatible = "st,stm32h7-uart";
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reg = <0x40010000 0x400>;
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interrupts = <GIC_SPI 52 IRQ_TYPE_NONE>;
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clocks = <&clk_pclk1>;
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clocks = <&rcc UART4_K>;
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status = "disabled";
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};
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@ -155,7 +132,7 @@ uart5: serial@40011000 {
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compatible = "st,stm32h7-uart";
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reg = <0x40011000 0x400>;
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interrupts = <GIC_SPI 53 IRQ_TYPE_NONE>;
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clocks = <&clk_pclk1>;
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clocks = <&rcc UART5_K>;
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status = "disabled";
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};
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@ -163,7 +140,7 @@ uart7: serial@40018000 {
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compatible = "st,stm32h7-uart";
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reg = <0x40018000 0x400>;
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interrupts = <GIC_SPI 82 IRQ_TYPE_NONE>;
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clocks = <&clk_pclk1>;
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clocks = <&rcc UART7_K>;
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status = "disabled";
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};
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@ -171,7 +148,7 @@ uart8: serial@40019000 {
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compatible = "st,stm32h7-uart";
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reg = <0x40019000 0x400>;
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interrupts = <GIC_SPI 83 IRQ_TYPE_NONE>;
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clocks = <&clk_pclk1>;
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clocks = <&rcc UART8_K>;
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status = "disabled";
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};
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@ -179,15 +156,22 @@ usart6: serial@44003000 {
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compatible = "st,stm32h7-uart";
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reg = <0x44003000 0x400>;
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interrupts = <GIC_SPI 71 IRQ_TYPE_NONE>;
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clocks = <&clk_pclk1>;
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clocks = <&rcc USART6_K>;
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status = "disabled";
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};
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rcc: rcc@50000000 {
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compatible = "st,stm32mp1-rcc", "syscon";
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reg = <0x50000000 0x1000>;
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#clock-cells = <1>;
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#reset-cells = <1>;
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};
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usart1: serial@5c000000 {
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compatible = "st,stm32h7-uart";
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reg = <0x5c000000 0x400>;
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interrupts = <GIC_SPI 37 IRQ_TYPE_NONE>;
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clocks = <&clk_pclk1>;
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clocks = <&rcc USART1_K>;
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status = "disabled";
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};
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};
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