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ARM kprobes: instruction single-stepping support
This is the code implementing instruction single-stepping for kprobes on ARM. To get around the limitation of no Next-PC and no hardware single- stepping, all kprobe'd instructions are split into three camps: simulation, emulation, and rejected. "Simulated" instructions are those instructions which behavior is reproduced by straight C code. "Emulated" instructions are ones that are copied, slightly altered and executed directly in the instruction slot to reproduce their behavior. "Rejected" instructions are ones that could be simulated, but work hasn't been put into simulating them. These instructions should be very rare, if not unencountered, in the kernel. If ever needed, code could be added to simulate them. One might wonder why this and the ptrace singlestep facility are not sharing some code. Both approaches are fundamentally different because the ptrace code regains control after the stepped instruction by installing a breakpoint after the instruction itself, and possibly at the location where the instruction might be branching to, instead of simulating or emulating the target instruction. The ptrace approach isn't suitable for kprobes because the breakpoints would have to be moved back, and the icache flushed, everytime the probe is hit to let normal code execution resume, which would have a significant performance impact. It is also racy on SMP since another CPU could, with the right timing, sail through the probe point without being caught. Because ptrace single-stepping always result in a different process to be scheduled, the concern for performance is much less significant. On the other hand, the kprobes approach isn't (currently) suitable for ptrace because it has no provision for proper user space memory protection and translation, and even if that was implemented, the gain wouldn't be worth the added complexity in the ptrace path compared to the current approach. So, until kprobes does support user space, both kprobes and ptrace are best kept independent and separate. Signed-off-by: Quentin Barnes <qbarnes@gmail.com> Signed-off-by: Abhishek Sagar <sagar.abhishek@gmail.com> Signed-off-by: Nicolas Pitre <nico@marvell.com>
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@ -19,6 +19,7 @@ obj-$(CONFIG_ISA_DMA) += dma-isa.o
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obj-$(CONFIG_PCI) += bios32.o isa.o
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obj-$(CONFIG_SMP) += smp.o
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obj-$(CONFIG_KEXEC) += machine_kexec.o relocate_kernel.o
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obj-$(CONFIG_KPROBES) += kprobes-decode.o
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obj-$(CONFIG_OABI_COMPAT) += sys_oabi-compat.o
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obj-$(CONFIG_CRUNCH) += crunch.o crunch-bits.o
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arch/arm/kernel/kprobes-decode.c
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arch/arm/kernel/kprobes-decode.c
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include/asm-arm/kprobes.h
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include/asm-arm/kprobes.h
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/*
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* include/asm-arm/kprobes.h
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*
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* Copyright (C) 2006, 2007 Motorola Inc.
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*
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* This program is free software; you can redistribute it and/or modify
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* it under the terms of the GNU General Public License version 2 as
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* published by the Free Software Foundation.
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*
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* This program is distributed in the hope that it will be useful,
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* but WITHOUT ANY WARRANTY; without even the implied warranty of
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* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
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* General Public License for more details.
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*/
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#ifndef _ARM_KPROBES_H
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#define _ARM_KPROBES_H
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#include <linux/types.h>
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#include <linux/ptrace.h>
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typedef u32 kprobe_opcode_t;
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struct kprobe;
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typedef void (kprobe_insn_handler_t)(struct kprobe *, struct pt_regs *);
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/* Architecture specific copy of original instruction. */
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struct arch_specific_insn {
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kprobe_opcode_t *insn;
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kprobe_insn_handler_t *insn_handler;
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};
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enum kprobe_insn {
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INSN_REJECTED,
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INSN_GOOD,
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INSN_GOOD_NO_SLOT
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};
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enum kprobe_insn arm_kprobe_decode_insn(kprobe_opcode_t,
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struct arch_specific_insn *);
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void __init arm_kprobe_decode_init(void);
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#endif /* _ARM_KPROBES_H */
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