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drm/msm/dsi_pll_10nm: Fix variable usage for pll_lockdet_rate
The PLL_LOCKDET_RATE_1 was being programmed with a hardcoded value directly, but the same value was also being specified in the dsi_pll_regs struct pll_lockdet_rate variable: let's use it! Signed-off-by: AngeloGioacchino Del Regno <angelogioacchino.delregno@somainline.org> Signed-off-by: Rob Clark <robdclark@chromium.org>
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1 changed files with 2 additions and 1 deletions
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@ -304,7 +304,8 @@ static void dsi_pll_commit(struct dsi_pll_10nm *pll)
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reg->frac_div_start_mid);
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pll_write(base + REG_DSI_10nm_PHY_PLL_FRAC_DIV_START_HIGH_1,
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reg->frac_div_start_high);
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pll_write(base + REG_DSI_10nm_PHY_PLL_PLL_LOCKDET_RATE_1, 0x40);
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pll_write(base + REG_DSI_10nm_PHY_PLL_PLL_LOCKDET_RATE_1,
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reg->pll_lockdet_rate);
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pll_write(base + REG_DSI_10nm_PHY_PLL_PLL_LOCK_DELAY, 0x06);
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pll_write(base + REG_DSI_10nm_PHY_PLL_CMODE, 0x10);
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pll_write(base + REG_DSI_10nm_PHY_PLL_CLOCK_INVERTERS,
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