MIPS: MTX1: Fix build.

CC      arch/mips/alchemy/mtx-1/board_setup.o
{standard input}: Assembler messages:
{standard input}:263: Error: opcode not supported on this processor: mips1 (mips1) `sync'
{standard input}:274: Error: opcode not supported on this processor: mips1 (mips1) `sync'
{standard input}:296: Error: opcode not supported on this processor: mips1 (mips1) `sync'
[...]

Any .set mipsX statement other than .set mips0 at the end of inline
assembler is a big fat bug.

Introduced by 9482eabeca315c0276ffb50026b7482481b7097b (linux-mips.org) rsp.
32fd6901a6 (kernel.org).

While at it, fix the same issue in

  arch/mips/alchemy/devboards/pb1000/board_setup.c
  arch/mips/alchemy/xxs1500/board_setup.c

as well.

Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
This commit is contained in:
Ralf Baechle 2010-08-03 03:42:32 +01:00
parent 220937b1aa
commit 36f217d9df
3 changed files with 12 additions and 3 deletions

View file

@ -49,7 +49,10 @@ static void board_power_off(void)
{
printk(KERN_ALERT "It's now safe to remove power\n");
while (1)
asm volatile (".set mips3 ; wait ; .set mips1");
asm volatile (
" .set mips32 \n"
" wait \n"
" .set mips0 \n");
}
void __init board_setup(void)

View file

@ -62,7 +62,10 @@ static void mtx1_power_off(void)
{
printk(KERN_ALERT "It's now safe to remove power\n");
while (1)
asm volatile (".set mips3 ; wait ; .set mips1");
asm volatile (
" .set mips32 \n"
" wait \n"
" .set mips0 \n");
}
void __init board_setup(void)

View file

@ -44,7 +44,10 @@ static void xxs1500_power_off(void)
{
printk(KERN_ALERT "It's now safe to remove power\n");
while (1)
asm volatile (".set mips3 ; wait ; .set mips1");
asm volatile (
" .set mips32 \n"
" wait \n"
" .set mips0 \n");
}
void __init board_setup(void)