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memory: tegra: Add Tegra114 memory controller hot resets
Define the table of memory controller hot resets for Tegra114. Signed-off-by: Dmitry Osipenko <digetx@gmail.com> Signed-off-by: Thierry Reding <treding@nvidia.com>
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1 changed files with 33 additions and 0 deletions
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@ -938,6 +938,36 @@ static const struct tegra_smmu_soc tegra114_smmu_soc = {
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.num_asids = 4,
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};
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#define TEGRA114_MC_RESET(_name, _control, _status, _bit) \
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{ \
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.name = #_name, \
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.id = TEGRA114_MC_RESET_##_name, \
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.control = _control, \
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.status = _status, \
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.bit = _bit, \
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}
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static const struct tegra_mc_reset tegra114_mc_resets[] = {
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TEGRA114_MC_RESET(AFI, 0x200, 0x204, 0),
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TEGRA114_MC_RESET(AVPC, 0x200, 0x204, 1),
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TEGRA114_MC_RESET(DC, 0x200, 0x204, 2),
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TEGRA114_MC_RESET(DCB, 0x200, 0x204, 3),
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TEGRA114_MC_RESET(EPP, 0x200, 0x204, 4),
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TEGRA114_MC_RESET(2D, 0x200, 0x204, 5),
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TEGRA114_MC_RESET(HC, 0x200, 0x204, 6),
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TEGRA114_MC_RESET(HDA, 0x200, 0x204, 7),
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TEGRA114_MC_RESET(ISP, 0x200, 0x204, 8),
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TEGRA114_MC_RESET(MPCORE, 0x200, 0x204, 9),
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TEGRA114_MC_RESET(MPCORELP, 0x200, 0x204, 10),
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TEGRA114_MC_RESET(MPE, 0x200, 0x204, 11),
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TEGRA114_MC_RESET(3D, 0x200, 0x204, 12),
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TEGRA114_MC_RESET(3D2, 0x200, 0x204, 13),
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TEGRA114_MC_RESET(PPCS, 0x200, 0x204, 14),
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TEGRA114_MC_RESET(SATA, 0x200, 0x204, 15),
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TEGRA114_MC_RESET(VDE, 0x200, 0x204, 16),
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TEGRA114_MC_RESET(VI, 0x200, 0x204, 17),
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};
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const struct tegra_mc_soc tegra114_mc_soc = {
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.clients = tegra114_mc_clients,
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.num_clients = ARRAY_SIZE(tegra114_mc_clients),
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@ -947,4 +977,7 @@ const struct tegra_mc_soc tegra114_mc_soc = {
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.smmu = &tegra114_smmu_soc,
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.intmask = MC_INT_INVALID_SMMU_PAGE | MC_INT_SECURITY_VIOLATION |
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MC_INT_DECERR_EMEM,
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.reset_ops = &terga_mc_reset_ops_common,
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.resets = tegra114_mc_resets,
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.num_resets = ARRAY_SIZE(tegra114_mc_resets),
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};
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