mirror of
https://git.kernel.org/pub/scm/linux/kernel/git/stable/linux.git
synced 2024-08-23 09:19:51 +00:00
Merge branches 'sched/cleanups' and 'linus' into sched/core
This commit is contained in:
commit
37ba317c9e
179 changed files with 17538 additions and 5471 deletions
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2911
Documentation/logo.svg
Normal file
2911
Documentation/logo.svg
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File diff suppressed because one or more lines are too long
After Width: | Height: | Size: 303 KiB |
|
@ -1,13 +1,4 @@
|
|||
This is the full-colour version of the currently unofficial Linux logo
|
||||
("currently unofficial" just means that there has been no paperwork and
|
||||
that I have not really announced it yet). It was created by Larry Ewing,
|
||||
and is freely usable as long as you acknowledge Larry as the original
|
||||
artist.
|
||||
|
||||
Note that there are black-and-white versions of this available that
|
||||
scale down to smaller sizes and are better for letterheads or whatever
|
||||
you want to use it for: for the full range of logos take a look at
|
||||
Larry's web-page:
|
||||
|
||||
http://www.isc.tamu.edu/~lewing/linux/
|
||||
Tux is taking a three month sabbatical to work as a barber, so Tuz is
|
||||
standing in. He's taken pains to ensure you'll hardly notice.
|
||||
|
||||
Image by Andrew McGown and Josh Bush. Image is licensed CC BY-SA.
|
||||
|
|
15
MAINTAINERS
15
MAINTAINERS
|
@ -3350,10 +3350,8 @@ S: Maintained
|
|||
PARISC ARCHITECTURE
|
||||
P: Kyle McMartin
|
||||
M: kyle@mcmartin.ca
|
||||
P: Matthew Wilcox
|
||||
M: matthew@wil.cx
|
||||
P: Grant Grundler
|
||||
M: grundler@parisc-linux.org
|
||||
P: Helge Deller
|
||||
M: deller@gmx.de
|
||||
L: linux-parisc@vger.kernel.org
|
||||
W: http://www.parisc-linux.org/
|
||||
T: git kernel.org:/pub/scm/linux/kernel/git/kyle/parisc-2.6.git
|
||||
|
@ -3878,6 +3876,15 @@ L: linux-ide@vger.kernel.org
|
|||
T: git kernel.org:/pub/scm/linux/kernel/git/jgarzik/libata-dev.git
|
||||
S: Supported
|
||||
|
||||
SERVER ENGINES 10Gbps NIC - BladeEngine 2 DRIVER
|
||||
P: Sathya Perla
|
||||
M: sathyap@serverengines.com
|
||||
P: Subbu Seetharaman
|
||||
M: subbus@serverengines.com
|
||||
L: netdev@vger.kernel.org
|
||||
W: http://www.serverengines.com
|
||||
S: Supported
|
||||
|
||||
SFC NETWORK DRIVER
|
||||
P: Steve Hodgson
|
||||
P: Ben Hutchings
|
||||
|
|
2
Makefile
2
Makefile
|
@ -1,7 +1,7 @@
|
|||
VERSION = 2
|
||||
PATCHLEVEL = 6
|
||||
SUBLEVEL = 29
|
||||
EXTRAVERSION = -rc7
|
||||
EXTRAVERSION = -rc8
|
||||
NAME = Erotic Pickled Herring
|
||||
|
||||
# *DOCUMENTATION*
|
||||
|
|
|
@ -111,6 +111,7 @@ ENTRY(mcount)
|
|||
.globl mcount_call
|
||||
mcount_call:
|
||||
bl ftrace_stub
|
||||
ldr lr, [fp, #-4] @ restore lr
|
||||
ldmia sp!, {r0-r3, pc}
|
||||
|
||||
ENTRY(ftrace_caller)
|
||||
|
@ -122,6 +123,7 @@ ENTRY(ftrace_caller)
|
|||
.globl ftrace_call
|
||||
ftrace_call:
|
||||
bl ftrace_stub
|
||||
ldr lr, [fp, #-4] @ restore lr
|
||||
ldmia sp!, {r0-r3, pc}
|
||||
|
||||
#else
|
||||
|
@ -133,6 +135,7 @@ ENTRY(mcount)
|
|||
adr r0, ftrace_stub
|
||||
cmp r0, r2
|
||||
bne trace
|
||||
ldr lr, [fp, #-4] @ restore lr
|
||||
ldmia sp!, {r0-r3, pc}
|
||||
|
||||
trace:
|
||||
|
@ -141,6 +144,7 @@ trace:
|
|||
sub r0, r0, #MCOUNT_INSN_SIZE
|
||||
mov lr, pc
|
||||
mov pc, r2
|
||||
mov lr, r1 @ restore lr
|
||||
ldmia sp!, {r0-r3, pc}
|
||||
|
||||
#endif /* CONFIG_DYNAMIC_FTRACE */
|
||||
|
|
|
@ -88,7 +88,7 @@ void set_fiq_handler(void *start, unsigned int length)
|
|||
* disable irqs for the duration. Note - these functions are almost
|
||||
* entirely coded in assembly.
|
||||
*/
|
||||
void __attribute__((naked)) set_fiq_regs(struct pt_regs *regs)
|
||||
void __naked set_fiq_regs(struct pt_regs *regs)
|
||||
{
|
||||
register unsigned long tmp;
|
||||
asm volatile (
|
||||
|
@ -106,7 +106,7 @@ void __attribute__((naked)) set_fiq_regs(struct pt_regs *regs)
|
|||
: "r" (®s->ARM_r8), "I" (PSR_I_BIT | PSR_F_BIT | FIQ_MODE));
|
||||
}
|
||||
|
||||
void __attribute__((naked)) get_fiq_regs(struct pt_regs *regs)
|
||||
void __naked get_fiq_regs(struct pt_regs *regs)
|
||||
{
|
||||
register unsigned long tmp;
|
||||
asm volatile (
|
||||
|
|
|
@ -4,6 +4,8 @@
|
|||
|
||||
#ifndef __ASSEMBLY__
|
||||
|
||||
struct i2c_board_info;
|
||||
|
||||
struct ep93xx_eth_data
|
||||
{
|
||||
unsigned char dev_addr[6];
|
||||
|
|
|
@ -23,6 +23,8 @@
|
|||
#include <linux/init.h>
|
||||
#include <linux/platform_device.h>
|
||||
#include <linux/gpio.h>
|
||||
|
||||
#include <mach/irqs.h>
|
||||
#include <mach/hardware.h>
|
||||
|
||||
static struct resource imx_csi_resources[] = {
|
||||
|
|
|
@ -21,6 +21,7 @@
|
|||
#include <asm/mach/arch.h>
|
||||
#include <asm/mach/time.h>
|
||||
|
||||
#include <mach/irqs.h>
|
||||
#include <mach/hardware.h>
|
||||
#include <mach/common.h>
|
||||
#include <mach/imx-uart.h>
|
||||
|
|
|
@ -178,7 +178,9 @@ static int __init omap3_beagle_i2c_init(void)
|
|||
#ifdef CONFIG_I2C2_OMAP_BEAGLE
|
||||
omap_register_i2c_bus(2, 400, NULL, 0);
|
||||
#endif
|
||||
omap_register_i2c_bus(3, 400, NULL, 0);
|
||||
/* Bus 3 is attached to the DVI port where devices like the pico DLP
|
||||
* projector don't work reliably with 400kHz */
|
||||
omap_register_i2c_bus(3, 100, NULL, 0);
|
||||
return 0;
|
||||
}
|
||||
|
||||
|
|
|
@ -431,6 +431,10 @@ void __init orion5x_uart1_init(void)
|
|||
/*****************************************************************************
|
||||
* XOR engine
|
||||
****************************************************************************/
|
||||
struct mv_xor_platform_shared_data orion5x_xor_shared_data = {
|
||||
.dram = &orion5x_mbus_dram_info,
|
||||
};
|
||||
|
||||
static struct resource orion5x_xor_shared_resources[] = {
|
||||
{
|
||||
.name = "xor low",
|
||||
|
@ -448,6 +452,9 @@ static struct resource orion5x_xor_shared_resources[] = {
|
|||
static struct platform_device orion5x_xor_shared = {
|
||||
.name = MV_XOR_SHARED_NAME,
|
||||
.id = 0,
|
||||
.dev = {
|
||||
.platform_data = &orion5x_xor_shared_data,
|
||||
},
|
||||
.num_resources = ARRAY_SIZE(orion5x_xor_shared_resources),
|
||||
.resource = orion5x_xor_shared_resources,
|
||||
};
|
||||
|
|
|
@ -129,7 +129,7 @@ static struct s3c_fb_platdata smdk6410_lcd_pdata __initdata = {
|
|||
.vidcon1 = VIDCON1_INV_HSYNC | VIDCON1_INV_VSYNC,
|
||||
};
|
||||
|
||||
struct map_desc smdk6410_iodesc[] = {};
|
||||
static struct map_desc smdk6410_iodesc[] = {};
|
||||
|
||||
static struct platform_device *smdk6410_devices[] __initdata = {
|
||||
#ifdef CONFIG_SMDK6410_SD_CH0
|
||||
|
@ -146,7 +146,7 @@ static struct platform_device *smdk6410_devices[] __initdata = {
|
|||
|
||||
static struct i2c_board_info i2c_devs0[] __initdata = {
|
||||
{ I2C_BOARD_INFO("24c08", 0x50), },
|
||||
{ I2C_BOARD_INFO("WM8580", 0X1b), },
|
||||
{ I2C_BOARD_INFO("wm8580", 0x1b), },
|
||||
};
|
||||
|
||||
static struct i2c_board_info i2c_devs1[] __initdata = {
|
||||
|
|
|
@ -13,7 +13,7 @@
|
|||
#include <linux/init.h>
|
||||
#include <linux/highmem.h>
|
||||
|
||||
static void __attribute__((naked))
|
||||
static void __naked
|
||||
feroceon_copy_user_page(void *kto, const void *kfrom)
|
||||
{
|
||||
asm("\
|
||||
|
|
|
@ -15,7 +15,7 @@
|
|||
*
|
||||
* FIXME: do we need to handle cache stuff...
|
||||
*/
|
||||
static void __attribute__((naked))
|
||||
static void __naked
|
||||
v3_copy_user_page(void *kto, const void *kfrom)
|
||||
{
|
||||
asm("\n\
|
||||
|
|
|
@ -44,7 +44,7 @@ static DEFINE_SPINLOCK(minicache_lock);
|
|||
* instruction. If your processor does not supply this, you have to write your
|
||||
* own copy_user_highpage that does the right thing.
|
||||
*/
|
||||
static void __attribute__((naked))
|
||||
static void __naked
|
||||
mc_copy_user_page(void *from, void *to)
|
||||
{
|
||||
asm volatile(
|
||||
|
|
|
@ -22,7 +22,7 @@
|
|||
* instruction. If your processor does not supply this, you have to write your
|
||||
* own copy_user_highpage that does the right thing.
|
||||
*/
|
||||
static void __attribute__((naked))
|
||||
static void __naked
|
||||
v4wb_copy_user_page(void *kto, const void *kfrom)
|
||||
{
|
||||
asm("\
|
||||
|
|
|
@ -20,7 +20,7 @@
|
|||
* dirty data in the cache. However, we do have to ensure that
|
||||
* subsequent reads are up to date.
|
||||
*/
|
||||
static void __attribute__((naked))
|
||||
static void __naked
|
||||
v4wt_copy_user_page(void *kto, const void *kfrom)
|
||||
{
|
||||
asm("\
|
||||
|
|
|
@ -29,7 +29,7 @@
|
|||
* if we eventually end up using our copied page.
|
||||
*
|
||||
*/
|
||||
static void __attribute__((naked))
|
||||
static void __naked
|
||||
xsc3_mc_copy_user_page(void *kto, const void *kfrom)
|
||||
{
|
||||
asm("\
|
||||
|
|
|
@ -42,7 +42,7 @@ static DEFINE_SPINLOCK(minicache_lock);
|
|||
* Dcache aliasing issue. The writes will be forwarded to the write buffer,
|
||||
* and merged as appropriate.
|
||||
*/
|
||||
static void __attribute__((naked))
|
||||
static void __naked
|
||||
mc_copy_user_page(void *from, void *to)
|
||||
{
|
||||
/*
|
||||
|
|
|
@ -490,26 +490,30 @@ core_initcall(consistent_init);
|
|||
*/
|
||||
void dma_cache_maint(const void *start, size_t size, int direction)
|
||||
{
|
||||
const void *end = start + size;
|
||||
void (*inner_op)(const void *, const void *);
|
||||
void (*outer_op)(unsigned long, unsigned long);
|
||||
|
||||
BUG_ON(!virt_addr_valid(start) || !virt_addr_valid(end - 1));
|
||||
BUG_ON(!virt_addr_valid(start) || !virt_addr_valid(start + size - 1));
|
||||
|
||||
switch (direction) {
|
||||
case DMA_FROM_DEVICE: /* invalidate only */
|
||||
dmac_inv_range(start, end);
|
||||
outer_inv_range(__pa(start), __pa(end));
|
||||
inner_op = dmac_inv_range;
|
||||
outer_op = outer_inv_range;
|
||||
break;
|
||||
case DMA_TO_DEVICE: /* writeback only */
|
||||
dmac_clean_range(start, end);
|
||||
outer_clean_range(__pa(start), __pa(end));
|
||||
inner_op = dmac_clean_range;
|
||||
outer_op = outer_clean_range;
|
||||
break;
|
||||
case DMA_BIDIRECTIONAL: /* writeback and invalidate */
|
||||
dmac_flush_range(start, end);
|
||||
outer_flush_range(__pa(start), __pa(end));
|
||||
inner_op = dmac_flush_range;
|
||||
outer_op = outer_flush_range;
|
||||
break;
|
||||
default:
|
||||
BUG();
|
||||
}
|
||||
|
||||
inner_op(start, start + size);
|
||||
outer_op(__pa(start), __pa(start) + size);
|
||||
}
|
||||
EXPORT_SYMBOL(dma_cache_maint);
|
||||
|
||||
|
|
|
@ -382,7 +382,7 @@ void __init bootmem_init(void)
|
|||
for_each_node(node)
|
||||
bootmem_free_node(node, mi);
|
||||
|
||||
high_memory = __va(memend_pfn << PAGE_SHIFT);
|
||||
high_memory = __va((memend_pfn << PAGE_SHIFT) - 1) + 1;
|
||||
|
||||
/*
|
||||
* This doesn't seem to be used by the Linux memory manager any
|
||||
|
|
|
@ -124,7 +124,7 @@ int valid_phys_addr_range(unsigned long addr, size_t size)
|
|||
{
|
||||
if (addr < PHYS_OFFSET)
|
||||
return 0;
|
||||
if (addr + size > __pa(high_memory))
|
||||
if (addr + size >= __pa(high_memory - 1))
|
||||
return 0;
|
||||
|
||||
return 1;
|
||||
|
|
|
@ -18,7 +18,8 @@ obj-$(CONFIG_CPU_FREQ) += cpu-omap.o
|
|||
obj-$(CONFIG_OMAP_DM_TIMER) += dmtimer.o
|
||||
obj-$(CONFIG_OMAP_DEBUG_DEVICES) += debug-devices.o
|
||||
obj-$(CONFIG_OMAP_DEBUG_LEDS) += debug-leds.o
|
||||
obj-$(CONFIG_I2C_OMAP) += i2c.o
|
||||
i2c-omap-$(CONFIG_I2C_OMAP) := i2c.o
|
||||
obj-y += $(i2c-omap-m) $(i2c-omap-y)
|
||||
|
||||
# OMAP mailbox framework
|
||||
obj-$(CONFIG_OMAP_MBOX_FWK) += mailbox.o
|
||||
|
|
|
@ -199,21 +199,17 @@ static struct clocksource clocksource_32k = {
|
|||
.flags = CLOCK_SOURCE_IS_CONTINUOUS,
|
||||
};
|
||||
|
||||
/*
|
||||
* Rounds down to nearest nsec.
|
||||
*/
|
||||
unsigned long long omap_32k_ticks_to_nsecs(unsigned long ticks_32k)
|
||||
{
|
||||
return cyc2ns(&clocksource_32k, ticks_32k);
|
||||
}
|
||||
|
||||
/*
|
||||
* Returns current time from boot in nsecs. It's OK for this to wrap
|
||||
* around for now, as it's just a relative time stamp.
|
||||
*/
|
||||
unsigned long long sched_clock(void)
|
||||
{
|
||||
return omap_32k_ticks_to_nsecs(omap_32k_read());
|
||||
unsigned long long ret;
|
||||
|
||||
ret = (unsigned long long)omap_32k_read();
|
||||
ret = (ret * clocksource_32k.mult_orig) >> clocksource_32k.shift;
|
||||
return ret;
|
||||
}
|
||||
|
||||
static int __init omap_init_clocksource_32k(void)
|
||||
|
|
|
@ -35,7 +35,7 @@ extern void omap_map_common_io(void);
|
|||
extern struct sys_timer omap_timer;
|
||||
extern void omap_serial_init(void);
|
||||
extern void omap_serial_enable_clocks(int enable);
|
||||
#ifdef CONFIG_I2C_OMAP
|
||||
#if defined(CONFIG_I2C_OMAP) || defined(CONFIG_I2C_OMAP_MODULE)
|
||||
extern int omap_register_i2c_bus(int bus_id, u32 clkrate,
|
||||
struct i2c_board_info const *info,
|
||||
unsigned len);
|
||||
|
|
|
@ -108,7 +108,7 @@
|
|||
!defined(CONFIG_ARCH_OMAP15XX) && \
|
||||
!defined(CONFIG_ARCH_OMAP16XX) && \
|
||||
!defined(CONFIG_ARCH_OMAP24XX)
|
||||
#error "Power management for this processor not implemented yet"
|
||||
#warning "Power management for this processor not implemented yet"
|
||||
#endif
|
||||
|
||||
#ifndef __ASSEMBLER__
|
||||
|
|
|
@ -248,7 +248,7 @@ static struct clk *clks[] __initdata = {
|
|||
&clk_48m,
|
||||
};
|
||||
|
||||
void s3c64xx_register_clocks(void)
|
||||
void __init s3c64xx_register_clocks(void)
|
||||
{
|
||||
struct clk *clkp;
|
||||
int ret;
|
||||
|
|
|
@ -417,4 +417,4 @@ static __init int s3c64xx_gpiolib_init(void)
|
|||
return 0;
|
||||
}
|
||||
|
||||
arch_initcall(s3c64xx_gpiolib_init);
|
||||
core_initcall(s3c64xx_gpiolib_init);
|
||||
|
|
|
@ -117,7 +117,7 @@
|
|||
#define IRQ_ONENAND1 S3C64XX_IRQ_VIC1(12)
|
||||
#define IRQ_NFC S3C64XX_IRQ_VIC1(13)
|
||||
#define IRQ_CFCON S3C64XX_IRQ_VIC1(14)
|
||||
#define IRQ_UHOST S3C64XX_IRQ_VIC1(15)
|
||||
#define IRQ_USBH S3C64XX_IRQ_VIC1(15)
|
||||
#define IRQ_SPI0 S3C64XX_IRQ_VIC1(16)
|
||||
#define IRQ_SPI1 S3C64XX_IRQ_VIC1(17)
|
||||
#define IRQ_IIC S3C64XX_IRQ_VIC1(18)
|
||||
|
|
|
@ -14,12 +14,15 @@
|
|||
|
||||
#include <linux/kernel.h>
|
||||
#include <linux/interrupt.h>
|
||||
#include <linux/gpio.h>
|
||||
#include <linux/irq.h>
|
||||
#include <linux/io.h>
|
||||
|
||||
#include <asm/hardware/vic.h>
|
||||
|
||||
#include <plat/regs-irqtype.h>
|
||||
#include <plat/regs-gpio.h>
|
||||
#include <plat/gpio-cfg.h>
|
||||
|
||||
#include <mach/map.h>
|
||||
#include <plat/cpu.h>
|
||||
|
@ -74,6 +77,7 @@ static void s3c_irq_eint_maskack(unsigned int irq)
|
|||
static int s3c_irq_eint_set_type(unsigned int irq, unsigned int type)
|
||||
{
|
||||
int offs = eint_offset(irq);
|
||||
int pin;
|
||||
int shift;
|
||||
u32 ctrl, mask;
|
||||
u32 newvalue = 0;
|
||||
|
@ -125,6 +129,15 @@ static int s3c_irq_eint_set_type(unsigned int irq, unsigned int type)
|
|||
ctrl |= newvalue << shift;
|
||||
__raw_writel(ctrl, reg);
|
||||
|
||||
/* set the GPIO pin appropriately */
|
||||
|
||||
if (offs < 23)
|
||||
pin = S3C64XX_GPN(offs);
|
||||
else
|
||||
pin = S3C64XX_GPM(offs - 23);
|
||||
|
||||
s3c_gpio_cfgpin(pin, S3C_GPIO_SFN(2));
|
||||
|
||||
return 0;
|
||||
}
|
||||
|
||||
|
@ -181,7 +194,7 @@ static void s3c_irq_demux_eint20_27(unsigned int irq, struct irq_desc *desc)
|
|||
s3c_irq_demux_eint(20, 27);
|
||||
}
|
||||
|
||||
int __init s3c64xx_init_irq_eint(void)
|
||||
static int __init s3c64xx_init_irq_eint(void)
|
||||
{
|
||||
int irq;
|
||||
|
||||
|
|
|
@ -207,7 +207,7 @@ static struct irq_chip s3c_irq_uart = {
|
|||
|
||||
static void __init s3c64xx_uart_irq(struct uart_irq *uirq)
|
||||
{
|
||||
void *reg_base = uirq->regs;
|
||||
void __iomem *reg_base = uirq->regs;
|
||||
unsigned int irq;
|
||||
int offs;
|
||||
|
||||
|
|
|
@ -36,7 +36,7 @@
|
|||
* ext_xtal_mux for want of an actual name from the manual.
|
||||
*/
|
||||
|
||||
struct clk clk_ext_xtal_mux = {
|
||||
static struct clk clk_ext_xtal_mux = {
|
||||
.name = "ext_xtal",
|
||||
.id = -1,
|
||||
};
|
||||
|
@ -63,7 +63,7 @@ struct clksrc_clk {
|
|||
void __iomem *reg_divider;
|
||||
};
|
||||
|
||||
struct clk clk_fout_apll = {
|
||||
static struct clk clk_fout_apll = {
|
||||
.name = "fout_apll",
|
||||
.id = -1,
|
||||
};
|
||||
|
@ -78,7 +78,7 @@ static struct clk_sources clk_src_apll = {
|
|||
.nr_sources = ARRAY_SIZE(clk_src_apll_list),
|
||||
};
|
||||
|
||||
struct clksrc_clk clk_mout_apll = {
|
||||
static struct clksrc_clk clk_mout_apll = {
|
||||
.clk = {
|
||||
.name = "mout_apll",
|
||||
.id = -1,
|
||||
|
@ -88,7 +88,7 @@ struct clksrc_clk clk_mout_apll = {
|
|||
.sources = &clk_src_apll,
|
||||
};
|
||||
|
||||
struct clk clk_fout_epll = {
|
||||
static struct clk clk_fout_epll = {
|
||||
.name = "fout_epll",
|
||||
.id = -1,
|
||||
};
|
||||
|
@ -103,7 +103,7 @@ static struct clk_sources clk_src_epll = {
|
|||
.nr_sources = ARRAY_SIZE(clk_src_epll_list),
|
||||
};
|
||||
|
||||
struct clksrc_clk clk_mout_epll = {
|
||||
static struct clksrc_clk clk_mout_epll = {
|
||||
.clk = {
|
||||
.name = "mout_epll",
|
||||
.id = -1,
|
||||
|
@ -123,7 +123,7 @@ static struct clk_sources clk_src_mpll = {
|
|||
.nr_sources = ARRAY_SIZE(clk_src_mpll_list),
|
||||
};
|
||||
|
||||
struct clksrc_clk clk_mout_mpll = {
|
||||
static struct clksrc_clk clk_mout_mpll = {
|
||||
.clk = {
|
||||
.name = "mout_mpll",
|
||||
.id = -1,
|
||||
|
@ -145,7 +145,7 @@ static unsigned long s3c64xx_clk_doutmpll_get_rate(struct clk *clk)
|
|||
return rate;
|
||||
}
|
||||
|
||||
struct clk clk_dout_mpll = {
|
||||
static struct clk clk_dout_mpll = {
|
||||
.name = "dout_mpll",
|
||||
.id = -1,
|
||||
.parent = &clk_mout_mpll.clk,
|
||||
|
@ -189,10 +189,10 @@ static struct clk_sources clkset_uart = {
|
|||
};
|
||||
|
||||
static struct clk *clkset_uhost_list[] = {
|
||||
&clk_48m,
|
||||
&clk_mout_epll.clk,
|
||||
&clk_dout_mpll,
|
||||
&clk_fin_epll,
|
||||
&clk_48m,
|
||||
};
|
||||
|
||||
static struct clk_sources clkset_uhost = {
|
||||
|
@ -239,10 +239,12 @@ static int s3c64xx_setrate_clksrc(struct clk *clk, unsigned long rate)
|
|||
|
||||
rate = clk_round_rate(clk, rate);
|
||||
div = clk_get_rate(clk->parent) / rate;
|
||||
if (div > 16)
|
||||
return -EINVAL;
|
||||
|
||||
val = __raw_readl(reg);
|
||||
val &= ~sclk->mask;
|
||||
val |= (rate - 1) << sclk->shift;
|
||||
val &= ~(0xf << sclk->shift);
|
||||
val |= (div - 1) << sclk->shift;
|
||||
__raw_writel(val, reg);
|
||||
|
||||
return 0;
|
||||
|
@ -351,7 +353,7 @@ static struct clksrc_clk clk_mmc2 = {
|
|||
|
||||
static struct clksrc_clk clk_usbhost = {
|
||||
.clk = {
|
||||
.name = "usb-host-bus",
|
||||
.name = "usb-bus-host",
|
||||
.id = -1,
|
||||
.ctrlbit = S3C_CLKCON_SCLK_UHOST,
|
||||
.enable = s3c64xx_sclk_ctrl,
|
||||
|
|
|
@ -12,7 +12,7 @@
|
|||
#
|
||||
# http://www.arm.linux.org.uk/developer/machines/?action=new
|
||||
#
|
||||
# Last update: Sun Nov 30 16:39:36 2008
|
||||
# Last update: Thu Mar 12 18:01:45 2009
|
||||
#
|
||||
# machine_is_xxx CONFIG_xxxx MACH_TYPE_xxx number
|
||||
#
|
||||
|
@ -1811,7 +1811,7 @@ pilz_pmi5 MACH_PILZ_PMI5 PILZ_PMI5 1820
|
|||
jade MACH_JADE JADE 1821
|
||||
ks8695_softplc MACH_KS8695_SOFTPLC KS8695_SOFTPLC 1822
|
||||
gprisc3 MACH_GPRISC3 GPRISC3 1823
|
||||
stamp9260 MACH_STAMP9260 STAMP9260 1824
|
||||
stamp9g20 MACH_STAMP9G20 STAMP9G20 1824
|
||||
smdk6430 MACH_SMDK6430 SMDK6430 1825
|
||||
smdkc100 MACH_SMDKC100 SMDKC100 1826
|
||||
tavorevb MACH_TAVOREVB TAVOREVB 1827
|
||||
|
@ -1993,4 +1993,134 @@ spark MACH_SPARK SPARK 2002
|
|||
benzina MACH_BENZINA BENZINA 2003
|
||||
blaze MACH_BLAZE BLAZE 2004
|
||||
linkstation_ls_hgl MACH_LINKSTATION_LS_HGL LINKSTATION_LS_HGL 2005
|
||||
htcvenus MACH_HTCVENUS HTCVENUS 2006
|
||||
htckovsky MACH_HTCVENUS HTCVENUS 2006
|
||||
sony_prs505 MACH_SONY_PRS505 SONY_PRS505 2007
|
||||
hanlin_v3 MACH_HANLIN_V3 HANLIN_V3 2008
|
||||
sapphira MACH_SAPPHIRA SAPPHIRA 2009
|
||||
dack_sda_01 MACH_DACK_SDA_01 DACK_SDA_01 2010
|
||||
armbox MACH_ARMBOX ARMBOX 2011
|
||||
harris_rvp MACH_HARRIS_RVP HARRIS_RVP 2012
|
||||
ribaldo MACH_RIBALDO RIBALDO 2013
|
||||
agora MACH_AGORA AGORA 2014
|
||||
omap3_mini MACH_OMAP3_MINI OMAP3_MINI 2015
|
||||
a9sam6432_b MACH_A9SAM6432_B A9SAM6432_B 2016
|
||||
usg2410 MACH_USG2410 USG2410 2017
|
||||
pc72052_i10_revb MACH_PC72052_I10_REVB PC72052_I10_REVB 2018
|
||||
mx35_exm32 MACH_MX35_EXM32 MX35_EXM32 2019
|
||||
topas910 MACH_TOPAS910 TOPAS910 2020
|
||||
hyena MACH_HYENA HYENA 2021
|
||||
pospax MACH_POSPAX POSPAX 2022
|
||||
hdl_gx MACH_HDL_GX HDL_GX 2023
|
||||
ctera_4bay MACH_CTERA_4BAY CTERA_4BAY 2024
|
||||
ctera_plug_c MACH_CTERA_PLUG_C CTERA_PLUG_C 2025
|
||||
crwea_plug_i MACH_CRWEA_PLUG_I CRWEA_PLUG_I 2026
|
||||
egauge2 MACH_EGAUGE2 EGAUGE2 2027
|
||||
didj MACH_DIDJ DIDJ 2028
|
||||
m_s3c2443 MACH_MEISTER MEISTER 2029
|
||||
htcblackstone MACH_HTCBLACKSTONE HTCBLACKSTONE 2030
|
||||
cpuat9g20 MACH_CPUAT9G20 CPUAT9G20 2031
|
||||
smdk6440 MACH_SMDK6440 SMDK6440 2032
|
||||
omap_35xx_mvp MACH_OMAP_35XX_MVP OMAP_35XX_MVP 2033
|
||||
ctera_plug_i MACH_CTERA_PLUG_I CTERA_PLUG_I 2034
|
||||
pvg610_100 MACH_PVG610 PVG610 2035
|
||||
hprw6815 MACH_HPRW6815 HPRW6815 2036
|
||||
omap3_oswald MACH_OMAP3_OSWALD OMAP3_OSWALD 2037
|
||||
nas4220b MACH_NAS4220B NAS4220B 2038
|
||||
htcraphael_cdma MACH_HTCRAPHAEL_CDMA HTCRAPHAEL_CDMA 2039
|
||||
htcdiamond_cdma MACH_HTCDIAMOND_CDMA HTCDIAMOND_CDMA 2040
|
||||
scaler MACH_SCALER SCALER 2041
|
||||
zylonite2 MACH_ZYLONITE2 ZYLONITE2 2042
|
||||
aspenite MACH_ASPENITE ASPENITE 2043
|
||||
teton MACH_TETON TETON 2044
|
||||
ttc_dkb MACH_TTC_DKB TTC_DKB 2045
|
||||
bishop2 MACH_BISHOP2 BISHOP2 2046
|
||||
ippv5 MACH_IPPV5 IPPV5 2047
|
||||
farm926 MACH_FARM926 FARM926 2048
|
||||
mmccpu MACH_MMCCPU MMCCPU 2049
|
||||
sgmsfl MACH_SGMSFL SGMSFL 2050
|
||||
tt8000 MACH_TT8000 TT8000 2051
|
||||
zrn4300lp MACH_ZRN4300LP ZRN4300LP 2052
|
||||
mptc MACH_MPTC MPTC 2053
|
||||
h6051 MACH_H6051 H6051 2054
|
||||
pvg610_101 MACH_PVG610_101 PVG610_101 2055
|
||||
stamp9261_pc_evb MACH_STAMP9261_PC_EVB STAMP9261_PC_EVB 2056
|
||||
pelco_odysseus MACH_PELCO_ODYSSEUS PELCO_ODYSSEUS 2057
|
||||
tny_a9260 MACH_TNY_A9260 TNY_A9260 2058
|
||||
tny_a9g20 MACH_TNY_A9G20 TNY_A9G20 2059
|
||||
aesop_mp2530f MACH_AESOP_MP2530F AESOP_MP2530F 2060
|
||||
dx900 MACH_DX900 DX900 2061
|
||||
cpodc2 MACH_CPODC2 CPODC2 2062
|
||||
tilt_8925 MACH_TILT_8925 TILT_8925 2063
|
||||
davinci_dm357_evm MACH_DAVINCI_DM357_EVM DAVINCI_DM357_EVM 2064
|
||||
swordfish MACH_SWORDFISH SWORDFISH 2065
|
||||
corvus MACH_CORVUS CORVUS 2066
|
||||
taurus MACH_TAURUS TAURUS 2067
|
||||
axm MACH_AXM AXM 2068
|
||||
axc MACH_AXC AXC 2069
|
||||
baby MACH_BABY BABY 2070
|
||||
mp200 MACH_MP200 MP200 2071
|
||||
pcm043 MACH_PCM043 PCM043 2072
|
||||
hanlin_v3c MACH_HANLIN_V3C HANLIN_V3C 2073
|
||||
kbk9g20 MACH_KBK9G20 KBK9G20 2074
|
||||
adsturbog5 MACH_ADSTURBOG5 ADSTURBOG5 2075
|
||||
avenger_lite1 MACH_AVENGER_LITE1 AVENGER_LITE1 2076
|
||||
suc82x MACH_SUC SUC 2077
|
||||
at91sam7s256 MACH_AT91SAM7S256 AT91SAM7S256 2078
|
||||
mendoza MACH_MENDOZA MENDOZA 2079
|
||||
kira MACH_KIRA KIRA 2080
|
||||
mx1hbm MACH_MX1HBM MX1HBM 2081
|
||||
quatro43xx MACH_QUATRO43XX QUATRO43XX 2082
|
||||
quatro4230 MACH_QUATRO4230 QUATRO4230 2083
|
||||
nsb400 MACH_NSB400 NSB400 2084
|
||||
drp255 MACH_DRP255 DRP255 2085
|
||||
thoth MACH_THOTH THOTH 2086
|
||||
firestone MACH_FIRESTONE FIRESTONE 2087
|
||||
asusp750 MACH_ASUSP750 ASUSP750 2088
|
||||
ctera_dl MACH_CTERA_DL CTERA_DL 2089
|
||||
socr MACH_SOCR SOCR 2090
|
||||
htcoxygen MACH_HTCOXYGEN HTCOXYGEN 2091
|
||||
heroc MACH_HEROC HEROC 2092
|
||||
zeno6800 MACH_ZENO6800 ZENO6800 2093
|
||||
sc2mcs MACH_SC2MCS SC2MCS 2094
|
||||
gene100 MACH_GENE100 GENE100 2095
|
||||
as353x MACH_AS353X AS353X 2096
|
||||
sheevaplug MACH_SHEEVAPLUG SHEEVAPLUG 2097
|
||||
at91sam9g20 MACH_AT91SAM9G20 AT91SAM9G20 2098
|
||||
mv88f6192gtw_fe MACH_MV88F6192GTW_FE MV88F6192GTW_FE 2099
|
||||
cc9200 MACH_CC9200 CC9200 2100
|
||||
sm9200 MACH_SM9200 SM9200 2101
|
||||
tp9200 MACH_TP9200 TP9200 2102
|
||||
snapperdv MACH_SNAPPERDV SNAPPERDV 2103
|
||||
avengers_lite MACH_AVENGERS_LITE AVENGERS_LITE 2104
|
||||
avengers_lite1 MACH_AVENGERS_LITE1 AVENGERS_LITE1 2105
|
||||
omap3axon MACH_OMAP3AXON OMAP3AXON 2106
|
||||
ma8xx MACH_MA8XX MA8XX 2107
|
||||
mp201ek MACH_MP201EK MP201EK 2108
|
||||
davinci_tux MACH_DAVINCI_TUX DAVINCI_TUX 2109
|
||||
mpa1600 MACH_MPA1600 MPA1600 2110
|
||||
pelco_troy MACH_PELCO_TROY PELCO_TROY 2111
|
||||
nsb667 MACH_NSB667 NSB667 2112
|
||||
rovers5_4mpix MACH_ROVERS5_4MPIX ROVERS5_4MPIX 2113
|
||||
twocom MACH_TWOCOM TWOCOM 2114
|
||||
ubisys_p9_rcu3r2 MACH_UBISYS_P9_RCU3R2 UBISYS_P9_RCU3R2 2115
|
||||
hero_espresso MACH_HERO_ESPRESSO HERO_ESPRESSO 2116
|
||||
afeusb MACH_AFEUSB AFEUSB 2117
|
||||
t830 MACH_T830 T830 2118
|
||||
spd8020_cc MACH_SPD8020_CC SPD8020_CC 2119
|
||||
om_3d7k MACH_OM_3D7K OM_3D7K 2120
|
||||
picocom2 MACH_PICOCOM2 PICOCOM2 2121
|
||||
uwg4mx27 MACH_UWG4MX27 UWG4MX27 2122
|
||||
uwg4mx31 MACH_UWG4MX31 UWG4MX31 2123
|
||||
cherry MACH_CHERRY CHERRY 2124
|
||||
mx51_babbage MACH_MX51_BABBAGE MX51_BABBAGE 2125
|
||||
s3c2440turkiye MACH_S3C2440TURKIYE S3C2440TURKIYE 2126
|
||||
tx37 MACH_TX37 TX37 2127
|
||||
sbc2800_9g20 MACH_SBC2800_9G20 SBC2800_9G20 2128
|
||||
benzglb MACH_BENZGLB BENZGLB 2129
|
||||
benztd MACH_BENZTD BENZTD 2130
|
||||
cartesio_plus MACH_CARTESIO_PLUS CARTESIO_PLUS 2131
|
||||
solrad_g20 MACH_SOLRAD_G20 SOLRAD_G20 2132
|
||||
mx27wallace MACH_MX27WALLACE MX27WALLACE 2133
|
||||
fmzwebmodul MACH_FMZWEBMODUL FMZWEBMODUL 2134
|
||||
rd78x00_masa MACH_RD78X00_MASA RD78X00_MASA 2135
|
||||
smallogger MACH_SMALLOGGER SMALLOGGER 2136
|
||||
|
|
|
@ -238,8 +238,12 @@ config MIPS_SIM
|
|||
This option enables support for MIPS Technologies MIPSsim software
|
||||
emulator.
|
||||
|
||||
config MACH_EMMA
|
||||
bool "NEC EMMA series based machines"
|
||||
config NEC_MARKEINS
|
||||
bool "NEC EMMA2RH Mark-eins board"
|
||||
select SOC_EMMA2RH
|
||||
select HW_HAS_PCI
|
||||
help
|
||||
This enables support for the NEC Electronics Mark-eins boards.
|
||||
|
||||
config MACH_VR41XX
|
||||
bool "NEC VR4100 series based machines"
|
||||
|
@ -637,7 +641,6 @@ endchoice
|
|||
|
||||
source "arch/mips/alchemy/Kconfig"
|
||||
source "arch/mips/basler/excite/Kconfig"
|
||||
source "arch/mips/emma/Kconfig"
|
||||
source "arch/mips/jazz/Kconfig"
|
||||
source "arch/mips/lasat/Kconfig"
|
||||
source "arch/mips/pmc-sierra/Kconfig"
|
||||
|
@ -895,6 +898,18 @@ config MIPS_RM9122
|
|||
bool
|
||||
select SERIAL_RM9000
|
||||
|
||||
config SOC_EMMA2RH
|
||||
bool
|
||||
select CEVT_R4K
|
||||
select CSRC_R4K
|
||||
select DMA_NONCOHERENT
|
||||
select IRQ_CPU
|
||||
select SWAP_IO_SPACE
|
||||
select SYS_HAS_CPU_R5500
|
||||
select SYS_SUPPORTS_32BIT_KERNEL
|
||||
select SYS_SUPPORTS_64BIT_KERNEL
|
||||
select SYS_SUPPORTS_BIG_ENDIAN
|
||||
|
||||
config SOC_PNX833X
|
||||
bool
|
||||
select CEVT_R4K
|
||||
|
@ -930,11 +945,6 @@ config SOC_PNX8550
|
|||
config SWAP_IO_SPACE
|
||||
bool
|
||||
|
||||
config EMMA2RH
|
||||
bool
|
||||
depends on MARKEINS
|
||||
default y
|
||||
|
||||
config SERIAL_RM9000
|
||||
bool
|
||||
|
||||
|
|
|
@ -416,7 +416,7 @@ load-$(CONFIG_PNX8550_STB810) += 0xffffffff80060000
|
|||
#
|
||||
# Common NEC EMMAXXX
|
||||
#
|
||||
core-$(CONFIG_SOC_EMMA) += arch/mips/emma/common/
|
||||
core-$(CONFIG_SOC_EMMA2RH) += arch/mips/emma/common/
|
||||
cflags-$(CONFIG_SOC_EMMA2RH) += -I$(srctree)/arch/mips/include/asm/mach-emma2rh
|
||||
|
||||
#
|
||||
|
|
|
@ -35,7 +35,7 @@ CONFIG_ZONE_DMA=y
|
|||
# CONFIG_PNX8550_STB810 is not set
|
||||
# CONFIG_MACH_VR41XX is not set
|
||||
# CONFIG_PMC_YOSEMITE is not set
|
||||
CONFIG_MARKEINS=y
|
||||
CONFIG_NEC_MARKEINS=y
|
||||
# CONFIG_SGI_IP22 is not set
|
||||
# CONFIG_SGI_IP27 is not set
|
||||
# CONFIG_SGI_IP32 is not set
|
||||
|
@ -68,7 +68,7 @@ CONFIG_SYS_SUPPORTS_BIG_ENDIAN=y
|
|||
CONFIG_SYS_SUPPORTS_LITTLE_ENDIAN=y
|
||||
CONFIG_IRQ_CPU=y
|
||||
CONFIG_SWAP_IO_SPACE=y
|
||||
CONFIG_EMMA2RH=y
|
||||
CONFIG_SOC_EMMA2RH=y
|
||||
CONFIG_MIPS_L1_CACHE_SHIFT=5
|
||||
|
||||
#
|
||||
|
@ -574,9 +574,9 @@ CONFIG_MTD_CFI_UTIL=y
|
|||
#
|
||||
# CONFIG_MTD_COMPLEX_MAPPINGS is not set
|
||||
CONFIG_MTD_PHYSMAP=y
|
||||
CONFIG_MTD_PHYSMAP_START=0x1e000000
|
||||
CONFIG_MTD_PHYSMAP_LEN=0x02000000
|
||||
CONFIG_MTD_PHYSMAP_BANKWIDTH=2
|
||||
CONFIG_MTD_PHYSMAP_START=0x0
|
||||
CONFIG_MTD_PHYSMAP_LEN=0x0
|
||||
CONFIG_MTD_PHYSMAP_BANKWIDTH=0
|
||||
# CONFIG_MTD_PLATRAM is not set
|
||||
|
||||
#
|
|
@ -1,29 +0,0 @@
|
|||
choice
|
||||
prompt "Machine type"
|
||||
depends on MACH_EMMA
|
||||
default NEC_MARKEINS
|
||||
|
||||
config NEC_MARKEINS
|
||||
bool "NEC EMMA2RH Mark-eins board"
|
||||
select SOC_EMMA2RH
|
||||
select HW_HAS_PCI
|
||||
help
|
||||
This enables support for the NEC Electronics Mark-eins boards.
|
||||
|
||||
endchoice
|
||||
|
||||
config SOC_EMMA2RH
|
||||
bool
|
||||
select SOC_EMMA
|
||||
select SYS_HAS_CPU_R5500
|
||||
select SYS_SUPPORTS_32BIT_KERNEL
|
||||
select SYS_SUPPORTS_64BIT_KERNEL
|
||||
|
||||
config SOC_EMMA
|
||||
bool
|
||||
select CEVT_R4K
|
||||
select CSRC_R4K
|
||||
select DMA_NONCOHERENT
|
||||
select IRQ_CPU
|
||||
select SWAP_IO_SPACE
|
||||
select SYS_SUPPORTS_BIG_ENDIAN
|
|
@ -141,13 +141,6 @@ static struct platform_device serial_emma = {
|
|||
},
|
||||
};
|
||||
|
||||
static struct platform_device *devices[] = {
|
||||
&i2c_emma_devices[0],
|
||||
&i2c_emma_devices[1],
|
||||
&i2c_emma_devices[2],
|
||||
&serial_emma,
|
||||
};
|
||||
|
||||
static struct mtd_partition markeins_parts[] = {
|
||||
[0] = {
|
||||
.name = "RootFS",
|
||||
|
@ -181,11 +174,39 @@ static struct mtd_partition markeins_parts[] = {
|
|||
},
|
||||
};
|
||||
|
||||
static struct physmap_flash_data markeins_flash_data = {
|
||||
.width = 2,
|
||||
.nr_parts = ARRAY_SIZE(markeins_parts),
|
||||
.parts = markeins_parts
|
||||
};
|
||||
|
||||
static struct resource markeins_flash_resource = {
|
||||
.start = 0x1e000000,
|
||||
.end = 0x02000000,
|
||||
.flags = IORESOURCE_MEM
|
||||
};
|
||||
|
||||
static struct platform_device markeins_flash_device = {
|
||||
.name = "physmap-flash",
|
||||
.id = 0,
|
||||
.dev = {
|
||||
.platform_data = &markeins_flash_data,
|
||||
},
|
||||
.num_resources = 1,
|
||||
.resource = &markeins_flash_resource,
|
||||
};
|
||||
|
||||
static struct platform_device *devices[] = {
|
||||
i2c_emma_devices,
|
||||
i2c_emma_devices + 1,
|
||||
i2c_emma_devices + 2,
|
||||
&serial_emma,
|
||||
&markeins_flash_device,
|
||||
};
|
||||
|
||||
static int __init platform_devices_setup(void)
|
||||
{
|
||||
physmap_set_partitions(markeins_parts, ARRAY_SIZE(markeins_parts));
|
||||
return platform_add_devices(devices, ARRAY_SIZE(devices));
|
||||
}
|
||||
|
||||
arch_initcall(platform_devices_setup);
|
||||
|
||||
|
|
|
@ -15,8 +15,6 @@
|
|||
*/
|
||||
#ifdef CONFIG_MIPS32_O32
|
||||
|
||||
#define TIF_32BIT TIF_32BIT_REGS
|
||||
|
||||
#define __NR_seccomp_read_32 4003
|
||||
#define __NR_seccomp_write_32 4004
|
||||
#define __NR_seccomp_exit_32 4001
|
||||
|
@ -24,8 +22,6 @@
|
|||
|
||||
#elif defined(CONFIG_MIPS32_N32)
|
||||
|
||||
#define TIF_32BIT _TIF_32BIT_ADDR
|
||||
|
||||
#define __NR_seccomp_read_32 6000
|
||||
#define __NR_seccomp_write_32 6001
|
||||
#define __NR_seccomp_exit_32 6058
|
||||
|
|
|
@ -127,6 +127,12 @@ register struct thread_info *__current_thread_info __asm__("$28");
|
|||
#define TIF_LOAD_WATCH 25 /* If set, load watch registers */
|
||||
#define TIF_SYSCALL_TRACE 31 /* syscall trace active */
|
||||
|
||||
#ifdef CONFIG_MIPS32_O32
|
||||
#define TIF_32BIT TIF_32BIT_REGS
|
||||
#elif defined(CONFIG_MIPS32_N32)
|
||||
#define TIF_32BIT _TIF_32BIT_ADDR
|
||||
#endif /* CONFIG_MIPS32_O32 */
|
||||
|
||||
#define _TIF_SYSCALL_TRACE (1<<TIF_SYSCALL_TRACE)
|
||||
#define _TIF_SIGPENDING (1<<TIF_SIGPENDING)
|
||||
#define _TIF_NEED_RESCHED (1<<TIF_NEED_RESCHED)
|
||||
|
|
|
@ -1,7 +1,7 @@
|
|||
#
|
||||
# Automatically generated make config: don't edit
|
||||
# Linux kernel version: 2.6.23
|
||||
# Fri Oct 12 21:00:07 2007
|
||||
# Linux kernel version: 2.6.29-rc8
|
||||
# Fri Mar 13 01:32:55 2009
|
||||
#
|
||||
CONFIG_PARISC=y
|
||||
CONFIG_MMU=y
|
||||
|
@ -33,17 +33,35 @@ CONFIG_SYSVIPC_SYSCTL=y
|
|||
CONFIG_POSIX_MQUEUE=y
|
||||
# CONFIG_BSD_PROCESS_ACCT is not set
|
||||
# CONFIG_TASKSTATS is not set
|
||||
# CONFIG_USER_NS is not set
|
||||
# CONFIG_AUDIT is not set
|
||||
|
||||
#
|
||||
# RCU Subsystem
|
||||
#
|
||||
CONFIG_CLASSIC_RCU=y
|
||||
# CONFIG_TREE_RCU is not set
|
||||
# CONFIG_PREEMPT_RCU is not set
|
||||
# CONFIG_TREE_RCU_TRACE is not set
|
||||
# CONFIG_PREEMPT_RCU_TRACE is not set
|
||||
CONFIG_IKCONFIG=y
|
||||
CONFIG_IKCONFIG_PROC=y
|
||||
CONFIG_LOG_BUF_SHIFT=16
|
||||
# CONFIG_GROUP_SCHED is not set
|
||||
# CONFIG_CGROUPS is not set
|
||||
CONFIG_SYSFS_DEPRECATED=y
|
||||
CONFIG_SYSFS_DEPRECATED_V2=y
|
||||
# CONFIG_RELAY is not set
|
||||
CONFIG_NAMESPACES=y
|
||||
# CONFIG_UTS_NS is not set
|
||||
# CONFIG_IPC_NS is not set
|
||||
# CONFIG_USER_NS is not set
|
||||
# CONFIG_PID_NS is not set
|
||||
# CONFIG_NET_NS is not set
|
||||
CONFIG_BLK_DEV_INITRD=y
|
||||
CONFIG_INITRAMFS_SOURCE=""
|
||||
CONFIG_CC_OPTIMIZE_FOR_SIZE=y
|
||||
CONFIG_SYSCTL=y
|
||||
CONFIG_ANON_INODES=y
|
||||
# CONFIG_EMBEDDED is not set
|
||||
CONFIG_SYSCTL_SYSCALL=y
|
||||
CONFIG_KALLSYMS=y
|
||||
|
@ -55,29 +73,38 @@ CONFIG_BUG=y
|
|||
CONFIG_ELF_CORE=y
|
||||
CONFIG_BASE_FULL=y
|
||||
CONFIG_FUTEX=y
|
||||
CONFIG_ANON_INODES=y
|
||||
CONFIG_EPOLL=y
|
||||
CONFIG_SIGNALFD=y
|
||||
CONFIG_TIMERFD=y
|
||||
CONFIG_EVENTFD=y
|
||||
CONFIG_SHMEM=y
|
||||
CONFIG_AIO=y
|
||||
CONFIG_VM_EVENT_COUNTERS=y
|
||||
CONFIG_COMPAT_BRK=y
|
||||
CONFIG_SLAB=y
|
||||
# CONFIG_SLUB is not set
|
||||
# CONFIG_SLOB is not set
|
||||
CONFIG_PROFILING=y
|
||||
CONFIG_TRACEPOINTS=y
|
||||
# CONFIG_MARKERS is not set
|
||||
CONFIG_OPROFILE=m
|
||||
CONFIG_HAVE_OPROFILE=y
|
||||
# CONFIG_HAVE_GENERIC_DMA_COHERENT is not set
|
||||
CONFIG_SLABINFO=y
|
||||
CONFIG_RT_MUTEXES=y
|
||||
# CONFIG_TINY_SHMEM is not set
|
||||
CONFIG_BASE_SMALL=0
|
||||
CONFIG_MODULES=y
|
||||
# CONFIG_MODULE_FORCE_LOAD is not set
|
||||
CONFIG_MODULE_UNLOAD=y
|
||||
CONFIG_MODULE_FORCE_UNLOAD=y
|
||||
# CONFIG_MODVERSIONS is not set
|
||||
# CONFIG_MODULE_SRCVERSION_ALL is not set
|
||||
CONFIG_KMOD=y
|
||||
CONFIG_INIT_ALL_POSSIBLE=y
|
||||
CONFIG_BLOCK=y
|
||||
# CONFIG_LBD is not set
|
||||
# CONFIG_BLK_DEV_IO_TRACE is not set
|
||||
# CONFIG_LSF is not set
|
||||
# CONFIG_BLK_DEV_BSG is not set
|
||||
# CONFIG_BLK_DEV_INTEGRITY is not set
|
||||
|
||||
#
|
||||
# IO Schedulers
|
||||
|
@ -91,6 +118,7 @@ CONFIG_DEFAULT_AS=y
|
|||
# CONFIG_DEFAULT_CFQ is not set
|
||||
# CONFIG_DEFAULT_NOOP is not set
|
||||
CONFIG_DEFAULT_IOSCHED="anticipatory"
|
||||
# CONFIG_FREEZER is not set
|
||||
|
||||
#
|
||||
# Processor type and features
|
||||
|
@ -114,17 +142,19 @@ CONFIG_HZ_250=y
|
|||
# CONFIG_HZ_300 is not set
|
||||
# CONFIG_HZ_1000 is not set
|
||||
CONFIG_HZ=250
|
||||
# CONFIG_SCHED_HRTICK is not set
|
||||
CONFIG_SELECT_MEMORY_MODEL=y
|
||||
CONFIG_FLATMEM_MANUAL=y
|
||||
# CONFIG_DISCONTIGMEM_MANUAL is not set
|
||||
# CONFIG_SPARSEMEM_MANUAL is not set
|
||||
CONFIG_FLATMEM=y
|
||||
CONFIG_FLAT_NODE_MEM_MAP=y
|
||||
# CONFIG_SPARSEMEM_STATIC is not set
|
||||
CONFIG_PAGEFLAGS_EXTENDED=y
|
||||
CONFIG_SPLIT_PTLOCK_CPUS=4096
|
||||
# CONFIG_RESOURCES_64BIT is not set
|
||||
# CONFIG_PHYS_ADDR_T_64BIT is not set
|
||||
CONFIG_ZONE_DMA_FLAG=0
|
||||
CONFIG_VIRT_TO_BUS=y
|
||||
CONFIG_UNEVICTABLE_LRU=y
|
||||
# CONFIG_HPUX is not set
|
||||
|
||||
#
|
||||
|
@ -138,10 +168,6 @@ CONFIG_GSC_LASI=y
|
|||
# CONFIG_EISA is not set
|
||||
# CONFIG_PCI is not set
|
||||
# CONFIG_ARCH_SUPPORTS_MSI is not set
|
||||
|
||||
#
|
||||
# PCCARD (PCMCIA/CardBus) support
|
||||
#
|
||||
# CONFIG_PCCARD is not set
|
||||
|
||||
#
|
||||
|
@ -156,16 +182,15 @@ CONFIG_PDC_STABLE=y
|
|||
# Executable file formats
|
||||
#
|
||||
CONFIG_BINFMT_ELF=y
|
||||
# CONFIG_CORE_DUMP_DEFAULT_ELF_HEADERS is not set
|
||||
# CONFIG_HAVE_AOUT is not set
|
||||
CONFIG_BINFMT_MISC=m
|
||||
|
||||
#
|
||||
# Networking
|
||||
#
|
||||
CONFIG_NET=y
|
||||
|
||||
#
|
||||
# Networking options
|
||||
#
|
||||
CONFIG_COMPAT_NET_DEV_OPS=y
|
||||
CONFIG_PACKET=y
|
||||
CONFIG_PACKET_MMAP=y
|
||||
CONFIG_UNIX=y
|
||||
|
@ -173,6 +198,7 @@ CONFIG_XFRM=y
|
|||
CONFIG_XFRM_USER=m
|
||||
# CONFIG_XFRM_SUB_POLICY is not set
|
||||
# CONFIG_XFRM_MIGRATE is not set
|
||||
# CONFIG_XFRM_STATISTICS is not set
|
||||
CONFIG_NET_KEY=m
|
||||
# CONFIG_NET_KEY_MIGRATE is not set
|
||||
CONFIG_INET=y
|
||||
|
@ -203,25 +229,25 @@ CONFIG_INET_TCP_DIAG=m
|
|||
CONFIG_TCP_CONG_CUBIC=y
|
||||
CONFIG_DEFAULT_TCP_CONG="cubic"
|
||||
# CONFIG_TCP_MD5SIG is not set
|
||||
# CONFIG_IP_VS is not set
|
||||
# CONFIG_IPV6 is not set
|
||||
# CONFIG_INET6_XFRM_TUNNEL is not set
|
||||
# CONFIG_INET6_TUNNEL is not set
|
||||
# CONFIG_NETWORK_SECMARK is not set
|
||||
CONFIG_NETFILTER=y
|
||||
# CONFIG_NETFILTER_DEBUG is not set
|
||||
CONFIG_NETFILTER_ADVANCED=y
|
||||
|
||||
#
|
||||
# Core Netfilter Configuration
|
||||
#
|
||||
# CONFIG_NETFILTER_NETLINK is not set
|
||||
# CONFIG_NF_CONNTRACK_ENABLED is not set
|
||||
# CONFIG_NETFILTER_NETLINK_QUEUE is not set
|
||||
# CONFIG_NETFILTER_NETLINK_LOG is not set
|
||||
# CONFIG_NF_CONNTRACK is not set
|
||||
# CONFIG_NETFILTER_XTABLES is not set
|
||||
# CONFIG_IP_VS is not set
|
||||
|
||||
#
|
||||
# IP: Netfilter Configuration
|
||||
#
|
||||
# CONFIG_NF_DEFRAG_IPV4 is not set
|
||||
CONFIG_IP_NF_QUEUE=m
|
||||
# CONFIG_IP_NF_IPTABLES is not set
|
||||
# CONFIG_IP_NF_ARPTABLES is not set
|
||||
|
@ -230,6 +256,7 @@ CONFIG_IP_NF_QUEUE=m
|
|||
# CONFIG_TIPC is not set
|
||||
# CONFIG_ATM is not set
|
||||
# CONFIG_BRIDGE is not set
|
||||
# CONFIG_NET_DSA is not set
|
||||
# CONFIG_VLAN_8021Q is not set
|
||||
# CONFIG_DECNET is not set
|
||||
CONFIG_LLC=m
|
||||
|
@ -240,28 +267,26 @@ CONFIG_LLC2=m
|
|||
# CONFIG_LAPB is not set
|
||||
# CONFIG_ECONET is not set
|
||||
# CONFIG_WAN_ROUTER is not set
|
||||
|
||||
#
|
||||
# QoS and/or fair queueing
|
||||
#
|
||||
# CONFIG_NET_SCHED is not set
|
||||
# CONFIG_DCB is not set
|
||||
|
||||
#
|
||||
# Network testing
|
||||
#
|
||||
CONFIG_NET_PKTGEN=m
|
||||
# CONFIG_HAMRADIO is not set
|
||||
# CONFIG_CAN is not set
|
||||
# CONFIG_IRDA is not set
|
||||
# CONFIG_BT is not set
|
||||
# CONFIG_AF_RXRPC is not set
|
||||
|
||||
#
|
||||
# Wireless
|
||||
#
|
||||
# CONFIG_PHONET is not set
|
||||
CONFIG_WIRELESS=y
|
||||
# CONFIG_CFG80211 is not set
|
||||
CONFIG_WIRELESS_OLD_REGULATORY=y
|
||||
# CONFIG_WIRELESS_EXT is not set
|
||||
# CONFIG_LIB80211 is not set
|
||||
# CONFIG_MAC80211 is not set
|
||||
# CONFIG_IEEE80211 is not set
|
||||
# CONFIG_WIMAX is not set
|
||||
# CONFIG_RFKILL is not set
|
||||
# CONFIG_NET_9P is not set
|
||||
|
||||
|
@ -276,6 +301,8 @@ CONFIG_UEVENT_HELPER_PATH="/sbin/hotplug"
|
|||
# CONFIG_STANDALONE is not set
|
||||
# CONFIG_PREVENT_FIRMWARE_BUILD is not set
|
||||
CONFIG_FW_LOADER=y
|
||||
CONFIG_FIRMWARE_IN_KERNEL=y
|
||||
CONFIG_EXTRA_FIRMWARE=""
|
||||
# CONFIG_DEBUG_DRIVER is not set
|
||||
# CONFIG_DEBUG_DEVRES is not set
|
||||
# CONFIG_SYS_HYPERVISOR is not set
|
||||
|
@ -298,11 +325,19 @@ CONFIG_BLK_DEV_CRYPTOLOOP=y
|
|||
CONFIG_BLK_DEV_RAM=y
|
||||
CONFIG_BLK_DEV_RAM_COUNT=16
|
||||
CONFIG_BLK_DEV_RAM_SIZE=6144
|
||||
CONFIG_BLK_DEV_RAM_BLOCKSIZE=1024
|
||||
# CONFIG_BLK_DEV_XIP is not set
|
||||
# CONFIG_CDROM_PKTCDVD is not set
|
||||
CONFIG_ATA_OVER_ETH=m
|
||||
# CONFIG_BLK_DEV_HD is not set
|
||||
CONFIG_MISC_DEVICES=y
|
||||
# CONFIG_ENCLOSURE_SERVICES is not set
|
||||
# CONFIG_C2PORT is not set
|
||||
|
||||
#
|
||||
# EEPROM support
|
||||
#
|
||||
# CONFIG_EEPROM_93CX6 is not set
|
||||
CONFIG_HAVE_IDE=y
|
||||
# CONFIG_IDE is not set
|
||||
|
||||
#
|
||||
|
@ -342,14 +377,17 @@ CONFIG_SCSI_SPI_ATTRS=y
|
|||
# CONFIG_SCSI_FC_ATTRS is not set
|
||||
CONFIG_SCSI_ISCSI_ATTRS=m
|
||||
# CONFIG_SCSI_SAS_LIBSAS is not set
|
||||
# CONFIG_SCSI_SRP_ATTRS is not set
|
||||
CONFIG_SCSI_LOWLEVEL=y
|
||||
# CONFIG_ISCSI_TCP is not set
|
||||
# CONFIG_LIBFC is not set
|
||||
# CONFIG_SCSI_PPA is not set
|
||||
# CONFIG_SCSI_IMM is not set
|
||||
CONFIG_SCSI_LASI700=y
|
||||
CONFIG_53C700_LE_ON_BE=y
|
||||
# CONFIG_SCSI_ZALON is not set
|
||||
CONFIG_SCSI_DEBUG=m
|
||||
# CONFIG_SCSI_DH is not set
|
||||
# CONFIG_ATA is not set
|
||||
CONFIG_MD=y
|
||||
CONFIG_BLK_DEV_MD=m
|
||||
|
@ -362,7 +400,6 @@ CONFIG_MD_RAID1=m
|
|||
# CONFIG_MD_FAULTY is not set
|
||||
# CONFIG_BLK_DEV_DM is not set
|
||||
CONFIG_NETDEVICES=y
|
||||
# CONFIG_NETDEVICES_MULTIQUEUE is not set
|
||||
CONFIG_DUMMY=m
|
||||
CONFIG_BONDING=m
|
||||
# CONFIG_MACVLAN is not set
|
||||
|
@ -377,6 +414,9 @@ CONFIG_LASI_82596=y
|
|||
# CONFIG_IBM_NEW_EMAC_RGMII is not set
|
||||
# CONFIG_IBM_NEW_EMAC_TAH is not set
|
||||
# CONFIG_IBM_NEW_EMAC_EMAC4 is not set
|
||||
# CONFIG_IBM_NEW_EMAC_NO_FLOW_CTRL is not set
|
||||
# CONFIG_IBM_NEW_EMAC_MAL_CLR_ICINTSTAT is not set
|
||||
# CONFIG_IBM_NEW_EMAC_MAL_COMMON_ERR is not set
|
||||
# CONFIG_B44 is not set
|
||||
# CONFIG_NET_POCKET is not set
|
||||
CONFIG_NETDEV_1000=y
|
||||
|
@ -387,6 +427,11 @@ CONFIG_NETDEV_10000=y
|
|||
#
|
||||
# CONFIG_WLAN_PRE80211 is not set
|
||||
# CONFIG_WLAN_80211 is not set
|
||||
# CONFIG_IWLWIFI_LEDS is not set
|
||||
|
||||
#
|
||||
# Enable WiMAX (Networking options) to see the WiMAX drivers
|
||||
#
|
||||
# CONFIG_WAN is not set
|
||||
# CONFIG_PLIP is not set
|
||||
CONFIG_PPP=m
|
||||
|
@ -401,7 +446,6 @@ CONFIG_PPPOE=m
|
|||
# CONFIG_PPPOL2TP is not set
|
||||
# CONFIG_SLIP is not set
|
||||
CONFIG_SLHC=m
|
||||
# CONFIG_SHAPER is not set
|
||||
# CONFIG_NETCONSOLE is not set
|
||||
# CONFIG_NETPOLL is not set
|
||||
# CONFIG_NET_POLL_CONTROLLER is not set
|
||||
|
@ -423,7 +467,6 @@ CONFIG_INPUT_MOUSEDEV_PSAUX=y
|
|||
CONFIG_INPUT_MOUSEDEV_SCREEN_X=1024
|
||||
CONFIG_INPUT_MOUSEDEV_SCREEN_Y=768
|
||||
# CONFIG_INPUT_JOYDEV is not set
|
||||
# CONFIG_INPUT_TSDEV is not set
|
||||
# CONFIG_INPUT_EVDEV is not set
|
||||
# CONFIG_INPUT_EVBUG is not set
|
||||
|
||||
|
@ -446,8 +489,8 @@ CONFIG_MOUSE_PS2=y
|
|||
CONFIG_MOUSE_PS2_ALPS=y
|
||||
CONFIG_MOUSE_PS2_LOGIPS2PP=y
|
||||
CONFIG_MOUSE_PS2_SYNAPTICS=y
|
||||
CONFIG_MOUSE_PS2_LIFEBOOK=y
|
||||
CONFIG_MOUSE_PS2_TRACKPOINT=y
|
||||
# CONFIG_MOUSE_PS2_ELANTECH is not set
|
||||
# CONFIG_MOUSE_PS2_TOUCHKIT is not set
|
||||
CONFIG_MOUSE_SERIAL=m
|
||||
# CONFIG_MOUSE_VSXXXAA is not set
|
||||
|
@ -474,9 +517,11 @@ CONFIG_SERIO_LIBPS2=y
|
|||
# Character devices
|
||||
#
|
||||
CONFIG_VT=y
|
||||
CONFIG_CONSOLE_TRANSLATIONS=y
|
||||
CONFIG_VT_CONSOLE=y
|
||||
CONFIG_HW_CONSOLE=y
|
||||
# CONFIG_VT_HW_CONSOLE_BINDING is not set
|
||||
CONFIG_DEVKMEM=y
|
||||
# CONFIG_SERIAL_NONSTANDARD is not set
|
||||
|
||||
#
|
||||
|
@ -501,72 +546,76 @@ CONFIG_PDC_CONSOLE=y
|
|||
CONFIG_SERIAL_CORE=y
|
||||
CONFIG_SERIAL_CORE_CONSOLE=y
|
||||
CONFIG_UNIX98_PTYS=y
|
||||
# CONFIG_DEVPTS_MULTIPLE_INSTANCES is not set
|
||||
CONFIG_LEGACY_PTYS=y
|
||||
CONFIG_LEGACY_PTY_COUNT=64
|
||||
CONFIG_PRINTER=m
|
||||
# CONFIG_LP_CONSOLE is not set
|
||||
CONFIG_PPDEV=m
|
||||
# CONFIG_TIPAR is not set
|
||||
# CONFIG_IPMI_HANDLER is not set
|
||||
# CONFIG_WATCHDOG is not set
|
||||
# CONFIG_HW_RANDOM is not set
|
||||
CONFIG_GEN_RTC=y
|
||||
CONFIG_GEN_RTC_X=y
|
||||
# CONFIG_R3964 is not set
|
||||
CONFIG_RAW_DRIVER=y
|
||||
CONFIG_MAX_RAW_DEVS=256
|
||||
# CONFIG_TCG_TPM is not set
|
||||
# CONFIG_I2C is not set
|
||||
|
||||
#
|
||||
# SPI support
|
||||
#
|
||||
# CONFIG_SPI is not set
|
||||
# CONFIG_SPI_MASTER is not set
|
||||
# CONFIG_W1 is not set
|
||||
# CONFIG_POWER_SUPPLY is not set
|
||||
# CONFIG_HWMON is not set
|
||||
# CONFIG_THERMAL is not set
|
||||
# CONFIG_THERMAL_HWMON is not set
|
||||
# CONFIG_WATCHDOG is not set
|
||||
CONFIG_SSB_POSSIBLE=y
|
||||
|
||||
#
|
||||
# Sonics Silicon Backplane
|
||||
#
|
||||
CONFIG_SSB_POSSIBLE=y
|
||||
# CONFIG_SSB is not set
|
||||
|
||||
#
|
||||
# Multifunction device drivers
|
||||
#
|
||||
# CONFIG_MFD_CORE is not set
|
||||
# CONFIG_MFD_SM501 is not set
|
||||
# CONFIG_HTC_PASIC3 is not set
|
||||
# CONFIG_MFD_TMIO is not set
|
||||
# CONFIG_REGULATOR is not set
|
||||
|
||||
#
|
||||
# Multimedia devices
|
||||
#
|
||||
|
||||
#
|
||||
# Multimedia core support
|
||||
#
|
||||
# CONFIG_VIDEO_DEV is not set
|
||||
# CONFIG_DVB_CORE is not set
|
||||
# CONFIG_VIDEO_MEDIA is not set
|
||||
|
||||
#
|
||||
# Multimedia drivers
|
||||
#
|
||||
# CONFIG_DAB is not set
|
||||
|
||||
#
|
||||
# Graphics support
|
||||
#
|
||||
# CONFIG_BACKLIGHT_LCD_SUPPORT is not set
|
||||
|
||||
#
|
||||
# Display device support
|
||||
#
|
||||
# CONFIG_DISPLAY_SUPPORT is not set
|
||||
# CONFIG_VGASTATE is not set
|
||||
CONFIG_VIDEO_OUTPUT_CONTROL=m
|
||||
CONFIG_FB=y
|
||||
# CONFIG_FIRMWARE_EDID is not set
|
||||
# CONFIG_FB_DDC is not set
|
||||
# CONFIG_FB_BOOT_VESA_SUPPORT is not set
|
||||
CONFIG_FB_CFB_FILLRECT=y
|
||||
CONFIG_FB_CFB_COPYAREA=y
|
||||
CONFIG_FB_CFB_IMAGEBLIT=y
|
||||
# CONFIG_FB_CFB_REV_PIXELS_IN_BYTE is not set
|
||||
# CONFIG_FB_SYS_FILLRECT is not set
|
||||
# CONFIG_FB_SYS_COPYAREA is not set
|
||||
# CONFIG_FB_SYS_IMAGEBLIT is not set
|
||||
# CONFIG_FB_FOREIGN_ENDIAN is not set
|
||||
# CONFIG_FB_SYS_FOPS is not set
|
||||
CONFIG_FB_DEFERRED_IO=y
|
||||
# CONFIG_FB_SVGALIB is not set
|
||||
# CONFIG_FB_MACMODES is not set
|
||||
# CONFIG_FB_BACKLIGHT is not set
|
||||
|
@ -579,6 +628,14 @@ CONFIG_FB_TILEBLITTING=y
|
|||
CONFIG_FB_STI=y
|
||||
# CONFIG_FB_S1D13XXX is not set
|
||||
# CONFIG_FB_VIRTUAL is not set
|
||||
# CONFIG_FB_METRONOME is not set
|
||||
# CONFIG_FB_MB862XX is not set
|
||||
# CONFIG_BACKLIGHT_LCD_SUPPORT is not set
|
||||
|
||||
#
|
||||
# Display device support
|
||||
#
|
||||
# CONFIG_DISPLAY_SUPPORT is not set
|
||||
|
||||
#
|
||||
# Console display driver support
|
||||
|
@ -606,15 +663,8 @@ CONFIG_LOGO=y
|
|||
# CONFIG_LOGO_LINUX_VGA16 is not set
|
||||
# CONFIG_LOGO_LINUX_CLUT224 is not set
|
||||
CONFIG_LOGO_PARISC_CLUT224=y
|
||||
|
||||
#
|
||||
# Sound
|
||||
#
|
||||
CONFIG_SOUND=y
|
||||
|
||||
#
|
||||
# Advanced Linux Sound Architecture
|
||||
#
|
||||
CONFIG_SOUND_OSS_CORE=y
|
||||
CONFIG_SND=y
|
||||
CONFIG_SND_TIMER=y
|
||||
CONFIG_SND_PCM=y
|
||||
|
@ -630,10 +680,7 @@ CONFIG_SND_SUPPORT_OLD_API=y
|
|||
CONFIG_SND_VERBOSE_PROCFS=y
|
||||
# CONFIG_SND_VERBOSE_PRINTK is not set
|
||||
# CONFIG_SND_DEBUG is not set
|
||||
|
||||
#
|
||||
# Generic devices
|
||||
#
|
||||
CONFIG_SND_DRIVERS=y
|
||||
# CONFIG_SND_DUMMY is not set
|
||||
# CONFIG_SND_VIRMIDI is not set
|
||||
# CONFIG_SND_MTPAV is not set
|
||||
|
@ -641,63 +688,82 @@ CONFIG_SND_VERBOSE_PROCFS=y
|
|||
# CONFIG_SND_SERIAL_U16550 is not set
|
||||
# CONFIG_SND_MPU401 is not set
|
||||
# CONFIG_SND_PORTMAN2X4 is not set
|
||||
|
||||
#
|
||||
# GSC devices
|
||||
#
|
||||
CONFIG_SND_GSC=y
|
||||
CONFIG_SND_HARMONY=y
|
||||
|
||||
#
|
||||
# System on Chip audio support
|
||||
#
|
||||
# CONFIG_SND_SOC is not set
|
||||
|
||||
#
|
||||
# SoC Audio support for SuperH
|
||||
#
|
||||
|
||||
#
|
||||
# Open Sound System
|
||||
#
|
||||
# CONFIG_SOUND_PRIME is not set
|
||||
CONFIG_HID_SUPPORT=y
|
||||
CONFIG_HID=y
|
||||
CONFIG_HID_DEBUG=y
|
||||
# CONFIG_HIDRAW is not set
|
||||
# CONFIG_HID_PID is not set
|
||||
|
||||
#
|
||||
# Special HID drivers
|
||||
#
|
||||
CONFIG_HID_COMPAT=y
|
||||
CONFIG_USB_SUPPORT=y
|
||||
# CONFIG_USB_ARCH_HAS_HCD is not set
|
||||
# CONFIG_USB_ARCH_HAS_OHCI is not set
|
||||
# CONFIG_USB_ARCH_HAS_EHCI is not set
|
||||
|
||||
#
|
||||
# NOTE: USB_STORAGE enables SCSI, and 'SCSI disk support'
|
||||
# Enable Host or Gadget support to see Inventra options
|
||||
#
|
||||
|
||||
#
|
||||
# USB Gadget Support
|
||||
# NOTE: USB_STORAGE depends on SCSI but BLK_DEV_SD may also be needed;
|
||||
#
|
||||
# CONFIG_USB_GADGET is not set
|
||||
|
||||
#
|
||||
# OTG and related infrastructure
|
||||
#
|
||||
# CONFIG_MMC is not set
|
||||
# CONFIG_MEMSTICK is not set
|
||||
# CONFIG_NEW_LEDS is not set
|
||||
# CONFIG_RTC_CLASS is not set
|
||||
# CONFIG_ACCESSIBILITY is not set
|
||||
CONFIG_RTC_LIB=y
|
||||
CONFIG_RTC_CLASS=y
|
||||
CONFIG_RTC_HCTOSYS=y
|
||||
CONFIG_RTC_HCTOSYS_DEVICE="rtc0"
|
||||
# CONFIG_RTC_DEBUG is not set
|
||||
|
||||
#
|
||||
# DMA Engine support
|
||||
# RTC interfaces
|
||||
#
|
||||
# CONFIG_DMA_ENGINE is not set
|
||||
CONFIG_RTC_INTF_SYSFS=y
|
||||
CONFIG_RTC_INTF_PROC=y
|
||||
CONFIG_RTC_INTF_DEV=y
|
||||
# CONFIG_RTC_INTF_DEV_UIE_EMUL is not set
|
||||
# CONFIG_RTC_DRV_TEST is not set
|
||||
|
||||
#
|
||||
# DMA Clients
|
||||
# SPI RTC drivers
|
||||
#
|
||||
|
||||
#
|
||||
# DMA Devices
|
||||
# Platform RTC drivers
|
||||
#
|
||||
# CONFIG_RTC_DRV_DS1286 is not set
|
||||
# CONFIG_RTC_DRV_DS1511 is not set
|
||||
# CONFIG_RTC_DRV_DS1553 is not set
|
||||
# CONFIG_RTC_DRV_DS1742 is not set
|
||||
# CONFIG_RTC_DRV_STK17TA8 is not set
|
||||
# CONFIG_RTC_DRV_M48T86 is not set
|
||||
# CONFIG_RTC_DRV_M48T35 is not set
|
||||
# CONFIG_RTC_DRV_M48T59 is not set
|
||||
# CONFIG_RTC_DRV_BQ4802 is not set
|
||||
# CONFIG_RTC_DRV_V3020 is not set
|
||||
|
||||
#
|
||||
# on-CPU RTC drivers
|
||||
#
|
||||
CONFIG_RTC_DRV_PARISC=y
|
||||
# CONFIG_DMADEVICES is not set
|
||||
# CONFIG_AUXDISPLAY is not set
|
||||
|
||||
#
|
||||
# Userspace I/O
|
||||
#
|
||||
# CONFIG_UIO is not set
|
||||
# CONFIG_STAGING is not set
|
||||
|
||||
#
|
||||
# File systems
|
||||
|
@ -707,7 +773,7 @@ CONFIG_EXT2_FS=y
|
|||
# CONFIG_EXT2_FS_XIP is not set
|
||||
CONFIG_EXT3_FS=y
|
||||
# CONFIG_EXT3_FS_XATTR is not set
|
||||
# CONFIG_EXT4DEV_FS is not set
|
||||
# CONFIG_EXT4_FS is not set
|
||||
CONFIG_JBD=y
|
||||
# CONFIG_JBD_DEBUG is not set
|
||||
# CONFIG_REISERFS_FS is not set
|
||||
|
@ -717,19 +783,18 @@ CONFIG_JFS_FS=m
|
|||
# CONFIG_JFS_DEBUG is not set
|
||||
# CONFIG_JFS_STATISTICS is not set
|
||||
CONFIG_FS_POSIX_ACL=y
|
||||
CONFIG_FILE_LOCKING=y
|
||||
CONFIG_XFS_FS=m
|
||||
# CONFIG_XFS_QUOTA is not set
|
||||
# CONFIG_XFS_SECURITY is not set
|
||||
# CONFIG_XFS_POSIX_ACL is not set
|
||||
# CONFIG_XFS_RT is not set
|
||||
# CONFIG_GFS2_FS is not set
|
||||
# CONFIG_XFS_DEBUG is not set
|
||||
# CONFIG_OCFS2_FS is not set
|
||||
# CONFIG_MINIX_FS is not set
|
||||
# CONFIG_ROMFS_FS is not set
|
||||
# CONFIG_BTRFS_FS is not set
|
||||
CONFIG_DNOTIFY=y
|
||||
CONFIG_INOTIFY=y
|
||||
CONFIG_INOTIFY_USER=y
|
||||
# CONFIG_QUOTA is not set
|
||||
CONFIG_DNOTIFY=y
|
||||
# CONFIG_AUTOFS_FS is not set
|
||||
CONFIG_AUTOFS4_FS=y
|
||||
# CONFIG_FUSE_FS is not set
|
||||
|
@ -759,16 +824,13 @@ CONFIG_FAT_DEFAULT_IOCHARSET="iso8859-1"
|
|||
CONFIG_PROC_FS=y
|
||||
CONFIG_PROC_KCORE=y
|
||||
CONFIG_PROC_SYSCTL=y
|
||||
CONFIG_PROC_PAGE_MONITOR=y
|
||||
CONFIG_SYSFS=y
|
||||
CONFIG_TMPFS=y
|
||||
# CONFIG_TMPFS_POSIX_ACL is not set
|
||||
# CONFIG_HUGETLB_PAGE is not set
|
||||
CONFIG_RAMFS=y
|
||||
# CONFIG_CONFIGFS_FS is not set
|
||||
|
||||
#
|
||||
# Miscellaneous filesystems
|
||||
#
|
||||
CONFIG_MISC_FILESYSTEMS=y
|
||||
# CONFIG_ADFS_FS is not set
|
||||
# CONFIG_AFFS_FS is not set
|
||||
# CONFIG_ECRYPT_FS is not set
|
||||
|
@ -778,35 +840,34 @@ CONFIG_RAMFS=y
|
|||
# CONFIG_BFS_FS is not set
|
||||
# CONFIG_EFS_FS is not set
|
||||
# CONFIG_CRAMFS is not set
|
||||
# CONFIG_SQUASHFS is not set
|
||||
# CONFIG_VXFS_FS is not set
|
||||
# CONFIG_MINIX_FS is not set
|
||||
# CONFIG_OMFS_FS is not set
|
||||
# CONFIG_HPFS_FS is not set
|
||||
# CONFIG_QNX4FS_FS is not set
|
||||
# CONFIG_ROMFS_FS is not set
|
||||
# CONFIG_SYSV_FS is not set
|
||||
CONFIG_UFS_FS=m
|
||||
# CONFIG_UFS_FS_WRITE is not set
|
||||
# CONFIG_UFS_DEBUG is not set
|
||||
|
||||
#
|
||||
# Network File Systems
|
||||
#
|
||||
CONFIG_NETWORK_FILESYSTEMS=y
|
||||
CONFIG_NFS_FS=y
|
||||
CONFIG_NFS_V3=y
|
||||
# CONFIG_NFS_V3_ACL is not set
|
||||
CONFIG_NFS_V4=y
|
||||
CONFIG_NFS_DIRECTIO=y
|
||||
CONFIG_ROOT_NFS=y
|
||||
CONFIG_NFSD=m
|
||||
CONFIG_NFSD_V3=y
|
||||
# CONFIG_NFSD_V3_ACL is not set
|
||||
CONFIG_NFSD_V4=y
|
||||
CONFIG_NFSD_TCP=y
|
||||
CONFIG_ROOT_NFS=y
|
||||
CONFIG_LOCKD=y
|
||||
CONFIG_LOCKD_V4=y
|
||||
CONFIG_EXPORTFS=m
|
||||
CONFIG_NFS_COMMON=y
|
||||
CONFIG_SUNRPC=y
|
||||
CONFIG_SUNRPC_GSS=y
|
||||
# CONFIG_SUNRPC_BIND34 is not set
|
||||
# CONFIG_SUNRPC_REGISTER_V4 is not set
|
||||
CONFIG_RPCSEC_GSS_KRB5=y
|
||||
CONFIG_RPCSEC_GSS_SPKM3=m
|
||||
CONFIG_SMB_FS=m
|
||||
|
@ -815,6 +876,7 @@ CONFIG_SMB_NLS_REMOTE="cp437"
|
|||
CONFIG_CIFS=m
|
||||
# CONFIG_CIFS_STATS is not set
|
||||
# CONFIG_CIFS_WEAK_PW_HASH is not set
|
||||
# CONFIG_CIFS_UPCALL is not set
|
||||
# CONFIG_CIFS_XATTR is not set
|
||||
# CONFIG_CIFS_DEBUG2 is not set
|
||||
# CONFIG_CIFS_EXPERIMENTAL is not set
|
||||
|
@ -827,10 +889,6 @@ CONFIG_CIFS=m
|
|||
#
|
||||
# CONFIG_PARTITION_ADVANCED is not set
|
||||
CONFIG_MSDOS_PARTITION=y
|
||||
|
||||
#
|
||||
# Native Language Support
|
||||
#
|
||||
CONFIG_NLS=y
|
||||
CONFIG_NLS_DEFAULT="iso8859-1"
|
||||
CONFIG_NLS_CODEPAGE_437=m
|
||||
|
@ -871,33 +929,28 @@ CONFIG_NLS_ISO8859_15=m
|
|||
CONFIG_NLS_KOI8_R=m
|
||||
CONFIG_NLS_KOI8_U=m
|
||||
CONFIG_NLS_UTF8=m
|
||||
|
||||
#
|
||||
# Distributed Lock Manager
|
||||
#
|
||||
# CONFIG_DLM is not set
|
||||
|
||||
#
|
||||
# Profiling support
|
||||
#
|
||||
CONFIG_PROFILING=y
|
||||
CONFIG_OPROFILE=m
|
||||
|
||||
#
|
||||
# Kernel hacking
|
||||
#
|
||||
# CONFIG_PRINTK_TIME is not set
|
||||
CONFIG_ENABLE_WARN_DEPRECATED=y
|
||||
CONFIG_ENABLE_MUST_CHECK=y
|
||||
CONFIG_FRAME_WARN=1024
|
||||
CONFIG_MAGIC_SYSRQ=y
|
||||
# CONFIG_UNUSED_SYMBOLS is not set
|
||||
# CONFIG_DEBUG_FS is not set
|
||||
CONFIG_DEBUG_FS=y
|
||||
# CONFIG_HEADERS_CHECK is not set
|
||||
CONFIG_DEBUG_KERNEL=y
|
||||
# CONFIG_DEBUG_SHIRQ is not set
|
||||
CONFIG_DETECT_SOFTLOCKUP=y
|
||||
# CONFIG_BOOTPARAM_SOFTLOCKUP_PANIC is not set
|
||||
CONFIG_BOOTPARAM_SOFTLOCKUP_PANIC_VALUE=0
|
||||
CONFIG_SCHED_DEBUG=y
|
||||
# CONFIG_SCHEDSTATS is not set
|
||||
# CONFIG_TIMER_STATS is not set
|
||||
# CONFIG_DEBUG_OBJECTS is not set
|
||||
# CONFIG_DEBUG_SLAB is not set
|
||||
# CONFIG_DEBUG_RT_MUTEXES is not set
|
||||
# CONFIG_RT_MUTEX_TESTER is not set
|
||||
|
@ -909,10 +962,32 @@ CONFIG_DEBUG_MUTEXES=y
|
|||
CONFIG_DEBUG_BUGVERBOSE=y
|
||||
# CONFIG_DEBUG_INFO is not set
|
||||
# CONFIG_DEBUG_VM is not set
|
||||
# CONFIG_DEBUG_WRITECOUNT is not set
|
||||
CONFIG_DEBUG_MEMORY_INIT=y
|
||||
# CONFIG_DEBUG_LIST is not set
|
||||
CONFIG_FORCED_INLINING=y
|
||||
# CONFIG_DEBUG_SG is not set
|
||||
# CONFIG_DEBUG_NOTIFIERS is not set
|
||||
# CONFIG_BOOT_PRINTK_DELAY is not set
|
||||
# CONFIG_RCU_TORTURE_TEST is not set
|
||||
# CONFIG_RCU_CPU_STALL_DETECTOR is not set
|
||||
# CONFIG_BACKTRACE_SELF_TEST is not set
|
||||
# CONFIG_DEBUG_BLOCK_EXT_DEVT is not set
|
||||
# CONFIG_FAULT_INJECTION is not set
|
||||
# CONFIG_SYSCTL_SYSCALL_CHECK is not set
|
||||
CONFIG_NOP_TRACER=y
|
||||
CONFIG_RING_BUFFER=y
|
||||
CONFIG_TRACING=y
|
||||
|
||||
#
|
||||
# Tracers
|
||||
#
|
||||
# CONFIG_SCHED_TRACER is not set
|
||||
# CONFIG_CONTEXT_SWITCH_TRACER is not set
|
||||
# CONFIG_BOOT_TRACER is not set
|
||||
# CONFIG_TRACE_BRANCH_PROFILING is not set
|
||||
# CONFIG_FTRACE_STARTUP_TEST is not set
|
||||
# CONFIG_DYNAMIC_PRINTK_DEBUG is not set
|
||||
# CONFIG_SAMPLES is not set
|
||||
CONFIG_DEBUG_RODATA=y
|
||||
|
||||
#
|
||||
|
@ -921,57 +996,113 @@ CONFIG_DEBUG_RODATA=y
|
|||
CONFIG_KEYS=y
|
||||
CONFIG_KEYS_DEBUG_PROC_KEYS=y
|
||||
# CONFIG_SECURITY is not set
|
||||
# CONFIG_SECURITYFS is not set
|
||||
# CONFIG_SECURITY_FILE_CAPABILITIES is not set
|
||||
CONFIG_CRYPTO=y
|
||||
|
||||
#
|
||||
# Crypto core or helper
|
||||
#
|
||||
# CONFIG_CRYPTO_FIPS is not set
|
||||
CONFIG_CRYPTO_ALGAPI=y
|
||||
CONFIG_CRYPTO_ALGAPI2=y
|
||||
CONFIG_CRYPTO_AEAD=m
|
||||
CONFIG_CRYPTO_AEAD2=y
|
||||
CONFIG_CRYPTO_BLKCIPHER=y
|
||||
CONFIG_CRYPTO_BLKCIPHER2=y
|
||||
CONFIG_CRYPTO_HASH=y
|
||||
CONFIG_CRYPTO_HASH2=y
|
||||
CONFIG_CRYPTO_RNG2=y
|
||||
CONFIG_CRYPTO_MANAGER=y
|
||||
CONFIG_CRYPTO_MANAGER2=y
|
||||
# CONFIG_CRYPTO_GF128MUL is not set
|
||||
CONFIG_CRYPTO_NULL=m
|
||||
# CONFIG_CRYPTO_CRYPTD is not set
|
||||
CONFIG_CRYPTO_AUTHENC=m
|
||||
CONFIG_CRYPTO_TEST=m
|
||||
|
||||
#
|
||||
# Authenticated Encryption with Associated Data
|
||||
#
|
||||
# CONFIG_CRYPTO_CCM is not set
|
||||
# CONFIG_CRYPTO_GCM is not set
|
||||
# CONFIG_CRYPTO_SEQIV is not set
|
||||
|
||||
#
|
||||
# Block modes
|
||||
#
|
||||
CONFIG_CRYPTO_CBC=y
|
||||
# CONFIG_CRYPTO_CTR is not set
|
||||
# CONFIG_CRYPTO_CTS is not set
|
||||
CONFIG_CRYPTO_ECB=m
|
||||
# CONFIG_CRYPTO_LRW is not set
|
||||
# CONFIG_CRYPTO_PCBC is not set
|
||||
# CONFIG_CRYPTO_XTS is not set
|
||||
|
||||
#
|
||||
# Hash modes
|
||||
#
|
||||
CONFIG_CRYPTO_HMAC=y
|
||||
# CONFIG_CRYPTO_XCBC is not set
|
||||
CONFIG_CRYPTO_NULL=m
|
||||
|
||||
#
|
||||
# Digest
|
||||
#
|
||||
CONFIG_CRYPTO_CRC32C=m
|
||||
CONFIG_CRYPTO_MD4=m
|
||||
CONFIG_CRYPTO_MD5=y
|
||||
CONFIG_CRYPTO_MICHAEL_MIC=m
|
||||
# CONFIG_CRYPTO_RMD128 is not set
|
||||
# CONFIG_CRYPTO_RMD160 is not set
|
||||
# CONFIG_CRYPTO_RMD256 is not set
|
||||
# CONFIG_CRYPTO_RMD320 is not set
|
||||
CONFIG_CRYPTO_SHA1=m
|
||||
CONFIG_CRYPTO_SHA256=m
|
||||
CONFIG_CRYPTO_SHA512=m
|
||||
CONFIG_CRYPTO_WP512=m
|
||||
CONFIG_CRYPTO_TGR192=m
|
||||
# CONFIG_CRYPTO_GF128MUL is not set
|
||||
CONFIG_CRYPTO_ECB=m
|
||||
CONFIG_CRYPTO_CBC=y
|
||||
# CONFIG_CRYPTO_PCBC is not set
|
||||
# CONFIG_CRYPTO_LRW is not set
|
||||
# CONFIG_CRYPTO_XTS is not set
|
||||
# CONFIG_CRYPTO_CRYPTD is not set
|
||||
CONFIG_CRYPTO_DES=y
|
||||
# CONFIG_CRYPTO_FCRYPT is not set
|
||||
CONFIG_CRYPTO_BLOWFISH=m
|
||||
CONFIG_CRYPTO_TWOFISH=m
|
||||
CONFIG_CRYPTO_TWOFISH_COMMON=m
|
||||
CONFIG_CRYPTO_SERPENT=m
|
||||
CONFIG_CRYPTO_WP512=m
|
||||
|
||||
#
|
||||
# Ciphers
|
||||
#
|
||||
CONFIG_CRYPTO_AES=m
|
||||
CONFIG_CRYPTO_ANUBIS=m
|
||||
CONFIG_CRYPTO_ARC4=m
|
||||
CONFIG_CRYPTO_BLOWFISH=m
|
||||
# CONFIG_CRYPTO_CAMELLIA is not set
|
||||
CONFIG_CRYPTO_CAST5=m
|
||||
CONFIG_CRYPTO_CAST6=m
|
||||
CONFIG_CRYPTO_TEA=m
|
||||
CONFIG_CRYPTO_ARC4=m
|
||||
CONFIG_CRYPTO_DES=y
|
||||
# CONFIG_CRYPTO_FCRYPT is not set
|
||||
CONFIG_CRYPTO_KHAZAD=m
|
||||
CONFIG_CRYPTO_ANUBIS=m
|
||||
# CONFIG_CRYPTO_SALSA20 is not set
|
||||
# CONFIG_CRYPTO_SEED is not set
|
||||
CONFIG_CRYPTO_SERPENT=m
|
||||
CONFIG_CRYPTO_TEA=m
|
||||
CONFIG_CRYPTO_TWOFISH=m
|
||||
CONFIG_CRYPTO_TWOFISH_COMMON=m
|
||||
|
||||
#
|
||||
# Compression
|
||||
#
|
||||
CONFIG_CRYPTO_DEFLATE=m
|
||||
CONFIG_CRYPTO_MICHAEL_MIC=m
|
||||
CONFIG_CRYPTO_CRC32C=m
|
||||
# CONFIG_CRYPTO_CAMELLIA is not set
|
||||
CONFIG_CRYPTO_TEST=m
|
||||
# CONFIG_CRYPTO_AUTHENC is not set
|
||||
# CONFIG_CRYPTO_LZO is not set
|
||||
|
||||
#
|
||||
# Random Number Generation
|
||||
#
|
||||
# CONFIG_CRYPTO_ANSI_CPRNG is not set
|
||||
# CONFIG_CRYPTO_HW is not set
|
||||
|
||||
#
|
||||
# Library routines
|
||||
#
|
||||
CONFIG_BITREVERSE=y
|
||||
CONFIG_GENERIC_FIND_LAST_BIT=y
|
||||
CONFIG_CRC_CCITT=m
|
||||
# CONFIG_CRC16 is not set
|
||||
# CONFIG_CRC_ITU_T is not set
|
||||
# CONFIG_CRC_T10DIF is not set
|
||||
CONFIG_CRC_ITU_T=m
|
||||
CONFIG_CRC32=y
|
||||
# CONFIG_CRC7 is not set
|
||||
CONFIG_LIBCRC32C=m
|
||||
|
|
File diff suppressed because it is too large
Load diff
|
@ -1,7 +1,7 @@
|
|||
#
|
||||
# Automatically generated make config: don't edit
|
||||
# Linux kernel version: 2.6.23
|
||||
# Fri Oct 12 21:16:46 2007
|
||||
# Linux kernel version: 2.6.29-rc8
|
||||
# Fri Mar 13 01:32:57 2009
|
||||
#
|
||||
CONFIG_PARISC=y
|
||||
CONFIG_MMU=y
|
||||
|
@ -33,13 +33,29 @@ CONFIG_SYSVIPC_SYSCTL=y
|
|||
# CONFIG_BSD_PROCESS_ACCT is not set
|
||||
# CONFIG_TASKSTATS is not set
|
||||
# CONFIG_AUDIT is not set
|
||||
|
||||
#
|
||||
# RCU Subsystem
|
||||
#
|
||||
CONFIG_CLASSIC_RCU=y
|
||||
# CONFIG_TREE_RCU is not set
|
||||
# CONFIG_PREEMPT_RCU is not set
|
||||
# CONFIG_TREE_RCU_TRACE is not set
|
||||
# CONFIG_PREEMPT_RCU_TRACE is not set
|
||||
CONFIG_IKCONFIG=y
|
||||
CONFIG_IKCONFIG_PROC=y
|
||||
CONFIG_LOG_BUF_SHIFT=16
|
||||
# CONFIG_CGROUPS is not set
|
||||
CONFIG_SYSFS_DEPRECATED=y
|
||||
CONFIG_SYSFS_DEPRECATED_V2=y
|
||||
# CONFIG_RELAY is not set
|
||||
CONFIG_NAMESPACES=y
|
||||
# CONFIG_UTS_NS is not set
|
||||
# CONFIG_IPC_NS is not set
|
||||
# CONFIG_BLK_DEV_INITRD is not set
|
||||
CONFIG_CC_OPTIMIZE_FOR_SIZE=y
|
||||
CONFIG_SYSCTL=y
|
||||
CONFIG_ANON_INODES=y
|
||||
# CONFIG_EMBEDDED is not set
|
||||
CONFIG_SYSCTL_SYSCALL=y
|
||||
CONFIG_KALLSYMS=y
|
||||
|
@ -51,27 +67,34 @@ CONFIG_BUG=y
|
|||
CONFIG_ELF_CORE=y
|
||||
CONFIG_BASE_FULL=y
|
||||
CONFIG_FUTEX=y
|
||||
CONFIG_ANON_INODES=y
|
||||
CONFIG_EPOLL=y
|
||||
CONFIG_SIGNALFD=y
|
||||
CONFIG_TIMERFD=y
|
||||
CONFIG_EVENTFD=y
|
||||
CONFIG_SHMEM=y
|
||||
CONFIG_AIO=y
|
||||
CONFIG_VM_EVENT_COUNTERS=y
|
||||
CONFIG_PCI_QUIRKS=y
|
||||
CONFIG_COMPAT_BRK=y
|
||||
CONFIG_SLAB=y
|
||||
# CONFIG_SLUB is not set
|
||||
# CONFIG_SLOB is not set
|
||||
# CONFIG_PROFILING is not set
|
||||
CONFIG_HAVE_OPROFILE=y
|
||||
# CONFIG_HAVE_GENERIC_DMA_COHERENT is not set
|
||||
CONFIG_SLABINFO=y
|
||||
CONFIG_RT_MUTEXES=y
|
||||
# CONFIG_TINY_SHMEM is not set
|
||||
CONFIG_BASE_SMALL=0
|
||||
CONFIG_MODULES=y
|
||||
# CONFIG_MODULE_FORCE_LOAD is not set
|
||||
# CONFIG_MODULE_UNLOAD is not set
|
||||
CONFIG_MODVERSIONS=y
|
||||
# CONFIG_MODULE_SRCVERSION_ALL is not set
|
||||
# CONFIG_KMOD is not set
|
||||
CONFIG_INIT_ALL_POSSIBLE=y
|
||||
CONFIG_BLOCK=y
|
||||
# CONFIG_LBD is not set
|
||||
# CONFIG_BLK_DEV_IO_TRACE is not set
|
||||
# CONFIG_LSF is not set
|
||||
# CONFIG_BLK_DEV_INTEGRITY is not set
|
||||
|
||||
#
|
||||
# IO Schedulers
|
||||
|
@ -85,6 +108,7 @@ CONFIG_IOSCHED_CFQ=y
|
|||
CONFIG_DEFAULT_CFQ=y
|
||||
# CONFIG_DEFAULT_NOOP is not set
|
||||
CONFIG_DEFAULT_IOSCHED="cfq"
|
||||
# CONFIG_FREEZER is not set
|
||||
|
||||
#
|
||||
# Processor type and features
|
||||
|
@ -108,13 +132,15 @@ CONFIG_HZ_250=y
|
|||
# CONFIG_HZ_300 is not set
|
||||
# CONFIG_HZ_1000 is not set
|
||||
CONFIG_HZ=250
|
||||
# CONFIG_SCHED_HRTICK is not set
|
||||
CONFIG_FLATMEM=y
|
||||
CONFIG_FLAT_NODE_MEM_MAP=y
|
||||
# CONFIG_SPARSEMEM_STATIC is not set
|
||||
CONFIG_PAGEFLAGS_EXTENDED=y
|
||||
CONFIG_SPLIT_PTLOCK_CPUS=4096
|
||||
# CONFIG_RESOURCES_64BIT is not set
|
||||
# CONFIG_PHYS_ADDR_T_64BIT is not set
|
||||
CONFIG_ZONE_DMA_FLAG=0
|
||||
CONFIG_VIRT_TO_BUS=y
|
||||
CONFIG_UNEVICTABLE_LRU=y
|
||||
# CONFIG_HPUX is not set
|
||||
|
||||
#
|
||||
|
@ -130,14 +156,14 @@ CONFIG_EISA_NAMES=y
|
|||
CONFIG_ISA=y
|
||||
CONFIG_PCI=y
|
||||
# CONFIG_ARCH_SUPPORTS_MSI is not set
|
||||
CONFIG_PCI_LEGACY=y
|
||||
# CONFIG_PCI_DEBUG is not set
|
||||
# CONFIG_PCI_STUB is not set
|
||||
CONFIG_GSC_DINO=y
|
||||
# CONFIG_PCI_LBA is not set
|
||||
|
||||
#
|
||||
# PCCARD (PCMCIA/CardBus) support
|
||||
#
|
||||
CONFIG_IOMMU_HELPER=y
|
||||
# CONFIG_PCCARD is not set
|
||||
# CONFIG_HOTPLUG_PCI is not set
|
||||
|
||||
#
|
||||
# PA-RISC specific drivers
|
||||
|
@ -151,16 +177,15 @@ CONFIG_PDC_STABLE=y
|
|||
# Executable file formats
|
||||
#
|
||||
CONFIG_BINFMT_ELF=y
|
||||
# CONFIG_CORE_DUMP_DEFAULT_ELF_HEADERS is not set
|
||||
# CONFIG_HAVE_AOUT is not set
|
||||
# CONFIG_BINFMT_MISC is not set
|
||||
|
||||
#
|
||||
# Networking
|
||||
#
|
||||
CONFIG_NET=y
|
||||
|
||||
#
|
||||
# Networking options
|
||||
#
|
||||
CONFIG_COMPAT_NET_DEV_OPS=y
|
||||
CONFIG_PACKET=y
|
||||
CONFIG_PACKET_MMAP=y
|
||||
CONFIG_UNIX=y
|
||||
|
@ -205,36 +230,37 @@ CONFIG_INET6_XFRM_MODE_TRANSPORT=y
|
|||
CONFIG_INET6_XFRM_MODE_TUNNEL=y
|
||||
CONFIG_INET6_XFRM_MODE_BEET=y
|
||||
CONFIG_IPV6_SIT=y
|
||||
CONFIG_IPV6_NDISC_NODETYPE=y
|
||||
# CONFIG_IPV6_TUNNEL is not set
|
||||
# CONFIG_NETLABEL is not set
|
||||
# CONFIG_NETWORK_SECMARK is not set
|
||||
# CONFIG_NETFILTER is not set
|
||||
# CONFIG_ATM is not set
|
||||
# CONFIG_BRIDGE is not set
|
||||
# CONFIG_VLAN_8021Q is not set
|
||||
# CONFIG_DECNET is not set
|
||||
# CONFIG_LLC2 is not set
|
||||
# CONFIG_IPX is not set
|
||||
# CONFIG_ATALK is not set
|
||||
|
||||
#
|
||||
# QoS and/or fair queueing
|
||||
#
|
||||
# CONFIG_NET_SCHED is not set
|
||||
# CONFIG_DCB is not set
|
||||
|
||||
#
|
||||
# Network testing
|
||||
#
|
||||
# CONFIG_NET_PKTGEN is not set
|
||||
# CONFIG_HAMRADIO is not set
|
||||
# CONFIG_CAN is not set
|
||||
# CONFIG_IRDA is not set
|
||||
# CONFIG_BT is not set
|
||||
|
||||
#
|
||||
# Wireless
|
||||
#
|
||||
# CONFIG_PHONET is not set
|
||||
CONFIG_WIRELESS=y
|
||||
# CONFIG_CFG80211 is not set
|
||||
CONFIG_WIRELESS_OLD_REGULATORY=y
|
||||
# CONFIG_WIRELESS_EXT is not set
|
||||
# CONFIG_IEEE80211 is not set
|
||||
# CONFIG_LIB80211 is not set
|
||||
# CONFIG_MAC80211 is not set
|
||||
# CONFIG_WIMAX is not set
|
||||
# CONFIG_RFKILL is not set
|
||||
|
||||
#
|
||||
|
@ -247,7 +273,9 @@ CONFIG_IPV6_SIT=y
|
|||
CONFIG_UEVENT_HELPER_PATH="/sbin/hotplug"
|
||||
CONFIG_STANDALONE=y
|
||||
# CONFIG_PREVENT_FIRMWARE_BUILD is not set
|
||||
# CONFIG_FW_LOADER is not set
|
||||
CONFIG_FW_LOADER=y
|
||||
CONFIG_FIRMWARE_IN_KERNEL=y
|
||||
CONFIG_EXTRA_FIRMWARE=""
|
||||
# CONFIG_DEBUG_DRIVER is not set
|
||||
# CONFIG_DEBUG_DEVRES is not set
|
||||
# CONFIG_SYS_HYPERVISOR is not set
|
||||
|
@ -275,10 +303,18 @@ CONFIG_BLK_DEV_CRYPTOLOOP=y
|
|||
CONFIG_CDROM_PKTCDVD=m
|
||||
CONFIG_CDROM_PKTCDVD_BUFFERS=8
|
||||
CONFIG_ATA_OVER_ETH=y
|
||||
# CONFIG_BLK_DEV_HD is not set
|
||||
CONFIG_MISC_DEVICES=y
|
||||
# CONFIG_PHANTOM is not set
|
||||
# CONFIG_EEPROM_93CX6 is not set
|
||||
# CONFIG_SGI_IOC4 is not set
|
||||
# CONFIG_ENCLOSURE_SERVICES is not set
|
||||
# CONFIG_HP_ILO is not set
|
||||
|
||||
#
|
||||
# EEPROM support
|
||||
#
|
||||
# CONFIG_EEPROM_93CX6 is not set
|
||||
CONFIG_HAVE_IDE=y
|
||||
# CONFIG_IDE is not set
|
||||
|
||||
#
|
||||
|
@ -317,8 +353,10 @@ CONFIG_SCSI_SPI_ATTRS=y
|
|||
# CONFIG_SCSI_FC_ATTRS is not set
|
||||
# CONFIG_SCSI_ISCSI_ATTRS is not set
|
||||
# CONFIG_SCSI_SAS_LIBSAS is not set
|
||||
# CONFIG_SCSI_SRP_ATTRS is not set
|
||||
CONFIG_SCSI_LOWLEVEL=y
|
||||
# CONFIG_ISCSI_TCP is not set
|
||||
# CONFIG_SCSI_CXGB3_ISCSI is not set
|
||||
# CONFIG_BLK_DEV_3W_XXXX_RAID is not set
|
||||
# CONFIG_SCSI_3W_9XXX is not set
|
||||
# CONFIG_SCSI_ACARD is not set
|
||||
|
@ -330,12 +368,15 @@ CONFIG_SCSI_LOWLEVEL=y
|
|||
# CONFIG_SCSI_AIC79XX is not set
|
||||
# CONFIG_SCSI_AIC94XX is not set
|
||||
# CONFIG_SCSI_DPT_I2O is not set
|
||||
# CONFIG_SCSI_ADVANSYS is not set
|
||||
# CONFIG_SCSI_IN2000 is not set
|
||||
# CONFIG_SCSI_ARCMSR is not set
|
||||
# CONFIG_MEGARAID_NEWGEN is not set
|
||||
# CONFIG_MEGARAID_LEGACY is not set
|
||||
# CONFIG_MEGARAID_SAS is not set
|
||||
# CONFIG_SCSI_HPTIOP is not set
|
||||
# CONFIG_LIBFC is not set
|
||||
# CONFIG_FCOE is not set
|
||||
# CONFIG_SCSI_DMX3191D is not set
|
||||
# CONFIG_SCSI_DTC3280 is not set
|
||||
# CONFIG_SCSI_FUTURE_DOMAIN is not set
|
||||
|
@ -346,6 +387,7 @@ CONFIG_SCSI_LOWLEVEL=y
|
|||
# CONFIG_SCSI_INIA100 is not set
|
||||
# CONFIG_SCSI_PPA is not set
|
||||
# CONFIG_SCSI_IMM is not set
|
||||
# CONFIG_SCSI_MVSAS is not set
|
||||
# CONFIG_SCSI_NCR53C406A is not set
|
||||
CONFIG_SCSI_LASI700=y
|
||||
CONFIG_53C700_LE_ON_BE=y
|
||||
|
@ -360,7 +402,6 @@ CONFIG_SCSI_NCR53C8XX_DEFAULT_TAGS=8
|
|||
CONFIG_SCSI_NCR53C8XX_MAX_TAGS=32
|
||||
CONFIG_SCSI_NCR53C8XX_SYNC=40
|
||||
# CONFIG_SCSI_PAS16 is not set
|
||||
# CONFIG_SCSI_PSI240I is not set
|
||||
# CONFIG_SCSI_QLOGIC_FAS is not set
|
||||
# CONFIG_SCSI_QLOGIC_1280 is not set
|
||||
# CONFIG_SCSI_QLA_FC is not set
|
||||
|
@ -373,9 +414,11 @@ CONFIG_SCSI_NCR53C8XX_SYNC=40
|
|||
# CONFIG_SCSI_NSP32 is not set
|
||||
# CONFIG_SCSI_DEBUG is not set
|
||||
# CONFIG_SCSI_SRP is not set
|
||||
# CONFIG_SCSI_DH is not set
|
||||
# CONFIG_ATA is not set
|
||||
CONFIG_MD=y
|
||||
CONFIG_BLK_DEV_MD=y
|
||||
CONFIG_MD_AUTODETECT=y
|
||||
CONFIG_MD_LINEAR=y
|
||||
CONFIG_MD_RAID0=y
|
||||
CONFIG_MD_RAID1=y
|
||||
|
@ -383,26 +426,18 @@ CONFIG_MD_RAID1=y
|
|||
# CONFIG_MD_MULTIPATH is not set
|
||||
# CONFIG_MD_FAULTY is not set
|
||||
# CONFIG_BLK_DEV_DM is not set
|
||||
|
||||
#
|
||||
# Fusion MPT device support
|
||||
#
|
||||
# CONFIG_FUSION is not set
|
||||
# CONFIG_FUSION_SPI is not set
|
||||
# CONFIG_FUSION_FC is not set
|
||||
# CONFIG_FUSION_SAS is not set
|
||||
|
||||
#
|
||||
# IEEE 1394 (FireWire) support
|
||||
#
|
||||
|
||||
#
|
||||
# An alternative FireWire stack is available with EXPERIMENTAL=y
|
||||
# A new alternative FireWire stack is available with EXPERIMENTAL=y
|
||||
#
|
||||
# CONFIG_IEEE1394 is not set
|
||||
# CONFIG_I2O is not set
|
||||
CONFIG_NETDEVICES=y
|
||||
# CONFIG_NETDEVICES_MULTIQUEUE is not set
|
||||
# CONFIG_DUMMY is not set
|
||||
# CONFIG_BONDING is not set
|
||||
# CONFIG_EQUALIZER is not set
|
||||
|
@ -434,36 +469,49 @@ CONFIG_TULIP=y
|
|||
# CONFIG_IBM_NEW_EMAC_RGMII is not set
|
||||
# CONFIG_IBM_NEW_EMAC_TAH is not set
|
||||
# CONFIG_IBM_NEW_EMAC_EMAC4 is not set
|
||||
# CONFIG_IBM_NEW_EMAC_NO_FLOW_CTRL is not set
|
||||
# CONFIG_IBM_NEW_EMAC_MAL_CLR_ICINTSTAT is not set
|
||||
# CONFIG_IBM_NEW_EMAC_MAL_COMMON_ERR is not set
|
||||
# CONFIG_NET_PCI is not set
|
||||
# CONFIG_B44 is not set
|
||||
# CONFIG_CS89x0 is not set
|
||||
# CONFIG_NET_POCKET is not set
|
||||
# CONFIG_ATL2 is not set
|
||||
CONFIG_NETDEV_1000=y
|
||||
# CONFIG_ACENIC is not set
|
||||
# CONFIG_DL2K is not set
|
||||
# CONFIG_E1000 is not set
|
||||
# CONFIG_E1000E is not set
|
||||
# CONFIG_IGB is not set
|
||||
# CONFIG_NS83820 is not set
|
||||
# CONFIG_HAMACHI is not set
|
||||
# CONFIG_R8169 is not set
|
||||
# CONFIG_SIS190 is not set
|
||||
# CONFIG_SKGE is not set
|
||||
# CONFIG_SKY2 is not set
|
||||
# CONFIG_SK98LIN is not set
|
||||
# CONFIG_VIA_VELOCITY is not set
|
||||
# CONFIG_TIGON3 is not set
|
||||
# CONFIG_BNX2 is not set
|
||||
# CONFIG_QLA3XXX is not set
|
||||
# CONFIG_ATL1 is not set
|
||||
# CONFIG_JME is not set
|
||||
CONFIG_NETDEV_10000=y
|
||||
# CONFIG_CHELSIO_T1 is not set
|
||||
CONFIG_CHELSIO_T3_DEPENDS=y
|
||||
# CONFIG_CHELSIO_T3 is not set
|
||||
# CONFIG_ENIC is not set
|
||||
# CONFIG_IXGBE is not set
|
||||
# CONFIG_IXGB is not set
|
||||
# CONFIG_S2IO is not set
|
||||
# CONFIG_MYRI10GE is not set
|
||||
# CONFIG_NETXEN_NIC is not set
|
||||
# CONFIG_NIU is not set
|
||||
# CONFIG_MLX4_EN is not set
|
||||
# CONFIG_MLX4_CORE is not set
|
||||
# CONFIG_TEHUTI is not set
|
||||
# CONFIG_BNX2X is not set
|
||||
# CONFIG_QLGE is not set
|
||||
# CONFIG_SFC is not set
|
||||
# CONFIG_TR is not set
|
||||
|
||||
#
|
||||
|
@ -471,6 +519,11 @@ CONFIG_NETDEV_10000=y
|
|||
#
|
||||
# CONFIG_WLAN_PRE80211 is not set
|
||||
# CONFIG_WLAN_80211 is not set
|
||||
# CONFIG_IWLWIFI_LEDS is not set
|
||||
|
||||
#
|
||||
# Enable WiMAX (Networking options) to see the WiMAX drivers
|
||||
#
|
||||
# CONFIG_WAN is not set
|
||||
# CONFIG_FDDI is not set
|
||||
# CONFIG_PLIP is not set
|
||||
|
@ -503,7 +556,6 @@ CONFIG_INPUT_MOUSEDEV_PSAUX=y
|
|||
CONFIG_INPUT_MOUSEDEV_SCREEN_X=1024
|
||||
CONFIG_INPUT_MOUSEDEV_SCREEN_Y=768
|
||||
# CONFIG_INPUT_JOYDEV is not set
|
||||
# CONFIG_INPUT_TSDEV is not set
|
||||
CONFIG_INPUT_EVDEV=y
|
||||
# CONFIG_INPUT_EVBUG is not set
|
||||
|
||||
|
@ -526,11 +578,12 @@ CONFIG_MOUSE_PS2=y
|
|||
CONFIG_MOUSE_PS2_ALPS=y
|
||||
CONFIG_MOUSE_PS2_LOGIPS2PP=y
|
||||
CONFIG_MOUSE_PS2_SYNAPTICS=y
|
||||
CONFIG_MOUSE_PS2_LIFEBOOK=y
|
||||
CONFIG_MOUSE_PS2_TRACKPOINT=y
|
||||
# CONFIG_MOUSE_PS2_ELANTECH is not set
|
||||
# CONFIG_MOUSE_PS2_TOUCHKIT is not set
|
||||
# CONFIG_MOUSE_SERIAL is not set
|
||||
# CONFIG_MOUSE_APPLETOUCH is not set
|
||||
# CONFIG_MOUSE_BCM5974 is not set
|
||||
# CONFIG_MOUSE_INPORT is not set
|
||||
# CONFIG_MOUSE_LOGIBM is not set
|
||||
# CONFIG_MOUSE_PC110PAD is not set
|
||||
|
@ -564,9 +617,11 @@ CONFIG_SERIO_LIBPS2=y
|
|||
# Character devices
|
||||
#
|
||||
CONFIG_VT=y
|
||||
CONFIG_CONSOLE_TRANSLATIONS=y
|
||||
CONFIG_VT_CONSOLE=y
|
||||
CONFIG_HW_CONSOLE=y
|
||||
# CONFIG_VT_HW_CONSOLE_BINDING is not set
|
||||
CONFIG_DEVKMEM=y
|
||||
# CONFIG_SERIAL_NONSTANDARD is not set
|
||||
|
||||
#
|
||||
|
@ -598,75 +653,79 @@ CONFIG_SERIAL_CORE=y
|
|||
CONFIG_SERIAL_CORE_CONSOLE=y
|
||||
# CONFIG_SERIAL_JSM is not set
|
||||
CONFIG_UNIX98_PTYS=y
|
||||
# CONFIG_DEVPTS_MULTIPLE_INSTANCES is not set
|
||||
CONFIG_LEGACY_PTYS=y
|
||||
CONFIG_LEGACY_PTY_COUNT=256
|
||||
CONFIG_PRINTER=y
|
||||
# CONFIG_LP_CONSOLE is not set
|
||||
# CONFIG_PPDEV is not set
|
||||
# CONFIG_TIPAR is not set
|
||||
# CONFIG_IPMI_HANDLER is not set
|
||||
# CONFIG_WATCHDOG is not set
|
||||
# CONFIG_HW_RANDOM is not set
|
||||
CONFIG_GEN_RTC=y
|
||||
# CONFIG_GEN_RTC_X is not set
|
||||
# CONFIG_DTLK is not set
|
||||
# CONFIG_R3964 is not set
|
||||
# CONFIG_APPLICOM is not set
|
||||
# CONFIG_AGP is not set
|
||||
# CONFIG_DRM is not set
|
||||
# CONFIG_RAW_DRIVER is not set
|
||||
CONFIG_DEVPORT=y
|
||||
# CONFIG_I2C is not set
|
||||
|
||||
#
|
||||
# SPI support
|
||||
#
|
||||
# CONFIG_SPI is not set
|
||||
# CONFIG_SPI_MASTER is not set
|
||||
# CONFIG_W1 is not set
|
||||
# CONFIG_POWER_SUPPLY is not set
|
||||
# CONFIG_HWMON is not set
|
||||
# CONFIG_THERMAL is not set
|
||||
# CONFIG_THERMAL_HWMON is not set
|
||||
# CONFIG_WATCHDOG is not set
|
||||
CONFIG_SSB_POSSIBLE=y
|
||||
|
||||
#
|
||||
# Sonics Silicon Backplane
|
||||
#
|
||||
CONFIG_SSB_POSSIBLE=y
|
||||
# CONFIG_SSB is not set
|
||||
|
||||
#
|
||||
# Multifunction device drivers
|
||||
#
|
||||
# CONFIG_MFD_CORE is not set
|
||||
# CONFIG_MFD_SM501 is not set
|
||||
# CONFIG_HTC_PASIC3 is not set
|
||||
# CONFIG_MFD_TMIO is not set
|
||||
# CONFIG_REGULATOR is not set
|
||||
|
||||
#
|
||||
# Multimedia devices
|
||||
#
|
||||
|
||||
#
|
||||
# Multimedia core support
|
||||
#
|
||||
# CONFIG_VIDEO_DEV is not set
|
||||
# CONFIG_DVB_CORE is not set
|
||||
# CONFIG_VIDEO_MEDIA is not set
|
||||
|
||||
#
|
||||
# Multimedia drivers
|
||||
#
|
||||
# CONFIG_DAB is not set
|
||||
|
||||
#
|
||||
# Graphics support
|
||||
#
|
||||
# CONFIG_BACKLIGHT_LCD_SUPPORT is not set
|
||||
|
||||
#
|
||||
# Display device support
|
||||
#
|
||||
# CONFIG_DISPLAY_SUPPORT is not set
|
||||
# CONFIG_AGP is not set
|
||||
# CONFIG_DRM is not set
|
||||
# CONFIG_VGASTATE is not set
|
||||
CONFIG_VIDEO_OUTPUT_CONTROL=m
|
||||
CONFIG_FB=y
|
||||
# CONFIG_FIRMWARE_EDID is not set
|
||||
# CONFIG_FB_DDC is not set
|
||||
# CONFIG_FB_BOOT_VESA_SUPPORT is not set
|
||||
CONFIG_FB_CFB_FILLRECT=y
|
||||
CONFIG_FB_CFB_COPYAREA=y
|
||||
CONFIG_FB_CFB_IMAGEBLIT=y
|
||||
# CONFIG_FB_CFB_REV_PIXELS_IN_BYTE is not set
|
||||
# CONFIG_FB_SYS_FILLRECT is not set
|
||||
# CONFIG_FB_SYS_COPYAREA is not set
|
||||
# CONFIG_FB_SYS_IMAGEBLIT is not set
|
||||
# CONFIG_FB_FOREIGN_ENDIAN is not set
|
||||
# CONFIG_FB_SYS_FOPS is not set
|
||||
CONFIG_FB_DEFERRED_IO=y
|
||||
# CONFIG_FB_SVGALIB is not set
|
||||
# CONFIG_FB_MACMODES is not set
|
||||
# CONFIG_FB_BACKLIGHT is not set
|
||||
|
@ -691,6 +750,7 @@ CONFIG_FB_STI=y
|
|||
# CONFIG_FB_ATY is not set
|
||||
# CONFIG_FB_S3 is not set
|
||||
# CONFIG_FB_SIS is not set
|
||||
# CONFIG_FB_VIA is not set
|
||||
# CONFIG_FB_NEOMAGIC is not set
|
||||
# CONFIG_FB_KYRO is not set
|
||||
# CONFIG_FB_3DFX is not set
|
||||
|
@ -698,7 +758,16 @@ CONFIG_FB_STI=y
|
|||
# CONFIG_FB_VT8623 is not set
|
||||
# CONFIG_FB_TRIDENT is not set
|
||||
# CONFIG_FB_ARK is not set
|
||||
# CONFIG_FB_CARMINE is not set
|
||||
# CONFIG_FB_VIRTUAL is not set
|
||||
# CONFIG_FB_METRONOME is not set
|
||||
# CONFIG_FB_MB862XX is not set
|
||||
# CONFIG_BACKLIGHT_LCD_SUPPORT is not set
|
||||
|
||||
#
|
||||
# Display device support
|
||||
#
|
||||
# CONFIG_DISPLAY_SUPPORT is not set
|
||||
|
||||
#
|
||||
# Console display driver support
|
||||
|
@ -718,15 +787,8 @@ CONFIG_LOGO_LINUX_MONO=y
|
|||
CONFIG_LOGO_LINUX_VGA16=y
|
||||
CONFIG_LOGO_LINUX_CLUT224=y
|
||||
CONFIG_LOGO_PARISC_CLUT224=y
|
||||
|
||||
#
|
||||
# Sound
|
||||
#
|
||||
CONFIG_SOUND=y
|
||||
|
||||
#
|
||||
# Advanced Linux Sound Architecture
|
||||
#
|
||||
CONFIG_SOUND_OSS_CORE=y
|
||||
CONFIG_SND=y
|
||||
CONFIG_SND_TIMER=y
|
||||
CONFIG_SND_PCM=y
|
||||
|
@ -742,10 +804,7 @@ CONFIG_SND_SUPPORT_OLD_API=y
|
|||
CONFIG_SND_VERBOSE_PROCFS=y
|
||||
# CONFIG_SND_VERBOSE_PRINTK is not set
|
||||
# CONFIG_SND_DEBUG is not set
|
||||
|
||||
#
|
||||
# Generic devices
|
||||
#
|
||||
CONFIG_SND_DRIVERS=y
|
||||
# CONFIG_SND_DUMMY is not set
|
||||
# CONFIG_SND_VIRMIDI is not set
|
||||
# CONFIG_SND_MTPAV is not set
|
||||
|
@ -753,10 +812,7 @@ CONFIG_SND_VERBOSE_PROCFS=y
|
|||
# CONFIG_SND_SERIAL_U16550 is not set
|
||||
# CONFIG_SND_MPU401 is not set
|
||||
# CONFIG_SND_PORTMAN2X4 is not set
|
||||
|
||||
#
|
||||
# PCI devices
|
||||
#
|
||||
CONFIG_SND_PCI=y
|
||||
# CONFIG_SND_AD1889 is not set
|
||||
# CONFIG_SND_ALS300 is not set
|
||||
# CONFIG_SND_ALI5451 is not set
|
||||
|
@ -765,9 +821,11 @@ CONFIG_SND_VERBOSE_PROCFS=y
|
|||
# CONFIG_SND_AU8810 is not set
|
||||
# CONFIG_SND_AU8820 is not set
|
||||
# CONFIG_SND_AU8830 is not set
|
||||
# CONFIG_SND_AW2 is not set
|
||||
# CONFIG_SND_BT87X is not set
|
||||
# CONFIG_SND_CA0106 is not set
|
||||
# CONFIG_SND_CMIPCI is not set
|
||||
# CONFIG_SND_OXYGEN is not set
|
||||
# CONFIG_SND_CS4281 is not set
|
||||
# CONFIG_SND_CS46XX is not set
|
||||
# CONFIG_SND_DARLA20 is not set
|
||||
|
@ -792,6 +850,7 @@ CONFIG_SND_VERBOSE_PROCFS=y
|
|||
# CONFIG_SND_HDA_INTEL is not set
|
||||
# CONFIG_SND_HDSP is not set
|
||||
# CONFIG_SND_HDSPM is not set
|
||||
# CONFIG_SND_HIFIER is not set
|
||||
# CONFIG_SND_ICE1712 is not set
|
||||
# CONFIG_SND_ICE1724 is not set
|
||||
# CONFIG_SND_INTEL8X0 is not set
|
||||
|
@ -809,30 +868,23 @@ CONFIG_SND_VERBOSE_PROCFS=y
|
|||
# CONFIG_SND_TRIDENT is not set
|
||||
# CONFIG_SND_VIA82XX is not set
|
||||
# CONFIG_SND_VIA82XX_MODEM is not set
|
||||
# CONFIG_SND_VIRTUOSO is not set
|
||||
# CONFIG_SND_VX222 is not set
|
||||
# CONFIG_SND_YMFPCI is not set
|
||||
|
||||
#
|
||||
# GSC devices
|
||||
#
|
||||
CONFIG_SND_GSC=y
|
||||
CONFIG_SND_HARMONY=y
|
||||
|
||||
#
|
||||
# System on Chip audio support
|
||||
#
|
||||
# CONFIG_SND_SOC is not set
|
||||
|
||||
#
|
||||
# SoC Audio support for SuperH
|
||||
#
|
||||
|
||||
#
|
||||
# Open Sound System
|
||||
#
|
||||
# CONFIG_SOUND_PRIME is not set
|
||||
CONFIG_HID_SUPPORT=y
|
||||
CONFIG_HID=y
|
||||
CONFIG_HID_DEBUG=y
|
||||
# CONFIG_HIDRAW is not set
|
||||
# CONFIG_HID_PID is not set
|
||||
|
||||
#
|
||||
# Special HID drivers
|
||||
#
|
||||
CONFIG_HID_COMPAT=y
|
||||
CONFIG_USB_SUPPORT=y
|
||||
CONFIG_USB_ARCH_HAS_HCD=y
|
||||
CONFIG_USB_ARCH_HAS_OHCI=y
|
||||
|
@ -840,36 +892,63 @@ CONFIG_USB_ARCH_HAS_EHCI=y
|
|||
# CONFIG_USB is not set
|
||||
|
||||
#
|
||||
# NOTE: USB_STORAGE enables SCSI, and 'SCSI disk support'
|
||||
# Enable Host or Gadget support to see Inventra options
|
||||
#
|
||||
|
||||
#
|
||||
# USB Gadget Support
|
||||
# NOTE: USB_STORAGE depends on SCSI but BLK_DEV_SD may also be needed;
|
||||
#
|
||||
# CONFIG_USB_GADGET is not set
|
||||
|
||||
#
|
||||
# OTG and related infrastructure
|
||||
#
|
||||
# CONFIG_MMC is not set
|
||||
# CONFIG_MEMSTICK is not set
|
||||
# CONFIG_NEW_LEDS is not set
|
||||
# CONFIG_ACCESSIBILITY is not set
|
||||
# CONFIG_INFINIBAND is not set
|
||||
# CONFIG_RTC_CLASS is not set
|
||||
CONFIG_RTC_LIB=y
|
||||
CONFIG_RTC_CLASS=y
|
||||
CONFIG_RTC_HCTOSYS=y
|
||||
CONFIG_RTC_HCTOSYS_DEVICE="rtc0"
|
||||
# CONFIG_RTC_DEBUG is not set
|
||||
|
||||
#
|
||||
# DMA Engine support
|
||||
# RTC interfaces
|
||||
#
|
||||
# CONFIG_DMA_ENGINE is not set
|
||||
CONFIG_RTC_INTF_SYSFS=y
|
||||
CONFIG_RTC_INTF_PROC=y
|
||||
CONFIG_RTC_INTF_DEV=y
|
||||
# CONFIG_RTC_INTF_DEV_UIE_EMUL is not set
|
||||
# CONFIG_RTC_DRV_TEST is not set
|
||||
|
||||
#
|
||||
# DMA Clients
|
||||
# SPI RTC drivers
|
||||
#
|
||||
|
||||
#
|
||||
# DMA Devices
|
||||
# Platform RTC drivers
|
||||
#
|
||||
# CONFIG_RTC_DRV_DS1286 is not set
|
||||
# CONFIG_RTC_DRV_DS1511 is not set
|
||||
# CONFIG_RTC_DRV_DS1553 is not set
|
||||
# CONFIG_RTC_DRV_DS1742 is not set
|
||||
# CONFIG_RTC_DRV_STK17TA8 is not set
|
||||
# CONFIG_RTC_DRV_M48T86 is not set
|
||||
# CONFIG_RTC_DRV_M48T35 is not set
|
||||
# CONFIG_RTC_DRV_M48T59 is not set
|
||||
# CONFIG_RTC_DRV_BQ4802 is not set
|
||||
# CONFIG_RTC_DRV_V3020 is not set
|
||||
|
||||
#
|
||||
# on-CPU RTC drivers
|
||||
#
|
||||
CONFIG_RTC_DRV_PARISC=y
|
||||
# CONFIG_DMADEVICES is not set
|
||||
# CONFIG_AUXDISPLAY is not set
|
||||
|
||||
#
|
||||
# Userspace I/O
|
||||
#
|
||||
# CONFIG_UIO is not set
|
||||
# CONFIG_STAGING is not set
|
||||
|
||||
#
|
||||
# File systems
|
||||
|
@ -879,19 +958,18 @@ CONFIG_EXT2_FS=y
|
|||
# CONFIG_EXT2_FS_XIP is not set
|
||||
CONFIG_EXT3_FS=y
|
||||
# CONFIG_EXT3_FS_XATTR is not set
|
||||
# CONFIG_EXT4_FS is not set
|
||||
CONFIG_JBD=y
|
||||
# CONFIG_JBD_DEBUG is not set
|
||||
# CONFIG_REISERFS_FS is not set
|
||||
# CONFIG_JFS_FS is not set
|
||||
# CONFIG_FS_POSIX_ACL is not set
|
||||
CONFIG_FILE_LOCKING=y
|
||||
# CONFIG_XFS_FS is not set
|
||||
# CONFIG_OCFS2_FS is not set
|
||||
# CONFIG_MINIX_FS is not set
|
||||
# CONFIG_ROMFS_FS is not set
|
||||
CONFIG_DNOTIFY=y
|
||||
CONFIG_INOTIFY=y
|
||||
CONFIG_INOTIFY_USER=y
|
||||
# CONFIG_QUOTA is not set
|
||||
CONFIG_DNOTIFY=y
|
||||
# CONFIG_AUTOFS_FS is not set
|
||||
CONFIG_AUTOFS4_FS=y
|
||||
# CONFIG_FUSE_FS is not set
|
||||
|
@ -917,35 +995,32 @@ CONFIG_JOLIET=y
|
|||
CONFIG_PROC_FS=y
|
||||
CONFIG_PROC_KCORE=y
|
||||
CONFIG_PROC_SYSCTL=y
|
||||
CONFIG_PROC_PAGE_MONITOR=y
|
||||
CONFIG_SYSFS=y
|
||||
CONFIG_TMPFS=y
|
||||
# CONFIG_TMPFS_POSIX_ACL is not set
|
||||
# CONFIG_HUGETLB_PAGE is not set
|
||||
CONFIG_RAMFS=y
|
||||
|
||||
#
|
||||
# Miscellaneous filesystems
|
||||
#
|
||||
# CONFIG_CONFIGFS_FS is not set
|
||||
CONFIG_MISC_FILESYSTEMS=y
|
||||
# CONFIG_HFSPLUS_FS is not set
|
||||
# CONFIG_CRAMFS is not set
|
||||
# CONFIG_SQUASHFS is not set
|
||||
# CONFIG_VXFS_FS is not set
|
||||
# CONFIG_MINIX_FS is not set
|
||||
# CONFIG_OMFS_FS is not set
|
||||
# CONFIG_HPFS_FS is not set
|
||||
# CONFIG_QNX4FS_FS is not set
|
||||
# CONFIG_ROMFS_FS is not set
|
||||
# CONFIG_SYSV_FS is not set
|
||||
# CONFIG_UFS_FS is not set
|
||||
|
||||
#
|
||||
# Network File Systems
|
||||
#
|
||||
CONFIG_NETWORK_FILESYSTEMS=y
|
||||
CONFIG_NFS_FS=y
|
||||
CONFIG_NFS_V3=y
|
||||
# CONFIG_NFS_V3_ACL is not set
|
||||
# CONFIG_NFS_DIRECTIO is not set
|
||||
CONFIG_ROOT_NFS=y
|
||||
CONFIG_NFSD=y
|
||||
CONFIG_NFSD_V3=y
|
||||
# CONFIG_NFSD_V3_ACL is not set
|
||||
CONFIG_NFSD_TCP=y
|
||||
CONFIG_ROOT_NFS=y
|
||||
CONFIG_LOCKD=y
|
||||
CONFIG_LOCKD_V4=y
|
||||
CONFIG_EXPORTFS=y
|
||||
|
@ -962,10 +1037,6 @@ CONFIG_SMB_FS=y
|
|||
#
|
||||
# CONFIG_PARTITION_ADVANCED is not set
|
||||
CONFIG_MSDOS_PARTITION=y
|
||||
|
||||
#
|
||||
# Native Language Support
|
||||
#
|
||||
CONFIG_NLS=y
|
||||
CONFIG_NLS_DEFAULT="iso8859-1"
|
||||
CONFIG_NLS_CODEPAGE_437=m
|
||||
|
@ -1011,7 +1082,9 @@ CONFIG_NLS_UTF8=m
|
|||
# Kernel hacking
|
||||
#
|
||||
# CONFIG_PRINTK_TIME is not set
|
||||
CONFIG_ENABLE_WARN_DEPRECATED=y
|
||||
CONFIG_ENABLE_MUST_CHECK=y
|
||||
CONFIG_FRAME_WARN=1024
|
||||
CONFIG_MAGIC_SYSRQ=y
|
||||
# CONFIG_UNUSED_SYMBOLS is not set
|
||||
# CONFIG_DEBUG_FS is not set
|
||||
|
@ -1019,9 +1092,12 @@ CONFIG_HEADERS_CHECK=y
|
|||
CONFIG_DEBUG_KERNEL=y
|
||||
# CONFIG_DEBUG_SHIRQ is not set
|
||||
CONFIG_DETECT_SOFTLOCKUP=y
|
||||
# CONFIG_BOOTPARAM_SOFTLOCKUP_PANIC is not set
|
||||
CONFIG_BOOTPARAM_SOFTLOCKUP_PANIC_VALUE=0
|
||||
CONFIG_SCHED_DEBUG=y
|
||||
# CONFIG_SCHEDSTATS is not set
|
||||
# CONFIG_TIMER_STATS is not set
|
||||
# CONFIG_DEBUG_OBJECTS is not set
|
||||
# CONFIG_DEBUG_SLAB is not set
|
||||
# CONFIG_DEBUG_RT_MUTEXES is not set
|
||||
# CONFIG_RT_MUTEX_TESTER is not set
|
||||
|
@ -1033,10 +1109,29 @@ CONFIG_SCHED_DEBUG=y
|
|||
CONFIG_DEBUG_BUGVERBOSE=y
|
||||
# CONFIG_DEBUG_INFO is not set
|
||||
# CONFIG_DEBUG_VM is not set
|
||||
# CONFIG_DEBUG_WRITECOUNT is not set
|
||||
CONFIG_DEBUG_MEMORY_INIT=y
|
||||
# CONFIG_DEBUG_LIST is not set
|
||||
CONFIG_FORCED_INLINING=y
|
||||
# CONFIG_DEBUG_SG is not set
|
||||
# CONFIG_DEBUG_NOTIFIERS is not set
|
||||
# CONFIG_BOOT_PRINTK_DELAY is not set
|
||||
# CONFIG_RCU_TORTURE_TEST is not set
|
||||
# CONFIG_RCU_CPU_STALL_DETECTOR is not set
|
||||
# CONFIG_BACKTRACE_SELF_TEST is not set
|
||||
# CONFIG_DEBUG_BLOCK_EXT_DEVT is not set
|
||||
# CONFIG_FAULT_INJECTION is not set
|
||||
# CONFIG_SYSCTL_SYSCALL_CHECK is not set
|
||||
|
||||
#
|
||||
# Tracers
|
||||
#
|
||||
# CONFIG_SCHED_TRACER is not set
|
||||
# CONFIG_CONTEXT_SWITCH_TRACER is not set
|
||||
# CONFIG_BOOT_TRACER is not set
|
||||
# CONFIG_TRACE_BRANCH_PROFILING is not set
|
||||
# CONFIG_BUILD_DOCSRC is not set
|
||||
# CONFIG_DYNAMIC_PRINTK_DEBUG is not set
|
||||
# CONFIG_SAMPLES is not set
|
||||
# CONFIG_DEBUG_RODATA is not set
|
||||
|
||||
#
|
||||
|
@ -1044,52 +1139,108 @@ CONFIG_FORCED_INLINING=y
|
|||
#
|
||||
# CONFIG_KEYS is not set
|
||||
CONFIG_SECURITY=y
|
||||
# CONFIG_SECURITYFS is not set
|
||||
# CONFIG_SECURITY_NETWORK is not set
|
||||
CONFIG_SECURITY_CAPABILITIES=y
|
||||
# CONFIG_SECURITY_PATH is not set
|
||||
# CONFIG_SECURITY_FILE_CAPABILITIES is not set
|
||||
CONFIG_SECURITY_DEFAULT_MMAP_MIN_ADDR=0
|
||||
CONFIG_CRYPTO=y
|
||||
|
||||
#
|
||||
# Crypto core or helper
|
||||
#
|
||||
# CONFIG_CRYPTO_FIPS is not set
|
||||
CONFIG_CRYPTO_ALGAPI=y
|
||||
CONFIG_CRYPTO_ALGAPI2=y
|
||||
CONFIG_CRYPTO_AEAD2=y
|
||||
CONFIG_CRYPTO_BLKCIPHER=y
|
||||
CONFIG_CRYPTO_BLKCIPHER2=y
|
||||
CONFIG_CRYPTO_HASH2=y
|
||||
CONFIG_CRYPTO_RNG2=y
|
||||
CONFIG_CRYPTO_MANAGER=y
|
||||
# CONFIG_CRYPTO_HMAC is not set
|
||||
CONFIG_CRYPTO_MANAGER2=y
|
||||
# CONFIG_CRYPTO_NULL is not set
|
||||
# CONFIG_CRYPTO_CRYPTD is not set
|
||||
# CONFIG_CRYPTO_AUTHENC is not set
|
||||
# CONFIG_CRYPTO_TEST is not set
|
||||
|
||||
#
|
||||
# Authenticated Encryption with Associated Data
|
||||
#
|
||||
# CONFIG_CRYPTO_CCM is not set
|
||||
# CONFIG_CRYPTO_GCM is not set
|
||||
# CONFIG_CRYPTO_SEQIV is not set
|
||||
|
||||
#
|
||||
# Block modes
|
||||
#
|
||||
CONFIG_CRYPTO_CBC=y
|
||||
# CONFIG_CRYPTO_CTR is not set
|
||||
# CONFIG_CRYPTO_CTS is not set
|
||||
# CONFIG_CRYPTO_ECB is not set
|
||||
# CONFIG_CRYPTO_PCBC is not set
|
||||
|
||||
#
|
||||
# Hash modes
|
||||
#
|
||||
# CONFIG_CRYPTO_HMAC is not set
|
||||
|
||||
#
|
||||
# Digest
|
||||
#
|
||||
# CONFIG_CRYPTO_CRC32C is not set
|
||||
# CONFIG_CRYPTO_MD4 is not set
|
||||
# CONFIG_CRYPTO_MD5 is not set
|
||||
# CONFIG_CRYPTO_MICHAEL_MIC is not set
|
||||
# CONFIG_CRYPTO_RMD128 is not set
|
||||
# CONFIG_CRYPTO_RMD160 is not set
|
||||
# CONFIG_CRYPTO_RMD256 is not set
|
||||
# CONFIG_CRYPTO_RMD320 is not set
|
||||
# CONFIG_CRYPTO_SHA1 is not set
|
||||
# CONFIG_CRYPTO_SHA256 is not set
|
||||
# CONFIG_CRYPTO_SHA512 is not set
|
||||
# CONFIG_CRYPTO_WP512 is not set
|
||||
# CONFIG_CRYPTO_TGR192 is not set
|
||||
# CONFIG_CRYPTO_ECB is not set
|
||||
CONFIG_CRYPTO_CBC=y
|
||||
# CONFIG_CRYPTO_PCBC is not set
|
||||
# CONFIG_CRYPTO_CRYPTD is not set
|
||||
# CONFIG_CRYPTO_DES is not set
|
||||
# CONFIG_CRYPTO_FCRYPT is not set
|
||||
# CONFIG_CRYPTO_BLOWFISH is not set
|
||||
# CONFIG_CRYPTO_TWOFISH is not set
|
||||
# CONFIG_CRYPTO_SERPENT is not set
|
||||
# CONFIG_CRYPTO_WP512 is not set
|
||||
|
||||
#
|
||||
# Ciphers
|
||||
#
|
||||
# CONFIG_CRYPTO_AES is not set
|
||||
# CONFIG_CRYPTO_ANUBIS is not set
|
||||
# CONFIG_CRYPTO_ARC4 is not set
|
||||
# CONFIG_CRYPTO_BLOWFISH is not set
|
||||
# CONFIG_CRYPTO_CAMELLIA is not set
|
||||
# CONFIG_CRYPTO_CAST5 is not set
|
||||
# CONFIG_CRYPTO_CAST6 is not set
|
||||
# CONFIG_CRYPTO_TEA is not set
|
||||
# CONFIG_CRYPTO_ARC4 is not set
|
||||
# CONFIG_CRYPTO_DES is not set
|
||||
# CONFIG_CRYPTO_FCRYPT is not set
|
||||
# CONFIG_CRYPTO_KHAZAD is not set
|
||||
# CONFIG_CRYPTO_ANUBIS is not set
|
||||
# CONFIG_CRYPTO_SEED is not set
|
||||
# CONFIG_CRYPTO_SERPENT is not set
|
||||
# CONFIG_CRYPTO_TEA is not set
|
||||
# CONFIG_CRYPTO_TWOFISH is not set
|
||||
|
||||
#
|
||||
# Compression
|
||||
#
|
||||
# CONFIG_CRYPTO_DEFLATE is not set
|
||||
# CONFIG_CRYPTO_MICHAEL_MIC is not set
|
||||
# CONFIG_CRYPTO_CRC32C is not set
|
||||
# CONFIG_CRYPTO_CAMELLIA is not set
|
||||
# CONFIG_CRYPTO_TEST is not set
|
||||
# CONFIG_CRYPTO_AUTHENC is not set
|
||||
# CONFIG_CRYPTO_LZO is not set
|
||||
|
||||
#
|
||||
# Random Number Generation
|
||||
#
|
||||
# CONFIG_CRYPTO_ANSI_CPRNG is not set
|
||||
CONFIG_CRYPTO_HW=y
|
||||
# CONFIG_CRYPTO_DEV_HIFN_795X is not set
|
||||
|
||||
#
|
||||
# Library routines
|
||||
#
|
||||
CONFIG_BITREVERSE=y
|
||||
CONFIG_GENERIC_FIND_LAST_BIT=y
|
||||
# CONFIG_CRC_CCITT is not set
|
||||
# CONFIG_CRC16 is not set
|
||||
# CONFIG_CRC_T10DIF is not set
|
||||
# CONFIG_CRC_ITU_T is not set
|
||||
CONFIG_CRC32=y
|
||||
# CONFIG_CRC7 is not set
|
||||
|
|
File diff suppressed because it is too large
Load diff
File diff suppressed because it is too large
Load diff
|
@ -137,7 +137,6 @@ int hpux_getdents(unsigned int fd, struct hpux_dirent __user *dirent, unsigned i
|
|||
error = count - buf.count;
|
||||
}
|
||||
|
||||
out_putf:
|
||||
fput(file);
|
||||
out:
|
||||
return error;
|
||||
|
|
|
@ -79,6 +79,7 @@
|
|||
|
||||
#include <asm/asm-offsets.h>
|
||||
#include <asm/page.h>
|
||||
#include <asm/types.h>
|
||||
|
||||
#include <asm/asmregs.h>
|
||||
|
||||
|
@ -129,27 +130,27 @@
|
|||
|
||||
/* Shift Left - note the r and t can NOT be the same! */
|
||||
.macro shl r, sa, t
|
||||
dep,z \r, 31-\sa, 32-\sa, \t
|
||||
dep,z \r, 31-(\sa), 32-(\sa), \t
|
||||
.endm
|
||||
|
||||
/* The PA 2.0 shift left */
|
||||
.macro shlw r, sa, t
|
||||
depw,z \r, 31-\sa, 32-\sa, \t
|
||||
depw,z \r, 31-(\sa), 32-(\sa), \t
|
||||
.endm
|
||||
|
||||
/* And the PA 2.0W shift left */
|
||||
.macro shld r, sa, t
|
||||
depd,z \r, 63-\sa, 64-\sa, \t
|
||||
depd,z \r, 63-(\sa), 64-(\sa), \t
|
||||
.endm
|
||||
|
||||
/* Shift Right - note the r and t can NOT be the same! */
|
||||
.macro shr r, sa, t
|
||||
extru \r, 31-\sa, 32-\sa, \t
|
||||
extru \r, 31-(\sa), 32-(\sa), \t
|
||||
.endm
|
||||
|
||||
/* pa20w version of shift right */
|
||||
.macro shrd r, sa, t
|
||||
extrd,u \r, 63-\sa, 64-\sa, \t
|
||||
extrd,u \r, 63-(\sa), 64-(\sa), \t
|
||||
.endm
|
||||
|
||||
/* load 32-bit 'value' into 'reg' compensating for the ldil
|
||||
|
|
|
@ -174,15 +174,48 @@ static inline void __raw_writeq(unsigned long long b, volatile void __iomem *add
|
|||
*(volatile unsigned long long __force *) addr = b;
|
||||
}
|
||||
|
||||
/* readb can never be const, so use __fswab instead of le*_to_cpu */
|
||||
#define readb(addr) __raw_readb(addr)
|
||||
#define readw(addr) le16_to_cpu(__raw_readw(addr))
|
||||
#define readl(addr) le32_to_cpu(__raw_readl(addr))
|
||||
#define readq(addr) le64_to_cpu(__raw_readq(addr))
|
||||
#define writeb(b, addr) __raw_writeb(b, addr)
|
||||
#define writew(b, addr) __raw_writew(cpu_to_le16(b), addr)
|
||||
#define writel(b, addr) __raw_writel(cpu_to_le32(b), addr)
|
||||
#define writeq(b, addr) __raw_writeq(cpu_to_le64(b), addr)
|
||||
static inline unsigned char readb(const volatile void __iomem *addr)
|
||||
{
|
||||
return __raw_readb(addr);
|
||||
}
|
||||
static inline unsigned short readw(const volatile void __iomem *addr)
|
||||
{
|
||||
return le16_to_cpu(__raw_readw(addr));
|
||||
}
|
||||
static inline unsigned int readl(const volatile void __iomem *addr)
|
||||
{
|
||||
return le32_to_cpu(__raw_readl(addr));
|
||||
}
|
||||
static inline unsigned long long readq(const volatile void __iomem *addr)
|
||||
{
|
||||
return le64_to_cpu(__raw_readq(addr));
|
||||
}
|
||||
|
||||
static inline void writeb(unsigned char b, volatile void __iomem *addr)
|
||||
{
|
||||
__raw_writeb(b, addr);
|
||||
}
|
||||
static inline void writew(unsigned short w, volatile void __iomem *addr)
|
||||
{
|
||||
__raw_writew(cpu_to_le16(w), addr);
|
||||
}
|
||||
static inline void writel(unsigned int l, volatile void __iomem *addr)
|
||||
{
|
||||
__raw_writel(cpu_to_le32(l), addr);
|
||||
}
|
||||
static inline void writeq(unsigned long long q, volatile void __iomem *addr)
|
||||
{
|
||||
__raw_writeq(cpu_to_le64(q), addr);
|
||||
}
|
||||
|
||||
#define readb readb
|
||||
#define readw readw
|
||||
#define readl readl
|
||||
#define readq readq
|
||||
#define writeb writeb
|
||||
#define writew writew
|
||||
#define writel writel
|
||||
#define writeq writeq
|
||||
|
||||
#define readb_relaxed(addr) readb(addr)
|
||||
#define readw_relaxed(addr) readw(addr)
|
||||
|
|
|
@ -49,7 +49,7 @@ extern unsigned long txn_alloc_addr(unsigned int);
|
|||
extern unsigned long txn_affinity_addr(unsigned int irq, int cpu);
|
||||
|
||||
extern int cpu_claim_irq(unsigned int irq, struct irq_chip *, void *);
|
||||
extern int cpu_check_affinity(unsigned int irq, cpumask_t *dest);
|
||||
extern int cpu_check_affinity(unsigned int irq, const struct cpumask *dest);
|
||||
|
||||
/* soft power switch support (power.c) */
|
||||
extern struct tasklet_struct power_tasklet;
|
||||
|
|
|
@ -241,6 +241,7 @@ unsigned long copy_in_user(void __user *dst, const void __user *src, unsigned lo
|
|||
#define __copy_to_user_inatomic __copy_to_user
|
||||
#define __copy_from_user_inatomic __copy_from_user
|
||||
|
||||
struct pt_regs;
|
||||
int fixup_exception(struct pt_regs *regs);
|
||||
|
||||
#endif /* __PARISC_UACCESS_H */
|
||||
|
|
|
@ -551,10 +551,7 @@ void flush_cache_range(struct vm_area_struct *vma,
|
|||
{
|
||||
int sr3;
|
||||
|
||||
if (!vma->vm_mm->context) {
|
||||
BUG();
|
||||
return;
|
||||
}
|
||||
BUG_ON(!vma->vm_mm->context);
|
||||
|
||||
sr3 = mfsp(3);
|
||||
if (vma->vm_mm->context == sr3) {
|
||||
|
|
|
@ -368,7 +368,7 @@
|
|||
* abstractions for the macros */
|
||||
.macro EXTR reg1,start,length,reg2
|
||||
#ifdef CONFIG_64BIT
|
||||
extrd,u \reg1,32+\start,\length,\reg2
|
||||
extrd,u \reg1,32+(\start),\length,\reg2
|
||||
#else
|
||||
extrw,u \reg1,\start,\length,\reg2
|
||||
#endif
|
||||
|
@ -376,7 +376,7 @@
|
|||
|
||||
.macro DEP reg1,start,length,reg2
|
||||
#ifdef CONFIG_64BIT
|
||||
depd \reg1,32+\start,\length,\reg2
|
||||
depd \reg1,32+(\start),\length,\reg2
|
||||
#else
|
||||
depw \reg1,\start,\length,\reg2
|
||||
#endif
|
||||
|
@ -384,7 +384,7 @@
|
|||
|
||||
.macro DEPI val,start,length,reg
|
||||
#ifdef CONFIG_64BIT
|
||||
depdi \val,32+\start,\length,\reg
|
||||
depdi \val,32+(\start),\length,\reg
|
||||
#else
|
||||
depwi \val,\start,\length,\reg
|
||||
#endif
|
||||
|
|
|
@ -151,7 +151,7 @@ static void convert_to_wide(unsigned long *addr)
|
|||
}
|
||||
|
||||
#ifdef CONFIG_64BIT
|
||||
void __init set_firmware_width_unlocked(void)
|
||||
void __cpuinit set_firmware_width_unlocked(void)
|
||||
{
|
||||
int ret;
|
||||
|
||||
|
@ -168,7 +168,7 @@ void __init set_firmware_width_unlocked(void)
|
|||
* This function must be called before any pdc_* function that uses the
|
||||
* convert_to_wide function.
|
||||
*/
|
||||
void __init set_firmware_width(void)
|
||||
void __cpuinit set_firmware_width(void)
|
||||
{
|
||||
unsigned long flags;
|
||||
spin_lock_irqsave(&pdc_lock, flags);
|
||||
|
@ -176,11 +176,11 @@ void __init set_firmware_width(void)
|
|||
spin_unlock_irqrestore(&pdc_lock, flags);
|
||||
}
|
||||
#else
|
||||
void __init set_firmware_width_unlocked(void) {
|
||||
void __cpuinit set_firmware_width_unlocked(void) {
|
||||
return;
|
||||
}
|
||||
|
||||
void __init set_firmware_width(void) {
|
||||
void __cpuinit set_firmware_width(void) {
|
||||
return;
|
||||
}
|
||||
#endif /*CONFIG_64BIT*/
|
||||
|
@ -302,7 +302,7 @@ int pdc_chassis_warn(unsigned long *warn)
|
|||
return retval;
|
||||
}
|
||||
|
||||
int __init pdc_coproc_cfg_unlocked(struct pdc_coproc_cfg *pdc_coproc_info)
|
||||
int __cpuinit pdc_coproc_cfg_unlocked(struct pdc_coproc_cfg *pdc_coproc_info)
|
||||
{
|
||||
int ret;
|
||||
|
||||
|
@ -323,7 +323,7 @@ int __init pdc_coproc_cfg_unlocked(struct pdc_coproc_cfg *pdc_coproc_info)
|
|||
* This PDC call returns the presence and status of all the coprocessors
|
||||
* attached to the processor.
|
||||
*/
|
||||
int __init pdc_coproc_cfg(struct pdc_coproc_cfg *pdc_coproc_info)
|
||||
int __cpuinit pdc_coproc_cfg(struct pdc_coproc_cfg *pdc_coproc_info)
|
||||
{
|
||||
int ret;
|
||||
unsigned long flags;
|
||||
|
|
|
@ -112,7 +112,7 @@ void cpu_end_irq(unsigned int irq)
|
|||
}
|
||||
|
||||
#ifdef CONFIG_SMP
|
||||
int cpu_check_affinity(unsigned int irq, cpumask_t *dest)
|
||||
int cpu_check_affinity(unsigned int irq, const struct cpumask *dest)
|
||||
{
|
||||
int cpu_dest;
|
||||
|
||||
|
@ -120,23 +120,25 @@ int cpu_check_affinity(unsigned int irq, cpumask_t *dest)
|
|||
if (CHECK_IRQ_PER_CPU(irq)) {
|
||||
/* Bad linux design decision. The mask has already
|
||||
* been set; we must reset it */
|
||||
irq_desc[irq].affinity = CPU_MASK_ALL;
|
||||
cpumask_setall(&irq_desc[irq].affinity);
|
||||
return -EINVAL;
|
||||
}
|
||||
|
||||
/* whatever mask they set, we just allow one CPU */
|
||||
cpu_dest = first_cpu(*dest);
|
||||
*dest = cpumask_of_cpu(cpu_dest);
|
||||
|
||||
return 0;
|
||||
return cpu_dest;
|
||||
}
|
||||
|
||||
static void cpu_set_affinity_irq(unsigned int irq, const struct cpumask *dest)
|
||||
{
|
||||
if (cpu_check_affinity(irq, dest))
|
||||
int cpu_dest;
|
||||
|
||||
cpu_dest = cpu_check_affinity(irq, dest);
|
||||
if (cpu_dest < 0)
|
||||
return;
|
||||
|
||||
irq_desc[irq].affinity = *dest;
|
||||
cpumask_copy(&irq_desc[irq].affinity, &cpumask_of_cpu(cpu_dest));
|
||||
}
|
||||
#endif
|
||||
|
||||
|
@ -295,7 +297,7 @@ int txn_alloc_irq(unsigned int bits_wide)
|
|||
unsigned long txn_affinity_addr(unsigned int irq, int cpu)
|
||||
{
|
||||
#ifdef CONFIG_SMP
|
||||
irq_desc[irq].affinity = cpumask_of_cpu(cpu);
|
||||
cpumask_copy(&irq_desc[irq].affinity, cpumask_of(cpu));
|
||||
#endif
|
||||
|
||||
return per_cpu(cpu_data, cpu).txn_addr;
|
||||
|
@ -352,7 +354,7 @@ void do_cpu_irq_mask(struct pt_regs *regs)
|
|||
irq = eirr_to_irq(eirr_val);
|
||||
|
||||
#ifdef CONFIG_SMP
|
||||
dest = irq_desc[irq].affinity;
|
||||
cpumask_copy(&dest, &irq_desc[irq].affinity);
|
||||
if (CHECK_IRQ_PER_CPU(irq_desc[irq].status) &&
|
||||
!cpu_isset(smp_processor_id(), dest)) {
|
||||
int cpu = first_cpu(dest);
|
||||
|
|
|
@ -447,10 +447,7 @@ static void pa11_dma_free_consistent (struct device *dev, size_t size, void *vad
|
|||
|
||||
static dma_addr_t pa11_dma_map_single(struct device *dev, void *addr, size_t size, enum dma_data_direction direction)
|
||||
{
|
||||
if (direction == DMA_NONE) {
|
||||
printk(KERN_ERR "pa11_dma_map_single(PCI_DMA_NONE) called by %p\n", __builtin_return_address(0));
|
||||
BUG();
|
||||
}
|
||||
BUG_ON(direction == DMA_NONE);
|
||||
|
||||
flush_kernel_dcache_range((unsigned long) addr, size);
|
||||
return virt_to_phys(addr);
|
||||
|
@ -458,10 +455,7 @@ static dma_addr_t pa11_dma_map_single(struct device *dev, void *addr, size_t siz
|
|||
|
||||
static void pa11_dma_unmap_single(struct device *dev, dma_addr_t dma_handle, size_t size, enum dma_data_direction direction)
|
||||
{
|
||||
if (direction == DMA_NONE) {
|
||||
printk(KERN_ERR "pa11_dma_unmap_single(PCI_DMA_NONE) called by %p\n", __builtin_return_address(0));
|
||||
BUG();
|
||||
}
|
||||
BUG_ON(direction == DMA_NONE);
|
||||
|
||||
if (direction == DMA_TO_DEVICE)
|
||||
return;
|
||||
|
@ -480,8 +474,7 @@ static int pa11_dma_map_sg(struct device *dev, struct scatterlist *sglist, int n
|
|||
{
|
||||
int i;
|
||||
|
||||
if (direction == DMA_NONE)
|
||||
BUG();
|
||||
BUG_ON(direction == DMA_NONE);
|
||||
|
||||
for (i = 0; i < nents; i++, sglist++ ) {
|
||||
unsigned long vaddr = sg_virt_addr(sglist);
|
||||
|
@ -496,8 +489,7 @@ static void pa11_dma_unmap_sg(struct device *dev, struct scatterlist *sglist, in
|
|||
{
|
||||
int i;
|
||||
|
||||
if (direction == DMA_NONE)
|
||||
BUG();
|
||||
BUG_ON(direction == DMA_NONE);
|
||||
|
||||
if (direction == DMA_TO_DEVICE)
|
||||
return;
|
||||
|
@ -511,16 +503,14 @@ static void pa11_dma_unmap_sg(struct device *dev, struct scatterlist *sglist, in
|
|||
|
||||
static void pa11_dma_sync_single_for_cpu(struct device *dev, dma_addr_t dma_handle, unsigned long offset, size_t size, enum dma_data_direction direction)
|
||||
{
|
||||
if (direction == DMA_NONE)
|
||||
BUG();
|
||||
BUG_ON(direction == DMA_NONE);
|
||||
|
||||
flush_kernel_dcache_range((unsigned long) phys_to_virt(dma_handle) + offset, size);
|
||||
}
|
||||
|
||||
static void pa11_dma_sync_single_for_device(struct device *dev, dma_addr_t dma_handle, unsigned long offset, size_t size, enum dma_data_direction direction)
|
||||
{
|
||||
if (direction == DMA_NONE)
|
||||
BUG();
|
||||
BUG_ON(direction == DMA_NONE);
|
||||
|
||||
flush_kernel_dcache_range((unsigned long) phys_to_virt(dma_handle) + offset, size);
|
||||
}
|
||||
|
|
|
@ -304,10 +304,8 @@ static void __init setup_bootmem(void)
|
|||
*/
|
||||
max_low_pfn = max_pfn;
|
||||
|
||||
if ((bootmap_pfn - bootmap_start_pfn) != bootmap_pages) {
|
||||
printk(KERN_WARNING "WARNING! bootmap sizing is messed up!\n");
|
||||
BUG();
|
||||
}
|
||||
/* bootmap sizing messed up? */
|
||||
BUG_ON((bootmap_pfn - bootmap_start_pfn) != bootmap_pages);
|
||||
|
||||
/* reserve PAGE0 pdc memory, kernel text/data/bss & bootmap */
|
||||
|
||||
|
|
|
@ -193,6 +193,9 @@ static int __kprobes can_boost(kprobe_opcode_t *opcodes)
|
|||
kprobe_opcode_t opcode;
|
||||
kprobe_opcode_t *orig_opcodes = opcodes;
|
||||
|
||||
if (search_exception_tables(opcodes))
|
||||
return 0; /* Page fault may occur on this address. */
|
||||
|
||||
retry:
|
||||
if (opcodes - orig_opcodes > MAX_INSN_SIZE - 1)
|
||||
return 0;
|
||||
|
|
|
@ -274,30 +274,43 @@ static unsigned long pit_calibrate_tsc(u32 latch, unsigned long ms, int loopmin)
|
|||
* use the TSC value at the transitions to calculate a pretty
|
||||
* good value for the TSC frequencty.
|
||||
*/
|
||||
static inline int pit_expect_msb(unsigned char val)
|
||||
static inline int pit_expect_msb(unsigned char val, u64 *tscp, unsigned long *deltap)
|
||||
{
|
||||
int count = 0;
|
||||
int count;
|
||||
u64 tsc = 0;
|
||||
|
||||
for (count = 0; count < 50000; count++) {
|
||||
/* Ignore LSB */
|
||||
inb(0x42);
|
||||
if (inb(0x42) != val)
|
||||
break;
|
||||
tsc = get_cycles();
|
||||
}
|
||||
return count > 50;
|
||||
*deltap = get_cycles() - tsc;
|
||||
*tscp = tsc;
|
||||
|
||||
/*
|
||||
* We require _some_ success, but the quality control
|
||||
* will be based on the error terms on the TSC values.
|
||||
*/
|
||||
return count > 5;
|
||||
}
|
||||
|
||||
/*
|
||||
* How many MSB values do we want to see? We aim for a
|
||||
* 15ms calibration, which assuming a 2us counter read
|
||||
* error should give us roughly 150 ppm precision for
|
||||
* the calibration.
|
||||
* How many MSB values do we want to see? We aim for
|
||||
* a maximum error rate of 500ppm (in practice the
|
||||
* real error is much smaller), but refuse to spend
|
||||
* more than 25ms on it.
|
||||
*/
|
||||
#define QUICK_PIT_MS 15
|
||||
#define QUICK_PIT_ITERATIONS (QUICK_PIT_MS * PIT_TICK_RATE / 1000 / 256)
|
||||
#define MAX_QUICK_PIT_MS 25
|
||||
#define MAX_QUICK_PIT_ITERATIONS (MAX_QUICK_PIT_MS * PIT_TICK_RATE / 1000 / 256)
|
||||
|
||||
static unsigned long quick_pit_calibrate(void)
|
||||
{
|
||||
int i;
|
||||
u64 tsc, delta;
|
||||
unsigned long d1, d2;
|
||||
|
||||
/* Set the Gate high, disable speaker */
|
||||
outb((inb(0x61) & ~0x02) | 0x01, 0x61);
|
||||
|
||||
|
@ -316,45 +329,52 @@ static unsigned long quick_pit_calibrate(void)
|
|||
outb(0xff, 0x42);
|
||||
outb(0xff, 0x42);
|
||||
|
||||
if (pit_expect_msb(0xff)) {
|
||||
int i;
|
||||
u64 t1, t2, delta;
|
||||
unsigned char expect = 0xfe;
|
||||
/*
|
||||
* The PIT starts counting at the next edge, so we
|
||||
* need to delay for a microsecond. The easiest way
|
||||
* to do that is to just read back the 16-bit counter
|
||||
* once from the PIT.
|
||||
*/
|
||||
inb(0x42);
|
||||
inb(0x42);
|
||||
|
||||
t1 = get_cycles();
|
||||
for (i = 0; i < QUICK_PIT_ITERATIONS; i++, expect--) {
|
||||
if (!pit_expect_msb(expect))
|
||||
goto failed;
|
||||
if (pit_expect_msb(0xff, &tsc, &d1)) {
|
||||
for (i = 1; i <= MAX_QUICK_PIT_ITERATIONS; i++) {
|
||||
if (!pit_expect_msb(0xff-i, &delta, &d2))
|
||||
break;
|
||||
|
||||
/*
|
||||
* Iterate until the error is less than 500 ppm
|
||||
*/
|
||||
delta -= tsc;
|
||||
if (d1+d2 < delta >> 11)
|
||||
goto success;
|
||||
}
|
||||
t2 = get_cycles();
|
||||
|
||||
/*
|
||||
* Make sure we can rely on the second TSC timestamp:
|
||||
*/
|
||||
if (!pit_expect_msb(expect))
|
||||
goto failed;
|
||||
|
||||
/*
|
||||
* Ok, if we get here, then we've seen the
|
||||
* MSB of the PIT decrement QUICK_PIT_ITERATIONS
|
||||
* times, and each MSB had many hits, so we never
|
||||
* had any sudden jumps.
|
||||
*
|
||||
* As a result, we can depend on there not being
|
||||
* any odd delays anywhere, and the TSC reads are
|
||||
* reliable.
|
||||
*
|
||||
* kHz = ticks / time-in-seconds / 1000;
|
||||
* kHz = (t2 - t1) / (QPI * 256 / PIT_TICK_RATE) / 1000
|
||||
* kHz = ((t2 - t1) * PIT_TICK_RATE) / (QPI * 256 * 1000)
|
||||
*/
|
||||
delta = (t2 - t1)*PIT_TICK_RATE;
|
||||
do_div(delta, QUICK_PIT_ITERATIONS*256*1000);
|
||||
printk("Fast TSC calibration using PIT\n");
|
||||
return delta;
|
||||
}
|
||||
failed:
|
||||
printk("Fast TSC calibration failed\n");
|
||||
return 0;
|
||||
|
||||
success:
|
||||
/*
|
||||
* Ok, if we get here, then we've seen the
|
||||
* MSB of the PIT decrement 'i' times, and the
|
||||
* error has shrunk to less than 500 ppm.
|
||||
*
|
||||
* As a result, we can depend on there not being
|
||||
* any odd delays anywhere, and the TSC reads are
|
||||
* reliable (within the error). We also adjust the
|
||||
* delta to the middle of the error bars, just
|
||||
* because it looks nicer.
|
||||
*
|
||||
* kHz = ticks / time-in-seconds / 1000;
|
||||
* kHz = (t2 - t1) / (I * 256 / PIT_TICK_RATE) / 1000
|
||||
* kHz = ((t2 - t1) * PIT_TICK_RATE) / (I * 256 * 1000)
|
||||
*/
|
||||
delta += (long)(d2 - d1)/2;
|
||||
delta *= PIT_TICK_RATE;
|
||||
do_div(delta, i*256*1000);
|
||||
printk("Fast TSC calibration using PIT\n");
|
||||
return delta;
|
||||
}
|
||||
|
||||
/**
|
||||
|
|
|
@ -758,8 +758,7 @@ static int __init acpi_bus_init(void)
|
|||
acpi_status status = AE_OK;
|
||||
extern acpi_status acpi_os_initialize1(void);
|
||||
|
||||
|
||||
status = acpi_os_initialize1();
|
||||
acpi_os_initialize1();
|
||||
|
||||
status =
|
||||
acpi_enable_subsystem(ACPI_NO_HARDWARE_INIT | ACPI_NO_ACPI_ENABLE);
|
||||
|
@ -769,12 +768,6 @@ static int __init acpi_bus_init(void)
|
|||
goto error1;
|
||||
}
|
||||
|
||||
if (ACPI_FAILURE(status)) {
|
||||
printk(KERN_ERR PREFIX
|
||||
"Unable to initialize ACPI OS objects\n");
|
||||
goto error1;
|
||||
}
|
||||
|
||||
/*
|
||||
* ACPI 2.0 requires the EC driver to be loaded and work before
|
||||
* the EC device is found in the namespace (i.e. before acpi_initialize_objects()
|
||||
|
|
|
@ -277,7 +277,7 @@ int acpi_get_node(acpi_handle *handle)
|
|||
int pxm, node = -1;
|
||||
|
||||
pxm = acpi_get_pxm(handle);
|
||||
if (pxm >= 0)
|
||||
if (pxm >= 0 && pxm < MAX_PXM_DOMAINS)
|
||||
node = acpi_map_pxm_to_node(pxm);
|
||||
|
||||
return node;
|
||||
|
|
|
@ -1317,54 +1317,6 @@ acpi_os_validate_interface (char *interface)
|
|||
return AE_SUPPORT;
|
||||
}
|
||||
|
||||
#ifdef CONFIG_X86
|
||||
|
||||
struct aml_port_desc {
|
||||
uint start;
|
||||
uint end;
|
||||
char* name;
|
||||
char warned;
|
||||
};
|
||||
|
||||
static struct aml_port_desc aml_invalid_port_list[] = {
|
||||
{0x20, 0x21, "PIC0", 0},
|
||||
{0xA0, 0xA1, "PIC1", 0},
|
||||
{0x4D0, 0x4D1, "ELCR", 0}
|
||||
};
|
||||
|
||||
/*
|
||||
* valid_aml_io_address()
|
||||
*
|
||||
* if valid, return true
|
||||
* else invalid, warn once, return false
|
||||
*/
|
||||
static bool valid_aml_io_address(uint address, uint length)
|
||||
{
|
||||
int i;
|
||||
int entries = sizeof(aml_invalid_port_list) / sizeof(struct aml_port_desc);
|
||||
|
||||
for (i = 0; i < entries; ++i) {
|
||||
if ((address >= aml_invalid_port_list[i].start &&
|
||||
address <= aml_invalid_port_list[i].end) ||
|
||||
(address + length >= aml_invalid_port_list[i].start &&
|
||||
address + length <= aml_invalid_port_list[i].end))
|
||||
{
|
||||
if (!aml_invalid_port_list[i].warned)
|
||||
{
|
||||
printk(KERN_ERR "ACPI: Denied BIOS AML access"
|
||||
" to invalid port 0x%x+0x%x (%s)\n",
|
||||
address, length,
|
||||
aml_invalid_port_list[i].name);
|
||||
aml_invalid_port_list[i].warned = 1;
|
||||
}
|
||||
return false; /* invalid */
|
||||
}
|
||||
}
|
||||
return true; /* valid */
|
||||
}
|
||||
#else
|
||||
static inline bool valid_aml_io_address(uint address, uint length) { return true; }
|
||||
#endif
|
||||
/******************************************************************************
|
||||
*
|
||||
* FUNCTION: acpi_os_validate_address
|
||||
|
@ -1394,8 +1346,6 @@ acpi_os_validate_address (
|
|||
|
||||
switch (space_id) {
|
||||
case ACPI_ADR_SPACE_SYSTEM_IO:
|
||||
if (!valid_aml_io_address(address, length))
|
||||
return AE_AML_ILLEGAL_ADDRESS;
|
||||
case ACPI_ADR_SPACE_SYSTEM_MEMORY:
|
||||
/* Only interference checks against SystemIO and SytemMemory
|
||||
are needed */
|
||||
|
|
|
@ -378,6 +378,22 @@ static struct dmi_system_id __initdata acpisleep_dmi_table[] = {
|
|||
DMI_MATCH(DMI_PRODUCT_NAME, "Macmini1,1"),
|
||||
},
|
||||
},
|
||||
{
|
||||
.callback = init_old_suspend_ordering,
|
||||
.ident = "Asus Pundit P1-AH2 (M2N8L motherboard)",
|
||||
.matches = {
|
||||
DMI_MATCH(DMI_BOARD_VENDOR, "ASUSTek Computer INC."),
|
||||
DMI_MATCH(DMI_BOARD_NAME, "M2N8L"),
|
||||
},
|
||||
},
|
||||
{
|
||||
.callback = init_set_sci_en_on_resume,
|
||||
.ident = "Toshiba Satellite L300",
|
||||
.matches = {
|
||||
DMI_MATCH(DMI_SYS_VENDOR, "TOSHIBA"),
|
||||
DMI_MATCH(DMI_PRODUCT_NAME, "Satellite L300"),
|
||||
},
|
||||
},
|
||||
{},
|
||||
};
|
||||
#endif /* CONFIG_SUSPEND */
|
||||
|
|
|
@ -1289,6 +1289,39 @@ static const int *__devinit piix_init_sata_map(struct pci_dev *pdev,
|
|||
return map;
|
||||
}
|
||||
|
||||
static bool piix_no_sidpr(struct ata_host *host)
|
||||
{
|
||||
struct pci_dev *pdev = to_pci_dev(host->dev);
|
||||
|
||||
/*
|
||||
* Samsung DB-P70 only has three ATA ports exposed and
|
||||
* curiously the unconnected first port reports link online
|
||||
* while not responding to SRST protocol causing excessive
|
||||
* detection delay.
|
||||
*
|
||||
* Unfortunately, the system doesn't carry enough DMI
|
||||
* information to identify the machine but does have subsystem
|
||||
* vendor and device set. As it's unclear whether the
|
||||
* subsystem vendor/device is used only for this specific
|
||||
* board, the port can't be disabled solely with the
|
||||
* information; however, turning off SIDPR access works around
|
||||
* the problem. Turn it off.
|
||||
*
|
||||
* This problem is reported in bnc#441240.
|
||||
*
|
||||
* https://bugzilla.novell.com/show_bug.cgi?id=441420
|
||||
*/
|
||||
if (pdev->vendor == PCI_VENDOR_ID_INTEL && pdev->device == 0x2920 &&
|
||||
pdev->subsystem_vendor == PCI_VENDOR_ID_SAMSUNG &&
|
||||
pdev->subsystem_device == 0xb049) {
|
||||
dev_printk(KERN_WARNING, host->dev,
|
||||
"Samsung DB-P70 detected, disabling SIDPR\n");
|
||||
return true;
|
||||
}
|
||||
|
||||
return false;
|
||||
}
|
||||
|
||||
static int __devinit piix_init_sidpr(struct ata_host *host)
|
||||
{
|
||||
struct pci_dev *pdev = to_pci_dev(host->dev);
|
||||
|
@ -1302,6 +1335,10 @@ static int __devinit piix_init_sidpr(struct ata_host *host)
|
|||
if (hpriv->map[i] == IDE)
|
||||
return 0;
|
||||
|
||||
/* is it blacklisted? */
|
||||
if (piix_no_sidpr(host))
|
||||
return 0;
|
||||
|
||||
if (!(host->ports[0]->flags & PIIX_FLAG_SIDPR))
|
||||
return 0;
|
||||
|
||||
|
|
|
@ -2066,6 +2066,7 @@ static int ata_bus_softreset(struct ata_port *ap, unsigned int devmask,
|
|||
iowrite8(ap->ctl | ATA_SRST, ioaddr->ctl_addr);
|
||||
udelay(20); /* FIXME: flush */
|
||||
iowrite8(ap->ctl, ioaddr->ctl_addr);
|
||||
ap->last_ctl = ap->ctl;
|
||||
|
||||
/* wait the port to become ready */
|
||||
return ata_sff_wait_after_reset(&ap->link, devmask, deadline);
|
||||
|
@ -2190,8 +2191,10 @@ void ata_sff_postreset(struct ata_link *link, unsigned int *classes)
|
|||
}
|
||||
|
||||
/* set up device control */
|
||||
if (ap->ioaddr.ctl_addr)
|
||||
if (ap->ioaddr.ctl_addr) {
|
||||
iowrite8(ap->ctl, ap->ioaddr.ctl_addr);
|
||||
ap->last_ctl = ap->ctl;
|
||||
}
|
||||
}
|
||||
EXPORT_SYMBOL_GPL(ata_sff_postreset);
|
||||
|
||||
|
@ -2534,6 +2537,7 @@ void ata_bus_reset(struct ata_port *ap)
|
|||
if (ap->flags & (ATA_FLAG_SATA_RESET | ATA_FLAG_SRST)) {
|
||||
/* set up device control for ATA_FLAG_SATA_RESET */
|
||||
iowrite8(ap->ctl, ioaddr->ctl_addr);
|
||||
ap->last_ctl = ap->ctl;
|
||||
}
|
||||
|
||||
DPRINTK("EXIT\n");
|
||||
|
|
|
@ -2218,12 +2218,13 @@ static irqreturn_t mv_interrupt(int irq, void *dev_instance)
|
|||
else
|
||||
handled = mv_host_intr(host, pending_irqs);
|
||||
}
|
||||
spin_unlock(&host->lock);
|
||||
|
||||
/* for MSI: unmask; interrupt cause bits will retrigger now */
|
||||
if (using_msi)
|
||||
writel(hpriv->main_irq_mask, hpriv->main_irq_mask_addr);
|
||||
|
||||
spin_unlock(&host->lock);
|
||||
|
||||
return IRQ_RETVAL(handled);
|
||||
}
|
||||
|
||||
|
|
|
@ -489,6 +489,28 @@ static void ace_fsm_dostate(struct ace_device *ace)
|
|||
ace->fsm_state, ace->id_req_count);
|
||||
#endif
|
||||
|
||||
/* Verify that there is actually a CF in the slot. If not, then
|
||||
* bail out back to the idle state and wake up all the waiters */
|
||||
status = ace_in32(ace, ACE_STATUS);
|
||||
if ((status & ACE_STATUS_CFDETECT) == 0) {
|
||||
ace->fsm_state = ACE_FSM_STATE_IDLE;
|
||||
ace->media_change = 1;
|
||||
set_capacity(ace->gd, 0);
|
||||
dev_info(ace->dev, "No CF in slot\n");
|
||||
|
||||
/* Drop all pending requests */
|
||||
while ((req = elv_next_request(ace->queue)) != NULL)
|
||||
end_request(req, 0);
|
||||
|
||||
/* Drop back to IDLE state and notify waiters */
|
||||
ace->fsm_state = ACE_FSM_STATE_IDLE;
|
||||
ace->id_result = -EIO;
|
||||
while (ace->id_req_count) {
|
||||
complete(&ace->id_completion);
|
||||
ace->id_req_count--;
|
||||
}
|
||||
}
|
||||
|
||||
switch (ace->fsm_state) {
|
||||
case ACE_FSM_STATE_IDLE:
|
||||
/* See if there is anything to do */
|
||||
|
|
|
@ -359,9 +359,16 @@ parisc_agp_setup(void __iomem *ioc_hpa, void __iomem *lba_hpa)
|
|||
return error;
|
||||
}
|
||||
|
||||
static struct device *next_device(struct klist_iter *i) {
|
||||
struct klist_node * n = klist_next(i);
|
||||
return n ? container_of(n, struct device, knode_parent) : NULL;
|
||||
static int
|
||||
find_quicksilver(struct device *dev, void *data)
|
||||
{
|
||||
struct parisc_device **lba = data;
|
||||
struct parisc_device *padev = to_parisc_device(dev);
|
||||
|
||||
if (IS_QUICKSILVER(padev))
|
||||
*lba = padev;
|
||||
|
||||
return 0;
|
||||
}
|
||||
|
||||
static int
|
||||
|
@ -372,8 +379,6 @@ parisc_agp_init(void)
|
|||
int err = -1;
|
||||
struct parisc_device *sba = NULL, *lba = NULL;
|
||||
struct lba_device *lbadev = NULL;
|
||||
struct device *dev = NULL;
|
||||
struct klist_iter i;
|
||||
|
||||
if (!sba_list)
|
||||
goto out;
|
||||
|
@ -386,13 +391,7 @@ parisc_agp_init(void)
|
|||
}
|
||||
|
||||
/* Now search our Pluto for our precious AGP device... */
|
||||
klist_iter_init(&sba->dev.klist_children, &i);
|
||||
while ((dev = next_device(&i))) {
|
||||
struct parisc_device *padev = to_parisc_device(dev);
|
||||
if (IS_QUICKSILVER(padev))
|
||||
lba = padev;
|
||||
}
|
||||
klist_iter_exit(&i);
|
||||
device_for_each_child(&sba->dev, &lba, find_quicksilver);
|
||||
|
||||
if (!lba) {
|
||||
printk(KERN_INFO DRVPFX "No AGP devices found.\n");
|
||||
|
|
|
@ -140,6 +140,12 @@ static void ide_queue_pc_head(ide_drive_t *drive, struct gendisk *disk,
|
|||
rq->cmd_flags |= REQ_PREEMPT;
|
||||
rq->buffer = (char *)pc;
|
||||
rq->rq_disk = disk;
|
||||
|
||||
if (pc->req_xfer) {
|
||||
rq->data = pc->buf;
|
||||
rq->data_len = pc->req_xfer;
|
||||
}
|
||||
|
||||
memcpy(rq->cmd, pc->c, 12);
|
||||
if (drive->media == ide_tape)
|
||||
rq->cmd[13] = REQ_IDETAPE_PC1;
|
||||
|
@ -159,6 +165,12 @@ int ide_queue_pc_tail(ide_drive_t *drive, struct gendisk *disk,
|
|||
rq = blk_get_request(drive->queue, READ, __GFP_WAIT);
|
||||
rq->cmd_type = REQ_TYPE_SPECIAL;
|
||||
rq->buffer = (char *)pc;
|
||||
|
||||
if (pc->req_xfer) {
|
||||
rq->data = pc->buf;
|
||||
rq->data_len = pc->req_xfer;
|
||||
}
|
||||
|
||||
memcpy(rq->cmd, pc->c, 12);
|
||||
if (drive->media == ide_tape)
|
||||
rq->cmd[13] = REQ_IDETAPE_PC1;
|
||||
|
|
|
@ -128,6 +128,7 @@ int ide_build_sglist(ide_drive_t *drive, struct request *rq)
|
|||
{
|
||||
ide_hwif_t *hwif = drive->hwif;
|
||||
struct scatterlist *sg = hwif->sg_table;
|
||||
int i;
|
||||
|
||||
ide_map_sg(drive, rq);
|
||||
|
||||
|
@ -136,8 +137,13 @@ int ide_build_sglist(ide_drive_t *drive, struct request *rq)
|
|||
else
|
||||
hwif->sg_dma_direction = DMA_TO_DEVICE;
|
||||
|
||||
return dma_map_sg(hwif->dev, sg, hwif->sg_nents,
|
||||
hwif->sg_dma_direction);
|
||||
i = dma_map_sg(hwif->dev, sg, hwif->sg_nents, hwif->sg_dma_direction);
|
||||
if (i) {
|
||||
hwif->orig_sg_nents = hwif->sg_nents;
|
||||
hwif->sg_nents = i;
|
||||
}
|
||||
|
||||
return i;
|
||||
}
|
||||
EXPORT_SYMBOL_GPL(ide_build_sglist);
|
||||
|
||||
|
@ -156,7 +162,7 @@ void ide_destroy_dmatable(ide_drive_t *drive)
|
|||
{
|
||||
ide_hwif_t *hwif = drive->hwif;
|
||||
|
||||
dma_unmap_sg(hwif->dev, hwif->sg_table, hwif->sg_nents,
|
||||
dma_unmap_sg(hwif->dev, hwif->sg_table, hwif->orig_sg_nents,
|
||||
hwif->sg_dma_direction);
|
||||
}
|
||||
EXPORT_SYMBOL_GPL(ide_destroy_dmatable);
|
||||
|
|
|
@ -327,8 +327,10 @@ static ide_startstop_t ide_floppy_do_request(ide_drive_t *drive,
|
|||
return ide_stopped;
|
||||
}
|
||||
|
||||
ide_init_sg_cmd(drive, rq);
|
||||
ide_map_sg(drive, rq);
|
||||
if (blk_fs_request(rq) || pc->req_xfer) {
|
||||
ide_init_sg_cmd(drive, rq);
|
||||
ide_map_sg(drive, rq);
|
||||
}
|
||||
|
||||
pc->sg = hwif->sg_table;
|
||||
pc->sg_cnt = hwif->sg_nents;
|
||||
|
|
|
@ -60,6 +60,7 @@ struct dm_crypt_io {
|
|||
};
|
||||
|
||||
struct dm_crypt_request {
|
||||
struct convert_context *ctx;
|
||||
struct scatterlist sg_in;
|
||||
struct scatterlist sg_out;
|
||||
};
|
||||
|
@ -335,6 +336,18 @@ static void crypt_convert_init(struct crypt_config *cc,
|
|||
init_completion(&ctx->restart);
|
||||
}
|
||||
|
||||
static struct dm_crypt_request *dmreq_of_req(struct crypt_config *cc,
|
||||
struct ablkcipher_request *req)
|
||||
{
|
||||
return (struct dm_crypt_request *)((char *)req + cc->dmreq_start);
|
||||
}
|
||||
|
||||
static struct ablkcipher_request *req_of_dmreq(struct crypt_config *cc,
|
||||
struct dm_crypt_request *dmreq)
|
||||
{
|
||||
return (struct ablkcipher_request *)((char *)dmreq - cc->dmreq_start);
|
||||
}
|
||||
|
||||
static int crypt_convert_block(struct crypt_config *cc,
|
||||
struct convert_context *ctx,
|
||||
struct ablkcipher_request *req)
|
||||
|
@ -345,10 +358,11 @@ static int crypt_convert_block(struct crypt_config *cc,
|
|||
u8 *iv;
|
||||
int r = 0;
|
||||
|
||||
dmreq = (struct dm_crypt_request *)((char *)req + cc->dmreq_start);
|
||||
dmreq = dmreq_of_req(cc, req);
|
||||
iv = (u8 *)ALIGN((unsigned long)(dmreq + 1),
|
||||
crypto_ablkcipher_alignmask(cc->tfm) + 1);
|
||||
|
||||
dmreq->ctx = ctx;
|
||||
sg_init_table(&dmreq->sg_in, 1);
|
||||
sg_set_page(&dmreq->sg_in, bv_in->bv_page, 1 << SECTOR_SHIFT,
|
||||
bv_in->bv_offset + ctx->offset_in);
|
||||
|
@ -395,8 +409,9 @@ static void crypt_alloc_req(struct crypt_config *cc,
|
|||
cc->req = mempool_alloc(cc->req_pool, GFP_NOIO);
|
||||
ablkcipher_request_set_tfm(cc->req, cc->tfm);
|
||||
ablkcipher_request_set_callback(cc->req, CRYPTO_TFM_REQ_MAY_BACKLOG |
|
||||
CRYPTO_TFM_REQ_MAY_SLEEP,
|
||||
kcryptd_async_done, ctx);
|
||||
CRYPTO_TFM_REQ_MAY_SLEEP,
|
||||
kcryptd_async_done,
|
||||
dmreq_of_req(cc, cc->req));
|
||||
}
|
||||
|
||||
/*
|
||||
|
@ -553,19 +568,22 @@ static void crypt_inc_pending(struct dm_crypt_io *io)
|
|||
static void crypt_dec_pending(struct dm_crypt_io *io)
|
||||
{
|
||||
struct crypt_config *cc = io->target->private;
|
||||
struct bio *base_bio = io->base_bio;
|
||||
struct dm_crypt_io *base_io = io->base_io;
|
||||
int error = io->error;
|
||||
|
||||
if (!atomic_dec_and_test(&io->pending))
|
||||
return;
|
||||
|
||||
if (likely(!io->base_io))
|
||||
bio_endio(io->base_bio, io->error);
|
||||
else {
|
||||
if (io->error && !io->base_io->error)
|
||||
io->base_io->error = io->error;
|
||||
crypt_dec_pending(io->base_io);
|
||||
}
|
||||
|
||||
mempool_free(io, cc->io_pool);
|
||||
|
||||
if (likely(!base_io))
|
||||
bio_endio(base_bio, error);
|
||||
else {
|
||||
if (error && !base_io->error)
|
||||
base_io->error = error;
|
||||
crypt_dec_pending(base_io);
|
||||
}
|
||||
}
|
||||
|
||||
/*
|
||||
|
@ -821,7 +839,8 @@ static void kcryptd_crypt_read_convert(struct dm_crypt_io *io)
|
|||
static void kcryptd_async_done(struct crypto_async_request *async_req,
|
||||
int error)
|
||||
{
|
||||
struct convert_context *ctx = async_req->data;
|
||||
struct dm_crypt_request *dmreq = async_req->data;
|
||||
struct convert_context *ctx = dmreq->ctx;
|
||||
struct dm_crypt_io *io = container_of(ctx, struct dm_crypt_io, ctx);
|
||||
struct crypt_config *cc = io->target->private;
|
||||
|
||||
|
@ -830,7 +849,7 @@ static void kcryptd_async_done(struct crypto_async_request *async_req,
|
|||
return;
|
||||
}
|
||||
|
||||
mempool_free(ablkcipher_request_cast(async_req), cc->req_pool);
|
||||
mempool_free(req_of_dmreq(cc, dmreq), cc->req_pool);
|
||||
|
||||
if (!atomic_dec_and_test(&ctx->pending))
|
||||
return;
|
||||
|
|
|
@ -292,6 +292,8 @@ static void do_region(int rw, unsigned region, struct dm_io_region *where,
|
|||
(PAGE_SIZE >> SECTOR_SHIFT));
|
||||
num_bvecs = 1 + min_t(int, bio_get_nr_vecs(where->bdev),
|
||||
num_bvecs);
|
||||
if (unlikely(num_bvecs > BIO_MAX_PAGES))
|
||||
num_bvecs = BIO_MAX_PAGES;
|
||||
bio = bio_alloc_bioset(GFP_NOIO, num_bvecs, io->client->bios);
|
||||
bio->bi_sector = where->sector + (where->count - remaining);
|
||||
bio->bi_bdev = where->bdev;
|
||||
|
|
|
@ -704,7 +704,8 @@ static int dev_rename(struct dm_ioctl *param, size_t param_size)
|
|||
char *new_name = (char *) param + param->data_start;
|
||||
|
||||
if (new_name < param->data ||
|
||||
invalid_str(new_name, (void *) param + param_size)) {
|
||||
invalid_str(new_name, (void *) param + param_size) ||
|
||||
strlen(new_name) > DM_NAME_LEN - 1) {
|
||||
DMWARN("Invalid new logical volume name supplied.");
|
||||
return -EINVAL;
|
||||
}
|
||||
|
@ -1063,7 +1064,7 @@ static int table_load(struct dm_ioctl *param, size_t param_size)
|
|||
|
||||
r = populate_table(t, param, param_size);
|
||||
if (r) {
|
||||
dm_table_put(t);
|
||||
dm_table_destroy(t);
|
||||
goto out;
|
||||
}
|
||||
|
||||
|
@ -1071,7 +1072,7 @@ static int table_load(struct dm_ioctl *param, size_t param_size)
|
|||
hc = dm_get_mdptr(md);
|
||||
if (!hc || hc->md != md) {
|
||||
DMWARN("device has been removed from the dev hash table.");
|
||||
dm_table_put(t);
|
||||
dm_table_destroy(t);
|
||||
up_write(&_hash_lock);
|
||||
r = -ENXIO;
|
||||
goto out;
|
||||
|
|
|
@ -525,9 +525,12 @@ static int __noflush_suspending(struct mapped_device *md)
|
|||
static void dec_pending(struct dm_io *io, int error)
|
||||
{
|
||||
unsigned long flags;
|
||||
int io_error;
|
||||
struct bio *bio;
|
||||
struct mapped_device *md = io->md;
|
||||
|
||||
/* Push-back supersedes any I/O errors */
|
||||
if (error && !(io->error > 0 && __noflush_suspending(io->md)))
|
||||
if (error && !(io->error > 0 && __noflush_suspending(md)))
|
||||
io->error = error;
|
||||
|
||||
if (atomic_dec_and_test(&io->io_count)) {
|
||||
|
@ -537,24 +540,27 @@ static void dec_pending(struct dm_io *io, int error)
|
|||
* This must be handled before the sleeper on
|
||||
* suspend queue merges the pushback list.
|
||||
*/
|
||||
spin_lock_irqsave(&io->md->pushback_lock, flags);
|
||||
if (__noflush_suspending(io->md))
|
||||
bio_list_add(&io->md->pushback, io->bio);
|
||||
spin_lock_irqsave(&md->pushback_lock, flags);
|
||||
if (__noflush_suspending(md))
|
||||
bio_list_add(&md->pushback, io->bio);
|
||||
else
|
||||
/* noflush suspend was interrupted. */
|
||||
io->error = -EIO;
|
||||
spin_unlock_irqrestore(&io->md->pushback_lock, flags);
|
||||
spin_unlock_irqrestore(&md->pushback_lock, flags);
|
||||
}
|
||||
|
||||
end_io_acct(io);
|
||||
|
||||
if (io->error != DM_ENDIO_REQUEUE) {
|
||||
trace_block_bio_complete(io->md->queue, io->bio);
|
||||
io_error = io->error;
|
||||
bio = io->bio;
|
||||
|
||||
bio_endio(io->bio, io->error);
|
||||
free_io(md, io);
|
||||
|
||||
if (io_error != DM_ENDIO_REQUEUE) {
|
||||
trace_block_bio_complete(md->queue, bio);
|
||||
|
||||
bio_endio(bio, io_error);
|
||||
}
|
||||
|
||||
free_io(io->md, io);
|
||||
}
|
||||
}
|
||||
|
||||
|
@ -562,6 +568,7 @@ static void clone_endio(struct bio *bio, int error)
|
|||
{
|
||||
int r = 0;
|
||||
struct dm_target_io *tio = bio->bi_private;
|
||||
struct dm_io *io = tio->io;
|
||||
struct mapped_device *md = tio->io->md;
|
||||
dm_endio_fn endio = tio->ti->type->end_io;
|
||||
|
||||
|
@ -585,15 +592,14 @@ static void clone_endio(struct bio *bio, int error)
|
|||
}
|
||||
}
|
||||
|
||||
dec_pending(tio->io, error);
|
||||
|
||||
/*
|
||||
* Store md for cleanup instead of tio which is about to get freed.
|
||||
*/
|
||||
bio->bi_private = md->bs;
|
||||
|
||||
bio_put(bio);
|
||||
free_tio(md, tio);
|
||||
bio_put(bio);
|
||||
dec_pending(io, error);
|
||||
}
|
||||
|
||||
static sector_t max_io_len(struct mapped_device *md,
|
||||
|
|
|
@ -1683,7 +1683,7 @@ static int dst_tune_frontend(struct dvb_frontend* fe,
|
|||
|
||||
static int dst_get_tuning_algo(struct dvb_frontend *fe)
|
||||
{
|
||||
return dst_algo;
|
||||
return dst_algo ? DVBFE_ALGO_HW : DVBFE_ALGO_SW;
|
||||
}
|
||||
|
||||
static int dst_get_frontend(struct dvb_frontend *fe, struct dvb_frontend_parameters *p)
|
||||
|
|
|
@ -1290,9 +1290,6 @@ static int dtv_property_process_set(struct dvb_frontend *fe,
|
|||
dprintk("%s() Finalised property cache\n", __func__);
|
||||
dtv_property_cache_submit(fe);
|
||||
|
||||
/* Request the search algorithm to search */
|
||||
fepriv->algo_status |= DVBFE_ALGO_SEARCH_AGAIN;
|
||||
|
||||
r |= dvb_frontend_ioctl_legacy(inode, file, FE_SET_FRONTEND,
|
||||
&fepriv->parameters);
|
||||
break;
|
||||
|
@ -1717,6 +1714,10 @@ static int dvb_frontend_ioctl_legacy(struct inode *inode, struct file *file,
|
|||
fepriv->min_delay = (dvb_override_tune_delay * HZ) / 1000;
|
||||
|
||||
fepriv->state = FESTATE_RETUNE;
|
||||
|
||||
/* Request the search algorithm to search */
|
||||
fepriv->algo_status |= DVBFE_ALGO_SEARCH_AGAIN;
|
||||
|
||||
dvb_frontend_wakeup(fe);
|
||||
dvb_frontend_add_event(fe, 0);
|
||||
fepriv->status = 0;
|
||||
|
|
|
@ -156,7 +156,7 @@ static void stb0899_first_subrange(struct stb0899_state *state)
|
|||
}
|
||||
|
||||
if (range > 0)
|
||||
internal->sub_range = MIN(internal->srch_range, range);
|
||||
internal->sub_range = min(internal->srch_range, range);
|
||||
else
|
||||
internal->sub_range = 0;
|
||||
|
||||
|
@ -185,7 +185,7 @@ static enum stb0899_status stb0899_check_tmg(struct stb0899_state *state)
|
|||
timing = stb0899_read_reg(state, STB0899_RTF);
|
||||
|
||||
if (lock >= 42) {
|
||||
if ((lock > 48) && (ABS(timing) >= 110)) {
|
||||
if ((lock > 48) && (abs(timing) >= 110)) {
|
||||
internal->status = ANALOGCARRIER;
|
||||
dprintk(state->verbose, FE_DEBUG, 1, "-->ANALOG Carrier !");
|
||||
} else {
|
||||
|
@ -222,7 +222,7 @@ static enum stb0899_status stb0899_search_tmg(struct stb0899_state *state)
|
|||
index++;
|
||||
derot_freq += index * internal->direction * derot_step; /* next derot zig zag position */
|
||||
|
||||
if (ABS(derot_freq) > derot_limit)
|
||||
if (abs(derot_freq) > derot_limit)
|
||||
next_loop--;
|
||||
|
||||
if (next_loop) {
|
||||
|
@ -298,7 +298,7 @@ static enum stb0899_status stb0899_search_carrier(struct stb0899_state *state)
|
|||
last_derot_freq = derot_freq;
|
||||
derot_freq += index * internal->direction * internal->derot_step; /* next zig zag derotator position */
|
||||
|
||||
if(ABS(derot_freq) > derot_limit)
|
||||
if(abs(derot_freq) > derot_limit)
|
||||
next_loop--;
|
||||
|
||||
if (next_loop) {
|
||||
|
@ -400,7 +400,7 @@ static enum stb0899_status stb0899_search_data(struct stb0899_state *state)
|
|||
if ((internal->status != CARRIEROK) || (stb0899_check_data(state) != DATAOK)) {
|
||||
|
||||
derot_freq += index * internal->direction * derot_step; /* next zig zag derotator position */
|
||||
if (ABS(derot_freq) > derot_limit)
|
||||
if (abs(derot_freq) > derot_limit)
|
||||
next_loop--;
|
||||
|
||||
if (next_loop) {
|
||||
|
@ -467,7 +467,7 @@ static void next_sub_range(struct stb0899_state *state)
|
|||
|
||||
if (internal->sub_dir > 0) {
|
||||
old_sub_range = internal->sub_range;
|
||||
internal->sub_range = MIN((internal->srch_range / 2) -
|
||||
internal->sub_range = min((internal->srch_range / 2) -
|
||||
(internal->tuner_offst + internal->sub_range / 2),
|
||||
internal->sub_range);
|
||||
|
||||
|
@ -771,7 +771,7 @@ static long Log2Int(int number)
|
|||
int i;
|
||||
|
||||
i = 0;
|
||||
while ((1 << i) <= ABS(number))
|
||||
while ((1 << i) <= abs(number))
|
||||
i++;
|
||||
|
||||
if (number == 0)
|
||||
|
|
|
@ -794,7 +794,7 @@ static int stb0899_send_diseqc_burst(struct dvb_frontend *fe, fe_sec_mini_cmd_t
|
|||
reg = stb0899_read_reg(state, STB0899_DISCNTRL1);
|
||||
old_state = reg;
|
||||
/* set to burst mode */
|
||||
STB0899_SETFIELD_VAL(DISEQCMODE, reg, 0x02);
|
||||
STB0899_SETFIELD_VAL(DISEQCMODE, reg, 0x03);
|
||||
STB0899_SETFIELD_VAL(DISPRECHARGE, reg, 0x01);
|
||||
stb0899_write_reg(state, STB0899_DISCNTRL1, reg);
|
||||
switch (burst) {
|
||||
|
|
|
@ -59,10 +59,6 @@
|
|||
#define MAKEWORD32(a, b, c, d) (((a) << 24) | ((b) << 16) | ((c) << 8) | (d))
|
||||
#define MAKEWORD16(a, b) (((a) << 8) | (b))
|
||||
|
||||
#define MIN(x, y) ((x) <= (y) ? (x) : (y))
|
||||
#define MAX(x, y) ((x) >= (y) ? (x) : (y))
|
||||
#define ABS(x) ((x) >= 0 ? (x) : -(x))
|
||||
|
||||
#define LSB(x) ((x & 0xff))
|
||||
#define MSB(y) ((y >> 8) & 0xff)
|
||||
|
||||
|
@ -168,10 +164,10 @@ struct stb0899_internal {
|
|||
u32 freq; /* Demod internal Frequency */
|
||||
u32 srate; /* Demod internal Symbol rate */
|
||||
enum stb0899_fec fecrate; /* Demod internal FEC rate */
|
||||
u32 srch_range; /* Demod internal Search Range */
|
||||
u32 sub_range; /* Demod current sub range (Hz) */
|
||||
u32 tuner_step; /* Tuner step (Hz) */
|
||||
u32 tuner_offst; /* Relative offset to carrier (Hz) */
|
||||
s32 srch_range; /* Demod internal Search Range */
|
||||
s32 sub_range; /* Demod current sub range (Hz) */
|
||||
s32 tuner_step; /* Tuner step (Hz) */
|
||||
s32 tuner_offst; /* Relative offset to carrier (Hz) */
|
||||
u32 tuner_bw; /* Current bandwidth of the tuner (Hz) */
|
||||
|
||||
s32 mclk; /* Masterclock Divider factor (binary) */
|
||||
|
|
|
@ -427,11 +427,11 @@ static int stb6100_init(struct dvb_frontend *fe)
|
|||
status->refclock = 27000000; /* Hz */
|
||||
status->iqsense = 1;
|
||||
status->bandwidth = 36000; /* kHz */
|
||||
state->bandwidth = status->bandwidth * 1000; /* MHz */
|
||||
state->bandwidth = status->bandwidth * 1000; /* Hz */
|
||||
state->reference = status->refclock / 1000; /* kHz */
|
||||
|
||||
/* Set default bandwidth. */
|
||||
return stb6100_set_bandwidth(fe, status->bandwidth);
|
||||
return stb6100_set_bandwidth(fe, state->bandwidth);
|
||||
}
|
||||
|
||||
static int stb6100_get_state(struct dvb_frontend *fe,
|
||||
|
|
|
@ -590,7 +590,7 @@ static int zl10353_i2c_gate_ctrl(struct dvb_frontend* fe, int enable)
|
|||
struct zl10353_state *state = fe->demodulator_priv;
|
||||
u8 val = 0x0a;
|
||||
|
||||
if (state->config.no_tuner) {
|
||||
if (state->config.disable_i2c_gate_ctrl) {
|
||||
/* No tuner attached to the internal I2C bus */
|
||||
/* If set enable I2C bridge, the main I2C bus stopped hardly */
|
||||
return 0;
|
||||
|
|
|
@ -38,6 +38,9 @@ struct zl10353_config
|
|||
|
||||
/* set if parallel ts output is required */
|
||||
int parallel_ts;
|
||||
|
||||
/* set if i2c_gate_ctrl disable is required */
|
||||
u8 disable_i2c_gate_ctrl:1;
|
||||
};
|
||||
|
||||
#if defined(CONFIG_DVB_ZL10353) || (defined(CONFIG_DVB_ZL10353_MODULE) && defined(MODULE))
|
||||
|
|
|
@ -102,7 +102,11 @@ int s5k4aa_probe(struct sd *sd)
|
|||
}
|
||||
|
||||
/* Test some registers, but we don't know their exact meaning yet */
|
||||
if (m5602_read_sensor(sd, 0x00, prod_id, sizeof(prod_id)))
|
||||
if (m5602_read_sensor(sd, 0x00, prod_id, 2))
|
||||
return -ENODEV;
|
||||
if (m5602_read_sensor(sd, 0x02, prod_id+2, 2))
|
||||
return -ENODEV;
|
||||
if (m5602_read_sensor(sd, 0x04, prod_id+4, 2))
|
||||
return -ENODEV;
|
||||
|
||||
if (memcmp(prod_id, expected_prod_id, sizeof(prod_id)))
|
||||
|
|
|
@ -860,6 +860,7 @@ static struct zl10353_config behold_h6_config = {
|
|||
.demod_address = 0x1e>>1,
|
||||
.no_tuner = 1,
|
||||
.parallel_ts = 1,
|
||||
.disable_i2c_gate_ctrl = 1,
|
||||
};
|
||||
|
||||
/* ==================================================================
|
||||
|
|
|
@ -54,7 +54,7 @@ MODULE_LICENSE("GPL");
|
|||
/* ---------------------------------------------------------------------- */
|
||||
/* our structs */
|
||||
|
||||
#define MAXREGS 64
|
||||
#define MAXREGS 256
|
||||
|
||||
struct CHIPSTATE;
|
||||
typedef int (*getvalue)(int);
|
||||
|
|
|
@ -68,6 +68,7 @@ config VIDEO_ZORAN_AVS6EYES
|
|||
tristate "AverMedia 6 Eyes support (EXPERIMENTAL)"
|
||||
depends on VIDEO_ZORAN_ZR36060 && EXPERIMENTAL && VIDEO_V4L1
|
||||
select VIDEO_BT856 if VIDEO_HELPER_CHIPS_AUTO
|
||||
select VIDEO_BT866 if VIDEO_HELPER_CHIPS_AUTO
|
||||
select VIDEO_KS0127 if VIDEO_HELPER_CHIPS_AUTO
|
||||
help
|
||||
Support for the AverMedia 6 Eyes video surveillance card.
|
||||
|
|
|
@ -1040,6 +1040,17 @@ config NI65
|
|||
To compile this driver as a module, choose M here. The module
|
||||
will be called ni65.
|
||||
|
||||
config DNET
|
||||
tristate "Dave ethernet support (DNET)"
|
||||
depends on NET_ETHERNET
|
||||
select PHYLIB
|
||||
help
|
||||
The Dave ethernet interface (DNET) is found on Qong Board FPGA.
|
||||
Say Y to include support for the DNET chip.
|
||||
|
||||
To compile this driver as a module, choose M here: the module
|
||||
will be called dnet.
|
||||
|
||||
source "drivers/net/tulip/Kconfig"
|
||||
|
||||
config AT1700
|
||||
|
@ -2619,6 +2630,8 @@ config QLGE
|
|||
|
||||
source "drivers/net/sfc/Kconfig"
|
||||
|
||||
source "drivers/net/benet/Kconfig"
|
||||
|
||||
endif # NETDEV_10000
|
||||
|
||||
source "drivers/net/tokenring/Kconfig"
|
||||
|
|
|
@ -22,6 +22,7 @@ obj-$(CONFIG_GIANFAR) += gianfar_driver.o
|
|||
obj-$(CONFIG_TEHUTI) += tehuti.o
|
||||
obj-$(CONFIG_ENIC) += enic/
|
||||
obj-$(CONFIG_JME) += jme.o
|
||||
obj-$(CONFIG_BE2NET) += benet/
|
||||
|
||||
gianfar_driver-objs := gianfar.o \
|
||||
gianfar_ethtool.o \
|
||||
|
@ -231,6 +232,7 @@ obj-$(CONFIG_ENC28J60) += enc28j60.o
|
|||
|
||||
obj-$(CONFIG_XTENSA_XT2000_SONIC) += xtsonic.o
|
||||
|
||||
obj-$(CONFIG_DNET) += dnet.o
|
||||
obj-$(CONFIG_MACB) += macb.o
|
||||
|
||||
obj-$(CONFIG_ARM) += arm/
|
||||
|
|
7
drivers/net/benet/Kconfig
Normal file
7
drivers/net/benet/Kconfig
Normal file
|
@ -0,0 +1,7 @@
|
|||
config BE2NET
|
||||
tristate "ServerEngines' 10Gbps NIC - BladeEngine 2"
|
||||
depends on PCI && INET
|
||||
select INET_LRO
|
||||
help
|
||||
This driver implements the NIC functionality for ServerEngines'
|
||||
10Gbps network adapter - BladeEngine 2.
|
7
drivers/net/benet/Makefile
Normal file
7
drivers/net/benet/Makefile
Normal file
|
@ -0,0 +1,7 @@
|
|||
#
|
||||
# Makefile to build the network driver for ServerEngine's BladeEngine.
|
||||
#
|
||||
|
||||
obj-$(CONFIG_BE2NET) += be2net.o
|
||||
|
||||
be2net-y := be_main.o be_cmds.o be_ethtool.o
|
327
drivers/net/benet/be.h
Normal file
327
drivers/net/benet/be.h
Normal file
|
@ -0,0 +1,327 @@
|
|||
/*
|
||||
* Copyright (C) 2005 - 2009 ServerEngines
|
||||
* All rights reserved.
|
||||
*
|
||||
* This program is free software; you can redistribute it and/or
|
||||
* modify it under the terms of the GNU General Public License version 2
|
||||
* as published by the Free Software Foundation. The full GNU General
|
||||
* Public License is included in this distribution in the file called COPYING.
|
||||
*
|
||||
* Contact Information:
|
||||
* linux-drivers@serverengines.com
|
||||
*
|
||||
* ServerEngines
|
||||
* 209 N. Fair Oaks Ave
|
||||
* Sunnyvale, CA 94085
|
||||
*/
|
||||
|
||||
#ifndef BE_H
|
||||
#define BE_H
|
||||
|
||||
#include <linux/pci.h>
|
||||
#include <linux/etherdevice.h>
|
||||
#include <linux/version.h>
|
||||
#include <linux/delay.h>
|
||||
#include <net/tcp.h>
|
||||
#include <net/ip.h>
|
||||
#include <net/ipv6.h>
|
||||
#include <linux/if_vlan.h>
|
||||
#include <linux/workqueue.h>
|
||||
#include <linux/interrupt.h>
|
||||
#include <linux/inet_lro.h>
|
||||
|
||||
#include "be_hw.h"
|
||||
|
||||
#define DRV_VER "2.0.348"
|
||||
#define DRV_NAME "be2net"
|
||||
#define BE_NAME "ServerEngines BladeEngine2 10Gbps NIC"
|
||||
#define DRV_DESC BE_NAME "Driver"
|
||||
|
||||
/* Number of bytes of an RX frame that are copied to skb->data */
|
||||
#define BE_HDR_LEN 64
|
||||
#define BE_MAX_JUMBO_FRAME_SIZE 9018
|
||||
#define BE_MIN_MTU 256
|
||||
|
||||
#define BE_NUM_VLANS_SUPPORTED 64
|
||||
#define BE_MAX_EQD 96
|
||||
#define BE_MAX_TX_FRAG_COUNT 30
|
||||
|
||||
#define EVNT_Q_LEN 1024
|
||||
#define TX_Q_LEN 2048
|
||||
#define TX_CQ_LEN 1024
|
||||
#define RX_Q_LEN 1024 /* Does not support any other value */
|
||||
#define RX_CQ_LEN 1024
|
||||
#define MCC_Q_LEN 64 /* total size not to exceed 8 pages */
|
||||
#define MCC_CQ_LEN 256
|
||||
|
||||
#define BE_NAPI_WEIGHT 64
|
||||
#define MAX_RX_POST BE_NAPI_WEIGHT /* Frags posted at a time */
|
||||
#define RX_FRAGS_REFILL_WM (RX_Q_LEN - MAX_RX_POST)
|
||||
|
||||
#define BE_MAX_LRO_DESCRIPTORS 16
|
||||
#define BE_MAX_FRAGS_PER_FRAME 16
|
||||
|
||||
struct be_dma_mem {
|
||||
void *va;
|
||||
dma_addr_t dma;
|
||||
u32 size;
|
||||
};
|
||||
|
||||
struct be_queue_info {
|
||||
struct be_dma_mem dma_mem;
|
||||
u16 len;
|
||||
u16 entry_size; /* Size of an element in the queue */
|
||||
u16 id;
|
||||
u16 tail, head;
|
||||
bool created;
|
||||
atomic_t used; /* Number of valid elements in the queue */
|
||||
};
|
||||
|
||||
struct be_ctrl_info {
|
||||
u8 __iomem *csr;
|
||||
u8 __iomem *db; /* Door Bell */
|
||||
u8 __iomem *pcicfg; /* PCI config space */
|
||||
int pci_func;
|
||||
|
||||
/* Mbox used for cmd request/response */
|
||||
spinlock_t cmd_lock; /* For serializing cmds to BE card */
|
||||
struct be_dma_mem mbox_mem;
|
||||
/* Mbox mem is adjusted to align to 16 bytes. The allocated addr
|
||||
* is stored for freeing purpose */
|
||||
struct be_dma_mem mbox_mem_alloced;
|
||||
};
|
||||
|
||||
#include "be_cmds.h"
|
||||
|
||||
struct be_drvr_stats {
|
||||
u32 be_tx_reqs; /* number of TX requests initiated */
|
||||
u32 be_tx_stops; /* number of times TX Q was stopped */
|
||||
u32 be_fwd_reqs; /* number of send reqs through forwarding i/f */
|
||||
u32 be_tx_wrbs; /* number of tx WRBs used */
|
||||
u32 be_tx_events; /* number of tx completion events */
|
||||
u32 be_tx_compl; /* number of tx completion entries processed */
|
||||
u64 be_tx_jiffies;
|
||||
ulong be_tx_bytes;
|
||||
ulong be_tx_bytes_prev;
|
||||
u32 be_tx_rate;
|
||||
|
||||
u32 cache_barrier[16];
|
||||
|
||||
u32 be_ethrx_post_fail;/* number of ethrx buffer alloc failures */
|
||||
u32 be_polls; /* number of times NAPI called poll function */
|
||||
u32 be_rx_events; /* number of ucast rx completion events */
|
||||
u32 be_rx_compl; /* number of rx completion entries processed */
|
||||
u32 be_lro_hgram_data[8]; /* histogram of LRO data packets */
|
||||
u32 be_lro_hgram_ack[8]; /* histogram of LRO ACKs */
|
||||
u64 be_rx_jiffies;
|
||||
ulong be_rx_bytes;
|
||||
ulong be_rx_bytes_prev;
|
||||
u32 be_rx_rate;
|
||||
/* number of non ether type II frames dropped where
|
||||
* frame len > length field of Mac Hdr */
|
||||
u32 be_802_3_dropped_frames;
|
||||
/* number of non ether type II frames malformed where
|
||||
* in frame len < length field of Mac Hdr */
|
||||
u32 be_802_3_malformed_frames;
|
||||
u32 be_rxcp_err; /* Num rx completion entries w/ err set. */
|
||||
ulong rx_fps_jiffies; /* jiffies at last FPS calc */
|
||||
u32 be_rx_frags;
|
||||
u32 be_prev_rx_frags;
|
||||
u32 be_rx_fps; /* Rx frags per second */
|
||||
};
|
||||
|
||||
struct be_stats_obj {
|
||||
struct be_drvr_stats drvr_stats;
|
||||
struct net_device_stats net_stats;
|
||||
struct be_dma_mem cmd;
|
||||
};
|
||||
|
||||
struct be_eq_obj {
|
||||
struct be_queue_info q;
|
||||
char desc[32];
|
||||
|
||||
/* Adaptive interrupt coalescing (AIC) info */
|
||||
bool enable_aic;
|
||||
u16 min_eqd; /* in usecs */
|
||||
u16 max_eqd; /* in usecs */
|
||||
u16 cur_eqd; /* in usecs */
|
||||
|
||||
struct napi_struct napi;
|
||||
};
|
||||
|
||||
struct be_tx_obj {
|
||||
struct be_queue_info q;
|
||||
struct be_queue_info cq;
|
||||
/* Remember the skbs that were transmitted */
|
||||
struct sk_buff *sent_skb_list[TX_Q_LEN];
|
||||
};
|
||||
|
||||
/* Struct to remember the pages posted for rx frags */
|
||||
struct be_rx_page_info {
|
||||
struct page *page;
|
||||
dma_addr_t bus;
|
||||
u16 page_offset;
|
||||
bool last_page_user;
|
||||
};
|
||||
|
||||
struct be_rx_obj {
|
||||
struct be_queue_info q;
|
||||
struct be_queue_info cq;
|
||||
struct be_rx_page_info page_info_tbl[RX_Q_LEN];
|
||||
struct net_lro_mgr lro_mgr;
|
||||
struct net_lro_desc lro_desc[BE_MAX_LRO_DESCRIPTORS];
|
||||
};
|
||||
|
||||
#define BE_NUM_MSIX_VECTORS 2 /* 1 each for Tx and Rx */
|
||||
struct be_adapter {
|
||||
struct pci_dev *pdev;
|
||||
struct net_device *netdev;
|
||||
|
||||
/* Mbox, pci config, csr address information */
|
||||
struct be_ctrl_info ctrl;
|
||||
|
||||
struct msix_entry msix_entries[BE_NUM_MSIX_VECTORS];
|
||||
bool msix_enabled;
|
||||
bool isr_registered;
|
||||
|
||||
/* TX Rings */
|
||||
struct be_eq_obj tx_eq;
|
||||
struct be_tx_obj tx_obj;
|
||||
|
||||
u32 cache_line_break[8];
|
||||
|
||||
/* Rx rings */
|
||||
struct be_eq_obj rx_eq;
|
||||
struct be_rx_obj rx_obj;
|
||||
u32 big_page_size; /* Compounded page size shared by rx wrbs */
|
||||
|
||||
struct vlan_group *vlan_grp;
|
||||
u16 num_vlans;
|
||||
u8 vlan_tag[VLAN_GROUP_ARRAY_LEN];
|
||||
|
||||
struct be_stats_obj stats;
|
||||
/* Work queue used to perform periodic tasks like getting statistics */
|
||||
struct delayed_work work;
|
||||
|
||||
/* Ethtool knobs and info */
|
||||
bool rx_csum; /* BE card must perform rx-checksumming */
|
||||
u32 max_rx_coal;
|
||||
char fw_ver[FW_VER_LEN];
|
||||
u32 if_handle; /* Used to configure filtering */
|
||||
u32 pmac_id; /* MAC addr handle used by BE card */
|
||||
|
||||
struct be_link_info link;
|
||||
u32 port_num;
|
||||
};
|
||||
|
||||
extern struct ethtool_ops be_ethtool_ops;
|
||||
|
||||
#define drvr_stats(adapter) (&adapter->stats.drvr_stats)
|
||||
|
||||
#define BE_SET_NETDEV_OPS(netdev, ops) (netdev->netdev_ops = ops)
|
||||
|
||||
static inline u32 MODULO(u16 val, u16 limit)
|
||||
{
|
||||
BUG_ON(limit & (limit - 1));
|
||||
return val & (limit - 1);
|
||||
}
|
||||
|
||||
static inline void index_adv(u16 *index, u16 val, u16 limit)
|
||||
{
|
||||
*index = MODULO((*index + val), limit);
|
||||
}
|
||||
|
||||
static inline void index_inc(u16 *index, u16 limit)
|
||||
{
|
||||
*index = MODULO((*index + 1), limit);
|
||||
}
|
||||
|
||||
#define PAGE_SHIFT_4K 12
|
||||
#define PAGE_SIZE_4K (1 << PAGE_SHIFT_4K)
|
||||
|
||||
/* Returns number of pages spanned by the data starting at the given addr */
|
||||
#define PAGES_4K_SPANNED(_address, size) \
|
||||
((u32)((((size_t)(_address) & (PAGE_SIZE_4K - 1)) + \
|
||||
(size) + (PAGE_SIZE_4K - 1)) >> PAGE_SHIFT_4K))
|
||||
|
||||
/* Byte offset into the page corresponding to given address */
|
||||
#define OFFSET_IN_PAGE(addr) \
|
||||
((size_t)(addr) & (PAGE_SIZE_4K-1))
|
||||
|
||||
/* Returns bit offset within a DWORD of a bitfield */
|
||||
#define AMAP_BIT_OFFSET(_struct, field) \
|
||||
(((size_t)&(((_struct *)0)->field))%32)
|
||||
|
||||
/* Returns the bit mask of the field that is NOT shifted into location. */
|
||||
static inline u32 amap_mask(u32 bitsize)
|
||||
{
|
||||
return (bitsize == 32 ? 0xFFFFFFFF : (1 << bitsize) - 1);
|
||||
}
|
||||
|
||||
static inline void
|
||||
amap_set(void *ptr, u32 dw_offset, u32 mask, u32 offset, u32 value)
|
||||
{
|
||||
u32 *dw = (u32 *) ptr + dw_offset;
|
||||
*dw &= ~(mask << offset);
|
||||
*dw |= (mask & value) << offset;
|
||||
}
|
||||
|
||||
#define AMAP_SET_BITS(_struct, field, ptr, val) \
|
||||
amap_set(ptr, \
|
||||
offsetof(_struct, field)/32, \
|
||||
amap_mask(sizeof(((_struct *)0)->field)), \
|
||||
AMAP_BIT_OFFSET(_struct, field), \
|
||||
val)
|
||||
|
||||
static inline u32 amap_get(void *ptr, u32 dw_offset, u32 mask, u32 offset)
|
||||
{
|
||||
u32 *dw = (u32 *) ptr;
|
||||
return mask & (*(dw + dw_offset) >> offset);
|
||||
}
|
||||
|
||||
#define AMAP_GET_BITS(_struct, field, ptr) \
|
||||
amap_get(ptr, \
|
||||
offsetof(_struct, field)/32, \
|
||||
amap_mask(sizeof(((_struct *)0)->field)), \
|
||||
AMAP_BIT_OFFSET(_struct, field))
|
||||
|
||||
#define be_dws_cpu_to_le(wrb, len) swap_dws(wrb, len)
|
||||
#define be_dws_le_to_cpu(wrb, len) swap_dws(wrb, len)
|
||||
static inline void swap_dws(void *wrb, int len)
|
||||
{
|
||||
#ifdef __BIG_ENDIAN
|
||||
u32 *dw = wrb;
|
||||
BUG_ON(len % 4);
|
||||
do {
|
||||
*dw = cpu_to_le32(*dw);
|
||||
dw++;
|
||||
len -= 4;
|
||||
} while (len);
|
||||
#endif /* __BIG_ENDIAN */
|
||||
}
|
||||
|
||||
static inline u8 is_tcp_pkt(struct sk_buff *skb)
|
||||
{
|
||||
u8 val = 0;
|
||||
|
||||
if (ip_hdr(skb)->version == 4)
|
||||
val = (ip_hdr(skb)->protocol == IPPROTO_TCP);
|
||||
else if (ip_hdr(skb)->version == 6)
|
||||
val = (ipv6_hdr(skb)->nexthdr == NEXTHDR_TCP);
|
||||
|
||||
return val;
|
||||
}
|
||||
|
||||
static inline u8 is_udp_pkt(struct sk_buff *skb)
|
||||
{
|
||||
u8 val = 0;
|
||||
|
||||
if (ip_hdr(skb)->version == 4)
|
||||
val = (ip_hdr(skb)->protocol == IPPROTO_UDP);
|
||||
else if (ip_hdr(skb)->version == 6)
|
||||
val = (ipv6_hdr(skb)->nexthdr == NEXTHDR_UDP);
|
||||
|
||||
return val;
|
||||
}
|
||||
|
||||
#endif /* BE_H */
|
861
drivers/net/benet/be_cmds.c
Normal file
861
drivers/net/benet/be_cmds.c
Normal file
|
@ -0,0 +1,861 @@
|
|||
/*
|
||||
* Copyright (C) 2005 - 2009 ServerEngines
|
||||
* All rights reserved.
|
||||
*
|
||||
* This program is free software; you can redistribute it and/or
|
||||
* modify it under the terms of the GNU General Public License version 2
|
||||
* as published by the Free Software Foundation. The full GNU General
|
||||
* Public License is included in this distribution in the file called COPYING.
|
||||
*
|
||||
* Contact Information:
|
||||
* linux-drivers@serverengines.com
|
||||
*
|
||||
* ServerEngines
|
||||
* 209 N. Fair Oaks Ave
|
||||
* Sunnyvale, CA 94085
|
||||
*/
|
||||
|
||||
#include "be.h"
|
||||
|
||||
static int be_mbox_db_ready_wait(void __iomem *db)
|
||||
{
|
||||
int cnt = 0, wait = 5;
|
||||
u32 ready;
|
||||
|
||||
do {
|
||||
ready = ioread32(db) & MPU_MAILBOX_DB_RDY_MASK;
|
||||
if (ready)
|
||||
break;
|
||||
|
||||
if (cnt > 200000) {
|
||||
printk(KERN_WARNING DRV_NAME
|
||||
": mbox_db poll timed out\n");
|
||||
return -1;
|
||||
}
|
||||
|
||||
if (cnt > 50)
|
||||
wait = 200;
|
||||
cnt += wait;
|
||||
udelay(wait);
|
||||
} while (true);
|
||||
|
||||
return 0;
|
||||
}
|
||||
|
||||
/*
|
||||
* Insert the mailbox address into the doorbell in two steps
|
||||
*/
|
||||
static int be_mbox_db_ring(struct be_ctrl_info *ctrl)
|
||||
{
|
||||
int status;
|
||||
u16 compl_status, extd_status;
|
||||
u32 val = 0;
|
||||
void __iomem *db = ctrl->db + MPU_MAILBOX_DB_OFFSET;
|
||||
struct be_dma_mem *mbox_mem = &ctrl->mbox_mem;
|
||||
struct be_mcc_mailbox *mbox = mbox_mem->va;
|
||||
struct be_mcc_cq_entry *cqe = &mbox->cqe;
|
||||
|
||||
memset(cqe, 0, sizeof(*cqe));
|
||||
|
||||
val &= ~MPU_MAILBOX_DB_RDY_MASK;
|
||||
val |= MPU_MAILBOX_DB_HI_MASK;
|
||||
/* at bits 2 - 31 place mbox dma addr msb bits 34 - 63 */
|
||||
val |= (upper_32_bits(mbox_mem->dma) >> 2) << 2;
|
||||
iowrite32(val, db);
|
||||
|
||||
/* wait for ready to be set */
|
||||
status = be_mbox_db_ready_wait(db);
|
||||
if (status != 0)
|
||||
return status;
|
||||
|
||||
val = 0;
|
||||
val &= ~MPU_MAILBOX_DB_RDY_MASK;
|
||||
val &= ~MPU_MAILBOX_DB_HI_MASK;
|
||||
/* at bits 2 - 31 place mbox dma addr lsb bits 4 - 33 */
|
||||
val |= (u32)(mbox_mem->dma >> 4) << 2;
|
||||
iowrite32(val, db);
|
||||
|
||||
status = be_mbox_db_ready_wait(db);
|
||||
if (status != 0)
|
||||
return status;
|
||||
|
||||
/* compl entry has been made now */
|
||||
be_dws_le_to_cpu(cqe, sizeof(*cqe));
|
||||
if (!(cqe->flags & CQE_FLAGS_VALID_MASK)) {
|
||||
printk(KERN_WARNING DRV_NAME ": ERROR invalid mbox compl\n");
|
||||
return -1;
|
||||
}
|
||||
|
||||
compl_status = (cqe->status >> CQE_STATUS_COMPL_SHIFT) &
|
||||
CQE_STATUS_COMPL_MASK;
|
||||
if (compl_status != MCC_STATUS_SUCCESS) {
|
||||
extd_status = (cqe->status >> CQE_STATUS_EXTD_SHIFT) &
|
||||
CQE_STATUS_EXTD_MASK;
|
||||
printk(KERN_WARNING DRV_NAME
|
||||
": ERROR in cmd compl. status(compl/extd)=%d/%d\n",
|
||||
compl_status, extd_status);
|
||||
}
|
||||
|
||||
return compl_status;
|
||||
}
|
||||
|
||||
static int be_POST_stage_get(struct be_ctrl_info *ctrl, u16 *stage)
|
||||
{
|
||||
u32 sem = ioread32(ctrl->csr + MPU_EP_SEMAPHORE_OFFSET);
|
||||
|
||||
*stage = sem & EP_SEMAPHORE_POST_STAGE_MASK;
|
||||
if ((sem >> EP_SEMAPHORE_POST_ERR_SHIFT) & EP_SEMAPHORE_POST_ERR_MASK)
|
||||
return -1;
|
||||
else
|
||||
return 0;
|
||||
}
|
||||
|
||||
static int be_POST_stage_poll(struct be_ctrl_info *ctrl, u16 poll_stage)
|
||||
{
|
||||
u16 stage, cnt, error;
|
||||
for (cnt = 0; cnt < 5000; cnt++) {
|
||||
error = be_POST_stage_get(ctrl, &stage);
|
||||
if (error)
|
||||
return -1;
|
||||
|
||||
if (stage == poll_stage)
|
||||
break;
|
||||
udelay(1000);
|
||||
}
|
||||
if (stage != poll_stage)
|
||||
return -1;
|
||||
return 0;
|
||||
}
|
||||
|
||||
|
||||
int be_cmd_POST(struct be_ctrl_info *ctrl)
|
||||
{
|
||||
u16 stage, error;
|
||||
|
||||
error = be_POST_stage_get(ctrl, &stage);
|
||||
if (error)
|
||||
goto err;
|
||||
|
||||
if (stage == POST_STAGE_ARMFW_RDY)
|
||||
return 0;
|
||||
|
||||
if (stage != POST_STAGE_AWAITING_HOST_RDY)
|
||||
goto err;
|
||||
|
||||
/* On awaiting host rdy, reset and again poll on awaiting host rdy */
|
||||
iowrite32(POST_STAGE_BE_RESET, ctrl->csr + MPU_EP_SEMAPHORE_OFFSET);
|
||||
error = be_POST_stage_poll(ctrl, POST_STAGE_AWAITING_HOST_RDY);
|
||||
if (error)
|
||||
goto err;
|
||||
|
||||
/* Now kickoff POST and poll on armfw ready */
|
||||
iowrite32(POST_STAGE_HOST_RDY, ctrl->csr + MPU_EP_SEMAPHORE_OFFSET);
|
||||
error = be_POST_stage_poll(ctrl, POST_STAGE_ARMFW_RDY);
|
||||
if (error)
|
||||
goto err;
|
||||
|
||||
return 0;
|
||||
err:
|
||||
printk(KERN_WARNING DRV_NAME ": ERROR, stage=%d\n", stage);
|
||||
return -1;
|
||||
}
|
||||
|
||||
static inline void *embedded_payload(struct be_mcc_wrb *wrb)
|
||||
{
|
||||
return wrb->payload.embedded_payload;
|
||||
}
|
||||
|
||||
static inline struct be_sge *nonembedded_sgl(struct be_mcc_wrb *wrb)
|
||||
{
|
||||
return &wrb->payload.sgl[0];
|
||||
}
|
||||
|
||||
/* Don't touch the hdr after it's prepared */
|
||||
static void be_wrb_hdr_prepare(struct be_mcc_wrb *wrb, int payload_len,
|
||||
bool embedded, u8 sge_cnt)
|
||||
{
|
||||
if (embedded)
|
||||
wrb->embedded |= MCC_WRB_EMBEDDED_MASK;
|
||||
else
|
||||
wrb->embedded |= (sge_cnt & MCC_WRB_SGE_CNT_MASK) <<
|
||||
MCC_WRB_SGE_CNT_SHIFT;
|
||||
wrb->payload_length = payload_len;
|
||||
be_dws_cpu_to_le(wrb, 20);
|
||||
}
|
||||
|
||||
/* Don't touch the hdr after it's prepared */
|
||||
static void be_cmd_hdr_prepare(struct be_cmd_req_hdr *req_hdr,
|
||||
u8 subsystem, u8 opcode, int cmd_len)
|
||||
{
|
||||
req_hdr->opcode = opcode;
|
||||
req_hdr->subsystem = subsystem;
|
||||
req_hdr->request_length = cpu_to_le32(cmd_len - sizeof(*req_hdr));
|
||||
}
|
||||
|
||||
static void be_cmd_page_addrs_prepare(struct phys_addr *pages, u32 max_pages,
|
||||
struct be_dma_mem *mem)
|
||||
{
|
||||
int i, buf_pages = min(PAGES_4K_SPANNED(mem->va, mem->size), max_pages);
|
||||
u64 dma = (u64)mem->dma;
|
||||
|
||||
for (i = 0; i < buf_pages; i++) {
|
||||
pages[i].lo = cpu_to_le32(dma & 0xFFFFFFFF);
|
||||
pages[i].hi = cpu_to_le32(upper_32_bits(dma));
|
||||
dma += PAGE_SIZE_4K;
|
||||
}
|
||||
}
|
||||
|
||||
/* Converts interrupt delay in microseconds to multiplier value */
|
||||
static u32 eq_delay_to_mult(u32 usec_delay)
|
||||
{
|
||||
#define MAX_INTR_RATE 651042
|
||||
const u32 round = 10;
|
||||
u32 multiplier;
|
||||
|
||||
if (usec_delay == 0)
|
||||
multiplier = 0;
|
||||
else {
|
||||
u32 interrupt_rate = 1000000 / usec_delay;
|
||||
/* Max delay, corresponding to the lowest interrupt rate */
|
||||
if (interrupt_rate == 0)
|
||||
multiplier = 1023;
|
||||
else {
|
||||
multiplier = (MAX_INTR_RATE - interrupt_rate) * round;
|
||||
multiplier /= interrupt_rate;
|
||||
/* Round the multiplier to the closest value.*/
|
||||
multiplier = (multiplier + round/2) / round;
|
||||
multiplier = min(multiplier, (u32)1023);
|
||||
}
|
||||
}
|
||||
return multiplier;
|
||||
}
|
||||
|
||||
static inline struct be_mcc_wrb *wrb_from_mbox(struct be_dma_mem *mbox_mem)
|
||||
{
|
||||
return &((struct be_mcc_mailbox *)(mbox_mem->va))->wrb;
|
||||
}
|
||||
|
||||
int be_cmd_eq_create(struct be_ctrl_info *ctrl,
|
||||
struct be_queue_info *eq, int eq_delay)
|
||||
{
|
||||
struct be_mcc_wrb *wrb = wrb_from_mbox(&ctrl->mbox_mem);
|
||||
struct be_cmd_req_eq_create *req = embedded_payload(wrb);
|
||||
struct be_cmd_resp_eq_create *resp = embedded_payload(wrb);
|
||||
struct be_dma_mem *q_mem = &eq->dma_mem;
|
||||
int status;
|
||||
|
||||
spin_lock(&ctrl->cmd_lock);
|
||||
memset(wrb, 0, sizeof(*wrb));
|
||||
|
||||
be_wrb_hdr_prepare(wrb, sizeof(*req), true, 0);
|
||||
|
||||
be_cmd_hdr_prepare(&req->hdr, CMD_SUBSYSTEM_COMMON,
|
||||
OPCODE_COMMON_EQ_CREATE, sizeof(*req));
|
||||
|
||||
req->num_pages = cpu_to_le16(PAGES_4K_SPANNED(q_mem->va, q_mem->size));
|
||||
|
||||
AMAP_SET_BITS(struct amap_eq_context, func, req->context,
|
||||
ctrl->pci_func);
|
||||
AMAP_SET_BITS(struct amap_eq_context, valid, req->context, 1);
|
||||
/* 4byte eqe*/
|
||||
AMAP_SET_BITS(struct amap_eq_context, size, req->context, 0);
|
||||
AMAP_SET_BITS(struct amap_eq_context, count, req->context,
|
||||
__ilog2_u32(eq->len/256));
|
||||
AMAP_SET_BITS(struct amap_eq_context, delaymult, req->context,
|
||||
eq_delay_to_mult(eq_delay));
|
||||
be_dws_cpu_to_le(req->context, sizeof(req->context));
|
||||
|
||||
be_cmd_page_addrs_prepare(req->pages, ARRAY_SIZE(req->pages), q_mem);
|
||||
|
||||
status = be_mbox_db_ring(ctrl);
|
||||
if (!status) {
|
||||
eq->id = le16_to_cpu(resp->eq_id);
|
||||
eq->created = true;
|
||||
}
|
||||
spin_unlock(&ctrl->cmd_lock);
|
||||
return status;
|
||||
}
|
||||
|
||||
int be_cmd_mac_addr_query(struct be_ctrl_info *ctrl, u8 *mac_addr,
|
||||
u8 type, bool permanent, u32 if_handle)
|
||||
{
|
||||
struct be_mcc_wrb *wrb = wrb_from_mbox(&ctrl->mbox_mem);
|
||||
struct be_cmd_req_mac_query *req = embedded_payload(wrb);
|
||||
struct be_cmd_resp_mac_query *resp = embedded_payload(wrb);
|
||||
int status;
|
||||
|
||||
spin_lock(&ctrl->cmd_lock);
|
||||
memset(wrb, 0, sizeof(*wrb));
|
||||
|
||||
be_wrb_hdr_prepare(wrb, sizeof(*req), true, 0);
|
||||
|
||||
be_cmd_hdr_prepare(&req->hdr, CMD_SUBSYSTEM_COMMON,
|
||||
OPCODE_COMMON_NTWK_MAC_QUERY, sizeof(*req));
|
||||
|
||||
req->type = type;
|
||||
if (permanent) {
|
||||
req->permanent = 1;
|
||||
} else {
|
||||
req->if_id = cpu_to_le16((u16)if_handle);
|
||||
req->permanent = 0;
|
||||
}
|
||||
|
||||
status = be_mbox_db_ring(ctrl);
|
||||
if (!status)
|
||||
memcpy(mac_addr, resp->mac.addr, ETH_ALEN);
|
||||
|
||||
spin_unlock(&ctrl->cmd_lock);
|
||||
return status;
|
||||
}
|
||||
|
||||
int be_cmd_pmac_add(struct be_ctrl_info *ctrl, u8 *mac_addr,
|
||||
u32 if_id, u32 *pmac_id)
|
||||
{
|
||||
struct be_mcc_wrb *wrb = wrb_from_mbox(&ctrl->mbox_mem);
|
||||
struct be_cmd_req_pmac_add *req = embedded_payload(wrb);
|
||||
int status;
|
||||
|
||||
spin_lock(&ctrl->cmd_lock);
|
||||
memset(wrb, 0, sizeof(*wrb));
|
||||
|
||||
be_wrb_hdr_prepare(wrb, sizeof(*req), true, 0);
|
||||
|
||||
be_cmd_hdr_prepare(&req->hdr, CMD_SUBSYSTEM_COMMON,
|
||||
OPCODE_COMMON_NTWK_PMAC_ADD, sizeof(*req));
|
||||
|
||||
req->if_id = cpu_to_le32(if_id);
|
||||
memcpy(req->mac_address, mac_addr, ETH_ALEN);
|
||||
|
||||
status = be_mbox_db_ring(ctrl);
|
||||
if (!status) {
|
||||
struct be_cmd_resp_pmac_add *resp = embedded_payload(wrb);
|
||||
*pmac_id = le32_to_cpu(resp->pmac_id);
|
||||
}
|
||||
|
||||
spin_unlock(&ctrl->cmd_lock);
|
||||
return status;
|
||||
}
|
||||
|
||||
int be_cmd_pmac_del(struct be_ctrl_info *ctrl, u32 if_id, u32 pmac_id)
|
||||
{
|
||||
struct be_mcc_wrb *wrb = wrb_from_mbox(&ctrl->mbox_mem);
|
||||
struct be_cmd_req_pmac_del *req = embedded_payload(wrb);
|
||||
int status;
|
||||
|
||||
spin_lock(&ctrl->cmd_lock);
|
||||
memset(wrb, 0, sizeof(*wrb));
|
||||
|
||||
be_wrb_hdr_prepare(wrb, sizeof(*req), true, 0);
|
||||
|
||||
be_cmd_hdr_prepare(&req->hdr, CMD_SUBSYSTEM_COMMON,
|
||||
OPCODE_COMMON_NTWK_PMAC_DEL, sizeof(*req));
|
||||
|
||||
req->if_id = cpu_to_le32(if_id);
|
||||
req->pmac_id = cpu_to_le32(pmac_id);
|
||||
|
||||
status = be_mbox_db_ring(ctrl);
|
||||
spin_unlock(&ctrl->cmd_lock);
|
||||
|
||||
return status;
|
||||
}
|
||||
|
||||
int be_cmd_cq_create(struct be_ctrl_info *ctrl,
|
||||
struct be_queue_info *cq, struct be_queue_info *eq,
|
||||
bool sol_evts, bool no_delay, int coalesce_wm)
|
||||
{
|
||||
struct be_mcc_wrb *wrb = wrb_from_mbox(&ctrl->mbox_mem);
|
||||
struct be_cmd_req_cq_create *req = embedded_payload(wrb);
|
||||
struct be_cmd_resp_cq_create *resp = embedded_payload(wrb);
|
||||
struct be_dma_mem *q_mem = &cq->dma_mem;
|
||||
void *ctxt = &req->context;
|
||||
int status;
|
||||
|
||||
spin_lock(&ctrl->cmd_lock);
|
||||
memset(wrb, 0, sizeof(*wrb));
|
||||
|
||||
be_wrb_hdr_prepare(wrb, sizeof(*req), true, 0);
|
||||
|
||||
be_cmd_hdr_prepare(&req->hdr, CMD_SUBSYSTEM_COMMON,
|
||||
OPCODE_COMMON_CQ_CREATE, sizeof(*req));
|
||||
|
||||
req->num_pages = cpu_to_le16(PAGES_4K_SPANNED(q_mem->va, q_mem->size));
|
||||
|
||||
AMAP_SET_BITS(struct amap_cq_context, coalescwm, ctxt, coalesce_wm);
|
||||
AMAP_SET_BITS(struct amap_cq_context, nodelay, ctxt, no_delay);
|
||||
AMAP_SET_BITS(struct amap_cq_context, count, ctxt,
|
||||
__ilog2_u32(cq->len/256));
|
||||
AMAP_SET_BITS(struct amap_cq_context, valid, ctxt, 1);
|
||||
AMAP_SET_BITS(struct amap_cq_context, solevent, ctxt, sol_evts);
|
||||
AMAP_SET_BITS(struct amap_cq_context, eventable, ctxt, 1);
|
||||
AMAP_SET_BITS(struct amap_cq_context, eqid, ctxt, eq->id);
|
||||
AMAP_SET_BITS(struct amap_cq_context, armed, ctxt, 0);
|
||||
AMAP_SET_BITS(struct amap_cq_context, func, ctxt, ctrl->pci_func);
|
||||
be_dws_cpu_to_le(ctxt, sizeof(req->context));
|
||||
|
||||
be_cmd_page_addrs_prepare(req->pages, ARRAY_SIZE(req->pages), q_mem);
|
||||
|
||||
status = be_mbox_db_ring(ctrl);
|
||||
if (!status) {
|
||||
cq->id = le16_to_cpu(resp->cq_id);
|
||||
cq->created = true;
|
||||
}
|
||||
spin_unlock(&ctrl->cmd_lock);
|
||||
|
||||
return status;
|
||||
}
|
||||
|
||||
int be_cmd_txq_create(struct be_ctrl_info *ctrl,
|
||||
struct be_queue_info *txq,
|
||||
struct be_queue_info *cq)
|
||||
{
|
||||
struct be_mcc_wrb *wrb = wrb_from_mbox(&ctrl->mbox_mem);
|
||||
struct be_cmd_req_eth_tx_create *req = embedded_payload(wrb);
|
||||
struct be_dma_mem *q_mem = &txq->dma_mem;
|
||||
void *ctxt = &req->context;
|
||||
int status;
|
||||
u32 len_encoded;
|
||||
|
||||
spin_lock(&ctrl->cmd_lock);
|
||||
memset(wrb, 0, sizeof(*wrb));
|
||||
|
||||
be_wrb_hdr_prepare(wrb, sizeof(*req), true, 0);
|
||||
|
||||
be_cmd_hdr_prepare(&req->hdr, CMD_SUBSYSTEM_ETH, OPCODE_ETH_TX_CREATE,
|
||||
sizeof(*req));
|
||||
|
||||
req->num_pages = PAGES_4K_SPANNED(q_mem->va, q_mem->size);
|
||||
req->ulp_num = BE_ULP1_NUM;
|
||||
req->type = BE_ETH_TX_RING_TYPE_STANDARD;
|
||||
|
||||
len_encoded = fls(txq->len); /* log2(len) + 1 */
|
||||
if (len_encoded == 16)
|
||||
len_encoded = 0;
|
||||
AMAP_SET_BITS(struct amap_tx_context, tx_ring_size, ctxt, len_encoded);
|
||||
AMAP_SET_BITS(struct amap_tx_context, pci_func_id, ctxt,
|
||||
ctrl->pci_func);
|
||||
AMAP_SET_BITS(struct amap_tx_context, ctx_valid, ctxt, 1);
|
||||
AMAP_SET_BITS(struct amap_tx_context, cq_id_send, ctxt, cq->id);
|
||||
|
||||
be_dws_cpu_to_le(ctxt, sizeof(req->context));
|
||||
|
||||
be_cmd_page_addrs_prepare(req->pages, ARRAY_SIZE(req->pages), q_mem);
|
||||
|
||||
status = be_mbox_db_ring(ctrl);
|
||||
if (!status) {
|
||||
struct be_cmd_resp_eth_tx_create *resp = embedded_payload(wrb);
|
||||
txq->id = le16_to_cpu(resp->cid);
|
||||
txq->created = true;
|
||||
}
|
||||
spin_unlock(&ctrl->cmd_lock);
|
||||
|
||||
return status;
|
||||
}
|
||||
|
||||
int be_cmd_rxq_create(struct be_ctrl_info *ctrl,
|
||||
struct be_queue_info *rxq, u16 cq_id, u16 frag_size,
|
||||
u16 max_frame_size, u32 if_id, u32 rss)
|
||||
{
|
||||
struct be_mcc_wrb *wrb = wrb_from_mbox(&ctrl->mbox_mem);
|
||||
struct be_cmd_req_eth_rx_create *req = embedded_payload(wrb);
|
||||
struct be_dma_mem *q_mem = &rxq->dma_mem;
|
||||
int status;
|
||||
|
||||
spin_lock(&ctrl->cmd_lock);
|
||||
memset(wrb, 0, sizeof(*wrb));
|
||||
|
||||
be_wrb_hdr_prepare(wrb, sizeof(*req), true, 0);
|
||||
|
||||
be_cmd_hdr_prepare(&req->hdr, CMD_SUBSYSTEM_ETH, OPCODE_ETH_RX_CREATE,
|
||||
sizeof(*req));
|
||||
|
||||
req->cq_id = cpu_to_le16(cq_id);
|
||||
req->frag_size = fls(frag_size) - 1;
|
||||
req->num_pages = 2;
|
||||
be_cmd_page_addrs_prepare(req->pages, ARRAY_SIZE(req->pages), q_mem);
|
||||
req->interface_id = cpu_to_le32(if_id);
|
||||
req->max_frame_size = cpu_to_le16(max_frame_size);
|
||||
req->rss_queue = cpu_to_le32(rss);
|
||||
|
||||
status = be_mbox_db_ring(ctrl);
|
||||
if (!status) {
|
||||
struct be_cmd_resp_eth_rx_create *resp = embedded_payload(wrb);
|
||||
rxq->id = le16_to_cpu(resp->id);
|
||||
rxq->created = true;
|
||||
}
|
||||
spin_unlock(&ctrl->cmd_lock);
|
||||
|
||||
return status;
|
||||
}
|
||||
|
||||
/* Generic destroyer function for all types of queues */
|
||||
int be_cmd_q_destroy(struct be_ctrl_info *ctrl, struct be_queue_info *q,
|
||||
int queue_type)
|
||||
{
|
||||
struct be_mcc_wrb *wrb = wrb_from_mbox(&ctrl->mbox_mem);
|
||||
struct be_cmd_req_q_destroy *req = embedded_payload(wrb);
|
||||
u8 subsys = 0, opcode = 0;
|
||||
int status;
|
||||
|
||||
spin_lock(&ctrl->cmd_lock);
|
||||
|
||||
memset(wrb, 0, sizeof(*wrb));
|
||||
be_wrb_hdr_prepare(wrb, sizeof(*req), true, 0);
|
||||
|
||||
switch (queue_type) {
|
||||
case QTYPE_EQ:
|
||||
subsys = CMD_SUBSYSTEM_COMMON;
|
||||
opcode = OPCODE_COMMON_EQ_DESTROY;
|
||||
break;
|
||||
case QTYPE_CQ:
|
||||
subsys = CMD_SUBSYSTEM_COMMON;
|
||||
opcode = OPCODE_COMMON_CQ_DESTROY;
|
||||
break;
|
||||
case QTYPE_TXQ:
|
||||
subsys = CMD_SUBSYSTEM_ETH;
|
||||
opcode = OPCODE_ETH_TX_DESTROY;
|
||||
break;
|
||||
case QTYPE_RXQ:
|
||||
subsys = CMD_SUBSYSTEM_ETH;
|
||||
opcode = OPCODE_ETH_RX_DESTROY;
|
||||
break;
|
||||
default:
|
||||
printk(KERN_WARNING DRV_NAME ":bad Q type in Q destroy cmd\n");
|
||||
status = -1;
|
||||
goto err;
|
||||
}
|
||||
be_cmd_hdr_prepare(&req->hdr, subsys, opcode, sizeof(*req));
|
||||
req->id = cpu_to_le16(q->id);
|
||||
|
||||
status = be_mbox_db_ring(ctrl);
|
||||
err:
|
||||
spin_unlock(&ctrl->cmd_lock);
|
||||
|
||||
return status;
|
||||
}
|
||||
|
||||
/* Create an rx filtering policy configuration on an i/f */
|
||||
int be_cmd_if_create(struct be_ctrl_info *ctrl, u32 flags, u8 *mac,
|
||||
bool pmac_invalid, u32 *if_handle, u32 *pmac_id)
|
||||
{
|
||||
struct be_mcc_wrb *wrb = wrb_from_mbox(&ctrl->mbox_mem);
|
||||
struct be_cmd_req_if_create *req = embedded_payload(wrb);
|
||||
int status;
|
||||
|
||||
spin_lock(&ctrl->cmd_lock);
|
||||
memset(wrb, 0, sizeof(*wrb));
|
||||
|
||||
be_wrb_hdr_prepare(wrb, sizeof(*req), true, 0);
|
||||
|
||||
be_cmd_hdr_prepare(&req->hdr, CMD_SUBSYSTEM_COMMON,
|
||||
OPCODE_COMMON_NTWK_INTERFACE_CREATE, sizeof(*req));
|
||||
|
||||
req->capability_flags = cpu_to_le32(flags);
|
||||
req->enable_flags = cpu_to_le32(flags);
|
||||
if (!pmac_invalid)
|
||||
memcpy(req->mac_addr, mac, ETH_ALEN);
|
||||
|
||||
status = be_mbox_db_ring(ctrl);
|
||||
if (!status) {
|
||||
struct be_cmd_resp_if_create *resp = embedded_payload(wrb);
|
||||
*if_handle = le32_to_cpu(resp->interface_id);
|
||||
if (!pmac_invalid)
|
||||
*pmac_id = le32_to_cpu(resp->pmac_id);
|
||||
}
|
||||
|
||||
spin_unlock(&ctrl->cmd_lock);
|
||||
return status;
|
||||
}
|
||||
|
||||
int be_cmd_if_destroy(struct be_ctrl_info *ctrl, u32 interface_id)
|
||||
{
|
||||
struct be_mcc_wrb *wrb = wrb_from_mbox(&ctrl->mbox_mem);
|
||||
struct be_cmd_req_if_destroy *req = embedded_payload(wrb);
|
||||
int status;
|
||||
|
||||
spin_lock(&ctrl->cmd_lock);
|
||||
memset(wrb, 0, sizeof(*wrb));
|
||||
|
||||
be_wrb_hdr_prepare(wrb, sizeof(*req), true, 0);
|
||||
|
||||
be_cmd_hdr_prepare(&req->hdr, CMD_SUBSYSTEM_COMMON,
|
||||
OPCODE_COMMON_NTWK_INTERFACE_DESTROY, sizeof(*req));
|
||||
|
||||
req->interface_id = cpu_to_le32(interface_id);
|
||||
status = be_mbox_db_ring(ctrl);
|
||||
|
||||
spin_unlock(&ctrl->cmd_lock);
|
||||
|
||||
return status;
|
||||
}
|
||||
|
||||
/* Get stats is a non embedded command: the request is not embedded inside
|
||||
* WRB but is a separate dma memory block
|
||||
*/
|
||||
int be_cmd_get_stats(struct be_ctrl_info *ctrl, struct be_dma_mem *nonemb_cmd)
|
||||
{
|
||||
struct be_mcc_wrb *wrb = wrb_from_mbox(&ctrl->mbox_mem);
|
||||
struct be_cmd_req_get_stats *req = nonemb_cmd->va;
|
||||
struct be_sge *sge = nonembedded_sgl(wrb);
|
||||
int status;
|
||||
|
||||
spin_lock(&ctrl->cmd_lock);
|
||||
memset(wrb, 0, sizeof(*wrb));
|
||||
|
||||
memset(req, 0, sizeof(*req));
|
||||
|
||||
be_wrb_hdr_prepare(wrb, sizeof(*req), false, 1);
|
||||
|
||||
be_cmd_hdr_prepare(&req->hdr, CMD_SUBSYSTEM_ETH,
|
||||
OPCODE_ETH_GET_STATISTICS, sizeof(*req));
|
||||
sge->pa_hi = cpu_to_le32(upper_32_bits(nonemb_cmd->dma));
|
||||
sge->pa_lo = cpu_to_le32(nonemb_cmd->dma & 0xFFFFFFFF);
|
||||
sge->len = cpu_to_le32(nonemb_cmd->size);
|
||||
|
||||
status = be_mbox_db_ring(ctrl);
|
||||
if (!status) {
|
||||
struct be_cmd_resp_get_stats *resp = nonemb_cmd->va;
|
||||
be_dws_le_to_cpu(&resp->hw_stats, sizeof(resp->hw_stats));
|
||||
}
|
||||
|
||||
spin_unlock(&ctrl->cmd_lock);
|
||||
return status;
|
||||
}
|
||||
|
||||
int be_cmd_link_status_query(struct be_ctrl_info *ctrl,
|
||||
struct be_link_info *link)
|
||||
{
|
||||
struct be_mcc_wrb *wrb = wrb_from_mbox(&ctrl->mbox_mem);
|
||||
struct be_cmd_req_link_status *req = embedded_payload(wrb);
|
||||
int status;
|
||||
|
||||
spin_lock(&ctrl->cmd_lock);
|
||||
memset(wrb, 0, sizeof(*wrb));
|
||||
|
||||
be_wrb_hdr_prepare(wrb, sizeof(*req), true, 0);
|
||||
|
||||
be_cmd_hdr_prepare(&req->hdr, CMD_SUBSYSTEM_COMMON,
|
||||
OPCODE_COMMON_NTWK_LINK_STATUS_QUERY, sizeof(*req));
|
||||
|
||||
status = be_mbox_db_ring(ctrl);
|
||||
if (!status) {
|
||||
struct be_cmd_resp_link_status *resp = embedded_payload(wrb);
|
||||
link->speed = resp->mac_speed;
|
||||
link->duplex = resp->mac_duplex;
|
||||
link->fault = resp->mac_fault;
|
||||
} else {
|
||||
link->speed = PHY_LINK_SPEED_ZERO;
|
||||
}
|
||||
|
||||
spin_unlock(&ctrl->cmd_lock);
|
||||
return status;
|
||||
}
|
||||
|
||||
int be_cmd_get_fw_ver(struct be_ctrl_info *ctrl, char *fw_ver)
|
||||
{
|
||||
struct be_mcc_wrb *wrb = wrb_from_mbox(&ctrl->mbox_mem);
|
||||
struct be_cmd_req_get_fw_version *req = embedded_payload(wrb);
|
||||
int status;
|
||||
|
||||
spin_lock(&ctrl->cmd_lock);
|
||||
memset(wrb, 0, sizeof(*wrb));
|
||||
|
||||
be_wrb_hdr_prepare(wrb, sizeof(*req), true, 0);
|
||||
|
||||
be_cmd_hdr_prepare(&req->hdr, CMD_SUBSYSTEM_COMMON,
|
||||
OPCODE_COMMON_GET_FW_VERSION, sizeof(*req));
|
||||
|
||||
status = be_mbox_db_ring(ctrl);
|
||||
if (!status) {
|
||||
struct be_cmd_resp_get_fw_version *resp = embedded_payload(wrb);
|
||||
strncpy(fw_ver, resp->firmware_version_string, FW_VER_LEN);
|
||||
}
|
||||
|
||||
spin_unlock(&ctrl->cmd_lock);
|
||||
return status;
|
||||
}
|
||||
|
||||
/* set the EQ delay interval of an EQ to specified value */
|
||||
int be_cmd_modify_eqd(struct be_ctrl_info *ctrl, u32 eq_id, u32 eqd)
|
||||
{
|
||||
struct be_mcc_wrb *wrb = wrb_from_mbox(&ctrl->mbox_mem);
|
||||
struct be_cmd_req_modify_eq_delay *req = embedded_payload(wrb);
|
||||
int status;
|
||||
|
||||
spin_lock(&ctrl->cmd_lock);
|
||||
memset(wrb, 0, sizeof(*wrb));
|
||||
|
||||
be_wrb_hdr_prepare(wrb, sizeof(*req), true, 0);
|
||||
|
||||
be_cmd_hdr_prepare(&req->hdr, CMD_SUBSYSTEM_COMMON,
|
||||
OPCODE_COMMON_MODIFY_EQ_DELAY, sizeof(*req));
|
||||
|
||||
req->num_eq = cpu_to_le32(1);
|
||||
req->delay[0].eq_id = cpu_to_le32(eq_id);
|
||||
req->delay[0].phase = 0;
|
||||
req->delay[0].delay_multiplier = cpu_to_le32(eqd);
|
||||
|
||||
status = be_mbox_db_ring(ctrl);
|
||||
|
||||
spin_unlock(&ctrl->cmd_lock);
|
||||
return status;
|
||||
}
|
||||
|
||||
int be_cmd_vlan_config(struct be_ctrl_info *ctrl, u32 if_id, u16 *vtag_array,
|
||||
u32 num, bool untagged, bool promiscuous)
|
||||
{
|
||||
struct be_mcc_wrb *wrb = wrb_from_mbox(&ctrl->mbox_mem);
|
||||
struct be_cmd_req_vlan_config *req = embedded_payload(wrb);
|
||||
int status;
|
||||
|
||||
spin_lock(&ctrl->cmd_lock);
|
||||
memset(wrb, 0, sizeof(*wrb));
|
||||
|
||||
be_wrb_hdr_prepare(wrb, sizeof(*req), true, 0);
|
||||
|
||||
be_cmd_hdr_prepare(&req->hdr, CMD_SUBSYSTEM_COMMON,
|
||||
OPCODE_COMMON_NTWK_VLAN_CONFIG, sizeof(*req));
|
||||
|
||||
req->interface_id = if_id;
|
||||
req->promiscuous = promiscuous;
|
||||
req->untagged = untagged;
|
||||
req->num_vlan = num;
|
||||
if (!promiscuous) {
|
||||
memcpy(req->normal_vlan, vtag_array,
|
||||
req->num_vlan * sizeof(vtag_array[0]));
|
||||
}
|
||||
|
||||
status = be_mbox_db_ring(ctrl);
|
||||
|
||||
spin_unlock(&ctrl->cmd_lock);
|
||||
return status;
|
||||
}
|
||||
|
||||
int be_cmd_promiscuous_config(struct be_ctrl_info *ctrl, u8 port_num, bool en)
|
||||
{
|
||||
struct be_mcc_wrb *wrb = wrb_from_mbox(&ctrl->mbox_mem);
|
||||
struct be_cmd_req_promiscuous_config *req = embedded_payload(wrb);
|
||||
int status;
|
||||
|
||||
spin_lock(&ctrl->cmd_lock);
|
||||
memset(wrb, 0, sizeof(*wrb));
|
||||
|
||||
be_wrb_hdr_prepare(wrb, sizeof(*req), true, 0);
|
||||
|
||||
be_cmd_hdr_prepare(&req->hdr, CMD_SUBSYSTEM_ETH,
|
||||
OPCODE_ETH_PROMISCUOUS, sizeof(*req));
|
||||
|
||||
if (port_num)
|
||||
req->port1_promiscuous = en;
|
||||
else
|
||||
req->port0_promiscuous = en;
|
||||
|
||||
status = be_mbox_db_ring(ctrl);
|
||||
|
||||
spin_unlock(&ctrl->cmd_lock);
|
||||
return status;
|
||||
}
|
||||
|
||||
int be_cmd_mcast_mac_set(struct be_ctrl_info *ctrl, u32 if_id, u8 *mac_table,
|
||||
u32 num, bool promiscuous)
|
||||
{
|
||||
struct be_mcc_wrb *wrb = wrb_from_mbox(&ctrl->mbox_mem);
|
||||
struct be_cmd_req_mcast_mac_config *req = embedded_payload(wrb);
|
||||
int status;
|
||||
|
||||
spin_lock(&ctrl->cmd_lock);
|
||||
memset(wrb, 0, sizeof(*wrb));
|
||||
|
||||
be_wrb_hdr_prepare(wrb, sizeof(*req), true, 0);
|
||||
|
||||
be_cmd_hdr_prepare(&req->hdr, CMD_SUBSYSTEM_COMMON,
|
||||
OPCODE_COMMON_NTWK_MULTICAST_SET, sizeof(*req));
|
||||
|
||||
req->interface_id = if_id;
|
||||
req->promiscuous = promiscuous;
|
||||
if (!promiscuous) {
|
||||
req->num_mac = cpu_to_le16(num);
|
||||
if (num)
|
||||
memcpy(req->mac, mac_table, ETH_ALEN * num);
|
||||
}
|
||||
|
||||
status = be_mbox_db_ring(ctrl);
|
||||
|
||||
spin_unlock(&ctrl->cmd_lock);
|
||||
return status;
|
||||
}
|
||||
|
||||
int be_cmd_set_flow_control(struct be_ctrl_info *ctrl, u32 tx_fc, u32 rx_fc)
|
||||
{
|
||||
struct be_mcc_wrb *wrb = wrb_from_mbox(&ctrl->mbox_mem);
|
||||
struct be_cmd_req_set_flow_control *req = embedded_payload(wrb);
|
||||
int status;
|
||||
|
||||
spin_lock(&ctrl->cmd_lock);
|
||||
|
||||
memset(wrb, 0, sizeof(*wrb));
|
||||
|
||||
be_wrb_hdr_prepare(wrb, sizeof(*req), true, 0);
|
||||
|
||||
be_cmd_hdr_prepare(&req->hdr, CMD_SUBSYSTEM_COMMON,
|
||||
OPCODE_COMMON_SET_FLOW_CONTROL, sizeof(*req));
|
||||
|
||||
req->tx_flow_control = cpu_to_le16((u16)tx_fc);
|
||||
req->rx_flow_control = cpu_to_le16((u16)rx_fc);
|
||||
|
||||
status = be_mbox_db_ring(ctrl);
|
||||
|
||||
spin_unlock(&ctrl->cmd_lock);
|
||||
return status;
|
||||
}
|
||||
|
||||
int be_cmd_get_flow_control(struct be_ctrl_info *ctrl, u32 *tx_fc, u32 *rx_fc)
|
||||
{
|
||||
struct be_mcc_wrb *wrb = wrb_from_mbox(&ctrl->mbox_mem);
|
||||
struct be_cmd_req_get_flow_control *req = embedded_payload(wrb);
|
||||
int status;
|
||||
|
||||
spin_lock(&ctrl->cmd_lock);
|
||||
|
||||
memset(wrb, 0, sizeof(*wrb));
|
||||
|
||||
be_wrb_hdr_prepare(wrb, sizeof(*req), true, 0);
|
||||
|
||||
be_cmd_hdr_prepare(&req->hdr, CMD_SUBSYSTEM_COMMON,
|
||||
OPCODE_COMMON_GET_FLOW_CONTROL, sizeof(*req));
|
||||
|
||||
status = be_mbox_db_ring(ctrl);
|
||||
if (!status) {
|
||||
struct be_cmd_resp_get_flow_control *resp =
|
||||
embedded_payload(wrb);
|
||||
*tx_fc = le16_to_cpu(resp->tx_flow_control);
|
||||
*rx_fc = le16_to_cpu(resp->rx_flow_control);
|
||||
}
|
||||
|
||||
spin_unlock(&ctrl->cmd_lock);
|
||||
return status;
|
||||
}
|
||||
|
||||
int be_cmd_query_fw_cfg(struct be_ctrl_info *ctrl, u32 *port_num)
|
||||
{
|
||||
struct be_mcc_wrb *wrb = wrb_from_mbox(&ctrl->mbox_mem);
|
||||
struct be_cmd_req_query_fw_cfg *req = embedded_payload(wrb);
|
||||
int status;
|
||||
|
||||
spin_lock(&ctrl->cmd_lock);
|
||||
|
||||
memset(wrb, 0, sizeof(*wrb));
|
||||
|
||||
be_wrb_hdr_prepare(wrb, sizeof(*req), true, 0);
|
||||
|
||||
be_cmd_hdr_prepare(&req->hdr, CMD_SUBSYSTEM_COMMON,
|
||||
OPCODE_COMMON_QUERY_FIRMWARE_CONFIG, sizeof(*req));
|
||||
|
||||
status = be_mbox_db_ring(ctrl);
|
||||
if (!status) {
|
||||
struct be_cmd_resp_query_fw_cfg *resp = embedded_payload(wrb);
|
||||
*port_num = le32_to_cpu(resp->phys_port);
|
||||
}
|
||||
|
||||
spin_unlock(&ctrl->cmd_lock);
|
||||
return status;
|
||||
}
|
688
drivers/net/benet/be_cmds.h
Normal file
688
drivers/net/benet/be_cmds.h
Normal file
|
@ -0,0 +1,688 @@
|
|||
/*
|
||||
* Copyright (C) 2005 - 2009 ServerEngines
|
||||
* All rights reserved.
|
||||
*
|
||||
* This program is free software; you can redistribute it and/or
|
||||
* modify it under the terms of the GNU General Public License version 2
|
||||
* as published by the Free Software Foundation. The full GNU General
|
||||
* Public License is included in this distribution in the file called COPYING.
|
||||
*
|
||||
* Contact Information:
|
||||
* linux-drivers@serverengines.com
|
||||
*
|
||||
* ServerEngines
|
||||
* 209 N. Fair Oaks Ave
|
||||
* Sunnyvale, CA 94085
|
||||
*/
|
||||
|
||||
/*
|
||||
* The driver sends configuration and managements command requests to the
|
||||
* firmware in the BE. These requests are communicated to the processor
|
||||
* using Work Request Blocks (WRBs) submitted to the MCC-WRB ring or via one
|
||||
* WRB inside a MAILBOX.
|
||||
* The commands are serviced by the ARM processor in the BladeEngine's MPU.
|
||||
*/
|
||||
|
||||
struct be_sge {
|
||||
u32 pa_lo;
|
||||
u32 pa_hi;
|
||||
u32 len;
|
||||
};
|
||||
|
||||
#define MCC_WRB_EMBEDDED_MASK 1 /* bit 0 of dword 0*/
|
||||
#define MCC_WRB_SGE_CNT_SHIFT 3 /* bits 3 - 7 of dword 0 */
|
||||
#define MCC_WRB_SGE_CNT_MASK 0x1F /* bits 3 - 7 of dword 0 */
|
||||
struct be_mcc_wrb {
|
||||
u32 embedded; /* dword 0 */
|
||||
u32 payload_length; /* dword 1 */
|
||||
u32 tag0; /* dword 2 */
|
||||
u32 tag1; /* dword 3 */
|
||||
u32 rsvd; /* dword 4 */
|
||||
union {
|
||||
u8 embedded_payload[236]; /* used by embedded cmds */
|
||||
struct be_sge sgl[19]; /* used by non-embedded cmds */
|
||||
} payload;
|
||||
};
|
||||
|
||||
#define CQE_FLAGS_VALID_MASK (1 << 31)
|
||||
#define CQE_FLAGS_ASYNC_MASK (1 << 30)
|
||||
#define CQE_FLAGS_COMPLETED_MASK (1 << 28)
|
||||
#define CQE_FLAGS_CONSUMED_MASK (1 << 27)
|
||||
|
||||
/* Completion Status */
|
||||
enum {
|
||||
MCC_STATUS_SUCCESS = 0x0,
|
||||
/* The client does not have sufficient privileges to execute the command */
|
||||
MCC_STATUS_INSUFFICIENT_PRIVILEGES = 0x1,
|
||||
/* A parameter in the command was invalid. */
|
||||
MCC_STATUS_INVALID_PARAMETER = 0x2,
|
||||
/* There are insufficient chip resources to execute the command */
|
||||
MCC_STATUS_INSUFFICIENT_RESOURCES = 0x3,
|
||||
/* The command is completing because the queue was getting flushed */
|
||||
MCC_STATUS_QUEUE_FLUSHING = 0x4,
|
||||
/* The command is completing with a DMA error */
|
||||
MCC_STATUS_DMA_FAILED = 0x5
|
||||
};
|
||||
|
||||
#define CQE_STATUS_COMPL_MASK 0xFFFF
|
||||
#define CQE_STATUS_COMPL_SHIFT 0 /* bits 0 - 15 */
|
||||
#define CQE_STATUS_EXTD_MASK 0xFFFF
|
||||
#define CQE_STATUS_EXTD_SHIFT 0 /* bits 0 - 15 */
|
||||
|
||||
struct be_mcc_cq_entry {
|
||||
u32 status; /* dword 0 */
|
||||
u32 tag0; /* dword 1 */
|
||||
u32 tag1; /* dword 2 */
|
||||
u32 flags; /* dword 3 */
|
||||
};
|
||||
|
||||
struct be_mcc_mailbox {
|
||||
struct be_mcc_wrb wrb;
|
||||
struct be_mcc_cq_entry cqe;
|
||||
};
|
||||
|
||||
#define CMD_SUBSYSTEM_COMMON 0x1
|
||||
#define CMD_SUBSYSTEM_ETH 0x3
|
||||
|
||||
#define OPCODE_COMMON_NTWK_MAC_QUERY 1
|
||||
#define OPCODE_COMMON_NTWK_MAC_SET 2
|
||||
#define OPCODE_COMMON_NTWK_MULTICAST_SET 3
|
||||
#define OPCODE_COMMON_NTWK_VLAN_CONFIG 4
|
||||
#define OPCODE_COMMON_NTWK_LINK_STATUS_QUERY 5
|
||||
#define OPCODE_COMMON_CQ_CREATE 12
|
||||
#define OPCODE_COMMON_EQ_CREATE 13
|
||||
#define OPCODE_COMMON_MCC_CREATE 21
|
||||
#define OPCODE_COMMON_NTWK_RX_FILTER 34
|
||||
#define OPCODE_COMMON_GET_FW_VERSION 35
|
||||
#define OPCODE_COMMON_SET_FLOW_CONTROL 36
|
||||
#define OPCODE_COMMON_GET_FLOW_CONTROL 37
|
||||
#define OPCODE_COMMON_SET_FRAME_SIZE 39
|
||||
#define OPCODE_COMMON_MODIFY_EQ_DELAY 41
|
||||
#define OPCODE_COMMON_FIRMWARE_CONFIG 42
|
||||
#define OPCODE_COMMON_NTWK_INTERFACE_CREATE 50
|
||||
#define OPCODE_COMMON_NTWK_INTERFACE_DESTROY 51
|
||||
#define OPCODE_COMMON_CQ_DESTROY 54
|
||||
#define OPCODE_COMMON_EQ_DESTROY 55
|
||||
#define OPCODE_COMMON_QUERY_FIRMWARE_CONFIG 58
|
||||
#define OPCODE_COMMON_NTWK_PMAC_ADD 59
|
||||
#define OPCODE_COMMON_NTWK_PMAC_DEL 60
|
||||
|
||||
#define OPCODE_ETH_ACPI_CONFIG 2
|
||||
#define OPCODE_ETH_PROMISCUOUS 3
|
||||
#define OPCODE_ETH_GET_STATISTICS 4
|
||||
#define OPCODE_ETH_TX_CREATE 7
|
||||
#define OPCODE_ETH_RX_CREATE 8
|
||||
#define OPCODE_ETH_TX_DESTROY 9
|
||||
#define OPCODE_ETH_RX_DESTROY 10
|
||||
|
||||
struct be_cmd_req_hdr {
|
||||
u8 opcode; /* dword 0 */
|
||||
u8 subsystem; /* dword 0 */
|
||||
u8 port_number; /* dword 0 */
|
||||
u8 domain; /* dword 0 */
|
||||
u32 timeout; /* dword 1 */
|
||||
u32 request_length; /* dword 2 */
|
||||
u32 rsvd; /* dword 3 */
|
||||
};
|
||||
|
||||
#define RESP_HDR_INFO_OPCODE_SHIFT 0 /* bits 0 - 7 */
|
||||
#define RESP_HDR_INFO_SUBSYS_SHIFT 8 /* bits 8 - 15 */
|
||||
struct be_cmd_resp_hdr {
|
||||
u32 info; /* dword 0 */
|
||||
u32 status; /* dword 1 */
|
||||
u32 response_length; /* dword 2 */
|
||||
u32 actual_resp_len; /* dword 3 */
|
||||
};
|
||||
|
||||
struct phys_addr {
|
||||
u32 lo;
|
||||
u32 hi;
|
||||
};
|
||||
|
||||
/**************************
|
||||
* BE Command definitions *
|
||||
**************************/
|
||||
|
||||
/* Pseudo amap definition in which each bit of the actual structure is defined
|
||||
* as a byte: used to calculate offset/shift/mask of each field */
|
||||
struct amap_eq_context {
|
||||
u8 cidx[13]; /* dword 0*/
|
||||
u8 rsvd0[3]; /* dword 0*/
|
||||
u8 epidx[13]; /* dword 0*/
|
||||
u8 valid; /* dword 0*/
|
||||
u8 rsvd1; /* dword 0*/
|
||||
u8 size; /* dword 0*/
|
||||
u8 pidx[13]; /* dword 1*/
|
||||
u8 rsvd2[3]; /* dword 1*/
|
||||
u8 pd[10]; /* dword 1*/
|
||||
u8 count[3]; /* dword 1*/
|
||||
u8 solevent; /* dword 1*/
|
||||
u8 stalled; /* dword 1*/
|
||||
u8 armed; /* dword 1*/
|
||||
u8 rsvd3[4]; /* dword 2*/
|
||||
u8 func[8]; /* dword 2*/
|
||||
u8 rsvd4; /* dword 2*/
|
||||
u8 delaymult[10]; /* dword 2*/
|
||||
u8 rsvd5[2]; /* dword 2*/
|
||||
u8 phase[2]; /* dword 2*/
|
||||
u8 nodelay; /* dword 2*/
|
||||
u8 rsvd6[4]; /* dword 2*/
|
||||
u8 rsvd7[32]; /* dword 3*/
|
||||
} __packed;
|
||||
|
||||
struct be_cmd_req_eq_create {
|
||||
struct be_cmd_req_hdr hdr;
|
||||
u16 num_pages; /* sword */
|
||||
u16 rsvd0; /* sword */
|
||||
u8 context[sizeof(struct amap_eq_context) / 8];
|
||||
struct phys_addr pages[8];
|
||||
} __packed;
|
||||
|
||||
struct be_cmd_resp_eq_create {
|
||||
struct be_cmd_resp_hdr resp_hdr;
|
||||
u16 eq_id; /* sword */
|
||||
u16 rsvd0; /* sword */
|
||||
} __packed;
|
||||
|
||||
/******************** Mac query ***************************/
|
||||
enum {
|
||||
MAC_ADDRESS_TYPE_STORAGE = 0x0,
|
||||
MAC_ADDRESS_TYPE_NETWORK = 0x1,
|
||||
MAC_ADDRESS_TYPE_PD = 0x2,
|
||||
MAC_ADDRESS_TYPE_MANAGEMENT = 0x3
|
||||
};
|
||||
|
||||
struct mac_addr {
|
||||
u16 size_of_struct;
|
||||
u8 addr[ETH_ALEN];
|
||||
} __packed;
|
||||
|
||||
struct be_cmd_req_mac_query {
|
||||
struct be_cmd_req_hdr hdr;
|
||||
u8 type;
|
||||
u8 permanent;
|
||||
u16 if_id;
|
||||
} __packed;
|
||||
|
||||
struct be_cmd_resp_mac_query {
|
||||
struct be_cmd_resp_hdr hdr;
|
||||
struct mac_addr mac;
|
||||
};
|
||||
|
||||
/******************** PMac Add ***************************/
|
||||
struct be_cmd_req_pmac_add {
|
||||
struct be_cmd_req_hdr hdr;
|
||||
u32 if_id;
|
||||
u8 mac_address[ETH_ALEN];
|
||||
u8 rsvd0[2];
|
||||
} __packed;
|
||||
|
||||
struct be_cmd_resp_pmac_add {
|
||||
struct be_cmd_resp_hdr hdr;
|
||||
u32 pmac_id;
|
||||
};
|
||||
|
||||
/******************** PMac Del ***************************/
|
||||
struct be_cmd_req_pmac_del {
|
||||
struct be_cmd_req_hdr hdr;
|
||||
u32 if_id;
|
||||
u32 pmac_id;
|
||||
};
|
||||
|
||||
/******************** Create CQ ***************************/
|
||||
/* Pseudo amap definition in which each bit of the actual structure is defined
|
||||
* as a byte: used to calculate offset/shift/mask of each field */
|
||||
struct amap_cq_context {
|
||||
u8 cidx[11]; /* dword 0*/
|
||||
u8 rsvd0; /* dword 0*/
|
||||
u8 coalescwm[2]; /* dword 0*/
|
||||
u8 nodelay; /* dword 0*/
|
||||
u8 epidx[11]; /* dword 0*/
|
||||
u8 rsvd1; /* dword 0*/
|
||||
u8 count[2]; /* dword 0*/
|
||||
u8 valid; /* dword 0*/
|
||||
u8 solevent; /* dword 0*/
|
||||
u8 eventable; /* dword 0*/
|
||||
u8 pidx[11]; /* dword 1*/
|
||||
u8 rsvd2; /* dword 1*/
|
||||
u8 pd[10]; /* dword 1*/
|
||||
u8 eqid[8]; /* dword 1*/
|
||||
u8 stalled; /* dword 1*/
|
||||
u8 armed; /* dword 1*/
|
||||
u8 rsvd3[4]; /* dword 2*/
|
||||
u8 func[8]; /* dword 2*/
|
||||
u8 rsvd4[20]; /* dword 2*/
|
||||
u8 rsvd5[32]; /* dword 3*/
|
||||
} __packed;
|
||||
|
||||
struct be_cmd_req_cq_create {
|
||||
struct be_cmd_req_hdr hdr;
|
||||
u16 num_pages;
|
||||
u16 rsvd0;
|
||||
u8 context[sizeof(struct amap_cq_context) / 8];
|
||||
struct phys_addr pages[8];
|
||||
} __packed;
|
||||
|
||||
struct be_cmd_resp_cq_create {
|
||||
struct be_cmd_resp_hdr hdr;
|
||||
u16 cq_id;
|
||||
u16 rsvd0;
|
||||
} __packed;
|
||||
|
||||
/******************** Create TxQ ***************************/
|
||||
#define BE_ETH_TX_RING_TYPE_STANDARD 2
|
||||
#define BE_ULP1_NUM 1
|
||||
|
||||
/* Pseudo amap definition in which each bit of the actual structure is defined
|
||||
* as a byte: used to calculate offset/shift/mask of each field */
|
||||
struct amap_tx_context {
|
||||
u8 rsvd0[16]; /* dword 0 */
|
||||
u8 tx_ring_size[4]; /* dword 0 */
|
||||
u8 rsvd1[26]; /* dword 0 */
|
||||
u8 pci_func_id[8]; /* dword 1 */
|
||||
u8 rsvd2[9]; /* dword 1 */
|
||||
u8 ctx_valid; /* dword 1 */
|
||||
u8 cq_id_send[16]; /* dword 2 */
|
||||
u8 rsvd3[16]; /* dword 2 */
|
||||
u8 rsvd4[32]; /* dword 3 */
|
||||
u8 rsvd5[32]; /* dword 4 */
|
||||
u8 rsvd6[32]; /* dword 5 */
|
||||
u8 rsvd7[32]; /* dword 6 */
|
||||
u8 rsvd8[32]; /* dword 7 */
|
||||
u8 rsvd9[32]; /* dword 8 */
|
||||
u8 rsvd10[32]; /* dword 9 */
|
||||
u8 rsvd11[32]; /* dword 10 */
|
||||
u8 rsvd12[32]; /* dword 11 */
|
||||
u8 rsvd13[32]; /* dword 12 */
|
||||
u8 rsvd14[32]; /* dword 13 */
|
||||
u8 rsvd15[32]; /* dword 14 */
|
||||
u8 rsvd16[32]; /* dword 15 */
|
||||
} __packed;
|
||||
|
||||
struct be_cmd_req_eth_tx_create {
|
||||
struct be_cmd_req_hdr hdr;
|
||||
u8 num_pages;
|
||||
u8 ulp_num;
|
||||
u8 type;
|
||||
u8 bound_port;
|
||||
u8 context[sizeof(struct amap_tx_context) / 8];
|
||||
struct phys_addr pages[8];
|
||||
} __packed;
|
||||
|
||||
struct be_cmd_resp_eth_tx_create {
|
||||
struct be_cmd_resp_hdr hdr;
|
||||
u16 cid;
|
||||
u16 rsvd0;
|
||||
} __packed;
|
||||
|
||||
/******************** Create RxQ ***************************/
|
||||
struct be_cmd_req_eth_rx_create {
|
||||
struct be_cmd_req_hdr hdr;
|
||||
u16 cq_id;
|
||||
u8 frag_size;
|
||||
u8 num_pages;
|
||||
struct phys_addr pages[2];
|
||||
u32 interface_id;
|
||||
u16 max_frame_size;
|
||||
u16 rsvd0;
|
||||
u32 rss_queue;
|
||||
} __packed;
|
||||
|
||||
struct be_cmd_resp_eth_rx_create {
|
||||
struct be_cmd_resp_hdr hdr;
|
||||
u16 id;
|
||||
u8 cpu_id;
|
||||
u8 rsvd0;
|
||||
} __packed;
|
||||
|
||||
/******************** Q Destroy ***************************/
|
||||
/* Type of Queue to be destroyed */
|
||||
enum {
|
||||
QTYPE_EQ = 1,
|
||||
QTYPE_CQ,
|
||||
QTYPE_TXQ,
|
||||
QTYPE_RXQ
|
||||
};
|
||||
|
||||
struct be_cmd_req_q_destroy {
|
||||
struct be_cmd_req_hdr hdr;
|
||||
u16 id;
|
||||
u16 bypass_flush; /* valid only for rx q destroy */
|
||||
} __packed;
|
||||
|
||||
/************ I/f Create (it's actually I/f Config Create)**********/
|
||||
|
||||
/* Capability flags for the i/f */
|
||||
enum be_if_flags {
|
||||
BE_IF_FLAGS_RSS = 0x4,
|
||||
BE_IF_FLAGS_PROMISCUOUS = 0x8,
|
||||
BE_IF_FLAGS_BROADCAST = 0x10,
|
||||
BE_IF_FLAGS_UNTAGGED = 0x20,
|
||||
BE_IF_FLAGS_ULP = 0x40,
|
||||
BE_IF_FLAGS_VLAN_PROMISCUOUS = 0x80,
|
||||
BE_IF_FLAGS_VLAN = 0x100,
|
||||
BE_IF_FLAGS_MCAST_PROMISCUOUS = 0x200,
|
||||
BE_IF_FLAGS_PASS_L2_ERRORS = 0x400,
|
||||
BE_IF_FLAGS_PASS_L3L4_ERRORS = 0x800
|
||||
};
|
||||
|
||||
/* An RX interface is an object with one or more MAC addresses and
|
||||
* filtering capabilities. */
|
||||
struct be_cmd_req_if_create {
|
||||
struct be_cmd_req_hdr hdr;
|
||||
u32 version; /* ignore currntly */
|
||||
u32 capability_flags;
|
||||
u32 enable_flags;
|
||||
u8 mac_addr[ETH_ALEN];
|
||||
u8 rsvd0;
|
||||
u8 pmac_invalid; /* if set, don't attach the mac addr to the i/f */
|
||||
u32 vlan_tag; /* not used currently */
|
||||
} __packed;
|
||||
|
||||
struct be_cmd_resp_if_create {
|
||||
struct be_cmd_resp_hdr hdr;
|
||||
u32 interface_id;
|
||||
u32 pmac_id;
|
||||
};
|
||||
|
||||
/****** I/f Destroy(it's actually I/f Config Destroy )**********/
|
||||
struct be_cmd_req_if_destroy {
|
||||
struct be_cmd_req_hdr hdr;
|
||||
u32 interface_id;
|
||||
};
|
||||
|
||||
/*************** HW Stats Get **********************************/
|
||||
struct be_port_rxf_stats {
|
||||
u32 rx_bytes_lsd; /* dword 0*/
|
||||
u32 rx_bytes_msd; /* dword 1*/
|
||||
u32 rx_total_frames; /* dword 2*/
|
||||
u32 rx_unicast_frames; /* dword 3*/
|
||||
u32 rx_multicast_frames; /* dword 4*/
|
||||
u32 rx_broadcast_frames; /* dword 5*/
|
||||
u32 rx_crc_errors; /* dword 6*/
|
||||
u32 rx_alignment_symbol_errors; /* dword 7*/
|
||||
u32 rx_pause_frames; /* dword 8*/
|
||||
u32 rx_control_frames; /* dword 9*/
|
||||
u32 rx_in_range_errors; /* dword 10*/
|
||||
u32 rx_out_range_errors; /* dword 11*/
|
||||
u32 rx_frame_too_long; /* dword 12*/
|
||||
u32 rx_address_match_errors; /* dword 13*/
|
||||
u32 rx_vlan_mismatch; /* dword 14*/
|
||||
u32 rx_dropped_too_small; /* dword 15*/
|
||||
u32 rx_dropped_too_short; /* dword 16*/
|
||||
u32 rx_dropped_header_too_small; /* dword 17*/
|
||||
u32 rx_dropped_tcp_length; /* dword 18*/
|
||||
u32 rx_dropped_runt; /* dword 19*/
|
||||
u32 rx_64_byte_packets; /* dword 20*/
|
||||
u32 rx_65_127_byte_packets; /* dword 21*/
|
||||
u32 rx_128_256_byte_packets; /* dword 22*/
|
||||
u32 rx_256_511_byte_packets; /* dword 23*/
|
||||
u32 rx_512_1023_byte_packets; /* dword 24*/
|
||||
u32 rx_1024_1518_byte_packets; /* dword 25*/
|
||||
u32 rx_1519_2047_byte_packets; /* dword 26*/
|
||||
u32 rx_2048_4095_byte_packets; /* dword 27*/
|
||||
u32 rx_4096_8191_byte_packets; /* dword 28*/
|
||||
u32 rx_8192_9216_byte_packets; /* dword 29*/
|
||||
u32 rx_ip_checksum_errs; /* dword 30*/
|
||||
u32 rx_tcp_checksum_errs; /* dword 31*/
|
||||
u32 rx_udp_checksum_errs; /* dword 32*/
|
||||
u32 rx_non_rss_packets; /* dword 33*/
|
||||
u32 rx_ipv4_packets; /* dword 34*/
|
||||
u32 rx_ipv6_packets; /* dword 35*/
|
||||
u32 rx_ipv4_bytes_lsd; /* dword 36*/
|
||||
u32 rx_ipv4_bytes_msd; /* dword 37*/
|
||||
u32 rx_ipv6_bytes_lsd; /* dword 38*/
|
||||
u32 rx_ipv6_bytes_msd; /* dword 39*/
|
||||
u32 rx_chute1_packets; /* dword 40*/
|
||||
u32 rx_chute2_packets; /* dword 41*/
|
||||
u32 rx_chute3_packets; /* dword 42*/
|
||||
u32 rx_management_packets; /* dword 43*/
|
||||
u32 rx_switched_unicast_packets; /* dword 44*/
|
||||
u32 rx_switched_multicast_packets; /* dword 45*/
|
||||
u32 rx_switched_broadcast_packets; /* dword 46*/
|
||||
u32 tx_bytes_lsd; /* dword 47*/
|
||||
u32 tx_bytes_msd; /* dword 48*/
|
||||
u32 tx_unicastframes; /* dword 49*/
|
||||
u32 tx_multicastframes; /* dword 50*/
|
||||
u32 tx_broadcastframes; /* dword 51*/
|
||||
u32 tx_pauseframes; /* dword 52*/
|
||||
u32 tx_controlframes; /* dword 53*/
|
||||
u32 tx_64_byte_packets; /* dword 54*/
|
||||
u32 tx_65_127_byte_packets; /* dword 55*/
|
||||
u32 tx_128_256_byte_packets; /* dword 56*/
|
||||
u32 tx_256_511_byte_packets; /* dword 57*/
|
||||
u32 tx_512_1023_byte_packets; /* dword 58*/
|
||||
u32 tx_1024_1518_byte_packets; /* dword 59*/
|
||||
u32 tx_1519_2047_byte_packets; /* dword 60*/
|
||||
u32 tx_2048_4095_byte_packets; /* dword 61*/
|
||||
u32 tx_4096_8191_byte_packets; /* dword 62*/
|
||||
u32 tx_8192_9216_byte_packets; /* dword 63*/
|
||||
u32 rx_fifo_overflow; /* dword 64*/
|
||||
u32 rx_input_fifo_overflow; /* dword 65*/
|
||||
};
|
||||
|
||||
struct be_rxf_stats {
|
||||
struct be_port_rxf_stats port[2];
|
||||
u32 rx_drops_no_pbuf; /* dword 132*/
|
||||
u32 rx_drops_no_txpb; /* dword 133*/
|
||||
u32 rx_drops_no_erx_descr; /* dword 134*/
|
||||
u32 rx_drops_no_tpre_descr; /* dword 135*/
|
||||
u32 management_rx_port_packets; /* dword 136*/
|
||||
u32 management_rx_port_bytes; /* dword 137*/
|
||||
u32 management_rx_port_pause_frames; /* dword 138*/
|
||||
u32 management_rx_port_errors; /* dword 139*/
|
||||
u32 management_tx_port_packets; /* dword 140*/
|
||||
u32 management_tx_port_bytes; /* dword 141*/
|
||||
u32 management_tx_port_pause; /* dword 142*/
|
||||
u32 management_rx_port_rxfifo_overflow; /* dword 143*/
|
||||
u32 rx_drops_too_many_frags; /* dword 144*/
|
||||
u32 rx_drops_invalid_ring; /* dword 145*/
|
||||
u32 forwarded_packets; /* dword 146*/
|
||||
u32 rx_drops_mtu; /* dword 147*/
|
||||
u32 rsvd0[15];
|
||||
};
|
||||
|
||||
struct be_erx_stats {
|
||||
u32 rx_drops_no_fragments[44]; /* dwordS 0 to 43*/
|
||||
u32 debug_wdma_sent_hold; /* dword 44*/
|
||||
u32 debug_wdma_pbfree_sent_hold; /* dword 45*/
|
||||
u32 debug_wdma_zerobyte_pbfree_sent_hold; /* dword 46*/
|
||||
u32 debug_pmem_pbuf_dealloc; /* dword 47*/
|
||||
};
|
||||
|
||||
struct be_hw_stats {
|
||||
struct be_rxf_stats rxf;
|
||||
u32 rsvd[48];
|
||||
struct be_erx_stats erx;
|
||||
};
|
||||
|
||||
struct be_cmd_req_get_stats {
|
||||
struct be_cmd_req_hdr hdr;
|
||||
u8 rsvd[sizeof(struct be_hw_stats)];
|
||||
};
|
||||
|
||||
struct be_cmd_resp_get_stats {
|
||||
struct be_cmd_resp_hdr hdr;
|
||||
struct be_hw_stats hw_stats;
|
||||
};
|
||||
|
||||
struct be_cmd_req_vlan_config {
|
||||
struct be_cmd_req_hdr hdr;
|
||||
u8 interface_id;
|
||||
u8 promiscuous;
|
||||
u8 untagged;
|
||||
u8 num_vlan;
|
||||
u16 normal_vlan[64];
|
||||
} __packed;
|
||||
|
||||
struct be_cmd_req_promiscuous_config {
|
||||
struct be_cmd_req_hdr hdr;
|
||||
u8 port0_promiscuous;
|
||||
u8 port1_promiscuous;
|
||||
u16 rsvd0;
|
||||
} __packed;
|
||||
|
||||
struct macaddr {
|
||||
u8 byte[ETH_ALEN];
|
||||
};
|
||||
|
||||
struct be_cmd_req_mcast_mac_config {
|
||||
struct be_cmd_req_hdr hdr;
|
||||
u16 num_mac;
|
||||
u8 promiscuous;
|
||||
u8 interface_id;
|
||||
struct macaddr mac[32];
|
||||
} __packed;
|
||||
|
||||
static inline struct be_hw_stats *
|
||||
hw_stats_from_cmd(struct be_cmd_resp_get_stats *cmd)
|
||||
{
|
||||
return &cmd->hw_stats;
|
||||
}
|
||||
|
||||
/******************** Link Status Query *******************/
|
||||
struct be_cmd_req_link_status {
|
||||
struct be_cmd_req_hdr hdr;
|
||||
u32 rsvd;
|
||||
};
|
||||
|
||||
struct be_link_info {
|
||||
u8 duplex;
|
||||
u8 speed;
|
||||
u8 fault;
|
||||
};
|
||||
|
||||
enum {
|
||||
PHY_LINK_DUPLEX_NONE = 0x0,
|
||||
PHY_LINK_DUPLEX_HALF = 0x1,
|
||||
PHY_LINK_DUPLEX_FULL = 0x2
|
||||
};
|
||||
|
||||
enum {
|
||||
PHY_LINK_SPEED_ZERO = 0x0, /* => No link */
|
||||
PHY_LINK_SPEED_10MBPS = 0x1,
|
||||
PHY_LINK_SPEED_100MBPS = 0x2,
|
||||
PHY_LINK_SPEED_1GBPS = 0x3,
|
||||
PHY_LINK_SPEED_10GBPS = 0x4
|
||||
};
|
||||
|
||||
struct be_cmd_resp_link_status {
|
||||
struct be_cmd_resp_hdr hdr;
|
||||
u8 physical_port;
|
||||
u8 mac_duplex;
|
||||
u8 mac_speed;
|
||||
u8 mac_fault;
|
||||
u8 mgmt_mac_duplex;
|
||||
u8 mgmt_mac_speed;
|
||||
u16 rsvd0;
|
||||
} __packed;
|
||||
|
||||
/******************** Get FW Version *******************/
|
||||
#define FW_VER_LEN 32
|
||||
struct be_cmd_req_get_fw_version {
|
||||
struct be_cmd_req_hdr hdr;
|
||||
u8 rsvd0[FW_VER_LEN];
|
||||
u8 rsvd1[FW_VER_LEN];
|
||||
} __packed;
|
||||
|
||||
struct be_cmd_resp_get_fw_version {
|
||||
struct be_cmd_resp_hdr hdr;
|
||||
u8 firmware_version_string[FW_VER_LEN];
|
||||
u8 fw_on_flash_version_string[FW_VER_LEN];
|
||||
} __packed;
|
||||
|
||||
/******************** Set Flow Contrl *******************/
|
||||
struct be_cmd_req_set_flow_control {
|
||||
struct be_cmd_req_hdr hdr;
|
||||
u16 tx_flow_control;
|
||||
u16 rx_flow_control;
|
||||
} __packed;
|
||||
|
||||
/******************** Get Flow Contrl *******************/
|
||||
struct be_cmd_req_get_flow_control {
|
||||
struct be_cmd_req_hdr hdr;
|
||||
u32 rsvd;
|
||||
};
|
||||
|
||||
struct be_cmd_resp_get_flow_control {
|
||||
struct be_cmd_resp_hdr hdr;
|
||||
u16 tx_flow_control;
|
||||
u16 rx_flow_control;
|
||||
} __packed;
|
||||
|
||||
/******************** Modify EQ Delay *******************/
|
||||
struct be_cmd_req_modify_eq_delay {
|
||||
struct be_cmd_req_hdr hdr;
|
||||
u32 num_eq;
|
||||
struct {
|
||||
u32 eq_id;
|
||||
u32 phase;
|
||||
u32 delay_multiplier;
|
||||
} delay[8];
|
||||
} __packed;
|
||||
|
||||
struct be_cmd_resp_modify_eq_delay {
|
||||
struct be_cmd_resp_hdr hdr;
|
||||
u32 rsvd0;
|
||||
} __packed;
|
||||
|
||||
/******************** Get FW Config *******************/
|
||||
struct be_cmd_req_query_fw_cfg {
|
||||
struct be_cmd_req_hdr hdr;
|
||||
u32 rsvd[30];
|
||||
};
|
||||
|
||||
struct be_cmd_resp_query_fw_cfg {
|
||||
struct be_cmd_resp_hdr hdr;
|
||||
u32 be_config_number;
|
||||
u32 asic_revision;
|
||||
u32 phys_port;
|
||||
u32 function_mode;
|
||||
u32 rsvd[26];
|
||||
};
|
||||
|
||||
extern int be_pci_fnum_get(struct be_ctrl_info *ctrl);
|
||||
extern int be_cmd_POST(struct be_ctrl_info *ctrl);
|
||||
extern int be_cmd_mac_addr_query(struct be_ctrl_info *ctrl, u8 *mac_addr,
|
||||
u8 type, bool permanent, u32 if_handle);
|
||||
extern int be_cmd_pmac_add(struct be_ctrl_info *ctrl, u8 *mac_addr,
|
||||
u32 if_id, u32 *pmac_id);
|
||||
extern int be_cmd_pmac_del(struct be_ctrl_info *ctrl, u32 if_id, u32 pmac_id);
|
||||
extern int be_cmd_if_create(struct be_ctrl_info *ctrl, u32 if_flags, u8 *mac,
|
||||
bool pmac_invalid, u32 *if_handle, u32 *pmac_id);
|
||||
extern int be_cmd_if_destroy(struct be_ctrl_info *ctrl, u32 if_handle);
|
||||
extern int be_cmd_eq_create(struct be_ctrl_info *ctrl,
|
||||
struct be_queue_info *eq, int eq_delay);
|
||||
extern int be_cmd_cq_create(struct be_ctrl_info *ctrl,
|
||||
struct be_queue_info *cq, struct be_queue_info *eq,
|
||||
bool sol_evts, bool no_delay,
|
||||
int num_cqe_dma_coalesce);
|
||||
extern int be_cmd_txq_create(struct be_ctrl_info *ctrl,
|
||||
struct be_queue_info *txq,
|
||||
struct be_queue_info *cq);
|
||||
extern int be_cmd_rxq_create(struct be_ctrl_info *ctrl,
|
||||
struct be_queue_info *rxq, u16 cq_id,
|
||||
u16 frag_size, u16 max_frame_size, u32 if_id,
|
||||
u32 rss);
|
||||
extern int be_cmd_q_destroy(struct be_ctrl_info *ctrl, struct be_queue_info *q,
|
||||
int type);
|
||||
extern int be_cmd_link_status_query(struct be_ctrl_info *ctrl,
|
||||
struct be_link_info *link);
|
||||
extern int be_cmd_reset(struct be_ctrl_info *ctrl);
|
||||
extern int be_cmd_get_stats(struct be_ctrl_info *ctrl,
|
||||
struct be_dma_mem *nonemb_cmd);
|
||||
extern int be_cmd_get_fw_ver(struct be_ctrl_info *ctrl, char *fw_ver);
|
||||
|
||||
extern int be_cmd_modify_eqd(struct be_ctrl_info *ctrl, u32 eq_id, u32 eqd);
|
||||
extern int be_cmd_vlan_config(struct be_ctrl_info *ctrl, u32 if_id,
|
||||
u16 *vtag_array, u32 num, bool untagged,
|
||||
bool promiscuous);
|
||||
extern int be_cmd_promiscuous_config(struct be_ctrl_info *ctrl,
|
||||
u8 port_num, bool en);
|
||||
extern int be_cmd_mcast_mac_set(struct be_ctrl_info *ctrl, u32 if_id,
|
||||
u8 *mac_table, u32 num, bool promiscuous);
|
||||
extern int be_cmd_set_flow_control(struct be_ctrl_info *ctrl,
|
||||
u32 tx_fc, u32 rx_fc);
|
||||
extern int be_cmd_get_flow_control(struct be_ctrl_info *ctrl,
|
||||
u32 *tx_fc, u32 *rx_fc);
|
||||
extern int be_cmd_query_fw_cfg(struct be_ctrl_info *ctrl, u32 *port_num);
|
362
drivers/net/benet/be_ethtool.c
Normal file
362
drivers/net/benet/be_ethtool.c
Normal file
|
@ -0,0 +1,362 @@
|
|||
/*
|
||||
* Copyright (C) 2005 - 2009 ServerEngines
|
||||
* All rights reserved.
|
||||
*
|
||||
* This program is free software; you can redistribute it and/or
|
||||
* modify it under the terms of the GNU General Public License version 2
|
||||
* as published by the Free Software Foundation. The full GNU General
|
||||
* Public License is included in this distribution in the file called COPYING.
|
||||
*
|
||||
* Contact Information:
|
||||
* linux-drivers@serverengines.com
|
||||
*
|
||||
* ServerEngines
|
||||
* 209 N. Fair Oaks Ave
|
||||
* Sunnyvale, CA 94085
|
||||
*/
|
||||
|
||||
#include "be.h"
|
||||
#include <linux/ethtool.h>
|
||||
|
||||
struct be_ethtool_stat {
|
||||
char desc[ETH_GSTRING_LEN];
|
||||
int type;
|
||||
int size;
|
||||
int offset;
|
||||
};
|
||||
|
||||
enum {NETSTAT, PORTSTAT, MISCSTAT, DRVSTAT, ERXSTAT};
|
||||
#define FIELDINFO(_struct, field) FIELD_SIZEOF(_struct, field), \
|
||||
offsetof(_struct, field)
|
||||
#define NETSTAT_INFO(field) #field, NETSTAT,\
|
||||
FIELDINFO(struct net_device_stats,\
|
||||
field)
|
||||
#define DRVSTAT_INFO(field) #field, DRVSTAT,\
|
||||
FIELDINFO(struct be_drvr_stats, field)
|
||||
#define MISCSTAT_INFO(field) #field, MISCSTAT,\
|
||||
FIELDINFO(struct be_rxf_stats, field)
|
||||
#define PORTSTAT_INFO(field) #field, PORTSTAT,\
|
||||
FIELDINFO(struct be_port_rxf_stats, \
|
||||
field)
|
||||
#define ERXSTAT_INFO(field) #field, ERXSTAT,\
|
||||
FIELDINFO(struct be_erx_stats, field)
|
||||
|
||||
static const struct be_ethtool_stat et_stats[] = {
|
||||
{NETSTAT_INFO(rx_packets)},
|
||||
{NETSTAT_INFO(tx_packets)},
|
||||
{NETSTAT_INFO(rx_bytes)},
|
||||
{NETSTAT_INFO(tx_bytes)},
|
||||
{NETSTAT_INFO(rx_errors)},
|
||||
{NETSTAT_INFO(tx_errors)},
|
||||
{NETSTAT_INFO(rx_dropped)},
|
||||
{NETSTAT_INFO(tx_dropped)},
|
||||
{DRVSTAT_INFO(be_tx_reqs)},
|
||||
{DRVSTAT_INFO(be_tx_stops)},
|
||||
{DRVSTAT_INFO(be_fwd_reqs)},
|
||||
{DRVSTAT_INFO(be_tx_wrbs)},
|
||||
{DRVSTAT_INFO(be_polls)},
|
||||
{DRVSTAT_INFO(be_tx_events)},
|
||||
{DRVSTAT_INFO(be_rx_events)},
|
||||
{DRVSTAT_INFO(be_tx_compl)},
|
||||
{DRVSTAT_INFO(be_rx_compl)},
|
||||
{DRVSTAT_INFO(be_ethrx_post_fail)},
|
||||
{DRVSTAT_INFO(be_802_3_dropped_frames)},
|
||||
{DRVSTAT_INFO(be_802_3_malformed_frames)},
|
||||
{DRVSTAT_INFO(be_tx_rate)},
|
||||
{DRVSTAT_INFO(be_rx_rate)},
|
||||
{PORTSTAT_INFO(rx_unicast_frames)},
|
||||
{PORTSTAT_INFO(rx_multicast_frames)},
|
||||
{PORTSTAT_INFO(rx_broadcast_frames)},
|
||||
{PORTSTAT_INFO(rx_crc_errors)},
|
||||
{PORTSTAT_INFO(rx_alignment_symbol_errors)},
|
||||
{PORTSTAT_INFO(rx_pause_frames)},
|
||||
{PORTSTAT_INFO(rx_control_frames)},
|
||||
{PORTSTAT_INFO(rx_in_range_errors)},
|
||||
{PORTSTAT_INFO(rx_out_range_errors)},
|
||||
{PORTSTAT_INFO(rx_frame_too_long)},
|
||||
{PORTSTAT_INFO(rx_address_match_errors)},
|
||||
{PORTSTAT_INFO(rx_vlan_mismatch)},
|
||||
{PORTSTAT_INFO(rx_dropped_too_small)},
|
||||
{PORTSTAT_INFO(rx_dropped_too_short)},
|
||||
{PORTSTAT_INFO(rx_dropped_header_too_small)},
|
||||
{PORTSTAT_INFO(rx_dropped_tcp_length)},
|
||||
{PORTSTAT_INFO(rx_dropped_runt)},
|
||||
{PORTSTAT_INFO(rx_fifo_overflow)},
|
||||
{PORTSTAT_INFO(rx_input_fifo_overflow)},
|
||||
{PORTSTAT_INFO(rx_ip_checksum_errs)},
|
||||
{PORTSTAT_INFO(rx_tcp_checksum_errs)},
|
||||
{PORTSTAT_INFO(rx_udp_checksum_errs)},
|
||||
{PORTSTAT_INFO(rx_non_rss_packets)},
|
||||
{PORTSTAT_INFO(rx_ipv4_packets)},
|
||||
{PORTSTAT_INFO(rx_ipv6_packets)},
|
||||
{PORTSTAT_INFO(tx_unicastframes)},
|
||||
{PORTSTAT_INFO(tx_multicastframes)},
|
||||
{PORTSTAT_INFO(tx_broadcastframes)},
|
||||
{PORTSTAT_INFO(tx_pauseframes)},
|
||||
{PORTSTAT_INFO(tx_controlframes)},
|
||||
{MISCSTAT_INFO(rx_drops_no_pbuf)},
|
||||
{MISCSTAT_INFO(rx_drops_no_txpb)},
|
||||
{MISCSTAT_INFO(rx_drops_no_erx_descr)},
|
||||
{MISCSTAT_INFO(rx_drops_no_tpre_descr)},
|
||||
{MISCSTAT_INFO(rx_drops_too_many_frags)},
|
||||
{MISCSTAT_INFO(rx_drops_invalid_ring)},
|
||||
{MISCSTAT_INFO(forwarded_packets)},
|
||||
{MISCSTAT_INFO(rx_drops_mtu)},
|
||||
{ERXSTAT_INFO(rx_drops_no_fragments)},
|
||||
};
|
||||
#define ETHTOOL_STATS_NUM ARRAY_SIZE(et_stats)
|
||||
|
||||
static void
|
||||
be_get_drvinfo(struct net_device *netdev, struct ethtool_drvinfo *drvinfo)
|
||||
{
|
||||
struct be_adapter *adapter = netdev_priv(netdev);
|
||||
|
||||
strcpy(drvinfo->driver, DRV_NAME);
|
||||
strcpy(drvinfo->version, DRV_VER);
|
||||
strncpy(drvinfo->fw_version, adapter->fw_ver, FW_VER_LEN);
|
||||
strcpy(drvinfo->bus_info, pci_name(adapter->pdev));
|
||||
drvinfo->testinfo_len = 0;
|
||||
drvinfo->regdump_len = 0;
|
||||
drvinfo->eedump_len = 0;
|
||||
}
|
||||
|
||||
static int
|
||||
be_get_coalesce(struct net_device *netdev, struct ethtool_coalesce *coalesce)
|
||||
{
|
||||
struct be_adapter *adapter = netdev_priv(netdev);
|
||||
struct be_eq_obj *rx_eq = &adapter->rx_eq;
|
||||
struct be_eq_obj *tx_eq = &adapter->tx_eq;
|
||||
|
||||
coalesce->rx_max_coalesced_frames = adapter->max_rx_coal;
|
||||
|
||||
coalesce->rx_coalesce_usecs = rx_eq->cur_eqd;
|
||||
coalesce->rx_coalesce_usecs_high = rx_eq->max_eqd;
|
||||
coalesce->rx_coalesce_usecs_low = rx_eq->min_eqd;
|
||||
|
||||
coalesce->tx_coalesce_usecs = tx_eq->cur_eqd;
|
||||
coalesce->tx_coalesce_usecs_high = tx_eq->max_eqd;
|
||||
coalesce->tx_coalesce_usecs_low = tx_eq->min_eqd;
|
||||
|
||||
coalesce->use_adaptive_rx_coalesce = rx_eq->enable_aic;
|
||||
coalesce->use_adaptive_tx_coalesce = tx_eq->enable_aic;
|
||||
|
||||
return 0;
|
||||
}
|
||||
|
||||
/*
|
||||
* This routine is used to set interrup coalescing delay *as well as*
|
||||
* the number of pkts to coalesce for LRO.
|
||||
*/
|
||||
static int
|
||||
be_set_coalesce(struct net_device *netdev, struct ethtool_coalesce *coalesce)
|
||||
{
|
||||
struct be_adapter *adapter = netdev_priv(netdev);
|
||||
struct be_ctrl_info *ctrl = &adapter->ctrl;
|
||||
struct be_eq_obj *rx_eq = &adapter->rx_eq;
|
||||
struct be_eq_obj *tx_eq = &adapter->tx_eq;
|
||||
u32 tx_max, tx_min, tx_cur;
|
||||
u32 rx_max, rx_min, rx_cur;
|
||||
int status = 0;
|
||||
|
||||
if (coalesce->use_adaptive_tx_coalesce == 1)
|
||||
return -EINVAL;
|
||||
|
||||
adapter->max_rx_coal = coalesce->rx_max_coalesced_frames;
|
||||
if (adapter->max_rx_coal > MAX_SKB_FRAGS)
|
||||
adapter->max_rx_coal = MAX_SKB_FRAGS - 1;
|
||||
|
||||
/* if AIC is being turned on now, start with an EQD of 0 */
|
||||
if (rx_eq->enable_aic == 0 &&
|
||||
coalesce->use_adaptive_rx_coalesce == 1) {
|
||||
rx_eq->cur_eqd = 0;
|
||||
}
|
||||
rx_eq->enable_aic = coalesce->use_adaptive_rx_coalesce;
|
||||
|
||||
rx_max = coalesce->rx_coalesce_usecs_high;
|
||||
rx_min = coalesce->rx_coalesce_usecs_low;
|
||||
rx_cur = coalesce->rx_coalesce_usecs;
|
||||
|
||||
tx_max = coalesce->tx_coalesce_usecs_high;
|
||||
tx_min = coalesce->tx_coalesce_usecs_low;
|
||||
tx_cur = coalesce->tx_coalesce_usecs;
|
||||
|
||||
if (tx_cur > BE_MAX_EQD)
|
||||
tx_cur = BE_MAX_EQD;
|
||||
if (tx_eq->cur_eqd != tx_cur) {
|
||||
status = be_cmd_modify_eqd(ctrl, tx_eq->q.id, tx_cur);
|
||||
if (!status)
|
||||
tx_eq->cur_eqd = tx_cur;
|
||||
}
|
||||
|
||||
if (rx_eq->enable_aic) {
|
||||
if (rx_max > BE_MAX_EQD)
|
||||
rx_max = BE_MAX_EQD;
|
||||
if (rx_min > rx_max)
|
||||
rx_min = rx_max;
|
||||
rx_eq->max_eqd = rx_max;
|
||||
rx_eq->min_eqd = rx_min;
|
||||
if (rx_eq->cur_eqd > rx_max)
|
||||
rx_eq->cur_eqd = rx_max;
|
||||
if (rx_eq->cur_eqd < rx_min)
|
||||
rx_eq->cur_eqd = rx_min;
|
||||
} else {
|
||||
if (rx_cur > BE_MAX_EQD)
|
||||
rx_cur = BE_MAX_EQD;
|
||||
if (rx_eq->cur_eqd != rx_cur) {
|
||||
status = be_cmd_modify_eqd(ctrl, rx_eq->q.id, rx_cur);
|
||||
if (!status)
|
||||
rx_eq->cur_eqd = rx_cur;
|
||||
}
|
||||
}
|
||||
return 0;
|
||||
}
|
||||
|
||||
static u32 be_get_rx_csum(struct net_device *netdev)
|
||||
{
|
||||
struct be_adapter *adapter = netdev_priv(netdev);
|
||||
|
||||
return adapter->rx_csum;
|
||||
}
|
||||
|
||||
static int be_set_rx_csum(struct net_device *netdev, uint32_t data)
|
||||
{
|
||||
struct be_adapter *adapter = netdev_priv(netdev);
|
||||
|
||||
if (data)
|
||||
adapter->rx_csum = true;
|
||||
else
|
||||
adapter->rx_csum = false;
|
||||
|
||||
return 0;
|
||||
}
|
||||
|
||||
static void
|
||||
be_get_ethtool_stats(struct net_device *netdev,
|
||||
struct ethtool_stats *stats, uint64_t *data)
|
||||
{
|
||||
struct be_adapter *adapter = netdev_priv(netdev);
|
||||
struct be_drvr_stats *drvr_stats = &adapter->stats.drvr_stats;
|
||||
struct be_hw_stats *hw_stats = hw_stats_from_cmd(adapter->stats.cmd.va);
|
||||
struct be_rxf_stats *rxf_stats = &hw_stats->rxf;
|
||||
struct be_port_rxf_stats *port_stats =
|
||||
&rxf_stats->port[adapter->port_num];
|
||||
struct net_device_stats *net_stats = &adapter->stats.net_stats;
|
||||
struct be_erx_stats *erx_stats = &hw_stats->erx;
|
||||
void *p = NULL;
|
||||
int i;
|
||||
|
||||
for (i = 0; i < ETHTOOL_STATS_NUM; i++) {
|
||||
switch (et_stats[i].type) {
|
||||
case NETSTAT:
|
||||
p = net_stats;
|
||||
break;
|
||||
case DRVSTAT:
|
||||
p = drvr_stats;
|
||||
break;
|
||||
case PORTSTAT:
|
||||
p = port_stats;
|
||||
break;
|
||||
case MISCSTAT:
|
||||
p = rxf_stats;
|
||||
break;
|
||||
case ERXSTAT: /* Currently only one ERX stat is provided */
|
||||
p = (u32 *)erx_stats + adapter->rx_obj.q.id;
|
||||
break;
|
||||
}
|
||||
|
||||
p = (u8 *)p + et_stats[i].offset;
|
||||
data[i] = (et_stats[i].size == sizeof(u64)) ?
|
||||
*(u64 *)p: *(u32 *)p;
|
||||
}
|
||||
|
||||
return;
|
||||
}
|
||||
|
||||
static void
|
||||
be_get_stat_strings(struct net_device *netdev, uint32_t stringset,
|
||||
uint8_t *data)
|
||||
{
|
||||
int i;
|
||||
switch (stringset) {
|
||||
case ETH_SS_STATS:
|
||||
for (i = 0; i < ETHTOOL_STATS_NUM; i++) {
|
||||
memcpy(data, et_stats[i].desc, ETH_GSTRING_LEN);
|
||||
data += ETH_GSTRING_LEN;
|
||||
}
|
||||
break;
|
||||
}
|
||||
}
|
||||
|
||||
static int be_get_stats_count(struct net_device *netdev)
|
||||
{
|
||||
return ETHTOOL_STATS_NUM;
|
||||
}
|
||||
|
||||
static int be_get_settings(struct net_device *netdev, struct ethtool_cmd *ecmd)
|
||||
{
|
||||
ecmd->speed = SPEED_10000;
|
||||
ecmd->duplex = DUPLEX_FULL;
|
||||
ecmd->autoneg = AUTONEG_DISABLE;
|
||||
return 0;
|
||||
}
|
||||
|
||||
static void
|
||||
be_get_ringparam(struct net_device *netdev, struct ethtool_ringparam *ring)
|
||||
{
|
||||
struct be_adapter *adapter = netdev_priv(netdev);
|
||||
|
||||
ring->rx_max_pending = adapter->rx_obj.q.len;
|
||||
ring->tx_max_pending = adapter->tx_obj.q.len;
|
||||
|
||||
ring->rx_pending = atomic_read(&adapter->rx_obj.q.used);
|
||||
ring->tx_pending = atomic_read(&adapter->tx_obj.q.used);
|
||||
}
|
||||
|
||||
static void
|
||||
be_get_pauseparam(struct net_device *netdev, struct ethtool_pauseparam *ecmd)
|
||||
{
|
||||
struct be_adapter *adapter = netdev_priv(netdev);
|
||||
|
||||
be_cmd_get_flow_control(&adapter->ctrl, &ecmd->tx_pause,
|
||||
&ecmd->rx_pause);
|
||||
ecmd->autoneg = AUTONEG_ENABLE;
|
||||
}
|
||||
|
||||
static int
|
||||
be_set_pauseparam(struct net_device *netdev, struct ethtool_pauseparam *ecmd)
|
||||
{
|
||||
struct be_adapter *adapter = netdev_priv(netdev);
|
||||
int status;
|
||||
|
||||
if (ecmd->autoneg != AUTONEG_ENABLE)
|
||||
return -EINVAL;
|
||||
|
||||
status = be_cmd_set_flow_control(&adapter->ctrl, ecmd->tx_pause,
|
||||
ecmd->rx_pause);
|
||||
if (!status)
|
||||
dev_warn(&adapter->pdev->dev, "Pause param set failed.\n");
|
||||
|
||||
return status;
|
||||
}
|
||||
|
||||
struct ethtool_ops be_ethtool_ops = {
|
||||
.get_settings = be_get_settings,
|
||||
.get_drvinfo = be_get_drvinfo,
|
||||
.get_link = ethtool_op_get_link,
|
||||
.get_coalesce = be_get_coalesce,
|
||||
.set_coalesce = be_set_coalesce,
|
||||
.get_ringparam = be_get_ringparam,
|
||||
.get_pauseparam = be_get_pauseparam,
|
||||
.set_pauseparam = be_set_pauseparam,
|
||||
.get_rx_csum = be_get_rx_csum,
|
||||
.set_rx_csum = be_set_rx_csum,
|
||||
.get_tx_csum = ethtool_op_get_tx_csum,
|
||||
.set_tx_csum = ethtool_op_set_tx_csum,
|
||||
.get_sg = ethtool_op_get_sg,
|
||||
.set_sg = ethtool_op_set_sg,
|
||||
.get_tso = ethtool_op_get_tso,
|
||||
.set_tso = ethtool_op_set_tso,
|
||||
.get_strings = be_get_stat_strings,
|
||||
.get_stats_count = be_get_stats_count,
|
||||
.get_ethtool_stats = be_get_ethtool_stats,
|
||||
};
|
211
drivers/net/benet/be_hw.h
Normal file
211
drivers/net/benet/be_hw.h
Normal file
|
@ -0,0 +1,211 @@
|
|||
/*
|
||||
* Copyright (C) 2005 - 2009 ServerEngines
|
||||
* All rights reserved.
|
||||
*
|
||||
* This program is free software; you can redistribute it and/or
|
||||
* modify it under the terms of the GNU General Public License version 2
|
||||
* as published by the Free Software Foundation. The full GNU General
|
||||
* Public License is included in this distribution in the file called COPYING.
|
||||
*
|
||||
* Contact Information:
|
||||
* linux-drivers@serverengines.com
|
||||
*
|
||||
* ServerEngines
|
||||
* 209 N. Fair Oaks Ave
|
||||
* Sunnyvale, CA 94085
|
||||
*/
|
||||
|
||||
/********* Mailbox door bell *************/
|
||||
/* Used for driver communication with the FW.
|
||||
* The software must write this register twice to post any command. First,
|
||||
* it writes the register with hi=1 and the upper bits of the physical address
|
||||
* for the MAILBOX structure. Software must poll the ready bit until this
|
||||
* is acknowledged. Then, sotware writes the register with hi=0 with the lower
|
||||
* bits in the address. It must poll the ready bit until the command is
|
||||
* complete. Upon completion, the MAILBOX will contain a valid completion
|
||||
* queue entry.
|
||||
*/
|
||||
#define MPU_MAILBOX_DB_OFFSET 0x160
|
||||
#define MPU_MAILBOX_DB_RDY_MASK 0x1 /* bit 0 */
|
||||
#define MPU_MAILBOX_DB_HI_MASK 0x2 /* bit 1 */
|
||||
|
||||
#define MPU_EP_CONTROL 0
|
||||
|
||||
/********** MPU semphore ******************/
|
||||
#define MPU_EP_SEMAPHORE_OFFSET 0xac
|
||||
#define EP_SEMAPHORE_POST_STAGE_MASK 0x0000FFFF
|
||||
#define EP_SEMAPHORE_POST_ERR_MASK 0x1
|
||||
#define EP_SEMAPHORE_POST_ERR_SHIFT 31
|
||||
/* MPU semphore POST stage values */
|
||||
#define POST_STAGE_AWAITING_HOST_RDY 0x1 /* FW awaiting goahead from host */
|
||||
#define POST_STAGE_HOST_RDY 0x2 /* Host has given go-ahed to FW */
|
||||
#define POST_STAGE_BE_RESET 0x3 /* Host wants to reset chip */
|
||||
#define POST_STAGE_ARMFW_RDY 0xc000 /* FW is done with POST */
|
||||
|
||||
/********* Memory BAR register ************/
|
||||
#define PCICFG_MEMBAR_CTRL_INT_CTRL_OFFSET 0xfc
|
||||
/* Host Interrupt Enable, if set interrupts are enabled although "PCI Interrupt
|
||||
* Disable" may still globally block interrupts in addition to individual
|
||||
* interrupt masks; a mechanism for the device driver to block all interrupts
|
||||
* atomically without having to arbitrate for the PCI Interrupt Disable bit
|
||||
* with the OS.
|
||||
*/
|
||||
#define MEMBAR_CTRL_INT_CTRL_HOSTINTR_MASK (1 << 29) /* bit 29 */
|
||||
/* PCI physical function number */
|
||||
#define MEMBAR_CTRL_INT_CTRL_PFUNC_MASK 0x7 /* bits 26 - 28 */
|
||||
#define MEMBAR_CTRL_INT_CTRL_PFUNC_SHIFT 26
|
||||
|
||||
/********* Event Q door bell *************/
|
||||
#define DB_EQ_OFFSET DB_CQ_OFFSET
|
||||
#define DB_EQ_RING_ID_MASK 0x1FF /* bits 0 - 8 */
|
||||
/* Clear the interrupt for this eq */
|
||||
#define DB_EQ_CLR_SHIFT (9) /* bit 9 */
|
||||
/* Must be 1 */
|
||||
#define DB_EQ_EVNT_SHIFT (10) /* bit 10 */
|
||||
/* Number of event entries processed */
|
||||
#define DB_EQ_NUM_POPPED_SHIFT (16) /* bits 16 - 28 */
|
||||
/* Rearm bit */
|
||||
#define DB_EQ_REARM_SHIFT (29) /* bit 29 */
|
||||
|
||||
/********* Compl Q door bell *************/
|
||||
#define DB_CQ_OFFSET 0x120
|
||||
#define DB_CQ_RING_ID_MASK 0x3FF /* bits 0 - 9 */
|
||||
/* Number of event entries processed */
|
||||
#define DB_CQ_NUM_POPPED_SHIFT (16) /* bits 16 - 28 */
|
||||
/* Rearm bit */
|
||||
#define DB_CQ_REARM_SHIFT (29) /* bit 29 */
|
||||
|
||||
/********** TX ULP door bell *************/
|
||||
#define DB_TXULP1_OFFSET 0x60
|
||||
#define DB_TXULP_RING_ID_MASK 0x7FF /* bits 0 - 10 */
|
||||
/* Number of tx entries posted */
|
||||
#define DB_TXULP_NUM_POSTED_SHIFT (16) /* bits 16 - 29 */
|
||||
#define DB_TXULP_NUM_POSTED_MASK 0x3FFF /* bits 16 - 29 */
|
||||
|
||||
/********** RQ(erx) door bell ************/
|
||||
#define DB_RQ_OFFSET 0x100
|
||||
#define DB_RQ_RING_ID_MASK 0x3FF /* bits 0 - 9 */
|
||||
/* Number of rx frags posted */
|
||||
#define DB_RQ_NUM_POSTED_SHIFT (24) /* bits 24 - 31 */
|
||||
|
||||
/*
|
||||
* BE descriptors: host memory data structures whose formats
|
||||
* are hardwired in BE silicon.
|
||||
*/
|
||||
/* Event Queue Descriptor */
|
||||
#define EQ_ENTRY_VALID_MASK 0x1 /* bit 0 */
|
||||
#define EQ_ENTRY_RES_ID_MASK 0xFFFF /* bits 16 - 31 */
|
||||
#define EQ_ENTRY_RES_ID_SHIFT 16
|
||||
struct be_eq_entry {
|
||||
u32 evt;
|
||||
};
|
||||
|
||||
/* TX Queue Descriptor */
|
||||
#define ETH_WRB_FRAG_LEN_MASK 0xFFFF
|
||||
struct be_eth_wrb {
|
||||
u32 frag_pa_hi; /* dword 0 */
|
||||
u32 frag_pa_lo; /* dword 1 */
|
||||
u32 rsvd0; /* dword 2 */
|
||||
u32 frag_len; /* dword 3: bits 0 - 15 */
|
||||
} __packed;
|
||||
|
||||
/* Pseudo amap definition for eth_hdr_wrb in which each bit of the
|
||||
* actual structure is defined as a byte : used to calculate
|
||||
* offset/shift/mask of each field */
|
||||
struct amap_eth_hdr_wrb {
|
||||
u8 rsvd0[32]; /* dword 0 */
|
||||
u8 rsvd1[32]; /* dword 1 */
|
||||
u8 complete; /* dword 2 */
|
||||
u8 event;
|
||||
u8 crc;
|
||||
u8 forward;
|
||||
u8 ipsec;
|
||||
u8 mgmt;
|
||||
u8 ipcs;
|
||||
u8 udpcs;
|
||||
u8 tcpcs;
|
||||
u8 lso;
|
||||
u8 vlan;
|
||||
u8 gso[2];
|
||||
u8 num_wrb[5];
|
||||
u8 lso_mss[14];
|
||||
u8 len[16]; /* dword 3 */
|
||||
u8 vlan_tag[16];
|
||||
} __packed;
|
||||
|
||||
struct be_eth_hdr_wrb {
|
||||
u32 dw[4];
|
||||
};
|
||||
|
||||
/* TX Compl Queue Descriptor */
|
||||
|
||||
/* Pseudo amap definition for eth_tx_compl in which each bit of the
|
||||
* actual structure is defined as a byte: used to calculate
|
||||
* offset/shift/mask of each field */
|
||||
struct amap_eth_tx_compl {
|
||||
u8 wrb_index[16]; /* dword 0 */
|
||||
u8 ct[2]; /* dword 0 */
|
||||
u8 port[2]; /* dword 0 */
|
||||
u8 rsvd0[8]; /* dword 0 */
|
||||
u8 status[4]; /* dword 0 */
|
||||
u8 user_bytes[16]; /* dword 1 */
|
||||
u8 nwh_bytes[8]; /* dword 1 */
|
||||
u8 lso; /* dword 1 */
|
||||
u8 cast_enc[2]; /* dword 1 */
|
||||
u8 rsvd1[5]; /* dword 1 */
|
||||
u8 rsvd2[32]; /* dword 2 */
|
||||
u8 pkts[16]; /* dword 3 */
|
||||
u8 ringid[11]; /* dword 3 */
|
||||
u8 hash_val[4]; /* dword 3 */
|
||||
u8 valid; /* dword 3 */
|
||||
} __packed;
|
||||
|
||||
struct be_eth_tx_compl {
|
||||
u32 dw[4];
|
||||
};
|
||||
|
||||
/* RX Queue Descriptor */
|
||||
struct be_eth_rx_d {
|
||||
u32 fragpa_hi;
|
||||
u32 fragpa_lo;
|
||||
};
|
||||
|
||||
/* RX Compl Queue Descriptor */
|
||||
|
||||
/* Pseudo amap definition for eth_rx_compl in which each bit of the
|
||||
* actual structure is defined as a byte: used to calculate
|
||||
* offset/shift/mask of each field */
|
||||
struct amap_eth_rx_compl {
|
||||
u8 vlan_tag[16]; /* dword 0 */
|
||||
u8 pktsize[14]; /* dword 0 */
|
||||
u8 port; /* dword 0 */
|
||||
u8 ip_opt; /* dword 0 */
|
||||
u8 err; /* dword 1 */
|
||||
u8 rsshp; /* dword 1 */
|
||||
u8 ipf; /* dword 1 */
|
||||
u8 tcpf; /* dword 1 */
|
||||
u8 udpf; /* dword 1 */
|
||||
u8 ipcksm; /* dword 1 */
|
||||
u8 l4_cksm; /* dword 1 */
|
||||
u8 ip_version; /* dword 1 */
|
||||
u8 macdst[6]; /* dword 1 */
|
||||
u8 vtp; /* dword 1 */
|
||||
u8 rsvd0; /* dword 1 */
|
||||
u8 fragndx[10]; /* dword 1 */
|
||||
u8 ct[2]; /* dword 1 */
|
||||
u8 sw; /* dword 1 */
|
||||
u8 numfrags[3]; /* dword 1 */
|
||||
u8 rss_flush; /* dword 2 */
|
||||
u8 cast_enc[2]; /* dword 2 */
|
||||
u8 qnq; /* dword 2 */
|
||||
u8 rss_bank; /* dword 2 */
|
||||
u8 rsvd1[23]; /* dword 2 */
|
||||
u8 lro_pkt; /* dword 2 */
|
||||
u8 rsvd2[2]; /* dword 2 */
|
||||
u8 valid; /* dword 2 */
|
||||
u8 rsshash[32]; /* dword 3 */
|
||||
} __packed;
|
||||
|
||||
struct be_eth_rx_compl {
|
||||
u32 dw[4];
|
||||
};
|
1903
drivers/net/benet/be_main.c
Normal file
1903
drivers/net/benet/be_main.c
Normal file
File diff suppressed because it is too large
Load diff
|
@ -152,7 +152,7 @@ struct sw_rx_page {
|
|||
#define PAGES_PER_SGE (1 << PAGES_PER_SGE_SHIFT)
|
||||
#define SGE_PAGE_SIZE PAGE_SIZE
|
||||
#define SGE_PAGE_SHIFT PAGE_SHIFT
|
||||
#define SGE_PAGE_ALIGN(addr) PAGE_ALIGN(addr)
|
||||
#define SGE_PAGE_ALIGN(addr) PAGE_ALIGN((typeof(PAGE_SIZE))addr)
|
||||
|
||||
#define BCM_RX_ETH_PAYLOAD_ALIGN 64
|
||||
|
||||
|
|
|
@ -150,7 +150,6 @@ static void bnx2x_init_ind_wr(struct bnx2x *bp, u32 addr, const u32 *data,
|
|||
|
||||
static void bnx2x_write_big_buf(struct bnx2x *bp, u32 addr, u32 len)
|
||||
{
|
||||
#ifdef USE_DMAE
|
||||
int offset = 0;
|
||||
|
||||
if (bp->dmae_ready) {
|
||||
|
@ -164,9 +163,6 @@ static void bnx2x_write_big_buf(struct bnx2x *bp, u32 addr, u32 len)
|
|||
addr + offset, len);
|
||||
} else
|
||||
bnx2x_init_str_wr(bp, addr, bp->gunzip_buf, len);
|
||||
#else
|
||||
bnx2x_init_str_wr(bp, addr, bp->gunzip_buf, len);
|
||||
#endif
|
||||
}
|
||||
|
||||
static void bnx2x_init_fill(struct bnx2x *bp, u32 addr, int fill, u32 len)
|
||||
|
|
|
@ -57,7 +57,7 @@
|
|||
#include "bnx2x.h"
|
||||
#include "bnx2x_init.h"
|
||||
|
||||
#define DRV_MODULE_VERSION "1.45.26"
|
||||
#define DRV_MODULE_VERSION "1.45.27"
|
||||
#define DRV_MODULE_RELDATE "2009/01/26"
|
||||
#define BNX2X_BC_VER 0x040200
|
||||
|
||||
|
@ -4035,10 +4035,10 @@ static void bnx2x_zero_sb(struct bnx2x *bp, int sb_id)
|
|||
{
|
||||
int port = BP_PORT(bp);
|
||||
|
||||
bnx2x_init_fill(bp, BAR_USTRORM_INTMEM +
|
||||
bnx2x_init_fill(bp, USTORM_INTMEM_ADDR +
|
||||
USTORM_SB_HOST_STATUS_BLOCK_OFFSET(port, sb_id), 0,
|
||||
sizeof(struct ustorm_status_block)/4);
|
||||
bnx2x_init_fill(bp, BAR_CSTRORM_INTMEM +
|
||||
bnx2x_init_fill(bp, CSTORM_INTMEM_ADDR +
|
||||
CSTORM_SB_HOST_STATUS_BLOCK_OFFSET(port, sb_id), 0,
|
||||
sizeof(struct cstorm_status_block)/4);
|
||||
}
|
||||
|
@ -4092,18 +4092,18 @@ static void bnx2x_zero_def_sb(struct bnx2x *bp)
|
|||
{
|
||||
int func = BP_FUNC(bp);
|
||||
|
||||
bnx2x_init_fill(bp, BAR_USTRORM_INTMEM +
|
||||
USTORM_DEF_SB_HOST_STATUS_BLOCK_OFFSET(func), 0,
|
||||
sizeof(struct ustorm_def_status_block)/4);
|
||||
bnx2x_init_fill(bp, BAR_CSTRORM_INTMEM +
|
||||
CSTORM_DEF_SB_HOST_STATUS_BLOCK_OFFSET(func), 0,
|
||||
sizeof(struct cstorm_def_status_block)/4);
|
||||
bnx2x_init_fill(bp, BAR_XSTRORM_INTMEM +
|
||||
XSTORM_DEF_SB_HOST_STATUS_BLOCK_OFFSET(func), 0,
|
||||
sizeof(struct xstorm_def_status_block)/4);
|
||||
bnx2x_init_fill(bp, BAR_TSTRORM_INTMEM +
|
||||
bnx2x_init_fill(bp, TSTORM_INTMEM_ADDR +
|
||||
TSTORM_DEF_SB_HOST_STATUS_BLOCK_OFFSET(func), 0,
|
||||
sizeof(struct tstorm_def_status_block)/4);
|
||||
bnx2x_init_fill(bp, USTORM_INTMEM_ADDR +
|
||||
USTORM_DEF_SB_HOST_STATUS_BLOCK_OFFSET(func), 0,
|
||||
sizeof(struct ustorm_def_status_block)/4);
|
||||
bnx2x_init_fill(bp, CSTORM_INTMEM_ADDR +
|
||||
CSTORM_DEF_SB_HOST_STATUS_BLOCK_OFFSET(func), 0,
|
||||
sizeof(struct cstorm_def_status_block)/4);
|
||||
bnx2x_init_fill(bp, XSTORM_INTMEM_ADDR +
|
||||
XSTORM_DEF_SB_HOST_STATUS_BLOCK_OFFSET(func), 0,
|
||||
sizeof(struct xstorm_def_status_block)/4);
|
||||
}
|
||||
|
||||
static void bnx2x_init_def_sb(struct bnx2x *bp,
|
||||
|
@ -4518,7 +4518,8 @@ static void bnx2x_init_context(struct bnx2x *bp)
|
|||
(USTORM_ETH_ST_CONTEXT_CONFIG_ENABLE_TPA |
|
||||
USTORM_ETH_ST_CONTEXT_CONFIG_ENABLE_SGE_RING);
|
||||
context->ustorm_st_context.common.sge_buff_size =
|
||||
(u16)(BCM_PAGE_SIZE*PAGES_PER_SGE);
|
||||
(u16)min((u32)SGE_PAGE_SIZE*PAGES_PER_SGE,
|
||||
(u32)0xffff);
|
||||
context->ustorm_st_context.common.sge_page_base_hi =
|
||||
U64_HI(fp->rx_sge_mapping);
|
||||
context->ustorm_st_context.common.sge_page_base_lo =
|
||||
|
|
Some files were not shown because too many files have changed in this diff Show more
Loading…
Reference in a new issue