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PCI: imx6: Restrict PHY register data to 16-bit
PHY registers on i.MX6 are 16-bit wide, so we can get rid of explicit masking if we restrict pcie_phy_read()/pcie_phy_write() to use 'u16' instead of 'int'. No functional change intended. Signed-off-by: Andrey Smirnov <andrew.smirnov@gmail.com> Signed-off-by: Lorenzo Pieralisi <lorenzo.pieralisi@arm.com> Reviewed-by: Lucas Stach <l.stach@pengutronix.de> Cc: Lorenzo Pieralisi <lorenzo.pieralisi@arm.com> Cc: Bjorn Helgaas <bhelgaas@google.com> Cc: Chris Healy <cphealy@gmail.com> Cc: Lucas Stach <l.stach@pengutronix.de> Cc: linux-kernel@vger.kernel.org Cc: linux-pci@vger.kernel.org
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1 changed files with 6 additions and 7 deletions
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@ -195,10 +195,10 @@ static int pcie_phy_wait_ack(struct imx6_pcie *imx6_pcie, int addr)
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}
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/* Read from the 16-bit PCIe PHY control registers (not memory-mapped) */
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static int pcie_phy_read(struct imx6_pcie *imx6_pcie, int addr, int *data)
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static int pcie_phy_read(struct imx6_pcie *imx6_pcie, int addr, u16 *data)
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{
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struct dw_pcie *pci = imx6_pcie->pci;
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u32 val, phy_ctl;
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u32 phy_ctl;
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int ret;
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ret = pcie_phy_wait_ack(imx6_pcie, addr);
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@ -213,8 +213,7 @@ static int pcie_phy_read(struct imx6_pcie *imx6_pcie, int addr, int *data)
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if (ret)
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return ret;
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val = dw_pcie_readl_dbi(pci, PCIE_PHY_STAT);
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*data = val & 0xffff;
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*data = dw_pcie_readl_dbi(pci, PCIE_PHY_STAT);
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/* deassert Read signal */
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dw_pcie_writel_dbi(pci, PCIE_PHY_CTRL, 0x00);
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@ -222,7 +221,7 @@ static int pcie_phy_read(struct imx6_pcie *imx6_pcie, int addr, int *data)
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return pcie_phy_poll_ack(imx6_pcie, false);
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}
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static int pcie_phy_write(struct imx6_pcie *imx6_pcie, int addr, int data)
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static int pcie_phy_write(struct imx6_pcie *imx6_pcie, int addr, u16 data)
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{
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struct dw_pcie *pci = imx6_pcie->pci;
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u32 var;
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@ -279,7 +278,7 @@ static int pcie_phy_write(struct imx6_pcie *imx6_pcie, int addr, int data)
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static void imx6_pcie_reset_phy(struct imx6_pcie *imx6_pcie)
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{
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u32 tmp;
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u16 tmp;
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if (!(imx6_pcie->drvdata->flags & IMX6_PCIE_FLAG_IMX6_PHY))
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return;
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@ -675,7 +674,7 @@ static int imx6_setup_phy_mpll(struct imx6_pcie *imx6_pcie)
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{
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unsigned long phy_rate = clk_get_rate(imx6_pcie->pcie_phy);
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int mult, div;
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u32 val;
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u16 val;
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if (!(imx6_pcie->drvdata->flags & IMX6_PCIE_FLAG_IMX6_PHY))
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return 0;
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