KVM: x86 emulator: Emulate task switch in emulator.c
Implement emulation of 16/32 bit task switch in emulator.c Signed-off-by: Gleb Natapov <gleb@redhat.com> Signed-off-by: Marcelo Tosatti <mtosatti@redhat.com>
This commit is contained in:
Gleb Natapov
Avi Kivity
parent
2dafc6c234
commit
38ba30ba51
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@ -11,6 +11,8 @@
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#ifndef _ASM_X86_KVM_X86_EMULATE_H
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#define _ASM_X86_KVM_X86_EMULATE_H
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#include <asm/desc_defs.h>
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struct x86_emulate_ctxt;
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/*
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@ -210,5 +212,8 @@ int x86_decode_insn(struct x86_emulate_ctxt *ctxt,
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struct x86_emulate_ops *ops);
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int x86_emulate_insn(struct x86_emulate_ctxt *ctxt,
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struct x86_emulate_ops *ops);
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int emulator_task_switch(struct x86_emulate_ctxt *ctxt,
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struct x86_emulate_ops *ops,
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u16 tss_selector, int reason);
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#endif /* _ASM_X86_KVM_X86_EMULATE_H */
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@ -33,6 +33,7 @@
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#include <asm/kvm_emulate.h>
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#include "x86.h"
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#include "tss.h"
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/*
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* Opcode effective-address decode tables.
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@ -1221,6 +1222,198 @@ done:
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return (rc == X86EMUL_UNHANDLEABLE) ? -1 : 0;
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}
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static u32 desc_limit_scaled(struct desc_struct *desc)
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{
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u32 limit = get_desc_limit(desc);
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return desc->g ? (limit << 12) | 0xfff : limit;
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}
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static void get_descriptor_table_ptr(struct x86_emulate_ctxt *ctxt,
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struct x86_emulate_ops *ops,
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u16 selector, struct desc_ptr *dt)
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{
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if (selector & 1 << 2) {
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struct desc_struct desc;
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memset (dt, 0, sizeof *dt);
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if (!ops->get_cached_descriptor(&desc, VCPU_SREG_LDTR, ctxt->vcpu))
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return;
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dt->size = desc_limit_scaled(&desc); /* what if limit > 65535? */
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dt->address = get_desc_base(&desc);
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} else
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ops->get_gdt(dt, ctxt->vcpu);
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}
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/* allowed just for 8 bytes segments */
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static int read_segment_descriptor(struct x86_emulate_ctxt *ctxt,
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struct x86_emulate_ops *ops,
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u16 selector, struct desc_struct *desc)
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{
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struct desc_ptr dt;
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u16 index = selector >> 3;
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int ret;
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u32 err;
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ulong addr;
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get_descriptor_table_ptr(ctxt, ops, selector, &dt);
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if (dt.size < index * 8 + 7) {
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kvm_inject_gp(ctxt->vcpu, selector & 0xfffc);
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return X86EMUL_PROPAGATE_FAULT;
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}
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addr = dt.address + index * 8;
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ret = ops->read_std(addr, desc, sizeof *desc, ctxt->vcpu, &err);
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if (ret == X86EMUL_PROPAGATE_FAULT)
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kvm_inject_page_fault(ctxt->vcpu, addr, err);
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return ret;
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}
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/* allowed just for 8 bytes segments */
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static int write_segment_descriptor(struct x86_emulate_ctxt *ctxt,
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struct x86_emulate_ops *ops,
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u16 selector, struct desc_struct *desc)
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{
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struct desc_ptr dt;
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u16 index = selector >> 3;
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u32 err;
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ulong addr;
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int ret;
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get_descriptor_table_ptr(ctxt, ops, selector, &dt);
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if (dt.size < index * 8 + 7) {
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kvm_inject_gp(ctxt->vcpu, selector & 0xfffc);
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return X86EMUL_PROPAGATE_FAULT;
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}
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addr = dt.address + index * 8;
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ret = ops->write_std(addr, desc, sizeof *desc, ctxt->vcpu, &err);
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if (ret == X86EMUL_PROPAGATE_FAULT)
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kvm_inject_page_fault(ctxt->vcpu, addr, err);
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return ret;
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}
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static int load_segment_descriptor(struct x86_emulate_ctxt *ctxt,
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struct x86_emulate_ops *ops,
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u16 selector, int seg)
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{
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struct desc_struct seg_desc;
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u8 dpl, rpl, cpl;
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unsigned err_vec = GP_VECTOR;
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u32 err_code = 0;
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bool null_selector = !(selector & ~0x3); /* 0000-0003 are null */
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int ret;
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memset(&seg_desc, 0, sizeof seg_desc);
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if ((seg <= VCPU_SREG_GS && ctxt->mode == X86EMUL_MODE_VM86)
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|| ctxt->mode == X86EMUL_MODE_REAL) {
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/* set real mode segment descriptor */
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set_desc_base(&seg_desc, selector << 4);
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set_desc_limit(&seg_desc, 0xffff);
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seg_desc.type = 3;
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seg_desc.p = 1;
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seg_desc.s = 1;
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goto load;
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}
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/* NULL selector is not valid for TR, CS and SS */
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if ((seg == VCPU_SREG_CS || seg == VCPU_SREG_SS || seg == VCPU_SREG_TR)
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&& null_selector)
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goto exception;
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/* TR should be in GDT only */
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if (seg == VCPU_SREG_TR && (selector & (1 << 2)))
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goto exception;
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if (null_selector) /* for NULL selector skip all following checks */
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goto load;
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ret = read_segment_descriptor(ctxt, ops, selector, &seg_desc);
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if (ret != X86EMUL_CONTINUE)
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return ret;
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err_code = selector & 0xfffc;
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err_vec = GP_VECTOR;
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/* can't load system descriptor into segment selecor */
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if (seg <= VCPU_SREG_GS && !seg_desc.s)
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goto exception;
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if (!seg_desc.p) {
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err_vec = (seg == VCPU_SREG_SS) ? SS_VECTOR : NP_VECTOR;
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goto exception;
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}
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rpl = selector & 3;
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dpl = seg_desc.dpl;
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cpl = ops->cpl(ctxt->vcpu);
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switch (seg) {
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case VCPU_SREG_SS:
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/*
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* segment is not a writable data segment or segment
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* selector's RPL != CPL or segment selector's RPL != CPL
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*/
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if (rpl != cpl || (seg_desc.type & 0xa) != 0x2 || dpl != cpl)
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goto exception;
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break;
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case VCPU_SREG_CS:
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if (!(seg_desc.type & 8))
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goto exception;
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if (seg_desc.type & 4) {
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/* conforming */
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if (dpl > cpl)
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goto exception;
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} else {
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/* nonconforming */
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if (rpl > cpl || dpl != cpl)
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goto exception;
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}
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/* CS(RPL) <- CPL */
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selector = (selector & 0xfffc) | cpl;
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break;
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case VCPU_SREG_TR:
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if (seg_desc.s || (seg_desc.type != 1 && seg_desc.type != 9))
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goto exception;
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break;
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case VCPU_SREG_LDTR:
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if (seg_desc.s || seg_desc.type != 2)
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goto exception;
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break;
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default: /* DS, ES, FS, or GS */
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/*
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* segment is not a data or readable code segment or
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* ((segment is a data or nonconforming code segment)
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* and (both RPL and CPL > DPL))
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*/
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if ((seg_desc.type & 0xa) == 0x8 ||
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(((seg_desc.type & 0xc) != 0xc) &&
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(rpl > dpl && cpl > dpl)))
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goto exception;
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break;
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}
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if (seg_desc.s) {
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/* mark segment as accessed */
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seg_desc.type |= 1;
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ret = write_segment_descriptor(ctxt, ops, selector, &seg_desc);
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if (ret != X86EMUL_CONTINUE)
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return ret;
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}
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load:
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ops->set_segment_selector(selector, seg, ctxt->vcpu);
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ops->set_cached_descriptor(&seg_desc, seg, ctxt->vcpu);
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return X86EMUL_CONTINUE;
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exception:
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kvm_queue_exception_e(ctxt->vcpu, err_vec, err_code);
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return X86EMUL_PROPAGATE_FAULT;
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}
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static inline void emulate_push(struct x86_emulate_ctxt *ctxt)
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{
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struct decode_cache *c = &ctxt->decode;
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@ -1812,6 +2005,376 @@ static bool emulator_io_permited(struct x86_emulate_ctxt *ctxt,
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return true;
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}
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static u32 get_cached_descriptor_base(struct x86_emulate_ctxt *ctxt,
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struct x86_emulate_ops *ops,
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int seg)
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{
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struct desc_struct desc;
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if (ops->get_cached_descriptor(&desc, seg, ctxt->vcpu))
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return get_desc_base(&desc);
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else
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return ~0;
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}
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static void save_state_to_tss16(struct x86_emulate_ctxt *ctxt,
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struct x86_emulate_ops *ops,
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struct tss_segment_16 *tss)
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{
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struct decode_cache *c = &ctxt->decode;
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tss->ip = c->eip;
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tss->flag = ctxt->eflags;
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tss->ax = c->regs[VCPU_REGS_RAX];
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tss->cx = c->regs[VCPU_REGS_RCX];
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tss->dx = c->regs[VCPU_REGS_RDX];
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tss->bx = c->regs[VCPU_REGS_RBX];
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tss->sp = c->regs[VCPU_REGS_RSP];
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tss->bp = c->regs[VCPU_REGS_RBP];
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tss->si = c->regs[VCPU_REGS_RSI];
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tss->di = c->regs[VCPU_REGS_RDI];
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tss->es = ops->get_segment_selector(VCPU_SREG_ES, ctxt->vcpu);
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tss->cs = ops->get_segment_selector(VCPU_SREG_CS, ctxt->vcpu);
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tss->ss = ops->get_segment_selector(VCPU_SREG_SS, ctxt->vcpu);
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tss->ds = ops->get_segment_selector(VCPU_SREG_DS, ctxt->vcpu);
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tss->ldt = ops->get_segment_selector(VCPU_SREG_LDTR, ctxt->vcpu);
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}
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static int load_state_from_tss16(struct x86_emulate_ctxt *ctxt,
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struct x86_emulate_ops *ops,
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struct tss_segment_16 *tss)
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{
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struct decode_cache *c = &ctxt->decode;
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int ret;
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c->eip = tss->ip;
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ctxt->eflags = tss->flag | 2;
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c->regs[VCPU_REGS_RAX] = tss->ax;
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c->regs[VCPU_REGS_RCX] = tss->cx;
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c->regs[VCPU_REGS_RDX] = tss->dx;
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c->regs[VCPU_REGS_RBX] = tss->bx;
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c->regs[VCPU_REGS_RSP] = tss->sp;
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c->regs[VCPU_REGS_RBP] = tss->bp;
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c->regs[VCPU_REGS_RSI] = tss->si;
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c->regs[VCPU_REGS_RDI] = tss->di;
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/*
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* SDM says that segment selectors are loaded before segment
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* descriptors
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*/
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ops->set_segment_selector(tss->ldt, VCPU_SREG_LDTR, ctxt->vcpu);
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ops->set_segment_selector(tss->es, VCPU_SREG_ES, ctxt->vcpu);
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ops->set_segment_selector(tss->cs, VCPU_SREG_CS, ctxt->vcpu);
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ops->set_segment_selector(tss->ss, VCPU_SREG_SS, ctxt->vcpu);
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ops->set_segment_selector(tss->ds, VCPU_SREG_DS, ctxt->vcpu);
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/*
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* Now load segment descriptors. If fault happenes at this stage
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* it is handled in a context of new task
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*/
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ret = load_segment_descriptor(ctxt, ops, tss->ldt, VCPU_SREG_LDTR);
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if (ret != X86EMUL_CONTINUE)
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return ret;
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ret = load_segment_descriptor(ctxt, ops, tss->es, VCPU_SREG_ES);
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if (ret != X86EMUL_CONTINUE)
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return ret;
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ret = load_segment_descriptor(ctxt, ops, tss->cs, VCPU_SREG_CS);
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if (ret != X86EMUL_CONTINUE)
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return ret;
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ret = load_segment_descriptor(ctxt, ops, tss->ss, VCPU_SREG_SS);
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if (ret != X86EMUL_CONTINUE)
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return ret;
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ret = load_segment_descriptor(ctxt, ops, tss->ds, VCPU_SREG_DS);
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if (ret != X86EMUL_CONTINUE)
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return ret;
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return X86EMUL_CONTINUE;
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}
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static int task_switch_16(struct x86_emulate_ctxt *ctxt,
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struct x86_emulate_ops *ops,
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u16 tss_selector, u16 old_tss_sel,
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ulong old_tss_base, struct desc_struct *new_desc)
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{
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struct tss_segment_16 tss_seg;
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int ret;
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u32 err, new_tss_base = get_desc_base(new_desc);
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ret = ops->read_std(old_tss_base, &tss_seg, sizeof tss_seg, ctxt->vcpu,
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&err);
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if (ret == X86EMUL_PROPAGATE_FAULT) {
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/* FIXME: need to provide precise fault address */
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kvm_inject_page_fault(ctxt->vcpu, old_tss_base, err);
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return ret;
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}
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save_state_to_tss16(ctxt, ops, &tss_seg);
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ret = ops->write_std(old_tss_base, &tss_seg, sizeof tss_seg, ctxt->vcpu,
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&err);
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if (ret == X86EMUL_PROPAGATE_FAULT) {
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/* FIXME: need to provide precise fault address */
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kvm_inject_page_fault(ctxt->vcpu, old_tss_base, err);
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return ret;
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}
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ret = ops->read_std(new_tss_base, &tss_seg, sizeof tss_seg, ctxt->vcpu,
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&err);
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if (ret == X86EMUL_PROPAGATE_FAULT) {
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/* FIXME: need to provide precise fault address */
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kvm_inject_page_fault(ctxt->vcpu, new_tss_base, err);
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return ret;
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}
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if (old_tss_sel != 0xffff) {
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tss_seg.prev_task_link = old_tss_sel;
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ret = ops->write_std(new_tss_base,
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&tss_seg.prev_task_link,
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sizeof tss_seg.prev_task_link,
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ctxt->vcpu, &err);
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if (ret == X86EMUL_PROPAGATE_FAULT) {
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/* FIXME: need to provide precise fault address */
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kvm_inject_page_fault(ctxt->vcpu, new_tss_base, err);
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return ret;
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}
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}
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return load_state_from_tss16(ctxt, ops, &tss_seg);
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}
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static void save_state_to_tss32(struct x86_emulate_ctxt *ctxt,
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struct x86_emulate_ops *ops,
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struct tss_segment_32 *tss)
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{
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struct decode_cache *c = &ctxt->decode;
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tss->cr3 = ops->get_cr(3, ctxt->vcpu);
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tss->eip = c->eip;
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tss->eflags = ctxt->eflags;
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tss->eax = c->regs[VCPU_REGS_RAX];
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tss->ecx = c->regs[VCPU_REGS_RCX];
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tss->edx = c->regs[VCPU_REGS_RDX];
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tss->ebx = c->regs[VCPU_REGS_RBX];
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tss->esp = c->regs[VCPU_REGS_RSP];
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tss->ebp = c->regs[VCPU_REGS_RBP];
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tss->esi = c->regs[VCPU_REGS_RSI];
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tss->edi = c->regs[VCPU_REGS_RDI];
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tss->es = ops->get_segment_selector(VCPU_SREG_ES, ctxt->vcpu);
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tss->cs = ops->get_segment_selector(VCPU_SREG_CS, ctxt->vcpu);
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tss->ss = ops->get_segment_selector(VCPU_SREG_SS, ctxt->vcpu);
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tss->ds = ops->get_segment_selector(VCPU_SREG_DS, ctxt->vcpu);
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tss->fs = ops->get_segment_selector(VCPU_SREG_FS, ctxt->vcpu);
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tss->gs = ops->get_segment_selector(VCPU_SREG_GS, ctxt->vcpu);
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tss->ldt_selector = ops->get_segment_selector(VCPU_SREG_LDTR, ctxt->vcpu);
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}
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static int load_state_from_tss32(struct x86_emulate_ctxt *ctxt,
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struct x86_emulate_ops *ops,
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struct tss_segment_32 *tss)
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{
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struct decode_cache *c = &ctxt->decode;
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int ret;
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ops->set_cr(3, tss->cr3, ctxt->vcpu);
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c->eip = tss->eip;
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ctxt->eflags = tss->eflags | 2;
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c->regs[VCPU_REGS_RAX] = tss->eax;
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c->regs[VCPU_REGS_RCX] = tss->ecx;
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c->regs[VCPU_REGS_RDX] = tss->edx;
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c->regs[VCPU_REGS_RBX] = tss->ebx;
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c->regs[VCPU_REGS_RSP] = tss->esp;
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c->regs[VCPU_REGS_RBP] = tss->ebp;
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c->regs[VCPU_REGS_RSI] = tss->esi;
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c->regs[VCPU_REGS_RDI] = tss->edi;
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/*
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* SDM says that segment selectors are loaded before segment
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* descriptors
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*/
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ops->set_segment_selector(tss->ldt_selector, VCPU_SREG_LDTR, ctxt->vcpu);
|
||||
ops->set_segment_selector(tss->es, VCPU_SREG_ES, ctxt->vcpu);
|
||||
ops->set_segment_selector(tss->cs, VCPU_SREG_CS, ctxt->vcpu);
|
||||
ops->set_segment_selector(tss->ss, VCPU_SREG_SS, ctxt->vcpu);
|
||||
ops->set_segment_selector(tss->ds, VCPU_SREG_DS, ctxt->vcpu);
|
||||
ops->set_segment_selector(tss->fs, VCPU_SREG_FS, ctxt->vcpu);
|
||||
ops->set_segment_selector(tss->gs, VCPU_SREG_GS, ctxt->vcpu);
|
||||
|
||||
/*
|
||||
* Now load segment descriptors. If fault happenes at this stage
|
||||
* it is handled in a context of new task
|
||||
*/
|
||||
ret = load_segment_descriptor(ctxt, ops, tss->ldt_selector, VCPU_SREG_LDTR);
|
||||
if (ret != X86EMUL_CONTINUE)
|
||||
return ret;
|
||||
ret = load_segment_descriptor(ctxt, ops, tss->es, VCPU_SREG_ES);
|
||||
if (ret != X86EMUL_CONTINUE)
|
||||
return ret;
|
||||
ret = load_segment_descriptor(ctxt, ops, tss->cs, VCPU_SREG_CS);
|
||||
if (ret != X86EMUL_CONTINUE)
|
||||
return ret;
|
||||
ret = load_segment_descriptor(ctxt, ops, tss->ss, VCPU_SREG_SS);
|
||||
if (ret != X86EMUL_CONTINUE)
|
||||
return ret;
|
||||
ret = load_segment_descriptor(ctxt, ops, tss->ds, VCPU_SREG_DS);
|
||||
if (ret != X86EMUL_CONTINUE)
|
||||
return ret;
|
||||
ret = load_segment_descriptor(ctxt, ops, tss->fs, VCPU_SREG_FS);
|
||||
if (ret != X86EMUL_CONTINUE)
|
||||
return ret;
|
||||
ret = load_segment_descriptor(ctxt, ops, tss->gs, VCPU_SREG_GS);
|
||||
if (ret != X86EMUL_CONTINUE)
|
||||
return ret;
|
||||
|
||||
return X86EMUL_CONTINUE;
|
||||
}
|
||||
|
||||
static int task_switch_32(struct x86_emulate_ctxt *ctxt,
|
||||
struct x86_emulate_ops *ops,
|
||||
u16 tss_selector, u16 old_tss_sel,
|
||||
ulong old_tss_base, struct desc_struct *new_desc)
|
||||
{
|
||||
struct tss_segment_32 tss_seg;
|
||||
int ret;
|
||||
u32 err, new_tss_base = get_desc_base(new_desc);
|
||||
|
||||
ret = ops->read_std(old_tss_base, &tss_seg, sizeof tss_seg, ctxt->vcpu,
|
||||
&err);
|
||||
if (ret == X86EMUL_PROPAGATE_FAULT) {
|
||||
/* FIXME: need to provide precise fault address */
|
||||
kvm_inject_page_fault(ctxt->vcpu, old_tss_base, err);
|
||||
return ret;
|
||||
}
|
||||
|
||||
save_state_to_tss32(ctxt, ops, &tss_seg);
|
||||
|
||||
ret = ops->write_std(old_tss_base, &tss_seg, sizeof tss_seg, ctxt->vcpu,
|
||||
&err);
|
||||
if (ret == X86EMUL_PROPAGATE_FAULT) {
|
||||
/* FIXME: need to provide precise fault address */
|
||||
kvm_inject_page_fault(ctxt->vcpu, old_tss_base, err);
|
||||
return ret;
|
||||
}
|
||||
|
||||
ret = ops->read_std(new_tss_base, &tss_seg, sizeof tss_seg, ctxt->vcpu,
|
||||
&err);
|
||||
if (ret == X86EMUL_PROPAGATE_FAULT) {
|
||||
/* FIXME: need to provide precise fault address */
|
||||
kvm_inject_page_fault(ctxt->vcpu, new_tss_base, err);
|
||||
return ret;
|
||||
}
|
||||
|
||||
if (old_tss_sel != 0xffff) {
|
||||
tss_seg.prev_task_link = old_tss_sel;
|
||||
|
||||
ret = ops->write_std(new_tss_base,
|
||||
&tss_seg.prev_task_link,
|
||||
sizeof tss_seg.prev_task_link,
|
||||
ctxt->vcpu, &err);
|
||||
if (ret == X86EMUL_PROPAGATE_FAULT) {
|
||||
/* FIXME: need to provide precise fault address */
|
||||
kvm_inject_page_fault(ctxt->vcpu, new_tss_base, err);
|
||||
return ret;
|
||||
}
|
||||
}
|
||||
|
||||
return load_state_from_tss32(ctxt, ops, &tss_seg);
|
||||
}
|
||||
|
||||
static int emulator_do_task_switch(struct x86_emulate_ctxt *ctxt,
|
||||
struct x86_emulate_ops *ops,
|
||||
u16 tss_selector, int reason)
|
||||
{
|
||||
struct desc_struct curr_tss_desc, next_tss_desc;
|
||||
int ret;
|
||||
u16 old_tss_sel = ops->get_segment_selector(VCPU_SREG_TR, ctxt->vcpu);
|
||||
ulong old_tss_base =
|
||||
get_cached_descriptor_base(ctxt, ops, VCPU_SREG_TR);
|
||||
|
||||
/* FIXME: old_tss_base == ~0 ? */
|
||||
|
||||
ret = read_segment_descriptor(ctxt, ops, tss_selector, &next_tss_desc);
|
||||
if (ret != X86EMUL_CONTINUE)
|
||||
return ret;
|
||||
ret = read_segment_descriptor(ctxt, ops, old_tss_sel, &curr_tss_desc);
|
||||
if (ret != X86EMUL_CONTINUE)
|
||||
return ret;
|
||||
|
||||
/* FIXME: check that next_tss_desc is tss */
|
||||
|
||||
if (reason != TASK_SWITCH_IRET) {
|
||||
if ((tss_selector & 3) > next_tss_desc.dpl ||
|
||||
ops->cpl(ctxt->vcpu) > next_tss_desc.dpl) {
|
||||
kvm_inject_gp(ctxt->vcpu, 0);
|
||||
return X86EMUL_PROPAGATE_FAULT;
|
||||
}
|
||||
}
|
||||
|
||||
if (!next_tss_desc.p || desc_limit_scaled(&next_tss_desc) < 0x67) {
|
||||
kvm_queue_exception_e(ctxt->vcpu, TS_VECTOR,
|
||||
tss_selector & 0xfffc);
|
||||
return X86EMUL_PROPAGATE_FAULT;
|
||||
}
|
||||
|
||||
if (reason == TASK_SWITCH_IRET || reason == TASK_SWITCH_JMP) {
|
||||
curr_tss_desc.type &= ~(1 << 1); /* clear busy flag */
|
||||
write_segment_descriptor(ctxt, ops, old_tss_sel,
|
||||
&curr_tss_desc);
|
||||
}
|
||||
|
||||
if (reason == TASK_SWITCH_IRET)
|
||||
ctxt->eflags = ctxt->eflags & ~X86_EFLAGS_NT;
|
||||
|
||||
/* set back link to prev task only if NT bit is set in eflags
|
||||
note that old_tss_sel is not used afetr this point */
|
||||
if (reason != TASK_SWITCH_CALL && reason != TASK_SWITCH_GATE)
|
||||
old_tss_sel = 0xffff;
|
||||
|
||||
if (next_tss_desc.type & 8)
|
||||
ret = task_switch_32(ctxt, ops, tss_selector, old_tss_sel,
|
||||
old_tss_base, &next_tss_desc);
|
||||
else
|
||||
ret = task_switch_16(ctxt, ops, tss_selector, old_tss_sel,
|
||||
old_tss_base, &next_tss_desc);
|
||||
|
||||
if (reason == TASK_SWITCH_CALL || reason == TASK_SWITCH_GATE)
|
||||
ctxt->eflags = ctxt->eflags | X86_EFLAGS_NT;
|
||||
|
||||
if (reason != TASK_SWITCH_IRET) {
|
||||
next_tss_desc.type |= (1 << 1); /* set busy flag */
|
||||
write_segment_descriptor(ctxt, ops, tss_selector,
|
||||
&next_tss_desc);
|
||||
}
|
||||
|
||||
ops->set_cr(0, ops->get_cr(0, ctxt->vcpu) | X86_CR0_TS, ctxt->vcpu);
|
||||
ops->set_cached_descriptor(&next_tss_desc, VCPU_SREG_TR, ctxt->vcpu);
|
||||
ops->set_segment_selector(tss_selector, VCPU_SREG_TR, ctxt->vcpu);
|
||||
|
||||
return ret;
|
||||
}
|
||||
|
||||
int emulator_task_switch(struct x86_emulate_ctxt *ctxt,
|
||||
struct x86_emulate_ops *ops,
|
||||
u16 tss_selector, int reason)
|
||||
{
|
||||
struct decode_cache *c = &ctxt->decode;
|
||||
int rc;
|
||||
|
||||
memset(c, 0, sizeof(struct decode_cache));
|
||||
c->eip = ctxt->eip;
|
||||
memcpy(c->regs, ctxt->vcpu->arch.regs, sizeof c->regs);
|
||||
|
||||
rc = emulator_do_task_switch(ctxt, ops, tss_selector, reason);
|
||||
|
||||
if (rc == X86EMUL_CONTINUE) {
|
||||
memcpy(ctxt->vcpu->arch.regs, c->regs, sizeof c->regs);
|
||||
kvm_rip_write(ctxt->vcpu, c->eip);
|
||||
}
|
||||
|
||||
return rc;
|
||||
}
|
||||
|
||||
int
|
||||
x86_emulate_insn(struct x86_emulate_ctxt *ctxt, struct x86_emulate_ops *ops)
|
||||
{
|
||||
|
|
|
|||
Loading…
Reference in New Issue