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b43: Fix for broken transmission
This patch fixes the transmission problems introduced by commit f04b3787bbce4567e28069a9ec97dcd804626ac7 I'm not sure if the dummy read is really required. The old code does it. I think it can't hurt and can possibly fix some write posting problems (hardware bugs or whatever. Who knows). Signed-off-by: Michael Buesch <mb@bu3sch.de> Signed-off-by: John W. Linville <linville@tuxdriver.com>
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8ed7fc48eb
commit
38d1b4ce90
3 changed files with 23 additions and 15 deletions
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@ -25,7 +25,7 @@ struct b43_phy;
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#define B43_PHY_BBANDCFG_RXANT 0x180 /* RX Antenna selection */
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#define B43_PHY_BBANDCFG_RXANT_SHIFT 7
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#define B43_PHY_PWRDOWN B43_PHY_OFDM(0x03) /* Powerdown */
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#define B43_PHY_CRSTHRES1 B43_PHY_OFDM(0x06) /* CRS Threshold 1 */
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#define B43_PHY_CRSTHRES1_R1 B43_PHY_OFDM(0x06) /* CRS Threshold 1 (phy.rev 1 only) */
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#define B43_PHY_LNAHPFCTL B43_PHY_OFDM(0x1C) /* LNA/HPF control */
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#define B43_PHY_LPFGAINCTL B43_PHY_OFDM(0x20) /* LPF Gain control */
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#define B43_PHY_ADIVRELATED B43_PHY_OFDM(0x27) /* FIXME rename */
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@ -69,8 +69,8 @@ struct b43_phy;
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#define B43_PHY_DIVP1P2GAIN B43_PHY_OFDM(0xAB)
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#define B43_PHY_DIVSRCHGAINBACK B43_PHY_OFDM(0xAD) /* Divider search gain back */
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#define B43_PHY_DIVSRCHGAINCHNG B43_PHY_OFDM(0xAE) /* Divider search gain change */
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#define B43_PHY_CRSTHRES1_R1 B43_PHY_OFDM(0xC0) /* CRS Threshold 1 (rev 1 only) */
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#define B43_PHY_CRSTHRES2_R1 B43_PHY_OFDM(0xC1) /* CRS Threshold 2 (rev 1 only) */
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#define B43_PHY_CRSTHRES1 B43_PHY_OFDM(0xC0) /* CRS Threshold 1 (phy.rev >= 2 only) */
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#define B43_PHY_CRSTHRES2 B43_PHY_OFDM(0xC1) /* CRS Threshold 2 (phy.rev >= 2 only) */
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#define B43_PHY_TSSIP_LTBASE B43_PHY_OFDM(0x380) /* TSSI power lookup table base */
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#define B43_PHY_DC_LTBASE B43_PHY_OFDM(0x3A0) /* DC lookup table base */
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#define B43_PHY_GAIN_LTBASE B43_PHY_OFDM(0x3C0) /* Gain lookup table base */
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@ -403,7 +403,7 @@ void b43_ofdmtab_write16(struct b43_wldev *dev, u16 table,
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addr = table + offset;
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if ((phy->ofdmtab_addr_direction != B43_OFDMTAB_DIRECTION_WRITE) ||
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(addr -1 != phy->ofdmtab_addr)) {
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(addr - 1 != phy->ofdmtab_addr)) {
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/* The hardware has a different address in memory. Update it. */
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b43_phy_write(dev, B43_PHY_OTABLECTL, addr);
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phy->ofdmtab_addr_direction = B43_OFDMTAB_DIRECTION_WRITE;
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@ -123,17 +123,24 @@ static void b43_wa_rssi_lt(struct b43_wldev *dev) /* RSSI lookup table */
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{
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int i;
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for (i = 0; i < 8; i++)
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b43_ofdmtab_write16(dev, B43_OFDMTAB_RSSI, i, i + 8);
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for (i = 8; i < 16; i++)
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b43_ofdmtab_write16(dev, B43_OFDMTAB_RSSI, i, i - 8);
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if (0 /* FIXME: For APHY.rev=2 this might be needed */) {
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for (i = 0; i < 8; i++)
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b43_ofdmtab_write16(dev, B43_OFDMTAB_RSSI, i, i + 8);
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for (i = 8; i < 16; i++)
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b43_ofdmtab_write16(dev, B43_OFDMTAB_RSSI, i, i - 8);
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} else {
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for (i = 0; i < 64; i++)
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b43_ofdmtab_write16(dev, B43_OFDMTAB_RSSI, i, i);
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}
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}
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static void b43_wa_analog(struct b43_wldev *dev)
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{
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struct b43_phy *phy = &dev->phy;
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u16 ofdmrev;
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if (phy->analog > 2) {
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ofdmrev = b43_phy_read(dev, B43_PHY_VERSION_OFDM) & B43_PHYVER_VERSION;
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if (ofdmrev > 2) {
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if (phy->type == B43_PHYTYPE_A)
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b43_phy_write(dev, B43_PHY_PWRDOWN, 0x1808);
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else
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@ -306,16 +313,16 @@ static void b43_wa_crs_ed(struct b43_wldev *dev)
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struct b43_phy *phy = &dev->phy;
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if (phy->rev == 1) {
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b43_phy_write(dev, B43_PHY_CRSTHRES1, 0x4F19);
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b43_phy_write(dev, B43_PHY_CRSTHRES1_R1, 0x4F19);
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} else if (phy->rev == 2) {
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b43_phy_write(dev, B43_PHY_CRSTHRES1_R1, 0x1861);
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b43_phy_write(dev, B43_PHY_CRSTHRES2_R1, 0x1861);
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b43_phy_write(dev, B43_PHY_CRSTHRES1, 0x1861);
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b43_phy_write(dev, B43_PHY_CRSTHRES2, 0x0271);
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b43_phy_write(dev, B43_PHY_ANTDWELL,
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b43_phy_read(dev, B43_PHY_ANTDWELL)
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| 0x0800);
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} else {
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b43_phy_write(dev, B43_PHY_CRSTHRES1_R1, 0x0098);
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b43_phy_write(dev, B43_PHY_CRSTHRES2_R1, 0x0070);
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b43_phy_write(dev, B43_PHY_CRSTHRES1, 0x0098);
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b43_phy_write(dev, B43_PHY_CRSTHRES2, 0x0070);
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b43_phy_write(dev, B43_PHY_OFDM(0xC9), 0x0080);
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b43_phy_write(dev, B43_PHY_ANTDWELL,
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b43_phy_read(dev, B43_PHY_ANTDWELL)
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@ -441,7 +448,7 @@ static void b43_wa_altagc(struct b43_wldev *dev)
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}
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}
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b43_phy_write(dev, B43_PHY_DIVSRCHIDX,
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(b43_phy_read(dev, B43_PHY_DIVSRCHIDX) & 0x7F7F) | 0x7874);
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(b43_phy_read(dev, B43_PHY_DIVSRCHIDX) & 0x8080) | 0x7874);
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b43_phy_write(dev, B43_PHY_OFDM(0x8E), 0x1C00);
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if (phy->rev == 1) {
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b43_phy_write(dev, B43_PHY_DIVP1P2GAIN,
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@ -466,6 +473,7 @@ static void b43_wa_altagc(struct b43_wldev *dev)
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b43_phy_write(dev, B43_PHY_OFDM(0x26),
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b43_phy_read(dev, B43_PHY_OFDM(0x26)) & ~0x1000);
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}
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b43_phy_read(dev, B43_PHY_VERSION_OFDM); /* Dummy read */
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}
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static void b43_wa_tr_ltov(struct b43_wldev *dev) /* TR Lookup Table Original Values */
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