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arm64: dts: renesas: r8a77970: add [H]SCIF support
Describe [H]SCIF ports in the R8A77970 device tree. Based on the original (and large) patch by Daisuke Matsushita <daisuke.matsushita.ns@hitachi.com>. Signed-off-by: Vladimir Barinov <vladimir.barinov@cogentembedded.com> Signed-off-by: Sergei Shtylyov <sergei.shtylyov@cogentembedded.com> Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be> Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
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1 changed files with 149 additions and 0 deletions
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@ -59,6 +59,13 @@ extalr_clk: extalr {
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clock-frequency = <0>;
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};
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/* External SCIF clock - to be overridden by boards that provide it */
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scif_clk: scif {
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compatible = "fixed-clock";
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#clock-cells = <0>;
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clock-frequency = <0>;
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};
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soc {
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compatible = "simple-bus";
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interrupt-parent = <&gic>;
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@ -169,5 +176,147 @@ GIC_SPI 318 IRQ_TYPE_LEVEL_HIGH
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#dma-cells = <1>;
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dma-channels = <8>;
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};
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hscif0: serial@e6540000 {
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compatible = "renesas,hscif-r8a77970",
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"renesas,rcar-gen3-hscif",
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"renesas,hscif";
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reg = <0 0xe6540000 0 96>;
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interrupts = <GIC_SPI 154 IRQ_TYPE_LEVEL_HIGH>;
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clocks = <&cpg CPG_MOD 520>,
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<&cpg CPG_CORE 9>,
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<&scif_clk>;
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clock-names = "fck", "brg_int", "scif_clk";
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dmas = <&dmac1 0x31>, <&dmac1 0x30>,
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<&dmac2 0x31>, <&dmac2 0x30>;
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dma-names = "tx", "rx", "tx", "rx";
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power-domains = <&sysc 32>;
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resets = <&cpg 520>;
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status = "disabled";
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};
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hscif1: serial@e6550000 {
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compatible = "renesas,hscif-r8a77970",
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"renesas,rcar-gen3-hscif",
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"renesas,hscif";
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reg = <0 0xe6550000 0 96>;
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interrupts = <GIC_SPI 155 IRQ_TYPE_LEVEL_HIGH>;
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clocks = <&cpg CPG_MOD 519>,
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<&cpg CPG_CORE 9>,
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<&scif_clk>;
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clock-names = "fck", "brg_int", "scif_clk";
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dmas = <&dmac1 0x33>, <&dmac1 0x32>,
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<&dmac2 0x33>, <&dmac2 0x32>;
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dma-names = "tx", "rx", "tx", "rx";
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power-domains = <&sysc 32>;
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resets = <&cpg 519>;
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status = "disabled";
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};
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hscif2: serial@e6560000 {
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compatible = "renesas,hscif-r8a77970",
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"renesas,rcar-gen3-hscif",
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"renesas,hscif";
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reg = <0 0xe6560000 0 96>;
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interrupts = <GIC_SPI 144 IRQ_TYPE_LEVEL_HIGH>;
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clocks = <&cpg CPG_MOD 518>,
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<&cpg CPG_CORE 9>,
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<&scif_clk>;
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clock-names = "fck", "brg_int", "scif_clk";
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dmas = <&dmac1 0x35>, <&dmac1 0x34>,
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<&dmac2 0x35>, <&dmac2 0x34>;
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dma-names = "tx", "rx", "tx", "rx";
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power-domains = <&sysc 32>;
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resets = <&cpg 518>;
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status = "disabled";
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};
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hscif3: serial@e66a0000 {
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compatible = "renesas,hscif-r8a77970",
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"renesas,rcar-gen3-hscif", "renesas,hscif";
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reg = <0 0xe66a0000 0 96>;
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interrupts = <GIC_SPI 145 IRQ_TYPE_LEVEL_HIGH>;
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clocks = <&cpg CPG_MOD 517>,
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<&cpg CPG_CORE 9>,
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<&scif_clk>;
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clock-names = "fck", "brg_int", "scif_clk";
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dmas = <&dmac1 0x37>, <&dmac1 0x36>,
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<&dmac2 0x37>, <&dmac2 0x36>;
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dma-names = "tx", "rx", "tx", "rx";
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power-domains = <&sysc 32>;
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resets = <&cpg 517>;
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status = "disabled";
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};
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scif0: serial@e6e60000 {
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compatible = "renesas,scif-r8a77970",
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"renesas,rcar-gen3-scif",
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"renesas,scif";
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reg = <0 0xe6e60000 0 64>;
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interrupts = <GIC_SPI 152 IRQ_TYPE_LEVEL_HIGH>;
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clocks = <&cpg CPG_MOD 207>,
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<&cpg CPG_CORE 9>,
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<&scif_clk>;
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clock-names = "fck", "brg_int", "scif_clk";
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dmas = <&dmac1 0x51>, <&dmac1 0x50>,
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<&dmac2 0x51>, <&dmac2 0x50>;
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dma-names = "tx", "rx", "tx", "rx";
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power-domains = <&sysc 32>;
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resets = <&cpg 207>;
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status = "disabled";
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};
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scif1: serial@e6e68000 {
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compatible = "renesas,scif-r8a77970",
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"renesas,rcar-gen3-scif",
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"renesas,scif";
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reg = <0 0xe6e68000 0 64>;
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interrupts = <GIC_SPI 153 IRQ_TYPE_LEVEL_HIGH>;
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clocks = <&cpg CPG_MOD 206>,
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<&cpg CPG_CORE 9>,
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<&scif_clk>;
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clock-names = "fck", "brg_int", "scif_clk";
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dmas = <&dmac1 0x53>, <&dmac1 0x52>,
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<&dmac2 0x53>, <&dmac2 0x52>;
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dma-names = "tx", "rx", "tx", "rx";
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power-domains = <&sysc 32>;
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resets = <&cpg 206>;
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status = "disabled";
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};
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scif3: serial@e6c50000 {
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compatible = "renesas,scif-r8a77970",
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"renesas,rcar-gen3-scif",
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"renesas,scif";
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reg = <0 0xe6c50000 0 64>;
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interrupts = <GIC_SPI 23 IRQ_TYPE_LEVEL_HIGH>;
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clocks = <&cpg CPG_MOD 204>,
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<&cpg CPG_CORE 9>,
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<&scif_clk>;
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clock-names = "fck", "brg_int", "scif_clk";
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dmas = <&dmac1 0x57>, <&dmac1 0x56>,
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<&dmac2 0x57>, <&dmac2 0x56>;
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dma-names = "tx", "rx", "tx", "rx";
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power-domains = <&sysc 32>;
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resets = <&cpg 204>;
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status = "disabled";
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};
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scif4: serial@e6c40000 {
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compatible = "renesas,scif-r8a77970",
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"renesas,rcar-gen3-scif", "renesas,scif";
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reg = <0 0xe6c40000 0 64>;
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interrupts = <GIC_SPI 16 IRQ_TYPE_LEVEL_HIGH>;
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clocks = <&cpg CPG_MOD 203>,
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<&cpg CPG_CORE 9>,
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<&scif_clk>;
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clock-names = "fck", "brg_int", "scif_clk";
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dmas = <&dmac1 0x59>, <&dmac1 0x58>,
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<&dmac2 0x59>, <&dmac2 0x58>;
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dma-names = "tx", "rx", "tx", "rx";
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power-domains = <&sysc 32>;
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resets = <&cpg 203>;
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status = "disabled";
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};
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};
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};
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