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RDMA/hfi1: Avoid redeclaration error
Move hfi1 ioctl definitions to a new header which can be included by both the hfi1 and qib drivers to avoid a duplicate enum definition as shown in this build error for qib: CC [M] drivers/infiniband/hw/qib/qib_sysfs.o In file included from ./include/uapi/rdma/rdma_user_ioctl.h:39:0, from include/uapi/rdma/ib_user_mad.h:38, from include/rdma/ib_mad.h:43, from include/rdma/ib_pma.h:38, from drivers/infiniband/hw/qib/qib_mad.h:37, from drivers/infiniband/hw/qib/qib_init.c:49: ./include/uapi/rdma/hfi/hfi1_user.h:370:2: error: redeclaration of enumerator ‘ur_rcvhdrtail’ ur_rcvhdrtail = 0, Move hfi1 structures to separate file to avoid this failure. The actual move of the ioctl definitions comes in a follow on patch. Signed-off-by: Matan Barak <matanb@mellanox.com> Signed-off-by: Haggai Eran <haggaie@mellanox.com> Signed-off-by: Leon Romanovsky <leonro@mellanox.com> Reviewed-by: Jason Gunthorpe <jgunthorpe@obsidianresearch.com> Signed-off-by: Doug Ledford <dledford@redhat.com>
This commit is contained in:
Leon Romanovsky
Doug Ledford
parent
06393bc39e
commit
38e8b671bf
3 changed files with 175 additions and 119 deletions
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@ -1,2 +1,3 @@
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# UAPI Header export list
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header-y += hfi1_user.h
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header-y += hfi1_ioctl.h
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173
include/uapi/rdma/hfi/hfi1_ioctl.h
Normal file
173
include/uapi/rdma/hfi/hfi1_ioctl.h
Normal file
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@ -0,0 +1,173 @@
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/*
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*
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* This file is provided under a dual BSD/GPLv2 license. When using or
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* redistributing this file, you may do so under either license.
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*
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* GPL LICENSE SUMMARY
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*
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* Copyright(c) 2015 Intel Corporation.
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*
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* This program is free software; you can redistribute it and/or modify
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* it under the terms of version 2 of the GNU General Public License as
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* published by the Free Software Foundation.
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*
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* This program is distributed in the hope that it will be useful, but
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* WITHOUT ANY WARRANTY; without even the implied warranty of
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* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
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* General Public License for more details.
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*
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* BSD LICENSE
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*
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* Copyright(c) 2015 Intel Corporation.
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*
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* Redistribution and use in source and binary forms, with or without
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* modification, are permitted provided that the following conditions
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* are met:
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*
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* - Redistributions of source code must retain the above copyright
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* notice, this list of conditions and the following disclaimer.
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* - Redistributions in binary form must reproduce the above copyright
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* notice, this list of conditions and the following disclaimer in
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* the documentation and/or other materials provided with the
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* distribution.
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* - Neither the name of Intel Corporation nor the names of its
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* contributors may be used to endorse or promote products derived
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* from this software without specific prior written permission.
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*
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* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
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* "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
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* LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
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* A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
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* OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
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* SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
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* LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
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* DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
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* THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
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* (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
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* OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
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*
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*/
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#ifndef _LINUX__HFI1_IOCTL_H
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#define _LINUX__HFI1_IOCTL_H
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#include <linux/types.h>
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/*
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* This structure is passed to the driver to tell it where
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* user code buffers are, sizes, etc. The offsets and sizes of the
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* fields must remain unchanged, for binary compatibility. It can
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* be extended, if userversion is changed so user code can tell, if needed
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*/
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struct hfi1_user_info {
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/*
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* version of user software, to detect compatibility issues.
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* Should be set to HFI1_USER_SWVERSION.
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*/
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__u32 userversion;
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__u32 pad;
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/*
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* If two or more processes wish to share a context, each process
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* must set the subcontext_cnt and subcontext_id to the same
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* values. The only restriction on the subcontext_id is that
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* it be unique for a given node.
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*/
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__u16 subctxt_cnt;
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__u16 subctxt_id;
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/* 128bit UUID passed in by PSM. */
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__u8 uuid[16];
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};
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struct hfi1_ctxt_info {
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__u64 runtime_flags; /* chip/drv runtime flags (HFI1_CAP_*) */
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__u32 rcvegr_size; /* size of each eager buffer */
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__u16 num_active; /* number of active units */
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__u16 unit; /* unit (chip) assigned to caller */
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__u16 ctxt; /* ctxt on unit assigned to caller */
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__u16 subctxt; /* subctxt on unit assigned to caller */
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__u16 rcvtids; /* number of Rcv TIDs for this context */
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__u16 credits; /* number of PIO credits for this context */
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__u16 numa_node; /* NUMA node of the assigned device */
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__u16 rec_cpu; /* cpu # for affinity (0xffff if none) */
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__u16 send_ctxt; /* send context in use by this user context */
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__u16 egrtids; /* number of RcvArray entries for Eager Rcvs */
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__u16 rcvhdrq_cnt; /* number of RcvHdrQ entries */
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__u16 rcvhdrq_entsize; /* size (in bytes) for each RcvHdrQ entry */
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__u16 sdma_ring_size; /* number of entries in SDMA request ring */
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};
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struct hfi1_tid_info {
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/* virtual address of first page in transfer */
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__u64 vaddr;
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/* pointer to tid array. this array is big enough */
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__u64 tidlist;
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/* number of tids programmed by this request */
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__u32 tidcnt;
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/* length of transfer buffer programmed by this request */
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__u32 length;
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};
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/*
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* This structure is returned by the driver immediately after
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* open to get implementation-specific info, and info specific to this
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* instance.
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*
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* This struct must have explicit pad fields where type sizes
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* may result in different alignments between 32 and 64 bit
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* programs, since the 64 bit * bit kernel requires the user code
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* to have matching offsets
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*/
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struct hfi1_base_info {
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/* version of hardware, for feature checking. */
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__u32 hw_version;
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/* version of software, for feature checking. */
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__u32 sw_version;
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/* Job key */
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__u16 jkey;
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__u16 padding1;
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/*
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* The special QP (queue pair) value that identifies PSM
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* protocol packet from standard IB packets.
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*/
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__u32 bthqp;
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/* PIO credit return address, */
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__u64 sc_credits_addr;
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/*
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* Base address of write-only pio buffers for this process.
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* Each buffer has sendpio_credits*64 bytes.
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*/
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__u64 pio_bufbase_sop;
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/*
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* Base address of write-only pio buffers for this process.
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* Each buffer has sendpio_credits*64 bytes.
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*/
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__u64 pio_bufbase;
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/* address where receive buffer queue is mapped into */
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__u64 rcvhdr_bufbase;
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/* base address of Eager receive buffers. */
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__u64 rcvegr_bufbase;
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/* base address of SDMA completion ring */
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__u64 sdma_comp_bufbase;
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/*
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* User register base for init code, not to be used directly by
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* protocol or applications. Always maps real chip register space.
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* the register addresses are:
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* ur_rcvhdrhead, ur_rcvhdrtail, ur_rcvegrhead, ur_rcvegrtail,
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* ur_rcvtidflow
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*/
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__u64 user_regbase;
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/* notification events */
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__u64 events_bufbase;
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/* status page */
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__u64 status_bufbase;
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/* rcvhdrtail update */
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__u64 rcvhdrtail_base;
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/*
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* shared memory pages for subctxts if ctxt is shared; these cover
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* all the processes in the group sharing a single context.
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* all have enough space for the num_subcontexts value on this job.
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*/
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__u64 subctxt_uregbase;
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__u64 subctxt_rcvegrbuf;
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__u64 subctxt_rcvhdrbuf;
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};
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#endif /* _LINIUX__HFI1_IOCTL_H */
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@ -58,6 +58,7 @@
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#include <linux/types.h>
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#include <rdma/rdma_user_ioctl.h>
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#include <rdma/hfi/hfi1_ioctl.h>
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/*
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* This version number is given to the driver by the user code during
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@ -211,60 +212,6 @@ struct hfi1_cmd;
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#define HFI1_POLL_TYPE_ANYRCV 0x0
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#define HFI1_POLL_TYPE_URGENT 0x1
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/*
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* This structure is passed to the driver to tell it where
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* user code buffers are, sizes, etc. The offsets and sizes of the
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* fields must remain unchanged, for binary compatibility. It can
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* be extended, if userversion is changed so user code can tell, if needed
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*/
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struct hfi1_user_info {
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/*
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* version of user software, to detect compatibility issues.
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* Should be set to HFI1_USER_SWVERSION.
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*/
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__u32 userversion;
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__u32 pad;
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/*
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* If two or more processes wish to share a context, each process
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* must set the subcontext_cnt and subcontext_id to the same
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* values. The only restriction on the subcontext_id is that
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* it be unique for a given node.
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*/
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__u16 subctxt_cnt;
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__u16 subctxt_id;
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/* 128bit UUID passed in by PSM. */
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__u8 uuid[16];
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};
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struct hfi1_ctxt_info {
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__u64 runtime_flags; /* chip/drv runtime flags (HFI1_CAP_*) */
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__u32 rcvegr_size; /* size of each eager buffer */
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__u16 num_active; /* number of active units */
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__u16 unit; /* unit (chip) assigned to caller */
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__u16 ctxt; /* ctxt on unit assigned to caller */
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__u16 subctxt; /* subctxt on unit assigned to caller */
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__u16 rcvtids; /* number of Rcv TIDs for this context */
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__u16 credits; /* number of PIO credits for this context */
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__u16 numa_node; /* NUMA node of the assigned device */
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__u16 rec_cpu; /* cpu # for affinity (0xffff if none) */
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__u16 send_ctxt; /* send context in use by this user context */
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__u16 egrtids; /* number of RcvArray entries for Eager Rcvs */
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__u16 rcvhdrq_cnt; /* number of RcvHdrQ entries */
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__u16 rcvhdrq_entsize; /* size (in bytes) for each RcvHdrQ entry */
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__u16 sdma_ring_size; /* number of entries in SDMA request ring */
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};
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struct hfi1_tid_info {
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/* virtual address of first page in transfer */
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__u64 vaddr;
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/* pointer to tid array. this array is big enough */
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__u64 tidlist;
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/* number of tids programmed by this request */
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__u32 tidcnt;
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/* length of transfer buffer programmed by this request */
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__u32 length;
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};
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enum hfi1_sdma_comp_state {
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FREE = 0,
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QUEUED,
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@ -289,71 +236,6 @@ struct hfi1_status {
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char freezemsg[0];
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};
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/*
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* This structure is returned by the driver immediately after
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* open to get implementation-specific info, and info specific to this
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* instance.
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*
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* This struct must have explicit pad fields where type sizes
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* may result in different alignments between 32 and 64 bit
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* programs, since the 64 bit * bit kernel requires the user code
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* to have matching offsets
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*/
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struct hfi1_base_info {
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/* version of hardware, for feature checking. */
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__u32 hw_version;
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/* version of software, for feature checking. */
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__u32 sw_version;
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/* Job key */
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__u16 jkey;
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__u16 padding1;
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/*
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* The special QP (queue pair) value that identifies PSM
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* protocol packet from standard IB packets.
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*/
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__u32 bthqp;
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/* PIO credit return address, */
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__u64 sc_credits_addr;
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/*
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* Base address of write-only pio buffers for this process.
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* Each buffer has sendpio_credits*64 bytes.
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*/
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__u64 pio_bufbase_sop;
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/*
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* Base address of write-only pio buffers for this process.
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* Each buffer has sendpio_credits*64 bytes.
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*/
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__u64 pio_bufbase;
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/* address where receive buffer queue is mapped into */
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__u64 rcvhdr_bufbase;
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/* base address of Eager receive buffers. */
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__u64 rcvegr_bufbase;
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/* base address of SDMA completion ring */
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__u64 sdma_comp_bufbase;
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/*
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* User register base for init code, not to be used directly by
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* protocol or applications. Always maps real chip register space.
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* the register addresses are:
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* ur_rcvhdrhead, ur_rcvhdrtail, ur_rcvegrhead, ur_rcvegrtail,
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* ur_rcvtidflow
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*/
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__u64 user_regbase;
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/* notification events */
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__u64 events_bufbase;
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/* status page */
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__u64 status_bufbase;
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/* rcvhdrtail update */
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__u64 rcvhdrtail_base;
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/*
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* shared memory pages for subctxts if ctxt is shared; these cover
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* all the processes in the group sharing a single context.
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* all have enough space for the num_subcontexts value on this job.
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*/
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__u64 subctxt_uregbase;
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__u64 subctxt_rcvegrbuf;
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__u64 subctxt_rcvhdrbuf;
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};
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enum sdma_req_opcode {
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EXPECTED = 0,
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EAGER
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