From 261592e6b804c288d2010e98ee100548dbe91c06 Mon Sep 17 00:00:00 2001 From: Arnd Bergmann Date: Fri, 27 Feb 2015 05:50:21 +0900 Subject: [PATCH 01/23] ARM: S3C64XX: add I2C dependencies where needed The SMDK6410_WM1190_EV1 and SMDK6410_WM1192_EV1 add-on cards select MFD_WM*_I2C, but they ignore the fact that I2C may be compiled as a loadable module. This patch adds a dependency on I2C, which means we avoid the build errors, but can end up in a case where the options are hidden from the user when I2C is turned off. Signed-off-by: Arnd Bergmann Cc: Kukjin Kim Cc: Tomasz Figa Cc: Ben Dooks Signed-off-by: Kukjin Kim --- arch/arm/mach-s3c64xx/Kconfig | 4 +++- 1 file changed, 3 insertions(+), 1 deletion(-) diff --git a/arch/arm/mach-s3c64xx/Kconfig b/arch/arm/mach-s3c64xx/Kconfig index 26ca2427e53d..eff95e950d81 100644 --- a/arch/arm/mach-s3c64xx/Kconfig +++ b/arch/arm/mach-s3c64xx/Kconfig @@ -189,6 +189,7 @@ endchoice config SMDK6410_WM1190_EV1 bool "Support Wolfson Microelectronics 1190-EV1 PMIC card" depends on MACH_SMDK6410 + depends on I2C=y select MFD_WM8350_I2C select REGULATOR select REGULATOR_WM8350 @@ -203,6 +204,7 @@ config SMDK6410_WM1190_EV1 config SMDK6410_WM1192_EV1 bool "Support Wolfson Microelectronics 1192-EV1 PMIC card" depends on MACH_SMDK6410 + depends on I2C=y select MFD_WM831X select MFD_WM831X_I2C select REGULATOR @@ -269,8 +271,8 @@ config MACH_SMARTQ7 config MACH_WLF_CRAGG_6410 bool "Wolfson Cragganmore 6410" + depends on I2C=y select CPU_S3C6410 - select I2C select LEDS_GPIO_REGISTER select S3C64XX_DEV_SPI0 select S3C64XX_SETUP_FB_24BPP From 484c213b106c2b9188744666693d57bb9fd5affe Mon Sep 17 00:00:00 2001 From: Arnd Bergmann Date: Fri, 27 Feb 2015 05:50:22 +0900 Subject: [PATCH 02/23] ARM: S3C64XX: fix building without CONFIG_PM_SLEEP arch/arm/mach-s3c64xx/built-in.o: In function `s3c_pm_restore_core': :(.text+0x5d0): undefined reference to `s3c_pm_do_restore_core' :(.text+0x5d4): undefined reference to `s3c_pm_do_restore' arch/arm/mach-s3c64xx/built-in.o: In function `s3c_pm_save_core': :(.text+0x60c): undefined reference to `s3c_pm_do_save' arch/arm/mach-s3c64xx/built-in.o: In function `s3c64xx_irq_pm_resume': :(.text+0x670): undefined reference to `s3c_pm_do_restore' arch/arm/mach-s3c64xx/built-in.o: In function `s3c64xx_irq_pm_suspend': :(.text+0x6d8): undefined reference to `s3c_pm_do_save' arch/arm/mach-s3c64xx/built-in.o: In function `s3c_cpu_resume': :(.text+0x71c): undefined reference to `cpu_resume' Signed-off-by: Arnd Bergmann Signed-off-by: Kukjin Kim --- arch/arm/mach-s3c64xx/Makefile | 3 ++- arch/arm/mach-s3c64xx/pm.c | 2 ++ arch/arm/plat-samsung/include/plat/pm.h | 2 +- 3 files changed, 5 insertions(+), 2 deletions(-) diff --git a/arch/arm/mach-s3c64xx/Makefile b/arch/arm/mach-s3c64xx/Makefile index 12f67b61ca5f..17f4b07ec763 100644 --- a/arch/arm/mach-s3c64xx/Makefile +++ b/arch/arm/mach-s3c64xx/Makefile @@ -16,7 +16,8 @@ obj-$(CONFIG_CPU_S3C6410) += s3c6410.o # PM -obj-$(CONFIG_PM) += pm.o irq-pm.o sleep.o +obj-$(CONFIG_PM) += pm.o +obj-$(CONFIG_PM_SLEEP) += irq-pm.o sleep.o obj-$(CONFIG_CPU_IDLE) += cpuidle.o # DMA support diff --git a/arch/arm/mach-s3c64xx/pm.c b/arch/arm/mach-s3c64xx/pm.c index aaf7bea4032f..75b14e756383 100644 --- a/arch/arm/mach-s3c64xx/pm.c +++ b/arch/arm/mach-s3c64xx/pm.c @@ -194,6 +194,7 @@ void s3c_pm_debug_smdkled(u32 set, u32 clear) } #endif +#ifdef CONFIG_PM_SLEEP static struct sleep_save core_save[] = { SAVE_ITEM(S3C64XX_MEM0DRVCON), SAVE_ITEM(S3C64XX_MEM1DRVCON), @@ -238,6 +239,7 @@ void s3c_pm_save_core(void) s3c_pm_do_save(misc_save, ARRAY_SIZE(misc_save)); s3c_pm_do_save(core_save, ARRAY_SIZE(core_save)); } +#endif /* since both s3c6400 and s3c6410 share the same sleep pm calls, we * put the per-cpu code in here until any new cpu comes along and changes diff --git a/arch/arm/plat-samsung/include/plat/pm.h b/arch/arm/plat-samsung/include/plat/pm.h index e17d871b934c..e5a046dc22f5 100644 --- a/arch/arm/plat-samsung/include/plat/pm.h +++ b/arch/arm/plat-samsung/include/plat/pm.h @@ -58,7 +58,7 @@ extern unsigned long s3c_pm_flags; extern int s3c2410_cpu_suspend(unsigned long); -#ifdef CONFIG_SAMSUNG_PM +#ifdef CONFIG_PM_SLEEP extern int s3c_irq_wake(struct irq_data *data, unsigned int state); extern int s3c_irqext_wake(struct irq_data *data, unsigned int state); extern void s3c_cpu_resume(void); From 19c69dafad673f342b8eb9dbc6a1ac9fa38b4f9f Mon Sep 17 00:00:00 2001 From: Arnd Bergmann Date: Fri, 27 Feb 2015 05:50:22 +0900 Subject: [PATCH 03/23] ARM: S3C64XX: fix __initdata section mismatch smdk6410_b_pwr_5v_data is marked as __initdata, but referenced from a structure that is not: WARNING: arch/arm/mach-s3c64xx/built-in.o(.data+0x4c5c): Section mismatch in reference from the variable smdk6410_b_pwr_5v_data to the (unknown reference) .init.data:(unknown) This removes the annotation to avoid an invalid pointer access when the regulator driver accesses this variable. Signed-off-by: Arnd Bergmann Signed-off-by: Kukjin Kim --- arch/arm/mach-s3c64xx/mach-smdk6410.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/arch/arm/mach-s3c64xx/mach-smdk6410.c b/arch/arm/mach-s3c64xx/mach-smdk6410.c index 661eb662d051..b7447a92276e 100644 --- a/arch/arm/mach-s3c64xx/mach-smdk6410.c +++ b/arch/arm/mach-s3c64xx/mach-smdk6410.c @@ -209,7 +209,7 @@ static struct platform_device smdk6410_smsc911x = { }; #ifdef CONFIG_REGULATOR -static struct regulator_consumer_supply smdk6410_b_pwr_5v_consumers[] __initdata = { +static struct regulator_consumer_supply smdk6410_b_pwr_5v_consumers[] = { REGULATOR_SUPPLY("PVDD", "0-001b"), REGULATOR_SUPPLY("AVDD", "0-001b"), }; From ea8d33ad32f9670fe55c99478e666805efc6452b Mon Sep 17 00:00:00 2001 From: Arnd Bergmann Date: Fri, 27 Feb 2015 05:50:22 +0900 Subject: [PATCH 04/23] ARM: S3C24XX: use SAMSUNG_WAKEMASK for s3c2416 Both s3c2412 and s3c2416 use the s3c2412_pm_prepare code, which depends on the common wakemask code, but only s3c2412 currently selects the code, leading to a build error for an s3c2416-only kernel. arch/arm/mach-s3c24xx/built-in.o: In function `s3c2412_pm_prepare': :(.text+0x240): undefined reference to `samsung_sync_wakemask' arch/arm/mach-s3c24xx/built-in.o:(.data+0xeb0): undefined reference to `s3c2412_subsys' This adds the missing select. Signed-off-by: Arnd Bergmann Signed-off-by: Kukjin Kim --- arch/arm/mach-s3c24xx/Kconfig | 1 + 1 file changed, 1 insertion(+) diff --git a/arch/arm/mach-s3c24xx/Kconfig b/arch/arm/mach-s3c24xx/Kconfig index 79c49ff77f6e..389173690716 100644 --- a/arch/arm/mach-s3c24xx/Kconfig +++ b/arch/arm/mach-s3c24xx/Kconfig @@ -362,6 +362,7 @@ if CPU_S3C2416 config S3C2416_PM bool select S3C2412_PM_SLEEP + select SAMSUNG_WAKEMASK help Internal config node to apply S3C2416 power management From 4f506daf0e6c094d2f28253d4044e9adc9461142 Mon Sep 17 00:00:00 2001 From: Arnd Bergmann Date: Fri, 27 Feb 2015 05:50:22 +0900 Subject: [PATCH 05/23] ARM: S3C24XX: fix building without PM_SLEEP We get lots of link errors based on the assumption that any s3c24xx kernel would enable CONFIG_PM_SLEEP if it enables CONFIG_PM. This tries to clean that up. Signed-off-by: Arnd Bergmann Signed-off-by: Kukjin Kim --- arch/arm/mach-s3c24xx/Kconfig | 8 ++++---- arch/arm/mach-s3c24xx/Makefile | 3 ++- arch/arm/mach-s3c24xx/pm-s3c2416.c | 3 ++- arch/arm/mach-s3c24xx/pm.c | 6 ++++-- arch/arm/mach-s3c24xx/s3c2410.c | 2 +- arch/arm/mach-s3c24xx/s3c2412.c | 2 +- arch/arm/mach-s3c24xx/s3c2416.c | 2 +- arch/arm/mach-s3c24xx/s3c2440.c | 4 ++-- arch/arm/mach-s3c24xx/s3c2442.c | 4 ++-- arch/arm/mach-s3c24xx/s3c244x.c | 7 ++----- arch/arm/plat-samsung/include/plat/pm.h | 12 ++++++++++-- 11 files changed, 31 insertions(+), 22 deletions(-) diff --git a/arch/arm/mach-s3c24xx/Kconfig b/arch/arm/mach-s3c24xx/Kconfig index 389173690716..a6d3b5bcc4c2 100644 --- a/arch/arm/mach-s3c24xx/Kconfig +++ b/arch/arm/mach-s3c24xx/Kconfig @@ -39,14 +39,14 @@ config CPU_S3C2412 bool "SAMSUNG S3C2412" select CPU_ARM926T select S3C2412_COMMON_CLK - select S3C2412_PM if PM + select S3C2412_PM if PM_SLEEP help Support for the S3C2412 and S3C2413 SoCs from the S3C24XX line config CPU_S3C2416 bool "SAMSUNG S3C2416/S3C2450" select CPU_ARM926T - select S3C2416_PM if PM + select S3C2416_PM if PM_SLEEP select S3C2443_COMMON_CLK help Support for the S3C2416 SoC from the S3C24XX line @@ -55,7 +55,7 @@ config CPU_S3C2440 bool "SAMSUNG S3C2440" select CPU_ARM920T select S3C2410_COMMON_CLK - select S3C2410_PM if PM + select S3C2410_PM if PM_SLEEP help Support for S3C2440 Samsung Mobile CPU based systems. @@ -63,7 +63,7 @@ config CPU_S3C2442 bool "SAMSUNG S3C2442" select CPU_ARM920T select S3C2410_COMMON_CLK - select S3C2410_PM if PM + select S3C2410_PM if PM_SLEEP help Support for S3C2442 Samsung Mobile CPU based systems. diff --git a/arch/arm/mach-s3c24xx/Makefile b/arch/arm/mach-s3c24xx/Makefile index b40a22fe082a..05920c8a5764 100644 --- a/arch/arm/mach-s3c24xx/Makefile +++ b/arch/arm/mach-s3c24xx/Makefile @@ -32,7 +32,8 @@ obj-$(CONFIG_CPU_S3C2443) += s3c2443.o # PM -obj-$(CONFIG_PM) += pm.o irq-pm.o sleep.o +obj-$(CONFIG_PM) += pm.o +obj-$(CONFIG_PM_SLEEP) += irq-pm.o sleep.o # common code diff --git a/arch/arm/mach-s3c24xx/pm-s3c2416.c b/arch/arm/mach-s3c24xx/pm-s3c2416.c index 44923895f558..c0e328e37bd6 100644 --- a/arch/arm/mach-s3c24xx/pm-s3c2416.c +++ b/arch/arm/mach-s3c24xx/pm-s3c2416.c @@ -23,6 +23,7 @@ #include "s3c2412-power.h" +#ifdef CONFIG_PM_SLEEP extern void s3c2412_sleep_enter(void); static int s3c2416_cpu_suspend(unsigned long arg) @@ -70,7 +71,7 @@ static __init int s3c2416_pm_init(void) } arch_initcall(s3c2416_pm_init); - +#endif static void s3c2416_pm_resume(void) { diff --git a/arch/arm/mach-s3c24xx/pm.c b/arch/arm/mach-s3c24xx/pm.c index b19256ec8d40..5d510bca0844 100644 --- a/arch/arm/mach-s3c24xx/pm.c +++ b/arch/arm/mach-s3c24xx/pm.c @@ -50,6 +50,7 @@ #define PFX "s3c24xx-pm: " +#ifdef CONFIG_PM_SLEEP static struct sleep_save core_save[] = { /* we restore the timings here, with the proviso that the board * brings the system up in an slower, or equal frequency setting @@ -67,6 +68,7 @@ static struct sleep_save core_save[] = { SAVE_ITEM(S3C2410_BANKCON4), SAVE_ITEM(S3C2410_BANKCON5), }; +#endif /* s3c_pm_check_resume_pin * @@ -121,7 +123,7 @@ void s3c_pm_configure_extint(void) } } - +#ifdef CONFIG_PM_SLEEP void s3c_pm_restore_core(void) { s3c_pm_do_restore_core(core_save, ARRAY_SIZE(core_save)); @@ -131,4 +133,4 @@ void s3c_pm_save_core(void) { s3c_pm_do_save(core_save, ARRAY_SIZE(core_save)); } - +#endif diff --git a/arch/arm/mach-s3c24xx/s3c2410.c b/arch/arm/mach-s3c24xx/s3c2410.c index 2a6985a4a0ff..5061d66ca10c 100644 --- a/arch/arm/mach-s3c24xx/s3c2410.c +++ b/arch/arm/mach-s3c24xx/s3c2410.c @@ -121,7 +121,7 @@ int __init s3c2410_init(void) { printk("S3C2410: Initialising architecture\n"); -#ifdef CONFIG_PM +#ifdef CONFIG_PM_SLEEP register_syscore_ops(&s3c2410_pm_syscore_ops); register_syscore_ops(&s3c24xx_irq_syscore_ops); #endif diff --git a/arch/arm/mach-s3c24xx/s3c2412.c b/arch/arm/mach-s3c24xx/s3c2412.c index ecf2c77ab88b..64a13605cfc3 100644 --- a/arch/arm/mach-s3c24xx/s3c2412.c +++ b/arch/arm/mach-s3c24xx/s3c2412.c @@ -172,7 +172,7 @@ int __init s3c2412_init(void) { printk("S3C2412: Initialising architecture\n"); -#ifdef CONFIG_PM +#ifdef CONFIG_PM_SLEEP register_syscore_ops(&s3c2412_pm_syscore_ops); register_syscore_ops(&s3c24xx_irq_syscore_ops); #endif diff --git a/arch/arm/mach-s3c24xx/s3c2416.c b/arch/arm/mach-s3c24xx/s3c2416.c index bfd4da86deb8..3f8ca2a3ef17 100644 --- a/arch/arm/mach-s3c24xx/s3c2416.c +++ b/arch/arm/mach-s3c24xx/s3c2416.c @@ -98,7 +98,7 @@ int __init s3c2416_init(void) s3c_adc_setname("s3c2416-adc"); s3c_rtc_setname("s3c2416-rtc"); -#ifdef CONFIG_PM +#ifdef CONFIG_PM_SLEEP register_syscore_ops(&s3c2416_pm_syscore_ops); register_syscore_ops(&s3c24xx_irq_syscore_ops); register_syscore_ops(&s3c2416_irq_syscore_ops); diff --git a/arch/arm/mach-s3c24xx/s3c2440.c b/arch/arm/mach-s3c24xx/s3c2440.c index 03d379f1fc52..eb733555fab5 100644 --- a/arch/arm/mach-s3c24xx/s3c2440.c +++ b/arch/arm/mach-s3c24xx/s3c2440.c @@ -57,11 +57,11 @@ int __init s3c2440_init(void) /* register suspend/resume handlers */ -#ifdef CONFIG_PM +#ifdef CONFIG_PM_SLEEP register_syscore_ops(&s3c2410_pm_syscore_ops); register_syscore_ops(&s3c24xx_irq_syscore_ops); -#endif register_syscore_ops(&s3c244x_pm_syscore_ops); +#endif /* register our system device for everything else */ diff --git a/arch/arm/mach-s3c24xx/s3c2442.c b/arch/arm/mach-s3c24xx/s3c2442.c index 7b043349f1c8..893998ede022 100644 --- a/arch/arm/mach-s3c24xx/s3c2442.c +++ b/arch/arm/mach-s3c24xx/s3c2442.c @@ -60,11 +60,11 @@ int __init s3c2442_init(void) { printk("S3C2442: Initialising architecture\n"); -#ifdef CONFIG_PM +#ifdef CONFIG_PM_SLEEP register_syscore_ops(&s3c2410_pm_syscore_ops); register_syscore_ops(&s3c24xx_irq_syscore_ops); -#endif register_syscore_ops(&s3c244x_pm_syscore_ops); +#endif return device_register(&s3c2442_dev); } diff --git a/arch/arm/mach-s3c24xx/s3c244x.c b/arch/arm/mach-s3c24xx/s3c244x.c index 177f97802745..b14119585dc7 100644 --- a/arch/arm/mach-s3c24xx/s3c244x.c +++ b/arch/arm/mach-s3c24xx/s3c244x.c @@ -108,7 +108,7 @@ static int __init s3c2442_core_init(void) core_initcall(s3c2442_core_init); -#ifdef CONFIG_PM +#ifdef CONFIG_PM_SLEEP static struct sleep_save s3c244x_sleep[] = { SAVE_ITEM(S3C2440_DSC0), SAVE_ITEM(S3C2440_DSC1), @@ -127,12 +127,9 @@ static void s3c244x_resume(void) { s3c_pm_do_restore(s3c244x_sleep, ARRAY_SIZE(s3c244x_sleep)); } -#else -#define s3c244x_suspend NULL -#define s3c244x_resume NULL -#endif struct syscore_ops s3c244x_pm_syscore_ops = { .suspend = s3c244x_suspend, .resume = s3c244x_resume, }; +#endif diff --git a/arch/arm/plat-samsung/include/plat/pm.h b/arch/arm/plat-samsung/include/plat/pm.h index e5a046dc22f5..7f415ce74591 100644 --- a/arch/arm/plat-samsung/include/plat/pm.h +++ b/arch/arm/plat-samsung/include/plat/pm.h @@ -43,7 +43,11 @@ extern unsigned long s3c_irqwake_eintmask; /* IRQ masks for IRQs allowed to go to sleep (see irq.c) */ extern unsigned long s3c_irqwake_intallow; +#ifdef CONFIG_PM_SLEEP extern unsigned long s3c_irqwake_eintallow; +#else +#define s3c_irqwake_eintallow 0 +#endif /* per-cpu sleep functions */ @@ -60,14 +64,18 @@ extern int s3c2410_cpu_suspend(unsigned long); #ifdef CONFIG_PM_SLEEP extern int s3c_irq_wake(struct irq_data *data, unsigned int state); -extern int s3c_irqext_wake(struct irq_data *data, unsigned int state); extern void s3c_cpu_resume(void); #else #define s3c_irq_wake NULL -#define s3c_irqext_wake NULL #define s3c_cpu_resume NULL #endif +#ifdef CONFIG_SAMSUNG_PM +extern int s3c_irqext_wake(struct irq_data *data, unsigned int state); +#else +#define s3c_irqext_wake NULL +#endif + #ifdef CONFIG_S3C_PM_DEBUG_LED_SMDK /** * s3c_pm_debug_smdkled() - Debug PM suspend/resume via SMDK Board LEDs From 1fe054e71a895c682f1cd36071ff3fd0c7bc9cff Mon Sep 17 00:00:00 2001 From: Arnd Bergmann Date: Fri, 27 Feb 2015 05:50:23 +0900 Subject: [PATCH 06/23] ARM: S3C24XX: fix header file inclusions The pm-core.h file does not include all the necessary headers, and has a static declaration for a function that is not defined in the same file, causing SAMSUNG_PM_DEBUG to break on s3c24xx: arch/arm/mach-s3c24xx/include/mach/pm-core.h:50:91: warning: 's3c_pm_show_resume_irqs' used but never defined arch/arm/mach-s3c24xx/include/mach/pm-core.h: In function 's3c_pm_debug_init_uart': arch/arm/mach-s3c24xx/include/mach/pm-core.h:16:34: error: 'S3C2410_CLKCON' undeclared (first use in this function) unsigned long tmp = __raw_readl(S3C2410_CLKCON); ^ This moves the code around slightly to avoid the errors. Signed-off-by: Arnd Bergmann Signed-off-by: Kukjin Kim --- arch/arm/mach-s3c24xx/include/mach/pm-core.h | 24 ++++++++++++++++++-- arch/arm/plat-samsung/pm-debug.c | 1 + arch/arm/plat-samsung/pm.c | 20 ---------------- 3 files changed, 23 insertions(+), 22 deletions(-) diff --git a/arch/arm/mach-s3c24xx/include/mach/pm-core.h b/arch/arm/mach-s3c24xx/include/mach/pm-core.h index 2eef7e6f7675..69459dbbdcad 100644 --- a/arch/arm/mach-s3c24xx/include/mach/pm-core.h +++ b/arch/arm/mach-s3c24xx/include/mach/pm-core.h @@ -10,6 +10,11 @@ * it under the terms of the GNU General Public License version 2 as * published by the Free Software Foundation. */ +#include +#include + +#include "regs-clock.h" +#include "regs-irq.h" static inline void s3c_pm_debug_init_uart(void) { @@ -42,8 +47,23 @@ static inline void s3c_pm_arch_stop_clocks(void) __raw_writel(0x00, S3C2410_CLKCON); /* turn off clocks over sleep */ } -static void s3c_pm_show_resume_irqs(int start, unsigned long which, - unsigned long mask); +/* s3c2410_pm_show_resume_irqs + * + * print any IRQs asserted at resume time (ie, we woke from) +*/ +static inline void s3c_pm_show_resume_irqs(int start, unsigned long which, + unsigned long mask) +{ + int i; + + which &= ~mask; + + for (i = 0; i <= 31; i++) { + if (which & (1L< #ifdef CONFIG_SAMSUNG_ATAGS +#include #include #else static inline void s3c_pm_debug_init_uart(void) {} diff --git a/arch/arm/plat-samsung/pm.c b/arch/arm/plat-samsung/pm.c index f8c0f9797dcf..82777c649774 100644 --- a/arch/arm/plat-samsung/pm.c +++ b/arch/arm/plat-samsung/pm.c @@ -65,26 +65,6 @@ int s3c_irqext_wake(struct irq_data *data, unsigned int state) return 0; } -/* s3c2410_pm_show_resume_irqs - * - * print any IRQs asserted at resume time (ie, we woke from) -*/ -static void __maybe_unused s3c_pm_show_resume_irqs(int start, - unsigned long which, - unsigned long mask) -{ - int i; - - which &= ~mask; - - for (i = 0; i <= 31; i++) { - if (which & (1L< Date: Fri, 27 Feb 2015 05:50:25 +0900 Subject: [PATCH 07/23] ARM: S3C24XX: avoid a Kconfig warning The PM_H1940 symbol is used by two platforms: RX3715 and RX1950. However, it is hidden inside of the the CPU_S3C2410 conditional, which is only set by one of them, so we get a lot of randconfig warnings like warning: (MACH_RX3715 && MACH_RX1950) selects PM_H1940 which has unmet direct dependencies (ARCH_S3C24XX && CPU_S3C2410) This moves it outside of the conditional to remove the warnings. Signed-off-by: Arnd Bergmann Signed-off-by: Kukjin Kim --- arch/arm/mach-s3c24xx/Kconfig | 10 +++++----- 1 file changed, 5 insertions(+), 5 deletions(-) diff --git a/arch/arm/mach-s3c24xx/Kconfig b/arch/arm/mach-s3c24xx/Kconfig index a6d3b5bcc4c2..23bec3a85b22 100644 --- a/arch/arm/mach-s3c24xx/Kconfig +++ b/arch/arm/mach-s3c24xx/Kconfig @@ -228,11 +228,6 @@ config H1940BT This is a simple driver that is able to control the state of built in bluetooth chip on h1940. -config PM_H1940 - bool - help - Internal node for H1940 and related PM - config MACH_N30 bool "Acer N30 family" select S3C_DEV_NAND @@ -585,6 +580,11 @@ config MACH_SMDK2443 endif # CPU_S3C2443 +config PM_H1940 + bool + help + Internal node for H1940 and related PM + endmenu # SAMSUNG S3C24XX SoCs Support endif # ARCH_S3C24XX From dc0961bc816b9365cb37a68b34e84b625f7c7f0f Mon Sep 17 00:00:00 2001 From: Julia Lawall Date: Wed, 11 Mar 2015 17:56:36 +0100 Subject: [PATCH 08/23] ARM: cns3xxx: don't export static symbol The semantic patch that fixes this problem is as follows: (http://coccinelle.lip6.fr/) // @r@ type T; identifier f; @@ static T f (...) { ... } @@ identifier r.f; declarer name EXPORT_SYMBOL; @@ -EXPORT_SYMBOL(f); // Signed-off-by: Julia Lawall Signed-off-by: Arnd Bergmann Acked-by: Krzysztof Halasa --- arch/arm/mach-cns3xxx/pm.c | 1 - 1 file changed, 1 deletion(-) diff --git a/arch/arm/mach-cns3xxx/pm.c b/arch/arm/mach-cns3xxx/pm.c index fb38c726e987..f46b78dd6136 100644 --- a/arch/arm/mach-cns3xxx/pm.c +++ b/arch/arm/mach-cns3xxx/pm.c @@ -73,7 +73,6 @@ static void cns3xxx_pwr_soft_rst_force(unsigned int block) __raw_writel(reg, PM_SOFT_RST_REG); } -EXPORT_SYMBOL(cns3xxx_pwr_soft_rst_force); void cns3xxx_pwr_soft_rst(unsigned int block) { From 7239d309b58d48616d3cda79050566fdb48196ef Mon Sep 17 00:00:00 2001 From: Paul Walmsley Date: Fri, 6 Feb 2015 15:56:07 -0700 Subject: [PATCH 09/23] ARM: OMAP1: PM: fix some build warnings on 1510-only Kconfigs MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit Building an OMAP1510-only Kconfig generates the following warnings: arch/arm/mach-omap1/pm.c: In function ¡omap1_pm_idle¢: arch/arm/mach-omap1/pm.c:123:2: warning: #warning Enable 32kHz OS timer in order to allow sleep states in idle [-Wcpp] #warning Enable 32kHz OS timer in order to allow sleep states in idle ^ arch/arm/mach-omap1/pm.c: At top level: arch/arm/mach-omap1/pm.c:76:23: warning: ¡enable_dyn_sleep¢ defined but not used [-Wunused-variable] static unsigned short enable_dyn_sleep = 0; ^ These are not so easy to fix in an obviously correct fashion, since I don't have these devices up and running in my testbed. So, use arch/arm/plat-omap/Kconfig and the existing pm.c source as a guide, and posit that deep power saving states are only supported on OMAP16xx chips with kernels built with both CONFIG_OMAP_DM_TIMER=y and CONFIG_OMAP_32K_TIMER=y. While here, clean up a few printk()s and unnecessary #ifdefs. This second version of the patch incorporates several suggestions from Jon Hunter . Signed-off-by: Paul Walmsley Cc: Jon Hunter Cc: Aaro Koskinen Cc: Tuukka Tikkanen Cc: Kevin Hilman Cc: Tony Lindgren Cc: Russell King Cc: linux-omap@vger.kernel.org Cc: linux-arm-kernel@lists.infradead.org Cc: linux-kernel@vger.kernel.org Acked-by: Jon Hunter Signed-off-by: Tony Lindgren --- arch/arm/mach-omap1/pm.c | 51 ++++++++++++++++++++-------------------- 1 file changed, 25 insertions(+), 26 deletions(-) diff --git a/arch/arm/mach-omap1/pm.c b/arch/arm/mach-omap1/pm.c index 34b4c0044961..dd94567c3628 100644 --- a/arch/arm/mach-omap1/pm.c +++ b/arch/arm/mach-omap1/pm.c @@ -71,13 +71,7 @@ static unsigned int mpui7xx_sleep_save[MPUI7XX_SLEEP_SAVE_SIZE]; static unsigned int mpui1510_sleep_save[MPUI1510_SLEEP_SAVE_SIZE]; static unsigned int mpui1610_sleep_save[MPUI1610_SLEEP_SAVE_SIZE]; -#ifndef CONFIG_OMAP_32K_TIMER - -static unsigned short enable_dyn_sleep = 0; - -#else - -static unsigned short enable_dyn_sleep = 1; +static unsigned short enable_dyn_sleep; static ssize_t idle_show(struct kobject *kobj, struct kobj_attribute *attr, char *buf) @@ -90,8 +84,9 @@ static ssize_t idle_store(struct kobject *kobj, struct kobj_attribute *attr, { unsigned short value; if (sscanf(buf, "%hu", &value) != 1 || - (value != 0 && value != 1)) { - printk(KERN_ERR "idle_sleep_store: Invalid value\n"); + (value != 0 && value != 1) || + (value != 0 && !IS_ENABLED(CONFIG_OMAP_32K_TIMER))) { + pr_err("idle_sleep_store: Invalid value\n"); return -EINVAL; } enable_dyn_sleep = value; @@ -101,7 +96,6 @@ static ssize_t idle_store(struct kobject *kobj, struct kobj_attribute *attr, static struct kobj_attribute sleep_while_idle_attr = __ATTR(sleep_while_idle, 0644, idle_show, idle_store); -#endif static void (*omap_sram_suspend)(unsigned long r0, unsigned long r1) = NULL; @@ -115,16 +109,11 @@ void omap1_pm_idle(void) { extern __u32 arm_idlect1_mask; __u32 use_idlect1 = arm_idlect1_mask; - int do_sleep = 0; local_fiq_disable(); #if defined(CONFIG_OMAP_MPU_TIMER) && !defined(CONFIG_OMAP_DM_TIMER) -#warning Enable 32kHz OS timer in order to allow sleep states in idle use_idlect1 = use_idlect1 & ~(1 << 9); -#else - if (enable_dyn_sleep) - do_sleep = 1; #endif #ifdef CONFIG_OMAP_DM_TIMER @@ -134,10 +123,12 @@ void omap1_pm_idle(void) if (omap_dma_running()) use_idlect1 &= ~(1 << 6); - /* We should be able to remove the do_sleep variable and multiple + /* + * We should be able to remove the do_sleep variable and multiple * tests above as soon as drivers, timer and DMA code have been fixed. - * Even the sleep block count should become obsolete. */ - if ((use_idlect1 != ~0) || !do_sleep) { + * Even the sleep block count should become obsolete. + */ + if ((use_idlect1 != ~0) || !enable_dyn_sleep) { __u32 saved_idlect1 = omap_readl(ARM_IDLECT1); if (cpu_is_omap15xx()) @@ -635,15 +626,25 @@ static const struct platform_suspend_ops omap_pm_ops = { static int __init omap_pm_init(void) { - -#ifdef CONFIG_OMAP_32K_TIMER - int error; -#endif + int error = 0; if (!cpu_class_is_omap1()) return -ENODEV; - printk("Power Management for TI OMAP.\n"); + pr_info("Power Management for TI OMAP.\n"); + + if (!IS_ENABLED(CONFIG_OMAP_32K_TIMER)) + pr_info("OMAP1 PM: sleep states in idle disabled due to no 32KiHz timer\n"); + + if (!IS_ENABLED(CONFIG_OMAP_DM_TIMER)) + pr_info("OMAP1 PM: sleep states in idle disabled due to no DMTIMER support\n"); + + if (IS_ENABLED(CONFIG_OMAP_32K_TIMER) && + IS_ENABLED(CONFIG_OMAP_DM_TIMER)) { + /* OMAP16xx only */ + pr_info("OMAP1 PM: sleep states in idle enabled\n"); + enable_dyn_sleep = 1; + } /* * We copy the assembler sleep/wakeup routines to SRAM. @@ -693,17 +694,15 @@ static int __init omap_pm_init(void) omap_pm_init_debugfs(); #endif -#ifdef CONFIG_OMAP_32K_TIMER error = sysfs_create_file(power_kobj, &sleep_while_idle_attr.attr); if (error) printk(KERN_ERR "sysfs_create_file failed: %d\n", error); -#endif if (cpu_is_omap16xx()) { /* configure LOW_PWR pin */ omap_cfg_reg(T20_1610_LOW_PWR); } - return 0; + return error; } __initcall(omap_pm_init); From 026da812a075e1c3cc99f8bec757206b7068b779 Mon Sep 17 00:00:00 2001 From: Felipe Balbi Date: Mon, 19 Jan 2015 16:13:53 -0600 Subject: [PATCH 10/23] MAINTAINERS: add OMAP defconfigs under OMAP SUPPORT omap2plus_defconfig and omap1_defconfig are also part of the OMAP Support maintained, because of that it's best to list them under OMAP SUPPORT on MAINTAINERS so people know to Cc linux-omap when patching them. Reported-by: Sjoerd Simons Signed-off-by: Felipe Balbi Signed-off-by: Tony Lindgren --- MAINTAINERS | 2 ++ 1 file changed, 2 insertions(+) diff --git a/MAINTAINERS b/MAINTAINERS index ddc5a8cf9a8a..085614010f1d 100644 --- a/MAINTAINERS +++ b/MAINTAINERS @@ -6947,6 +6947,8 @@ Q: http://patchwork.kernel.org/project/linux-omap/list/ T: git git://git.kernel.org/pub/scm/linux/kernel/git/tmlind/linux-omap.git S: Maintained F: arch/arm/*omap*/ +F: arch/arm/configs/omap1_defconfig +F: arch/arm/configs/omap2plus_defconfig F: drivers/i2c/busses/i2c-omap.c F: drivers/irqchip/irq-omap-intc.c F: drivers/mfd/*omap*.c From 606da4826b89b044b51e3a84958b802204cfe4c7 Mon Sep 17 00:00:00 2001 From: Stefan Hengelein Date: Wed, 25 Feb 2015 19:44:27 +0100 Subject: [PATCH 11/23] ARM: OMAP4: remove dead kconfig option OMAP4_ERRATA_I688 The Kconfig-Option OMAP4_ERRATA_I688 is never visible due to a contradiction in it's dependencies. The option requires ARCH_MULTIPLATFORM to be 'disabled'. However, an enclosing menu requires either ARCH_MULTI_V6 or ARCH_MULTI_V7 to be enabled. These options inherit a dependency from an enclosing menu, that requires ARCH_MULTIPLATFORM to be 'enabled'. This is a contradiction and made this option also unavailable for non-multiplatform configurations. Since there are no selects on OMAP4_ERRATA_I688, which would ignore dependencies, the code related to that option is dead and can be removed. This (logical) defect has been found with the undertaker tool. (https://undertaker.cs.fau.de) Signed-off-by: Stefan Hengelein Acked-by: Santosh Shilimkar Signed-off-by: Tony Lindgren --- arch/arm/mach-omap2/Kconfig | 21 --------- arch/arm/mach-omap2/common.c | 1 - arch/arm/mach-omap2/common.h | 3 -- arch/arm/mach-omap2/io.c | 2 - arch/arm/mach-omap2/omap-secure.h | 7 --- arch/arm/mach-omap2/omap4-common.c | 69 ------------------------------ arch/arm/mach-omap2/sleep44xx.S | 2 - 7 files changed, 105 deletions(-) diff --git a/arch/arm/mach-omap2/Kconfig b/arch/arm/mach-omap2/Kconfig index 2b8e47788062..c7f4d9a6b38c 100644 --- a/arch/arm/mach-omap2/Kconfig +++ b/arch/arm/mach-omap2/Kconfig @@ -278,27 +278,6 @@ config OMAP3_SDRC_AC_TIMING wish to say no. Selecting yes without understanding what is going on could result in system crashes; -config OMAP4_ERRATA_I688 - bool "OMAP4 errata: Async Bridge Corruption" - depends on (ARCH_OMAP4 || SOC_OMAP5) && !ARCH_MULTIPLATFORM - select ARCH_HAS_BARRIERS - help - If a data is stalled inside asynchronous bridge because of back - pressure, it may be accepted multiple times, creating pointer - misalignment that will corrupt next transfers on that data path - until next reset of the system (No recovery procedure once the - issue is hit, the path remains consistently broken). Async bridge - can be found on path between MPU to EMIF and MPU to L3 interconnect. - This situation can happen only when the idle is initiated by a - Master Request Disconnection (which is trigged by software when - executing WFI on CPU). - The work-around for this errata needs all the initiators connected - through async bridge must ensure that data path is properly drained - before issuing WFI. This condition will be met if one Strongly ordered - access is performed to the target right before executing the WFI. - In MPU case, L3 T2ASYNC FIFO and DDR T2ASYNC FIFO needs to be drained. - IO barrier ensure that there is no synchronisation loss on initiators - operating on both interconnect port simultaneously. endmenu endif diff --git a/arch/arm/mach-omap2/common.c b/arch/arm/mach-omap2/common.c index 484cdadfb187..eae6a0e87c90 100644 --- a/arch/arm/mach-omap2/common.c +++ b/arch/arm/mach-omap2/common.c @@ -30,5 +30,4 @@ int __weak omap_secure_ram_reserve_memblock(void) void __init omap_reserve(void) { omap_secure_ram_reserve_memblock(); - omap_barrier_reserve_memblock(); } diff --git a/arch/arm/mach-omap2/common.h b/arch/arm/mach-omap2/common.h index 46e24581d624..cf3cf22ecd42 100644 --- a/arch/arm/mach-omap2/common.h +++ b/arch/arm/mach-omap2/common.h @@ -200,9 +200,6 @@ void __init omap4_map_io(void); void __init omap5_map_io(void); void __init ti81xx_map_io(void); -/* omap_barriers_init() is OMAP4 only */ -void omap_barriers_init(void); - /** * omap_test_timeout - busy-loop, testing a condition * @cond: condition to test until it evaluates to true diff --git a/arch/arm/mach-omap2/io.c b/arch/arm/mach-omap2/io.c index c4871c55bd8b..1eeff6be260d 100644 --- a/arch/arm/mach-omap2/io.c +++ b/arch/arm/mach-omap2/io.c @@ -306,7 +306,6 @@ void __init am33xx_map_io(void) void __init omap4_map_io(void) { iotable_init(omap44xx_io_desc, ARRAY_SIZE(omap44xx_io_desc)); - omap_barriers_init(); } #endif @@ -314,7 +313,6 @@ void __init omap4_map_io(void) void __init omap5_map_io(void) { iotable_init(omap54xx_io_desc, ARRAY_SIZE(omap54xx_io_desc)); - omap_barriers_init(); } #endif /* diff --git a/arch/arm/mach-omap2/omap-secure.h b/arch/arm/mach-omap2/omap-secure.h index dec2b05d184b..af2851fbcdf0 100644 --- a/arch/arm/mach-omap2/omap-secure.h +++ b/arch/arm/mach-omap2/omap-secure.h @@ -70,13 +70,6 @@ extern u32 rx51_secure_dispatcher(u32 idx, u32 process, u32 flag, u32 nargs, extern u32 rx51_secure_update_aux_cr(u32 set_bits, u32 clear_bits); extern u32 rx51_secure_rng_call(u32 ptr, u32 count, u32 flag); -#ifdef CONFIG_OMAP4_ERRATA_I688 -extern int omap_barrier_reserve_memblock(void); -#else -static inline void omap_barrier_reserve_memblock(void) -{ } -#endif - #ifdef CONFIG_SOC_HAS_REALTIME_COUNTER void set_cntfreq(void); #else diff --git a/arch/arm/mach-omap2/omap4-common.c b/arch/arm/mach-omap2/omap4-common.c index cee0fe1ee6ff..afaac9e25764 100644 --- a/arch/arm/mach-omap2/omap4-common.c +++ b/arch/arm/mach-omap2/omap4-common.c @@ -52,75 +52,6 @@ static void __iomem *twd_base; #define IRQ_LOCALTIMER 29 -#ifdef CONFIG_OMAP4_ERRATA_I688 -/* Used to implement memory barrier on DRAM path */ -#define OMAP4_DRAM_BARRIER_VA 0xfe600000 - -void __iomem *dram_sync, *sram_sync; - -static phys_addr_t paddr; -static u32 size; - -void omap_bus_sync(void) -{ - if (dram_sync && sram_sync) { - writel_relaxed(readl_relaxed(dram_sync), dram_sync); - writel_relaxed(readl_relaxed(sram_sync), sram_sync); - isb(); - } -} -EXPORT_SYMBOL(omap_bus_sync); - -static int __init omap4_sram_init(void) -{ - struct device_node *np; - struct gen_pool *sram_pool; - - np = of_find_compatible_node(NULL, NULL, "ti,omap4-mpu"); - if (!np) - pr_warn("%s:Unable to allocate sram needed to handle errata I688\n", - __func__); - sram_pool = of_get_named_gen_pool(np, "sram", 0); - if (!sram_pool) - pr_warn("%s:Unable to get sram pool needed to handle errata I688\n", - __func__); - else - sram_sync = (void *)gen_pool_alloc(sram_pool, PAGE_SIZE); - - return 0; -} -omap_arch_initcall(omap4_sram_init); - -/* Steal one page physical memory for barrier implementation */ -int __init omap_barrier_reserve_memblock(void) -{ - - size = ALIGN(PAGE_SIZE, SZ_1M); - paddr = arm_memblock_steal(size, SZ_1M); - - return 0; -} - -void __init omap_barriers_init(void) -{ - struct map_desc dram_io_desc[1]; - - dram_io_desc[0].virtual = OMAP4_DRAM_BARRIER_VA; - dram_io_desc[0].pfn = __phys_to_pfn(paddr); - dram_io_desc[0].length = size; - dram_io_desc[0].type = MT_MEMORY_RW_SO; - iotable_init(dram_io_desc, ARRAY_SIZE(dram_io_desc)); - dram_sync = (void __iomem *) dram_io_desc[0].virtual; - - pr_info("OMAP4: Map 0x%08llx to 0x%08lx for dram barrier\n", - (long long) paddr, dram_io_desc[0].virtual); - -} -#else -void __init omap_barriers_init(void) -{} -#endif - void gic_dist_disable(void) { if (gic_dist_base_addr) diff --git a/arch/arm/mach-omap2/sleep44xx.S b/arch/arm/mach-omap2/sleep44xx.S index b84a0122d823..ad1bb9431e94 100644 --- a/arch/arm/mach-omap2/sleep44xx.S +++ b/arch/arm/mach-omap2/sleep44xx.S @@ -333,11 +333,9 @@ ENDPROC(omap4_cpu_resume) #endif /* defined(CONFIG_SMP) && defined(CONFIG_PM) */ -#ifndef CONFIG_OMAP4_ERRATA_I688 ENTRY(omap_bus_sync) ret lr ENDPROC(omap_bus_sync) -#endif ENTRY(omap_do_wfi) stmfd sp!, {lr} From 7e9e20b1faab02357501553d7f4e3efec1b4cfd3 Mon Sep 17 00:00:00 2001 From: Andreas Faerber Date: Wed, 18 Mar 2015 01:25:18 +0900 Subject: [PATCH 12/23] ARM: dts: fix mmc node updates for exynos5250-spring Resolve a merge conflict with mmc refactoring aaa25a5a33cb ("ARM: dts: unuse the slot-node and deprecate the supports-highspeed for dw-mmc in exynos") by dropping the slot@0 nodes, moving its bus-width property to the mmc node and replacing supports-highspeed with cap-{mmc,sd}-highspeed, matching exynos5250-snow. Cc: Jaehoon Chung Fixes: 53dd4138bb0a ("ARM: dts: Add exynos5250-spring device tree") Signed-off-by: Andreas Faerber Reviewed-by: Javier Martinez Canillas Cc: [3.19+] Signed-off-by: Kukjin Kim --- arch/arm/boot/dts/exynos5250-spring.dts | 16 ++++------------ 1 file changed, 4 insertions(+), 12 deletions(-) diff --git a/arch/arm/boot/dts/exynos5250-spring.dts b/arch/arm/boot/dts/exynos5250-spring.dts index f02775487cd4..c41600e587e0 100644 --- a/arch/arm/boot/dts/exynos5250-spring.dts +++ b/arch/arm/boot/dts/exynos5250-spring.dts @@ -429,7 +429,6 @@ &mmc_0 { status = "okay"; num-slots = <1>; - supports-highspeed; broken-cd; card-detect-delay = <200>; samsung,dw-mshc-ciu-div = <3>; @@ -437,11 +436,8 @@ samsung,dw-mshc-ddr-timing = <1 2>; pinctrl-names = "default"; pinctrl-0 = <&sd0_clk &sd0_cmd &sd0_cd &sd0_bus4 &sd0_bus8>; - - slot@0 { - reg = <0>; - bus-width = <8>; - }; + bus-width = <8>; + cap-mmc-highspeed; }; /* @@ -451,7 +447,6 @@ &mmc_1 { status = "okay"; num-slots = <1>; - supports-highspeed; broken-cd; card-detect-delay = <200>; samsung,dw-mshc-ciu-div = <3>; @@ -459,11 +454,8 @@ samsung,dw-mshc-ddr-timing = <1 2>; pinctrl-names = "default"; pinctrl-0 = <&sd1_clk &sd1_cmd &sd1_cd &sd1_bus4>; - - slot@0 { - reg = <0>; - bus-width = <4>; - }; + bus-width = <4>; + cap-sd-highspeed; }; &pinctrl_0 { From 435c3454485158cbc65e986e584023d35e04edd0 Mon Sep 17 00:00:00 2001 From: Andreas Faerber Date: Wed, 18 Mar 2015 01:32:02 +0900 Subject: [PATCH 13/23] ARM: dts: fix lid and power pin-functions for exynos5250-spring Configure the pins in external interrupt mode, as done for Snow in e5e5c6d14e39 ("ARM: dts: Add power and lid GPIO keys pinctrl for exynos5250-snow"). Reported-by: Kukjin Kim Suggested-by: Javier Martinez Canillas Fixes: 53dd4138bb0a ("ARM: dts: Add exynos5250-spring device tree") Signed-off-by: Andreas Faerber Reviewed-by: Javier Martinez Canillas Signed-off-by: Kukjin Kim --- arch/arm/boot/dts/exynos5250-spring.dts | 4 ++-- 1 file changed, 2 insertions(+), 2 deletions(-) diff --git a/arch/arm/boot/dts/exynos5250-spring.dts b/arch/arm/boot/dts/exynos5250-spring.dts index c41600e587e0..d075a68ac078 100644 --- a/arch/arm/boot/dts/exynos5250-spring.dts +++ b/arch/arm/boot/dts/exynos5250-spring.dts @@ -482,7 +482,7 @@ power_key_irq: power-key-irq { samsung,pins = "gpx1-3"; - samsung,pin-function = <0>; + samsung,pin-function = <0xf>; samsung,pin-pud = <0>; samsung,pin-drv = <0>; }; @@ -510,7 +510,7 @@ lid_irq: lid-irq { samsung,pins = "gpx3-5"; - samsung,pin-function = <0>; + samsung,pin-function = <0xf>; samsung,pin-pud = <0>; samsung,pin-drv = <0>; }; From cfdda3535f87e752780ca18a57d13db58f6a6913 Mon Sep 17 00:00:00 2001 From: Bartlomiej Zolnierkiewicz Date: Wed, 18 Mar 2015 03:26:11 +0900 Subject: [PATCH 14/23] ARM: EXYNOS: Fix build breakage cpuidle on !SMP The Exynos cpuidle driver has coupled cpuidle built-in so it cannot be built without SMP: arch/arm/mach-exynos/pm.c: In function 'exynos_cpu0_enter_aftr': arch/arm/mach-exynos/pm.c:246:4: error: implicit declaration of function 'arch_send_wakeup_ipi_mask' [-Werror=implicit-function-declaration] arch/arm/mach-exynos/built-in.o: In function 'exynos_pre_enter_aftr': ../arch/arm/mach-exynos/pm.c:300: undefined reference to 'cpu_boot_reg_base' arch/arm/mach-exynos/built-in.o: In function 'exynos_cpu1_powerdown': ../arch/arm/mach-exynos/pm.c:282: undefined reference to 'exynos_cpu_power_down' Fix it by adding missing checks for SMP. Reported-by: Krzysztof Kozlowski Signed-off-by: Bartlomiej Zolnierkiewicz Signed-off-by: Kukjin Kim --- arch/arm/mach-exynos/exynos.c | 2 +- arch/arm/mach-exynos/pm.c | 2 ++ drivers/cpuidle/cpuidle-exynos.c | 3 ++- 3 files changed, 5 insertions(+), 2 deletions(-) diff --git a/arch/arm/mach-exynos/exynos.c b/arch/arm/mach-exynos/exynos.c index 9e9dfdfad9d7..4031a96c904b 100644 --- a/arch/arm/mach-exynos/exynos.c +++ b/arch/arm/mach-exynos/exynos.c @@ -211,7 +211,7 @@ static void __init exynos_dt_machine_init(void) if (!IS_ENABLED(CONFIG_SMP)) exynos_sysram_init(); -#ifdef CONFIG_ARM_EXYNOS_CPUIDLE +#if defined(CONFIG_SMP) && defined(CONFIG_ARM_EXYNOS_CPUIDLE) if (of_machine_is_compatible("samsung,exynos4210")) exynos_cpuidle.dev.platform_data = &cpuidle_coupled_exynos_data; #endif diff --git a/arch/arm/mach-exynos/pm.c b/arch/arm/mach-exynos/pm.c index e6209dadc00d..5685250693fd 100644 --- a/arch/arm/mach-exynos/pm.c +++ b/arch/arm/mach-exynos/pm.c @@ -181,6 +181,7 @@ void exynos_enter_aftr(void) cpu_pm_exit(); } +#if defined(CONFIG_SMP) && defined(CONFIG_ARM_EXYNOS_CPUIDLE) static atomic_t cpu1_wakeup = ATOMIC_INIT(0); static int exynos_cpu0_enter_aftr(void) @@ -302,3 +303,4 @@ struct cpuidle_exynos_data cpuidle_coupled_exynos_data = { .pre_enter_aftr = exynos_pre_enter_aftr, .post_enter_aftr = exynos_post_enter_aftr, }; +#endif /* CONFIG_SMP && CONFIG_ARM_EXYNOS_CPUIDLE */ diff --git a/drivers/cpuidle/cpuidle-exynos.c b/drivers/cpuidle/cpuidle-exynos.c index 26f5f29fdb03..9bb5348995a9 100644 --- a/drivers/cpuidle/cpuidle-exynos.c +++ b/drivers/cpuidle/cpuidle-exynos.c @@ -117,7 +117,8 @@ static int exynos_cpuidle_probe(struct platform_device *pdev) { int ret; - if (of_machine_is_compatible("samsung,exynos4210")) { + if (IS_ENABLED(CONFIG_SMP) && + of_machine_is_compatible("samsung,exynos4210")) { exynos_cpuidle_pdata = pdev->dev.platform_data; ret = cpuidle_register(&exynos_coupled_idle_driver, From afda768f88555a19bbcf66264d9fa622f78ff4fb Mon Sep 17 00:00:00 2001 From: Stefan Agner Date: Sun, 22 Mar 2015 01:00:18 +0100 Subject: [PATCH 15/23] ARM: OMAP2+: remove superfluous NULL pointer check The NULL pointer check for superset->muxnames will always evaluate true since muxnames is an array within struct omap_mux. Remove the superfluous check to avoid warnings when using LLVM/clang. Signed-off-by: Stefan Agner Signed-off-by: Tony Lindgren --- arch/arm/mach-omap2/mux.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/arch/arm/mach-omap2/mux.c b/arch/arm/mach-omap2/mux.c index 78064b0d4db5..176eef6ef338 100644 --- a/arch/arm/mach-omap2/mux.c +++ b/arch/arm/mach-omap2/mux.c @@ -1053,7 +1053,7 @@ static void __init omap_mux_init_list(struct omap_mux_partition *partition, struct omap_mux *entry; #ifdef CONFIG_OMAP_MUX - if (!superset->muxnames || !superset->muxnames[0]) { + if (!superset->muxnames[0]) { superset++; continue; } From 20431db949ce5eec0ff6012688c0ff6d9feb3319 Mon Sep 17 00:00:00 2001 From: Kishon Vijay Abraham I Date: Tue, 17 Mar 2015 16:54:50 +0530 Subject: [PATCH 16/23] ARM: dts: am4372: Add "ti,am437x-ocp2scp" as compatible string for OCP2SCP Added a new compatible string "ti,am437x-ocp2scp" for OCP2SCP module. This is needed since except for the OCP2SCP used in AM437x, SYNC2 value in OCP2SCP TIMING should be changed whereas the default value is sufficient in AM437x. Cc: Tony Lindgren Signed-off-by: Kishon Vijay Abraham I Signed-off-by: Tony Lindgren --- Documentation/devicetree/bindings/bus/omap-ocp2scp.txt | 3 ++- arch/arm/boot/dts/am4372.dtsi | 4 ++-- 2 files changed, 4 insertions(+), 3 deletions(-) diff --git a/Documentation/devicetree/bindings/bus/omap-ocp2scp.txt b/Documentation/devicetree/bindings/bus/omap-ocp2scp.txt index 63dd8051521c..18729f6fe1e5 100644 --- a/Documentation/devicetree/bindings/bus/omap-ocp2scp.txt +++ b/Documentation/devicetree/bindings/bus/omap-ocp2scp.txt @@ -1,7 +1,8 @@ * OMAP OCP2SCP - ocp interface to scp interface properties: -- compatible : Should be "ti,omap-ocp2scp" +- compatible : Should be "ti,am437x-ocp2scp" for AM437x processor + Should be "ti,omap-ocp2scp" for all others - reg : Address and length of the register set for the device - #address-cells, #size-cells : Must be present if the device has sub-nodes - ranges : the child address space are mapped 1:1 onto the parent address space diff --git a/arch/arm/boot/dts/am4372.dtsi b/arch/arm/boot/dts/am4372.dtsi index 1943fc333e7c..286e31790e29 100644 --- a/arch/arm/boot/dts/am4372.dtsi +++ b/arch/arm/boot/dts/am4372.dtsi @@ -787,7 +787,7 @@ }; ocp2scp0: ocp2scp@483a8000 { - compatible = "ti,omap-ocp2scp"; + compatible = "ti,am437x-ocp2scp", "ti,omap-ocp2scp"; #address-cells = <1>; #size-cells = <1>; ranges; @@ -806,7 +806,7 @@ }; ocp2scp1: ocp2scp@483e8000 { - compatible = "ti,omap-ocp2scp"; + compatible = "ti,am437x-ocp2scp", "ti,omap-ocp2scp"; #address-cells = <1>; #size-cells = <1>; ranges; From cdf61240e11f838705b7a3f51acad5b641e54210 Mon Sep 17 00:00:00 2001 From: Kishon Vijay Abraham I Date: Tue, 17 Mar 2015 16:54:51 +0530 Subject: [PATCH 17/23] bus: ocp2scp: SYNC2 value should be changed to 0x6 As per the TRMs of AM572x, OMAP4430, OMAP4460, OMAP543x, the value of SYNC2 must be set to 0x6 in order to ensure correct operation. So modified the SYNC2 value of OCP2SCP TIMING register to 0x6 in all the platforms that use OCP2SCP driver except AM437x. Also introduced a new compatible property since we don't want to modify the OCP2SCP TIMING register for AM437x. The sections in TRM where the above caution can be found is mentioned below. AM572x TRM SPRUHZ6 (http://www.ti.com/lit/ug/spruhz6/spruhz6.pdf) under section 26.3.2.2, table 26-26. OMAP4430 TRM SWPU231AP (http://www.ti.com/lit/ug/swpu231ap/swpu231ap.pdf) under section 23.12.6.2.2 , Table 23-1213. OMAP4460 TRM SWPU235AB (http://www.ti.com/lit/ug/swpu235ab/swpu235ab.pdf) under section 23.12.6.2.2, Table 23-1213. OMAP543x TRM SWPU249 (http://www.ti.com/lit/pdf/swpu249) under section 27.3.2.2, Table 27-27. Cc: Arnd Bergmann Cc: Greg Kroah-Hartman Signed-off-by: Kishon Vijay Abraham I Signed-off-by: Praneeth Bajjuri Signed-off-by: Tony Lindgren --- drivers/bus/omap-ocp2scp.c | 34 ++++++++++++++++++++++++++++++++++ 1 file changed, 34 insertions(+) diff --git a/drivers/bus/omap-ocp2scp.c b/drivers/bus/omap-ocp2scp.c index 723ec06ad2c8..9f1856948758 100644 --- a/drivers/bus/omap-ocp2scp.c +++ b/drivers/bus/omap-ocp2scp.c @@ -16,6 +16,7 @@ * */ +#include #include #include #include @@ -23,6 +24,9 @@ #include #include +#define OCP2SCP_TIMING 0x18 +#define SYNC2_MASK 0xf + static int ocp2scp_remove_devices(struct device *dev, void *c) { struct platform_device *pdev = to_platform_device(dev); @@ -35,6 +39,9 @@ static int ocp2scp_remove_devices(struct device *dev, void *c) static int omap_ocp2scp_probe(struct platform_device *pdev) { int ret; + u32 reg; + void __iomem *regs; + struct resource *res; struct device_node *np = pdev->dev.of_node; if (np) { @@ -47,6 +54,32 @@ static int omap_ocp2scp_probe(struct platform_device *pdev) } pm_runtime_enable(&pdev->dev); + /* + * As per AM572x TRM: http://www.ti.com/lit/ug/spruhz6/spruhz6.pdf + * under section 26.3.2.2, table 26-26 OCP2SCP TIMING Caution; + * As per OMAP4430 TRM: http://www.ti.com/lit/ug/swpu231ap/swpu231ap.pdf + * under section 23.12.6.2.2 , Table 23-1213 OCP2SCP TIMING Caution; + * As per OMAP4460 TRM: http://www.ti.com/lit/ug/swpu235ab/swpu235ab.pdf + * under section 23.12.6.2.2, Table 23-1213 OCP2SCP TIMING Caution; + * As per OMAP543x TRM http://www.ti.com/lit/pdf/swpu249 + * under section 27.3.2.2, Table 27-27 OCP2SCP TIMING Caution; + * + * Read path of OCP2SCP is not working properly due to low reset value + * of SYNC2 parameter in OCP2SCP. Suggested reset value is 0x6 or more. + */ + if (!of_device_is_compatible(np, "ti,am437x-ocp2scp")) { + res = platform_get_resource(pdev, IORESOURCE_MEM, 0); + regs = devm_ioremap_resource(&pdev->dev, res); + if (IS_ERR(regs)) + goto err0; + + pm_runtime_get_sync(&pdev->dev); + reg = readl_relaxed(regs + OCP2SCP_TIMING); + reg &= ~(SYNC2_MASK); + reg |= 0x6; + writel_relaxed(reg, regs + OCP2SCP_TIMING); + pm_runtime_put_sync(&pdev->dev); + } return 0; @@ -67,6 +100,7 @@ static int omap_ocp2scp_remove(struct platform_device *pdev) #ifdef CONFIG_OF static const struct of_device_id omap_ocp2scp_id_table[] = { { .compatible = "ti,omap-ocp2scp" }, + { .compatible = "ti,am437x-ocp2scp" }, {} }; MODULE_DEVICE_TABLE(of, omap_ocp2scp_id_table); From f7397edf47ecc859fa69c15c4f9cefc8f2ee00c8 Mon Sep 17 00:00:00 2001 From: Keerthy Date: Mon, 23 Mar 2015 14:39:38 -0500 Subject: [PATCH 18/23] ARM: dts: DRA7: Add bandgap and related thermal nodes Add bandgap and related thermal nodes. The patch adds 5 thermal sensors. Only one cooling device for mpu as of now. The sensors are the exact same on both dra72 and dra7. Introduce CPU, GPU, core nodes for the moment as they are direct reuse of OMAP5 entities. NOTE: OMAP4 has a finer counter granularity, which allows for a delay of 1000ms in the thermal zone polling intervals. DRA7 have different counter mechanism, which allows at maximum a 500ms timer. Adjust the cpu thermal zone accordingly for DRA7. Signed-off-by: Keerthy [t-kristo@ti.com: few reuse from OMAP5 entities] Signed-off-by: Tero Kristo Signed-off-by: Nishanth Menon Signed-off-by: Tony Lindgren --- arch/arm/boot/dts/dra7.dtsi | 23 +++++++++++++++++++++++ arch/arm/boot/dts/dra72x.dtsi | 5 +++++ arch/arm/boot/dts/dra74x.dtsi | 5 +++++ 3 files changed, 33 insertions(+) diff --git a/arch/arm/boot/dts/dra7.dtsi b/arch/arm/boot/dts/dra7.dtsi index 5827fedafd43..098916f93811 100644 --- a/arch/arm/boot/dts/dra7.dtsi +++ b/arch/arm/boot/dts/dra7.dtsi @@ -177,6 +177,18 @@ }; }; + bandgap: bandgap@4a0021e0 { + reg = <0x4a0021e0 0xc + 0x4a00232c 0xc + 0x4a002380 0x2c + 0x4a0023C0 0x3c + 0x4a002564 0x8 + 0x4a002574 0x50>; + compatible = "ti,dra752-bandgap"; + interrupts = ; + #thermal-sensor-cells = <1>; + }; + cm_core_aon: cm_core_aon@4a005000 { compatible = "ti,dra7-cm-core-aon"; reg = <0x4a005000 0x2000>; @@ -1426,6 +1438,17 @@ status = "disabled"; }; }; + + thermal_zones: thermal-zones { + #include "omap4-cpu-thermal.dtsi" + #include "omap5-gpu-thermal.dtsi" + #include "omap5-core-thermal.dtsi" + }; + +}; + +&cpu_thermal { + polling-delay = <500>; /* milliseconds */ }; /include/ "dra7xx-clocks.dtsi" diff --git a/arch/arm/boot/dts/dra72x.dtsi b/arch/arm/boot/dts/dra72x.dtsi index e5a3d23a3df1..6ac8e3601499 100644 --- a/arch/arm/boot/dts/dra72x.dtsi +++ b/arch/arm/boot/dts/dra72x.dtsi @@ -20,6 +20,11 @@ device_type = "cpu"; compatible = "arm,cortex-a15"; reg = <0>; + + /* cooling options */ + cooling-min-level = <0>; + cooling-max-level = <2>; + #cooling-cells = <2>; /* min followed by max */ }; }; diff --git a/arch/arm/boot/dts/dra74x.dtsi b/arch/arm/boot/dts/dra74x.dtsi index 10173fab1a15..eef981f4bcd5 100644 --- a/arch/arm/boot/dts/dra74x.dtsi +++ b/arch/arm/boot/dts/dra74x.dtsi @@ -31,6 +31,11 @@ clock-names = "cpu"; clock-latency = <300000>; /* From omap-cpufreq driver */ + + /* cooling options */ + cooling-min-level = <0>; + cooling-max-level = <2>; + #cooling-cells = <2>; /* min followed by max */ }; cpu@1 { device_type = "cpu"; From d723cfeafc7b4c73e89ed3d4b1a4d747e990872c Mon Sep 17 00:00:00 2001 From: Nishanth Menon Date: Mon, 23 Mar 2015 14:39:39 -0500 Subject: [PATCH 19/23] ARM: dts: am57xx-beagle-x15: Add thermal map to include fan and tmp102 BeagleBoard-X15 has capability for a fan and has an onboard TMP102 temperature sensor as well. This allows us to create a new thermal zone (called, un-imaginatively "board"), and allows us to use some active cooling as temperatures start edge upward in the system by creating a new alert temperature (emperically 50C) for cpu. NOTE: Fan is NOT mounted by default on the platform, in such a case, all we end up doing is switch on a regulator and leak very minimal current. Signed-off-by: Nishanth Menon Acked-by: Eduardo Valentin Signed-off-by: Tony Lindgren --- arch/arm/boot/dts/am57xx-beagle-x15.dts | 49 ++++++++++++++++++++++++ arch/arm/boot/dts/omap4-cpu-thermal.dtsi | 4 +- 2 files changed, 51 insertions(+), 2 deletions(-) diff --git a/arch/arm/boot/dts/am57xx-beagle-x15.dts b/arch/arm/boot/dts/am57xx-beagle-x15.dts index 03750af3b49a..ae83a812d8a6 100644 --- a/arch/arm/boot/dts/am57xx-beagle-x15.dts +++ b/arch/arm/boot/dts/am57xx-beagle-x15.dts @@ -87,6 +87,7 @@ gpios = <&tps659038_gpio 1 GPIO_ACTIVE_HIGH>; gpio-fan,speed-map = <0 0>, <13000 1>; + #cooling-cells = <2>; }; extcon_usb1: extcon_usb1 { @@ -442,6 +443,7 @@ pinctrl-0 = <&tmp102_pins_default>; interrupt-parent = <&gpio7>; interrupts = <16 IRQ_TYPE_LEVEL_LOW>; + #thermal-sensor-cells = <1>; }; }; @@ -560,3 +562,50 @@ &usb2 { dr_mode = "peripheral"; }; + +&cpu_trips { + cpu_alert1: cpu_alert1 { + temperature = <50000>; /* millicelsius */ + hysteresis = <2000>; /* millicelsius */ + type = "active"; + }; +}; + +&cpu_cooling_maps { + map1 { + trip = <&cpu_alert1>; + cooling-device = <&gpio_fan THERMAL_NO_LIMIT THERMAL_NO_LIMIT>; + }; +}; + +&thermal_zones { + board_thermal: board_thermal { + polling-delay-passive = <1250>; /* milliseconds */ + polling-delay = <1500>; /* milliseconds */ + + /* sensor ID */ + thermal-sensors = <&tmp102 0>; + + board_trips: trips { + board_alert0: board_alert { + temperature = <40000>; /* millicelsius */ + hysteresis = <2000>; /* millicelsius */ + type = "active"; + }; + + board_crit: board_crit { + temperature = <105000>; /* millicelsius */ + hysteresis = <0>; /* millicelsius */ + type = "critical"; + }; + }; + + board_cooling_maps: cooling-maps { + map0 { + trip = <&board_alert0>; + cooling-device = + <&gpio_fan THERMAL_NO_LIMIT THERMAL_NO_LIMIT>; + }; + }; + }; +}; diff --git a/arch/arm/boot/dts/omap4-cpu-thermal.dtsi b/arch/arm/boot/dts/omap4-cpu-thermal.dtsi index cb9458feb2e3..ab7f87ae96f0 100644 --- a/arch/arm/boot/dts/omap4-cpu-thermal.dtsi +++ b/arch/arm/boot/dts/omap4-cpu-thermal.dtsi @@ -18,7 +18,7 @@ cpu_thermal: cpu_thermal { /* sensor ID */ thermal-sensors = <&bandgap 0>; - trips { + cpu_trips: trips { cpu_alert0: cpu_alert { temperature = <100000>; /* millicelsius */ hysteresis = <2000>; /* millicelsius */ @@ -31,7 +31,7 @@ cpu_thermal: cpu_thermal { }; }; - cooling-maps { + cpu_cooling_maps: cooling-maps { map0 { trip = <&cpu_alert0>; cooling-device = From 209431eff8afb928d72200c79153165c7d860ca0 Mon Sep 17 00:00:00 2001 From: Praneeth Bajjuri Date: Wed, 25 Mar 2015 18:25:09 -0500 Subject: [PATCH 20/23] ARM: DRA7: Enable Cortex A15 errata 798181 ARM errata 798181 is applicable for OMAP5/DRA7 based devices. So enable the same in the build. DRA7xx is based on Cortex-A15 r2p2 revision. ARM Errata extract and workaround information is as below. On Cortex-A15 (r0p0..r3p2) the TLBI*IS/DSB operations are not adequately shooting down all use of the old entries. The ARM_ERRATA_798181 option enables the Linux kernel workaround for this erratum which sends an IPI to the CPUs that are running the same ASID as the one being invalidated. Signed-off-by: Praneeth Bajjuri Acked-by: Nishanth Menon Signed-off-by: Tony Lindgren --- arch/arm/mach-omap2/Kconfig | 1 + 1 file changed, 1 insertion(+) diff --git a/arch/arm/mach-omap2/Kconfig b/arch/arm/mach-omap2/Kconfig index c7f4d9a6b38c..1041b19485ab 100644 --- a/arch/arm/mach-omap2/Kconfig +++ b/arch/arm/mach-omap2/Kconfig @@ -69,6 +69,7 @@ config SOC_DRA7XX select ARM_GIC select HAVE_ARM_ARCH_TIMER select IRQ_CROSSBAR + select ARM_ERRATA_798181 if SMP config ARCH_OMAP2PLUS bool From 548ae94c1cc7fc120848757249b9a542b1080ffb Mon Sep 17 00:00:00 2001 From: Gregory CLEMENT Date: Fri, 30 Jan 2015 12:34:25 +0100 Subject: [PATCH 21/23] ARM: mvebu: Disable CPU Idle on Armada 38x On Armada 38x SoCs, under heavy I/O load, the system hangs when CPU Idle is enabled. Waiting for a solution to this issue, this patch disables the CPU Idle support for this SoC. As CPU Hot plug support also uses some of the CPU Idle functions it is also affected by the same issue. This patch disables it also for the Armada 38x SoCs. Signed-off-by: Gregory CLEMENT Tested-by: Thomas Petazzoni Cc: # v3.17 + --- arch/arm/mach-mvebu/pmsu.c | 16 +++++++++++++++- 1 file changed, 15 insertions(+), 1 deletion(-) diff --git a/arch/arm/mach-mvebu/pmsu.c b/arch/arm/mach-mvebu/pmsu.c index 8b9f5e202ccf..4f4e22206ae5 100644 --- a/arch/arm/mach-mvebu/pmsu.c +++ b/arch/arm/mach-mvebu/pmsu.c @@ -415,6 +415,9 @@ static __init int armada_38x_cpuidle_init(void) void __iomem *mpsoc_base; u32 reg; + pr_warn("CPU idle is currently broken on Armada 38x: disabling"); + return 0; + np = of_find_compatible_node(NULL, NULL, "marvell,armada-380-coherency-fabric"); if (!np) @@ -476,6 +479,16 @@ static int __init mvebu_v7_cpu_pm_init(void) return 0; of_node_put(np); + /* + * Currently the CPU idle support for Armada 38x is broken, as + * the CPU hotplug uses some of the CPU idle functions it is + * broken too, so let's disable it + */ + if (of_machine_is_compatible("marvell,armada380")) { + cpu_hotplug_disable(); + pr_warn("CPU hotplug support is currently broken on Armada 38x: disabling"); + } + if (of_machine_is_compatible("marvell,armadaxp")) ret = armada_xp_cpuidle_init(); else if (of_machine_is_compatible("marvell,armada370")) @@ -489,7 +502,8 @@ static int __init mvebu_v7_cpu_pm_init(void) return ret; mvebu_v7_pmsu_enable_l2_powerdown_onidle(); - platform_device_register(&mvebu_v7_cpuidle_device); + if (mvebu_v7_cpuidle_device.name) + platform_device_register(&mvebu_v7_cpuidle_device); cpu_pm_register_notifier(&mvebu_v7_cpu_pm_notifier); return 0; From 77479b38e2f58890eb221a0418357502a5b41cd6 Mon Sep 17 00:00:00 2001 From: Nathan Rossi Date: Mon, 30 Mar 2015 14:39:08 +0200 Subject: [PATCH 22/23] kbuild: Create directory for target DTB When building specific DTBs out of the kernel tree the vendor subdirs (boot/dts/) are not created, ensure that they are before building the DTB. Signed-off-by: Nathan Rossi Signed-off-by: Michal Simek Acked-by: Will Deacon Signed-off-by: Olof Johansson --- scripts/Makefile.lib | 3 ++- 1 file changed, 2 insertions(+), 1 deletion(-) diff --git a/scripts/Makefile.lib b/scripts/Makefile.lib index 044eb4f89a91..79e86613712f 100644 --- a/scripts/Makefile.lib +++ b/scripts/Makefile.lib @@ -282,7 +282,8 @@ $(obj)/%.dtb.S: $(obj)/%.dtb $(call cmd,dt_S_dtb) quiet_cmd_dtc = DTC $@ -cmd_dtc = $(CPP) $(dtc_cpp_flags) -x assembler-with-cpp -o $(dtc-tmp) $< ; \ +cmd_dtc = mkdir -p $(dir ${dtc-tmp}) ; \ + $(CPP) $(dtc_cpp_flags) -x assembler-with-cpp -o $(dtc-tmp) $< ; \ $(objtree)/scripts/dtc/dtc -O dtb -o $@ -b 0 \ -i $(dir $<) $(DTC_FLAGS) \ -d $(depfile).dtc.tmp $(dtc-tmp) ; \ From 98b80987c940956da48f0c703f60340128bb8521 Mon Sep 17 00:00:00 2001 From: Nicolas Ferre Date: Tue, 31 Mar 2015 10:56:10 +0200 Subject: [PATCH 23/23] ARM: at91/dt: sama5d3 xplained: add phy address for macb1 After 57a38effa598 (net: phy: micrel: disable broadcast for KSZ8081/KSZ8091) the macb1 interface refuses to work properly because it tries to cling to address 0 which isn't able to communicate in broadcast with the mac anymore. The micrel phy on the board is actually configured to show up at address 1. Adding the phy node and its real address fixes the issue. Signed-off-by: Nicolas Ferre Cc: Johan Hovold Cc: #3.19 Signed-off-by: Olof Johansson --- arch/arm/boot/dts/at91-sama5d3_xplained.dts | 6 ++++++ 1 file changed, 6 insertions(+) diff --git a/arch/arm/boot/dts/at91-sama5d3_xplained.dts b/arch/arm/boot/dts/at91-sama5d3_xplained.dts index fec1fca2ad66..6c4bc53cbf4e 100644 --- a/arch/arm/boot/dts/at91-sama5d3_xplained.dts +++ b/arch/arm/boot/dts/at91-sama5d3_xplained.dts @@ -167,7 +167,13 @@ macb1: ethernet@f802c000 { phy-mode = "rmii"; + #address-cells = <1>; + #size-cells = <0>; status = "okay"; + + ethernet-phy@1 { + reg = <0x1>; + }; }; dbgu: serial@ffffee00 {