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ARM: dts: qcom: sdx55: fix IPA interconnect definitions
[ Upstream commit c0d6316c23
]
The first two interconnects defined for IPA on the SDX55 SoC are
really two parts of what should be represented as a single path
between IPA and system memory.
Fix this by combining the "memory-a" and "memory-b" interconnects
into a single "memory" interconnect.
Reported-by: David Heidelberg <david@ixit.cz>
Tested-by: Manivannan Sadhasivam <manivannan.sadhasivam@linaro.org>
Signed-off-by: Alex Elder <elder@linaro.org>
Signed-off-by: David S. Miller <davem@davemloft.net>
Signed-off-by: Sasha Levin <sashal@kernel.org>
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1 changed files with 2 additions and 4 deletions
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@ -334,12 +334,10 @@ ipa: ipa@1e40000 {
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clocks = <&rpmhcc RPMH_IPA_CLK>;
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clock-names = "core";
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interconnects = <&system_noc MASTER_IPA &system_noc SLAVE_SNOC_MEM_NOC_GC>,
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<&mem_noc MASTER_SNOC_GC_MEM_NOC &mc_virt SLAVE_EBI_CH0>,
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interconnects = <&system_noc MASTER_IPA &mc_virt SLAVE_EBI_CH0>,
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<&system_noc MASTER_IPA &system_noc SLAVE_OCIMEM>,
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<&mem_noc MASTER_AMPSS_M0 &system_noc SLAVE_IPA_CFG>;
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interconnect-names = "memory-a",
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"memory-b",
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interconnect-names = "memory",
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"imem",
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"config";
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