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staging: fsl-dpaa2/eth: Errors checking update
On the egress path, frame errors are reported using both a FD control field and the frame annotation status. The current code only handles FAS errors. Update to look at both fields when accounting Tx errors. Signed-off-by: Bogdan Purcareata <bogdan.purcareata@nxp.com> Signed-off-by: Ioana Radulescu <ruxandra.radulescu@nxp.com> Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
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05fa39c6b9
commit
39163c0ce0
2 changed files with 43 additions and 10 deletions
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@ -534,7 +534,7 @@ static void free_tx_fd(const struct dpaa2_eth_priv *priv,
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* buffer but before we free it. The caller function is responsible
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* for checking the status value.
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*/
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if (status && (dpaa2_fd_get_frc(fd) & DPAA2_FD_FRC_FASV))
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if (status)
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*status = le32_to_cpu(fas->status);
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/* Free SGT buffer kmalloc'ed on tx */
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@ -638,6 +638,8 @@ static void dpaa2_eth_tx_conf(struct dpaa2_eth_priv *priv,
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struct rtnl_link_stats64 *percpu_stats;
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struct dpaa2_eth_drv_stats *percpu_extras;
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u32 status = 0;
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u32 fd_errors;
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bool has_fas_errors = false;
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/* Tracing point */
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trace_dpaa2_tx_conf_fd(priv->net_dev, fd);
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@ -646,13 +648,31 @@ static void dpaa2_eth_tx_conf(struct dpaa2_eth_priv *priv,
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percpu_extras->tx_conf_frames++;
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percpu_extras->tx_conf_bytes += dpaa2_fd_get_len(fd);
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free_tx_fd(priv, fd, &status);
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if (unlikely(status & DPAA2_ETH_TXCONF_ERR_MASK)) {
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percpu_stats = this_cpu_ptr(priv->percpu_stats);
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/* Tx-conf logically pertains to the egress path. */
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percpu_stats->tx_errors++;
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/* Check frame errors in the FD field */
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fd_errors = dpaa2_fd_get_ctrl(fd) & DPAA2_FD_TX_ERR_MASK;
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if (unlikely(fd_errors)) {
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/* We only check error bits in the FAS field if corresponding
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* FAERR bit is set in FD and the FAS field is marked as valid
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*/
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has_fas_errors = (fd_errors & DPAA2_FD_CTRL_FAERR) &&
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!!(dpaa2_fd_get_frc(fd) & DPAA2_FD_FRC_FASV);
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if (net_ratelimit())
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netdev_dbg(priv->net_dev, "TX frame FD error: %x08\n",
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fd_errors);
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}
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free_tx_fd(priv, fd, has_fas_errors ? &status : NULL);
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if (likely(!fd_errors))
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return;
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percpu_stats = this_cpu_ptr(priv->percpu_stats);
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/* Tx-conf logically pertains to the egress path. */
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percpu_stats->tx_errors++;
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if (has_fas_errors && net_ratelimit())
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netdev_dbg(priv->net_dev, "TX frame FAS error: %x08\n",
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status & DPAA2_FAS_TX_ERR_MASK);
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}
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static int set_rx_csum(struct dpaa2_eth_priv *priv, bool enable)
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@ -2069,7 +2089,7 @@ static int bind_dpni(struct dpaa2_eth_priv *priv)
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netdev_err(net_dev, "Failed to configure hashing\n");
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/* Configure handling of error frames */
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err_cfg.errors = DPAA2_ETH_RX_ERR_MASK;
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err_cfg.errors = DPAA2_FAS_RX_ERR_MASK;
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err_cfg.set_frame_annotation = 1;
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err_cfg.error_action = DPNI_ERROR_ACTION_DISCARD;
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err = dpni_set_errors_behavior(priv->mc_io, 0, priv->mc_token,
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@ -120,6 +120,19 @@ struct dpaa2_eth_swa {
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#define DPAA2_FD_FRC_FASWOV 0x0800
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#define DPAA2_FD_FRC_FAICFDV 0x0400
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/* Error bits in FD CTRL */
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#define DPAA2_FD_CTRL_UFD 0x00000004
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#define DPAA2_FD_CTRL_SBE 0x00000008
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#define DPAA2_FD_CTRL_FSE 0x00000010
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#define DPAA2_FD_CTRL_FAERR 0x00000020
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#define DPAA2_FD_RX_ERR_MASK (DPAA2_FD_CTRL_SBE | \
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DPAA2_FD_CTRL_FAERR)
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#define DPAA2_FD_TX_ERR_MASK (DPAA2_FD_CTRL_UFD | \
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DPAA2_FD_CTRL_SBE | \
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DPAA2_FD_CTRL_FSE | \
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DPAA2_FD_CTRL_FAERR)
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/* Annotation bits in FD CTRL */
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#define DPAA2_FD_CTRL_ASAL 0x00020000 /* ASAL = 128 */
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#define DPAA2_FD_CTRL_PTA 0x00800000
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@ -177,7 +190,7 @@ struct dpaa2_fas {
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/* L4 csum error */
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#define DPAA2_FAS_L4CE 0x00000001
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/* Possible errors on the ingress path */
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#define DPAA2_ETH_RX_ERR_MASK (DPAA2_FAS_KSE | \
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#define DPAA2_FAS_RX_ERR_MASK (DPAA2_FAS_KSE | \
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DPAA2_FAS_EOFHE | \
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DPAA2_FAS_MNLE | \
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DPAA2_FAS_TIDE | \
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@ -191,7 +204,7 @@ struct dpaa2_fas {
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DPAA2_FAS_L3CE | \
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DPAA2_FAS_L4CE)
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/* Tx errors */
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#define DPAA2_ETH_TXCONF_ERR_MASK (DPAA2_FAS_KSE | \
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#define DPAA2_FAS_TX_ERR_MASK (DPAA2_FAS_KSE | \
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DPAA2_FAS_EOFHE | \
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DPAA2_FAS_MNLE | \
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DPAA2_FAS_TIDE)
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