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drm/amd/pm: support runtime pptable update for sienna_cichlid etc.
This avoids smu issue when enabling runtime pptable update for sienna_cichlid and so on. Runtime pptable udpate is needed for test and debug purpose. Signed-off-by: Jiansong Chen <Jiansong.Chen@amd.com> Reviewed-by: Kenneth Feng <kenneth.feng@amd.com> Reviewed-by: Evan Quan <evan.quan@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
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26652cd8de
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1 changed files with 9 additions and 3 deletions
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@ -1129,7 +1129,7 @@ static int smu_disable_dpms(struct smu_context *smu)
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*/
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if (smu->uploading_custom_pp_table &&
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(adev->asic_type >= CHIP_NAVI10) &&
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(adev->asic_type <= CHIP_NAVI12))
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(adev->asic_type <= CHIP_NAVY_FLOUNDER))
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return 0;
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/*
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@ -1214,7 +1214,9 @@ static int smu_hw_fini(void *handle)
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int smu_reset(struct smu_context *smu)
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{
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struct amdgpu_device *adev = smu->adev;
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int ret = 0;
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int ret;
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amdgpu_gfx_off_ctrl(smu->adev, false);
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ret = smu_hw_fini(adev);
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if (ret)
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@ -1225,8 +1227,12 @@ int smu_reset(struct smu_context *smu)
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return ret;
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ret = smu_late_init(adev);
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if (ret)
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return ret;
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return ret;
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amdgpu_gfx_off_ctrl(smu->adev, true);
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return 0;
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}
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static int smu_suspend(void *handle)
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