mirror of
https://git.kernel.org/pub/scm/linux/kernel/git/stable/linux.git
synced 2024-08-23 09:19:51 +00:00
Merge branch 'linux-2.6.33'
This commit is contained in:
commit
398007f863
1237 changed files with 29023 additions and 10838 deletions
|
@ -20,7 +20,7 @@ Description:
|
|||
lsm: [[subj_user=] [subj_role=] [subj_type=]
|
||||
[obj_user=] [obj_role=] [obj_type=]]
|
||||
|
||||
base: func:= [BPRM_CHECK][FILE_MMAP][INODE_PERMISSION]
|
||||
base: func:= [BPRM_CHECK][FILE_MMAP][FILE_CHECK]
|
||||
mask:= [MAY_READ] [MAY_WRITE] [MAY_APPEND] [MAY_EXEC]
|
||||
fsmagic:= hex value
|
||||
uid:= decimal value
|
||||
|
@ -40,11 +40,11 @@ Description:
|
|||
|
||||
measure func=BPRM_CHECK
|
||||
measure func=FILE_MMAP mask=MAY_EXEC
|
||||
measure func=INODE_PERM mask=MAY_READ uid=0
|
||||
measure func=FILE_CHECK mask=MAY_READ uid=0
|
||||
|
||||
The default policy measures all executables in bprm_check,
|
||||
all files mmapped executable in file_mmap, and all files
|
||||
open for read by root in inode_permission.
|
||||
open for read by root in do_filp_open.
|
||||
|
||||
Examples of LSM specific definitions:
|
||||
|
||||
|
@ -54,8 +54,8 @@ Description:
|
|||
|
||||
dont_measure obj_type=var_log_t
|
||||
dont_measure obj_type=auditd_log_t
|
||||
measure subj_user=system_u func=INODE_PERM mask=MAY_READ
|
||||
measure subj_role=system_r func=INODE_PERM mask=MAY_READ
|
||||
measure subj_user=system_u func=FILE_CHECK mask=MAY_READ
|
||||
measure subj_role=system_r func=FILE_CHECK mask=MAY_READ
|
||||
|
||||
Smack:
|
||||
measure subj_user=_ func=INODE_PERM mask=MAY_READ
|
||||
measure subj_user=_ func=FILE_CHECK mask=MAY_READ
|
||||
|
|
|
@ -145,8 +145,8 @@ show_sampling_rate_max: THIS INTERFACE IS DEPRECATED, DON'T USE IT.
|
|||
up_threshold: defines what the average CPU usage between the samplings
|
||||
of 'sampling_rate' needs to be for the kernel to make a decision on
|
||||
whether it should increase the frequency. For example when it is set
|
||||
to its default value of '80' it means that between the checking
|
||||
intervals the CPU needs to be on average more than 80% in use to then
|
||||
to its default value of '95' it means that between the checking
|
||||
intervals the CPU needs to be on average more than 95% in use to then
|
||||
decide that the CPU frequency needs to be increased.
|
||||
|
||||
ignore_nice_load: this parameter takes a value of '0' or '1'. When
|
||||
|
|
|
@ -143,8 +143,8 @@ o provide a way to configure fault attributes
|
|||
failslab, fail_page_alloc, and fail_make_request use this way.
|
||||
Helper functions:
|
||||
|
||||
init_fault_attr_entries(entries, attr, name);
|
||||
void cleanup_fault_attr_entries(entries);
|
||||
init_fault_attr_dentries(entries, attr, name);
|
||||
void cleanup_fault_attr_dentries(entries);
|
||||
|
||||
- module parameters
|
||||
|
||||
|
|
|
@ -493,3 +493,52 @@ Why: These two features use non-standard interfaces. There are the
|
|||
Who: Corentin Chary <corentin.chary@gmail.com>
|
||||
|
||||
----------------------------
|
||||
|
||||
What: usbvideo quickcam_messenger driver
|
||||
When: 2.6.35
|
||||
Files: drivers/media/video/usbvideo/quickcam_messenger.[ch]
|
||||
Why: obsolete v4l1 driver replaced by gspca_stv06xx
|
||||
Who: Hans de Goede <hdegoede@redhat.com>
|
||||
|
||||
----------------------------
|
||||
|
||||
What: ov511 v4l1 driver
|
||||
When: 2.6.35
|
||||
Files: drivers/media/video/ov511.[ch]
|
||||
Why: obsolete v4l1 driver replaced by gspca_ov519
|
||||
Who: Hans de Goede <hdegoede@redhat.com>
|
||||
|
||||
----------------------------
|
||||
|
||||
What: w9968cf v4l1 driver
|
||||
When: 2.6.35
|
||||
Files: drivers/media/video/w9968cf*.[ch]
|
||||
Why: obsolete v4l1 driver replaced by gspca_ov519
|
||||
Who: Hans de Goede <hdegoede@redhat.com>
|
||||
|
||||
----------------------------
|
||||
|
||||
What: ovcamchip sensor framework
|
||||
When: 2.6.35
|
||||
Files: drivers/media/video/ovcamchip/*
|
||||
Why: Only used by obsoleted v4l1 drivers
|
||||
Who: Hans de Goede <hdegoede@redhat.com>
|
||||
|
||||
----------------------------
|
||||
|
||||
What: stv680 v4l1 driver
|
||||
When: 2.6.35
|
||||
Files: drivers/media/video/stv680.[ch]
|
||||
Why: obsolete v4l1 driver replaced by gspca_stv0680
|
||||
Who: Hans de Goede <hdegoede@redhat.com>
|
||||
|
||||
----------------------------
|
||||
|
||||
What: zc0301 v4l driver
|
||||
When: 2.6.35
|
||||
Files: drivers/media/video/zc0301/*
|
||||
Why: Duplicate functionality with the gspca_zc3xx driver, zc0301 only
|
||||
supports 2 USB-ID's (because it only supports a limited set of
|
||||
sensors) wich are also supported by the gspca_zc3xx driver
|
||||
(which supports 53 USB-ID's in total)
|
||||
Who: Hans de Goede <hdegoede@redhat.com>
|
||||
|
|
|
@ -27,12 +27,30 @@ set of events/packets.
|
|||
|
||||
A set of ABS_MT events with the desired properties is defined. The events
|
||||
are divided into categories, to allow for partial implementation. The
|
||||
minimum set consists of ABS_MT_TOUCH_MAJOR, ABS_MT_POSITION_X and
|
||||
ABS_MT_POSITION_Y, which allows for multiple fingers to be tracked. If the
|
||||
device supports it, the ABS_MT_WIDTH_MAJOR may be used to provide the size
|
||||
of the approaching finger. Anisotropy and direction may be specified with
|
||||
ABS_MT_TOUCH_MINOR, ABS_MT_WIDTH_MINOR and ABS_MT_ORIENTATION. The
|
||||
ABS_MT_TOOL_TYPE may be used to specify whether the touching tool is a
|
||||
minimum set consists of ABS_MT_POSITION_X and ABS_MT_POSITION_Y, which
|
||||
allows for multiple fingers to be tracked. If the device supports it, the
|
||||
ABS_MT_TOUCH_MAJOR and ABS_MT_WIDTH_MAJOR may be used to provide the size
|
||||
of the contact area and approaching finger, respectively.
|
||||
|
||||
The TOUCH and WIDTH parameters have a geometrical interpretation; imagine
|
||||
looking through a window at someone gently holding a finger against the
|
||||
glass. You will see two regions, one inner region consisting of the part
|
||||
of the finger actually touching the glass, and one outer region formed by
|
||||
the perimeter of the finger. The diameter of the inner region is the
|
||||
ABS_MT_TOUCH_MAJOR, the diameter of the outer region is
|
||||
ABS_MT_WIDTH_MAJOR. Now imagine the person pressing the finger harder
|
||||
against the glass. The inner region will increase, and in general, the
|
||||
ratio ABS_MT_TOUCH_MAJOR / ABS_MT_WIDTH_MAJOR, which is always smaller than
|
||||
unity, is related to the finger pressure. For pressure-based devices,
|
||||
ABS_MT_PRESSURE may be used to provide the pressure on the contact area
|
||||
instead.
|
||||
|
||||
In addition to the MAJOR parameters, the oval shape of the finger can be
|
||||
described by adding the MINOR parameters, such that MAJOR and MINOR are the
|
||||
major and minor axis of an ellipse. Finally, the orientation of the oval
|
||||
shape can be describe with the ORIENTATION parameter.
|
||||
|
||||
The ABS_MT_TOOL_TYPE may be used to specify whether the touching tool is a
|
||||
finger or a pen or something else. Devices with more granular information
|
||||
may specify general shapes as blobs, i.e., as a sequence of rectangular
|
||||
shapes grouped together by an ABS_MT_BLOB_ID. Finally, for the few devices
|
||||
|
@ -42,11 +60,9 @@ report finger tracking from hardware [5].
|
|||
Here is what a minimal event sequence for a two-finger touch would look
|
||||
like:
|
||||
|
||||
ABS_MT_TOUCH_MAJOR
|
||||
ABS_MT_POSITION_X
|
||||
ABS_MT_POSITION_Y
|
||||
SYN_MT_REPORT
|
||||
ABS_MT_TOUCH_MAJOR
|
||||
ABS_MT_POSITION_X
|
||||
ABS_MT_POSITION_Y
|
||||
SYN_MT_REPORT
|
||||
|
@ -87,6 +103,12 @@ the contact. The ratio ABS_MT_TOUCH_MAJOR / ABS_MT_WIDTH_MAJOR approximates
|
|||
the notion of pressure. The fingers of the hand and the palm all have
|
||||
different characteristic widths [1].
|
||||
|
||||
ABS_MT_PRESSURE
|
||||
|
||||
The pressure, in arbitrary units, on the contact area. May be used instead
|
||||
of TOUCH and WIDTH for pressure-based devices or any device with a spatial
|
||||
signal intensity distribution.
|
||||
|
||||
ABS_MT_ORIENTATION
|
||||
|
||||
The orientation of the ellipse. The value should describe a signed quarter
|
||||
|
@ -170,6 +192,16 @@ There are a few devices that support trackingID in hardware. User space can
|
|||
make use of these native identifiers to reduce bandwidth and cpu usage.
|
||||
|
||||
|
||||
Gestures
|
||||
--------
|
||||
|
||||
In the specific application of creating gesture events, the TOUCH and WIDTH
|
||||
parameters can be used to, e.g., approximate finger pressure or distinguish
|
||||
between index finger and thumb. With the addition of the MINOR parameters,
|
||||
one can also distinguish between a sweeping finger and a pointing finger,
|
||||
and with ORIENTATION, one can detect twisting of fingers.
|
||||
|
||||
|
||||
Notes
|
||||
-----
|
||||
|
||||
|
|
|
@ -199,6 +199,10 @@ and is between 256 and 4096 characters. It is defined in the file
|
|||
acpi_display_output=video
|
||||
See above.
|
||||
|
||||
acpi_early_pdc_eval [HW,ACPI] Evaluate processor _PDC methods
|
||||
early. Needed on some platforms to properly
|
||||
initialize the EC.
|
||||
|
||||
acpi_irq_balance [HW,ACPI]
|
||||
ACPI will balance active IRQs
|
||||
default in APIC mode
|
||||
|
@ -311,6 +315,11 @@ and is between 256 and 4096 characters. It is defined in the file
|
|||
aic79xx= [HW,SCSI]
|
||||
See Documentation/scsi/aic79xx.txt.
|
||||
|
||||
alignment= [KNL,ARM]
|
||||
Allow the default userspace alignment fault handler
|
||||
behaviour to be specified. Bit 0 enables warnings,
|
||||
bit 1 enables fixups, and bit 2 sends a segfault.
|
||||
|
||||
amd_iommu= [HW,X86-84]
|
||||
Pass parameters to the AMD IOMMU driver in the system.
|
||||
Possible values are:
|
||||
|
|
|
@ -1074,10 +1074,10 @@ regen_max_retry - INTEGER
|
|||
Default: 5
|
||||
|
||||
max_addresses - INTEGER
|
||||
Number of maximum addresses per interface. 0 disables limitation.
|
||||
It is recommended not set too large value (or 0) because it would
|
||||
be too easy way to crash kernel to allow to create too much of
|
||||
autoconfigured addresses.
|
||||
Maximum number of autoconfigured addresses per interface. Setting
|
||||
to zero disables the limitation. It is not recommended to set this
|
||||
value too large (or to zero) because it would be an easy way to
|
||||
crash the kernel by allowing too many addresses to be created.
|
||||
Default: 16
|
||||
|
||||
disable_ipv6 - BOOLEAN
|
||||
|
|
|
@ -1,5 +1,6 @@
|
|||
function tracer guts
|
||||
====================
|
||||
By Mike Frysinger
|
||||
|
||||
Introduction
|
||||
------------
|
||||
|
@ -173,14 +174,16 @@ void ftrace_graph_caller(void)
|
|||
|
||||
unsigned long *frompc = &...;
|
||||
unsigned long selfpc = <return address> - MCOUNT_INSN_SIZE;
|
||||
prepare_ftrace_return(frompc, selfpc);
|
||||
/* passing frame pointer up is optional -- see below */
|
||||
prepare_ftrace_return(frompc, selfpc, frame_pointer);
|
||||
|
||||
/* restore all state needed by the ABI */
|
||||
}
|
||||
#endif
|
||||
|
||||
For information on how to implement prepare_ftrace_return(), simply look at
|
||||
the x86 version. The only architecture-specific piece in it is the setup of
|
||||
For information on how to implement prepare_ftrace_return(), simply look at the
|
||||
x86 version (the frame pointer passing is optional; see the next section for
|
||||
more information). The only architecture-specific piece in it is the setup of
|
||||
the fault recovery table (the asm(...) code). The rest should be the same
|
||||
across architectures.
|
||||
|
||||
|
@ -205,6 +208,23 @@ void return_to_handler(void)
|
|||
#endif
|
||||
|
||||
|
||||
HAVE_FUNCTION_GRAPH_FP_TEST
|
||||
---------------------------
|
||||
|
||||
An arch may pass in a unique value (frame pointer) to both the entering and
|
||||
exiting of a function. On exit, the value is compared and if it does not
|
||||
match, then it will panic the kernel. This is largely a sanity check for bad
|
||||
code generation with gcc. If gcc for your port sanely updates the frame
|
||||
pointer under different opitmization levels, then ignore this option.
|
||||
|
||||
However, adding support for it isn't terribly difficult. In your assembly code
|
||||
that calls prepare_ftrace_return(), pass the frame pointer as the 3rd argument.
|
||||
Then in the C version of that function, do what the x86 port does and pass it
|
||||
along to ftrace_push_return_trace() instead of a stub value of 0.
|
||||
|
||||
Similarly, when you call ftrace_return_to_handler(), pass it the frame pointer.
|
||||
|
||||
|
||||
HAVE_FTRACE_NMI_ENTER
|
||||
---------------------
|
||||
|
||||
|
|
|
@ -1625,7 +1625,7 @@ If I am only interested in sys_nanosleep and hrtimer_interrupt:
|
|||
|
||||
# echo sys_nanosleep hrtimer_interrupt \
|
||||
> set_ftrace_filter
|
||||
# echo ftrace > current_tracer
|
||||
# echo function > current_tracer
|
||||
# echo 1 > tracing_enabled
|
||||
# usleep 1
|
||||
# echo 0 > tracing_enabled
|
||||
|
|
40
MAINTAINERS
40
MAINTAINERS
|
@ -410,9 +410,8 @@ F: drivers/i2c/busses/i2c-ali1563.c
|
|||
|
||||
ALPHA PORT
|
||||
M: Richard Henderson <rth@twiddle.net>
|
||||
S: Odd Fixes for 2.4; Maintained for 2.6.
|
||||
M: Ivan Kokshaysky <ink@jurassic.park.msu.ru>
|
||||
S: Maintained for 2.4; PCI support for 2.6.
|
||||
M: Matt Turner <mattst88@gmail.com>
|
||||
L: linux-alpha@vger.kernel.org
|
||||
F: arch/alpha/
|
||||
|
||||
|
@ -617,10 +616,10 @@ M: Richard Purdie <rpurdie@rpsys.net>
|
|||
S: Maintained
|
||||
|
||||
ARM/CORTINA SYSTEMS GEMINI ARM ARCHITECTURE
|
||||
M: Paulius Zaleckas <paulius.zaleckas@teltonika.lt>
|
||||
M: Paulius Zaleckas <paulius.zaleckas@gmail.com>
|
||||
L: linux-arm-kernel@lists.infradead.org (moderated for non-subscribers)
|
||||
T: git git://gitorious.org/linux-gemini/mainline.git
|
||||
S: Maintained
|
||||
S: Odd Fixes
|
||||
F: arch/arm/mach-gemini/
|
||||
|
||||
ARM/EBSA110 MACHINE SUPPORT
|
||||
|
@ -642,9 +641,9 @@ T: topgit git://git.openezx.org/openezx.git
|
|||
F: arch/arm/mach-pxa/ezx.c
|
||||
|
||||
ARM/FARADAY FA526 PORT
|
||||
M: Paulius Zaleckas <paulius.zaleckas@teltonika.lt>
|
||||
M: Paulius Zaleckas <paulius.zaleckas@gmail.com>
|
||||
L: linux-arm-kernel@lists.infradead.org (moderated for non-subscribers)
|
||||
S: Maintained
|
||||
S: Odd Fixes
|
||||
F: arch/arm/mm/*-fa*
|
||||
|
||||
ARM/FOOTBRIDGE ARCHITECTURE
|
||||
|
@ -988,7 +987,6 @@ F: drivers/platform/x86/asus-laptop.c
|
|||
|
||||
ASYNCHRONOUS TRANSFERS/TRANSFORMS (IOAT) API
|
||||
M: Dan Williams <dan.j.williams@intel.com>
|
||||
M: Maciej Sosnowski <maciej.sosnowski@intel.com>
|
||||
W: http://sourceforge.net/projects/xscaleiop
|
||||
S: Supported
|
||||
F: Documentation/crypto/async-tx-api.txt
|
||||
|
@ -1638,9 +1636,8 @@ S: Maintained
|
|||
F: sound/pci/cs5535audio/
|
||||
|
||||
CX18 VIDEO4LINUX DRIVER
|
||||
M: Hans Verkuil <hverkuil@xs4all.nl>
|
||||
M: Andy Walls <awalls@radix.net>
|
||||
L: ivtv-devel@ivtvdriver.org
|
||||
L: ivtv-devel@ivtvdriver.org (moderated for non-subscribers)
|
||||
L: linux-media@vger.kernel.org
|
||||
T: git git://git.kernel.org/pub/scm/linux/kernel/git/mchehab/linux-2.6.git
|
||||
W: http://linuxtv.org
|
||||
|
@ -1736,10 +1733,9 @@ F: include/linux/tfrc.h
|
|||
F: net/dccp/
|
||||
|
||||
DECnet NETWORK LAYER
|
||||
M: Christine Caulfield <christine.caulfield@googlemail.com>
|
||||
W: http://linux-decnet.sourceforge.net
|
||||
L: linux-decnet-user@lists.sourceforge.net
|
||||
S: Maintained
|
||||
S: Orphan
|
||||
F: Documentation/networking/decnet.txt
|
||||
F: net/decnet/
|
||||
|
||||
|
@ -1825,7 +1821,6 @@ S: Supported
|
|||
F: fs/dlm/
|
||||
|
||||
DMA GENERIC OFFLOAD ENGINE SUBSYSTEM
|
||||
M: Maciej Sosnowski <maciej.sosnowski@intel.com>
|
||||
M: Dan Williams <dan.j.williams@intel.com>
|
||||
S: Supported
|
||||
F: drivers/dma/
|
||||
|
@ -2788,7 +2783,7 @@ F: arch/x86/kernel/microcode_core.c
|
|||
F: arch/x86/kernel/microcode_intel.c
|
||||
|
||||
INTEL I/OAT DMA DRIVER
|
||||
M: Maciej Sosnowski <maciej.sosnowski@intel.com>
|
||||
M: Dan Williams <dan.j.williams@intel.com>
|
||||
S: Supported
|
||||
F: drivers/dma/ioat*
|
||||
|
||||
|
@ -2826,10 +2821,11 @@ L: netdev@vger.kernel.org
|
|||
S: Maintained
|
||||
F: drivers/net/ixp2000/
|
||||
|
||||
INTEL ETHERNET DRIVERS (e100/e1000/e1000e/igb/ixgb/ixgbe)
|
||||
INTEL ETHERNET DRIVERS (e100/e1000/e1000e/igb/igbvf/ixgb/ixgbe)
|
||||
M: Jeff Kirsher <jeffrey.t.kirsher@intel.com>
|
||||
M: Jesse Brandeburg <jesse.brandeburg@intel.com>
|
||||
M: Bruce Allan <bruce.w.allan@intel.com>
|
||||
M: Alex Duyck <alexander.h.duyck@intel.com>
|
||||
M: PJ Waskiewicz <peter.p.waskiewicz.jr@intel.com>
|
||||
M: John Ronciak <john.ronciak@intel.com>
|
||||
L: e1000-devel@lists.sourceforge.net
|
||||
|
@ -2839,6 +2835,7 @@ F: drivers/net/e100.c
|
|||
F: drivers/net/e1000/
|
||||
F: drivers/net/e1000e/
|
||||
F: drivers/net/igb/
|
||||
F: drivers/net/igbvf/
|
||||
F: drivers/net/ixgb/
|
||||
F: drivers/net/ixgbe/
|
||||
|
||||
|
@ -3012,8 +3009,8 @@ S: Maintained
|
|||
F: drivers/isdn/hardware/eicon/
|
||||
|
||||
IVTV VIDEO4LINUX DRIVER
|
||||
M: Hans Verkuil <hverkuil@xs4all.nl>
|
||||
L: ivtv-devel@ivtvdriver.org
|
||||
M: Andy Walls <awalls@radix.net>
|
||||
L: ivtv-devel@ivtvdriver.org (moderated for non-subscribers)
|
||||
L: linux-media@vger.kernel.org
|
||||
T: git git://git.kernel.org/pub/scm/linux/kernel/git/mchehab/linux-2.6.git
|
||||
W: http://www.ivtvdriver.org
|
||||
|
@ -3413,8 +3410,10 @@ S: Maintained
|
|||
F: drivers/scsi/sym53c8xx_2/
|
||||
|
||||
LTP (Linux Test Project)
|
||||
M: Subrata Modak <subrata@linux.vnet.ibm.com>
|
||||
M: Mike Frysinger <vapier@gentoo.org>
|
||||
M: Rishikesh K Rajak <risrajak@linux.vnet.ibm.com>
|
||||
M: Garrett Cooper <yanegomi@gmail.com>
|
||||
M: Mike Frysinger <vapier@gentoo.org>
|
||||
M: Subrata Modak <subrata@linux.vnet.ibm.com>
|
||||
L: ltp-list@lists.sourceforge.net (subscribers-only)
|
||||
W: http://ltp.sourceforge.net/
|
||||
T: git git://git.kernel.org/pub/scm/linux/kernel/git/galak/ltp.git
|
||||
|
@ -3490,9 +3489,9 @@ S: Maintained
|
|||
F: drivers/net/wireless/libertas/
|
||||
|
||||
MARVELL MV643XX ETHERNET DRIVER
|
||||
M: Lennert Buytenhek <buytenh@marvell.com>
|
||||
M: Lennert Buytenhek <buytenh@wantstofly.org>
|
||||
L: netdev@vger.kernel.org
|
||||
S: Supported
|
||||
S: Maintained
|
||||
F: drivers/net/mv643xx_eth.*
|
||||
F: include/linux/mv643xx.h
|
||||
|
||||
|
@ -3838,6 +3837,7 @@ NETWORKING DRIVERS
|
|||
L: netdev@vger.kernel.org
|
||||
W: http://www.linuxfoundation.org/en/Net
|
||||
T: git git://git.kernel.org/pub/scm/linux/kernel/git/davem/net-2.6.git
|
||||
T: git git://git.kernel.org/pub/scm/linux/kernel/git/davem/net-next-2.6.git
|
||||
S: Odd Fixes
|
||||
F: drivers/net/
|
||||
F: include/linux/if_*
|
||||
|
|
5
Makefile
5
Makefile
|
@ -1,7 +1,7 @@
|
|||
VERSION = 2
|
||||
PATCHLEVEL = 6
|
||||
SUBLEVEL = 33
|
||||
EXTRAVERSION = -rc4
|
||||
EXTRAVERSION =
|
||||
NAME = Man-Eating Seals of Antiquity
|
||||
|
||||
# *DOCUMENTATION*
|
||||
|
@ -18,10 +18,9 @@ MAKEFLAGS += -rR --no-print-directory
|
|||
|
||||
# Avoid funny character set dependencies
|
||||
unexport LC_ALL
|
||||
LC_CTYPE=C
|
||||
LC_COLLATE=C
|
||||
LC_NUMERIC=C
|
||||
export LC_CTYPE LC_COLLATE LC_NUMERIC
|
||||
export LC_COLLATE LC_NUMERIC
|
||||
|
||||
# We are using a recursive build, so we need to do a little thinking
|
||||
# to get the ordering right.
|
||||
|
|
|
@ -28,6 +28,9 @@ static const struct cpumask *cpumask_of_node(int node)
|
|||
{
|
||||
int cpu;
|
||||
|
||||
if (node == -1)
|
||||
return cpu_all_mask;
|
||||
|
||||
cpumask_clear(&node_to_cpumask_map[node]);
|
||||
|
||||
for_each_online_cpu(cpu) {
|
||||
|
|
|
@ -702,6 +702,7 @@ config ARCH_OMAP
|
|||
select ARCH_HAS_CPUFREQ
|
||||
select GENERIC_TIME
|
||||
select GENERIC_CLOCKEVENTS
|
||||
select ARCH_HAS_HOLES_MEMORYMODEL
|
||||
help
|
||||
Support for TI's OMAP platform (OMAP1 and OMAP2).
|
||||
|
||||
|
@ -729,14 +730,26 @@ config ARCH_U8500
|
|||
|
||||
endchoice
|
||||
|
||||
source "arch/arm/mach-aaec2000/Kconfig"
|
||||
|
||||
source "arch/arm/mach-at91/Kconfig"
|
||||
|
||||
source "arch/arm/mach-bcmring/Kconfig"
|
||||
|
||||
source "arch/arm/mach-clps711x/Kconfig"
|
||||
|
||||
source "arch/arm/mach-davinci/Kconfig"
|
||||
|
||||
source "arch/arm/mach-dove/Kconfig"
|
||||
|
||||
source "arch/arm/mach-ep93xx/Kconfig"
|
||||
|
||||
source "arch/arm/mach-footbridge/Kconfig"
|
||||
|
||||
source "arch/arm/mach-gemini/Kconfig"
|
||||
|
||||
source "arch/arm/mach-h720x/Kconfig"
|
||||
|
||||
source "arch/arm/mach-integrator/Kconfig"
|
||||
|
||||
source "arch/arm/mach-iop32x/Kconfig"
|
||||
|
@ -751,16 +764,26 @@ source "arch/arm/mach-ixp2000/Kconfig"
|
|||
|
||||
source "arch/arm/mach-ixp23xx/Kconfig"
|
||||
|
||||
source "arch/arm/mach-kirkwood/Kconfig"
|
||||
|
||||
source "arch/arm/mach-ks8695/Kconfig"
|
||||
|
||||
source "arch/arm/mach-lh7a40x/Kconfig"
|
||||
|
||||
source "arch/arm/mach-loki/Kconfig"
|
||||
|
||||
source "arch/arm/mach-msm/Kconfig"
|
||||
|
||||
source "arch/arm/mach-mv78xx0/Kconfig"
|
||||
|
||||
source "arch/arm/mach-pxa/Kconfig"
|
||||
source "arch/arm/plat-pxa/Kconfig"
|
||||
source "arch/arm/plat-mxc/Kconfig"
|
||||
|
||||
source "arch/arm/mach-mmp/Kconfig"
|
||||
source "arch/arm/mach-netx/Kconfig"
|
||||
|
||||
source "arch/arm/mach-sa1100/Kconfig"
|
||||
source "arch/arm/mach-nomadik/Kconfig"
|
||||
source "arch/arm/plat-nomadik/Kconfig"
|
||||
|
||||
source "arch/arm/mach-ns9xxx/Kconfig"
|
||||
|
||||
source "arch/arm/plat-omap/Kconfig"
|
||||
|
||||
|
@ -770,9 +793,14 @@ source "arch/arm/mach-omap2/Kconfig"
|
|||
|
||||
source "arch/arm/mach-orion5x/Kconfig"
|
||||
|
||||
source "arch/arm/mach-kirkwood/Kconfig"
|
||||
source "arch/arm/mach-pxa/Kconfig"
|
||||
source "arch/arm/plat-pxa/Kconfig"
|
||||
|
||||
source "arch/arm/mach-dove/Kconfig"
|
||||
source "arch/arm/mach-mmp/Kconfig"
|
||||
|
||||
source "arch/arm/mach-realview/Kconfig"
|
||||
|
||||
source "arch/arm/mach-sa1100/Kconfig"
|
||||
|
||||
source "arch/arm/plat-samsung/Kconfig"
|
||||
source "arch/arm/plat-s3c24xx/Kconfig"
|
||||
|
@ -800,41 +828,14 @@ if ARCH_S5PC1XX
|
|||
source "arch/arm/mach-s5pc100/Kconfig"
|
||||
endif
|
||||
|
||||
source "arch/arm/mach-lh7a40x/Kconfig"
|
||||
source "arch/arm/mach-u300/Kconfig"
|
||||
|
||||
source "arch/arm/mach-h720x/Kconfig"
|
||||
source "arch/arm/mach-ux500/Kconfig"
|
||||
|
||||
source "arch/arm/mach-versatile/Kconfig"
|
||||
|
||||
source "arch/arm/mach-aaec2000/Kconfig"
|
||||
|
||||
source "arch/arm/mach-realview/Kconfig"
|
||||
|
||||
source "arch/arm/mach-at91/Kconfig"
|
||||
|
||||
source "arch/arm/plat-mxc/Kconfig"
|
||||
|
||||
source "arch/arm/mach-nomadik/Kconfig"
|
||||
source "arch/arm/plat-nomadik/Kconfig"
|
||||
|
||||
source "arch/arm/mach-netx/Kconfig"
|
||||
|
||||
source "arch/arm/mach-ns9xxx/Kconfig"
|
||||
|
||||
source "arch/arm/mach-davinci/Kconfig"
|
||||
|
||||
source "arch/arm/mach-ks8695/Kconfig"
|
||||
|
||||
source "arch/arm/mach-msm/Kconfig"
|
||||
|
||||
source "arch/arm/mach-u300/Kconfig"
|
||||
|
||||
source "arch/arm/mach-w90x900/Kconfig"
|
||||
|
||||
source "arch/arm/mach-bcmring/Kconfig"
|
||||
|
||||
source "arch/arm/mach-ux500/Kconfig"
|
||||
|
||||
# Definitions to make life easier
|
||||
config ARCH_ACORN
|
||||
bool
|
||||
|
|
|
@ -94,7 +94,7 @@ CFLAGS_ABI +=-funwind-tables
|
|||
endif
|
||||
|
||||
ifeq ($(CONFIG_THUMB2_KERNEL),y)
|
||||
AFLAGS_AUTOIT :=$(call as-option,-Wa$(comma)-mimplicit-it=thumb,-Wa$(comma)-mauto-it)
|
||||
AFLAGS_AUTOIT :=$(call as-option,-Wa$(comma)-mimplicit-it=always,-Wa$(comma)-mauto-it)
|
||||
AFLAGS_NOWARN :=$(call as-option,-Wa$(comma)-mno-warn-deprecated,-Wa$(comma)-W)
|
||||
CFLAGS_THUMB2 :=-mthumb $(AFLAGS_AUTOIT) $(AFLAGS_NOWARN)
|
||||
AFLAGS_THUMB2 :=$(CFLAGS_THUMB2) -Wa$(comma)-mthumb
|
||||
|
@ -146,6 +146,7 @@ machine-$(CONFIG_ARCH_MX1) := mx1
|
|||
machine-$(CONFIG_ARCH_MX2) := mx2
|
||||
machine-$(CONFIG_ARCH_MX25) := mx25
|
||||
machine-$(CONFIG_ARCH_MX3) := mx3
|
||||
machine-$(CONFIG_ARCH_MXC91231) := mxc91231
|
||||
machine-$(CONFIG_ARCH_NETX) := netx
|
||||
machine-$(CONFIG_ARCH_NOMADIK) := nomadik
|
||||
machine-$(CONFIG_ARCH_NS9XXX) := ns9xxx
|
||||
|
@ -171,12 +172,12 @@ machine-$(CONFIG_ARCH_U8500) := ux500
|
|||
machine-$(CONFIG_ARCH_VERSATILE) := versatile
|
||||
machine-$(CONFIG_ARCH_W90X900) := w90x900
|
||||
machine-$(CONFIG_FOOTBRIDGE) := footbridge
|
||||
machine-$(CONFIG_ARCH_MXC91231) := mxc91231
|
||||
|
||||
# Platform directory name. This list is sorted alphanumerically
|
||||
# by CONFIG_* macro name.
|
||||
plat-$(CONFIG_ARCH_MXC) := mxc
|
||||
plat-$(CONFIG_ARCH_OMAP) := omap
|
||||
plat-$(CONFIG_ARCH_STMP3XXX) := stmp3xxx
|
||||
plat-$(CONFIG_PLAT_IOP) := iop
|
||||
plat-$(CONFIG_PLAT_NOMADIK) := nomadik
|
||||
plat-$(CONFIG_PLAT_ORION) := orion
|
||||
|
@ -184,7 +185,6 @@ plat-$(CONFIG_PLAT_PXA) := pxa
|
|||
plat-$(CONFIG_PLAT_S3C24XX) := s3c24xx s3c samsung
|
||||
plat-$(CONFIG_PLAT_S3C64XX) := s3c64xx s3c samsung
|
||||
plat-$(CONFIG_PLAT_S5PC1XX) := s5pc1xx s3c samsung
|
||||
plat-$(CONFIG_ARCH_STMP3XXX) := stmp3xxx
|
||||
|
||||
ifeq ($(CONFIG_ARCH_EBSA110),y)
|
||||
# This is what happens if you forget the IOCS16 line.
|
||||
|
|
|
@ -27,6 +27,14 @@
|
|||
.macro writeb, ch, rb
|
||||
mcr p14, 0, \ch, c0, c5, 0
|
||||
.endm
|
||||
#elif defined(CONFIG_CPU_V7)
|
||||
.macro loadsp, rb
|
||||
.endm
|
||||
.macro writeb, ch, rb
|
||||
wait: mrc p14, 0, pc, c0, c1, 0
|
||||
bcs wait
|
||||
mcr p14, 0, \ch, c0, c5, 0
|
||||
.endm
|
||||
#elif defined(CONFIG_CPU_XSCALE)
|
||||
.macro loadsp, rb
|
||||
.endm
|
||||
|
|
|
@ -53,6 +53,18 @@ static void icedcc_putc(int ch)
|
|||
|
||||
asm("mcr p14, 0, %0, c0, c5, 0" : : "r" (ch));
|
||||
}
|
||||
|
||||
#elif defined(CONFIG_CPU_V7)
|
||||
|
||||
static void icedcc_putc(int ch)
|
||||
{
|
||||
asm(
|
||||
"wait: mrc p14, 0, pc, c0, c1, 0 \n\
|
||||
bcs wait \n\
|
||||
mcr p14, 0, %0, c0, c5, 0 "
|
||||
: : "r" (ch));
|
||||
}
|
||||
|
||||
#elif defined(CONFIG_CPU_XSCALE)
|
||||
|
||||
static void icedcc_putc(int ch)
|
||||
|
@ -88,7 +100,6 @@ static void icedcc_putc(int ch)
|
|||
#endif
|
||||
|
||||
#define putc(ch) icedcc_putc(ch)
|
||||
#define flush() do { } while (0)
|
||||
#endif
|
||||
|
||||
static void putstr(const char *ptr)
|
||||
|
|
|
@ -42,7 +42,8 @@
|
|||
#endif
|
||||
|
||||
#if defined(CONFIG_CPU_ARM920T) || defined(CONFIG_CPU_ARM922T) || \
|
||||
defined(CONFIG_CPU_ARM925T) || defined(CONFIG_CPU_ARM1020)
|
||||
defined(CONFIG_CPU_ARM925T) || defined(CONFIG_CPU_ARM1020) || \
|
||||
defined(CONFIG_CPU_ARM1026)
|
||||
# define MULTI_CACHE 1
|
||||
#endif
|
||||
|
||||
|
@ -154,16 +155,16 @@
|
|||
* Please note that the implementation of these, and the required
|
||||
* effects are cache-type (VIVT/VIPT/PIPT) specific.
|
||||
*
|
||||
* flush_cache_kern_all()
|
||||
* flush_kern_all()
|
||||
*
|
||||
* Unconditionally clean and invalidate the entire cache.
|
||||
*
|
||||
* flush_cache_user_mm(mm)
|
||||
* flush_user_all()
|
||||
*
|
||||
* Clean and invalidate all user space cache entries
|
||||
* before a change of page tables.
|
||||
*
|
||||
* flush_cache_user_range(start, end, flags)
|
||||
* flush_user_range(start, end, flags)
|
||||
*
|
||||
* Clean and invalidate a range of cache entries in the
|
||||
* specified address space before a change of page tables.
|
||||
|
@ -179,6 +180,20 @@
|
|||
* - start - virtual start address
|
||||
* - end - virtual end address
|
||||
*
|
||||
* coherent_user_range(start, end)
|
||||
*
|
||||
* Ensure coherency between the Icache and the Dcache in the
|
||||
* region described by start, end. If you have non-snooping
|
||||
* Harvard caches, you need to implement this function.
|
||||
* - start - virtual start address
|
||||
* - end - virtual end address
|
||||
*
|
||||
* flush_kern_dcache_area(kaddr, size)
|
||||
*
|
||||
* Ensure that the data held in page is written back.
|
||||
* - kaddr - page address
|
||||
* - size - region size
|
||||
*
|
||||
* DMA Cache Coherency
|
||||
* ===================
|
||||
*
|
||||
|
|
|
@ -49,6 +49,26 @@
|
|||
1002:
|
||||
.endm
|
||||
|
||||
#elif defined(CONFIG_CPU_V7)
|
||||
|
||||
.macro addruart, rx
|
||||
.endm
|
||||
|
||||
.macro senduart, rd, rx
|
||||
mcr p14, 0, \rd, c0, c5, 0
|
||||
.endm
|
||||
|
||||
.macro busyuart, rd, rx
|
||||
busy: mrc p14, 0, pc, c0, c1, 0
|
||||
bcs busy
|
||||
.endm
|
||||
|
||||
.macro waituart, rd, rx
|
||||
wait: mrc p14, 0, pc, c0, c1, 0
|
||||
bcs wait
|
||||
|
||||
.endm
|
||||
|
||||
#elif defined(CONFIG_CPU_XSCALE)
|
||||
|
||||
.macro addruart, rx
|
||||
|
|
|
@ -78,15 +78,6 @@ int arm_elf_read_implies_exec(const struct elf32_hdr *x, int executable_stack)
|
|||
return 1;
|
||||
if (cpu_architecture() < CPU_ARCH_ARMv6)
|
||||
return 1;
|
||||
#if !defined(CONFIG_AEABI) || defined(CONFIG_OABI_COMPAT)
|
||||
/*
|
||||
* If we have support for OABI programs, we can never allow NX
|
||||
* support - our signal syscall restart mechanism relies upon
|
||||
* being able to execute code placed on the user stack.
|
||||
*/
|
||||
return 1;
|
||||
#else
|
||||
return 0;
|
||||
#endif
|
||||
}
|
||||
EXPORT_SYMBOL(arm_elf_read_implies_exec);
|
||||
|
|
|
@ -102,6 +102,7 @@ struct cpu_cache_fns cpu_cache;
|
|||
#endif
|
||||
#ifdef CONFIG_OUTER_CACHE
|
||||
struct outer_cache_fns outer_cache;
|
||||
EXPORT_SYMBOL(outer_cache);
|
||||
#endif
|
||||
|
||||
struct stack {
|
||||
|
|
|
@ -29,6 +29,7 @@ enum davinci_matrix_types {
|
|||
};
|
||||
|
||||
struct davinci_ks_platform_data {
|
||||
int (*device_enable)(struct device *dev);
|
||||
unsigned short *keymap;
|
||||
u32 keymapsize;
|
||||
u8 rep:1;
|
||||
|
|
|
@ -86,7 +86,7 @@ static int gpio_set_irq_type(unsigned int irq, unsigned int type)
|
|||
unsigned int reg_both, reg_level, reg_type;
|
||||
|
||||
reg_type = __raw_readl(base + GPIO_INT_TYPE);
|
||||
reg_level = __raw_readl(base + GPIO_INT_BOTH_EDGE);
|
||||
reg_level = __raw_readl(base + GPIO_INT_LEVEL);
|
||||
reg_both = __raw_readl(base + GPIO_INT_BOTH_EDGE);
|
||||
|
||||
switch (type) {
|
||||
|
@ -117,7 +117,7 @@ static int gpio_set_irq_type(unsigned int irq, unsigned int type)
|
|||
}
|
||||
|
||||
__raw_writel(reg_type, base + GPIO_INT_TYPE);
|
||||
__raw_writel(reg_level, base + GPIO_INT_BOTH_EDGE);
|
||||
__raw_writel(reg_level, base + GPIO_INT_LEVEL);
|
||||
__raw_writel(reg_both, base + GPIO_INT_BOTH_EDGE);
|
||||
|
||||
gpio_ack_irq(irq);
|
||||
|
|
|
@ -30,7 +30,9 @@ static inline void putc(char c)
|
|||
UART[UART_TX] = c;
|
||||
}
|
||||
|
||||
#define flush() do { } while (0)
|
||||
static inline void flush(void)
|
||||
{
|
||||
}
|
||||
|
||||
/*
|
||||
* nothing to do
|
||||
|
|
|
@ -13,6 +13,7 @@
|
|||
#include <linux/platform_device.h>
|
||||
#include <linux/ata_platform.h>
|
||||
#include <linux/mv643xx_eth.h>
|
||||
#include <linux/gpio.h>
|
||||
#include <linux/spi/flash.h>
|
||||
#include <linux/spi/spi.h>
|
||||
#include <linux/spi/orion_spi.h>
|
||||
|
@ -53,6 +54,11 @@ static void __init rd88f6192_init(void)
|
|||
*/
|
||||
kirkwood_init();
|
||||
|
||||
orion_gpio_set_valid(RD88F6192_GPIO_USB_VBUS, 1);
|
||||
if (gpio_request(RD88F6192_GPIO_USB_VBUS, "USB VBUS") != 0 ||
|
||||
gpio_direction_output(RD88F6192_GPIO_USB_VBUS, 1) != 0)
|
||||
pr_err("RD-88F6192-NAS: failed to setup USB VBUS GPIO\n");
|
||||
|
||||
kirkwood_ehci_init();
|
||||
kirkwood_ge00_init(&rd88f6192_ge00_data);
|
||||
kirkwood_sata_init(&rd88f6192_sata_data);
|
||||
|
|
|
@ -119,6 +119,11 @@ static unsigned long get_rate_nfc(struct clk *clk)
|
|||
return get_rate_per(8);
|
||||
}
|
||||
|
||||
static unsigned long get_rate_gpt(struct clk *clk)
|
||||
{
|
||||
return get_rate_per(5);
|
||||
}
|
||||
|
||||
static unsigned long get_rate_otg(struct clk *clk)
|
||||
{
|
||||
return 48000000; /* FIXME */
|
||||
|
@ -144,7 +149,7 @@ static void clk_cgcr_disable(struct clk *clk)
|
|||
__raw_writel(reg, clk->enable_reg);
|
||||
}
|
||||
|
||||
#define DEFINE_CLOCK(name, i, er, es, gr, sr) \
|
||||
#define DEFINE_CLOCK(name, i, er, es, gr, sr, s) \
|
||||
static struct clk name = { \
|
||||
.id = i, \
|
||||
.enable_reg = CRM_BASE + er, \
|
||||
|
@ -153,27 +158,30 @@ static void clk_cgcr_disable(struct clk *clk)
|
|||
.set_rate = sr, \
|
||||
.enable = clk_cgcr_enable, \
|
||||
.disable = clk_cgcr_disable, \
|
||||
.secondary = s, \
|
||||
}
|
||||
|
||||
DEFINE_CLOCK(gpt_clk, 0, CCM_CGCR0, 5, get_rate_ipg, NULL);
|
||||
DEFINE_CLOCK(cspi1_clk, 0, CCM_CGCR1, 5, get_rate_ipg, NULL);
|
||||
DEFINE_CLOCK(cspi2_clk, 0, CCM_CGCR1, 6, get_rate_ipg, NULL);
|
||||
DEFINE_CLOCK(cspi3_clk, 0, CCM_CGCR1, 7, get_rate_ipg, NULL);
|
||||
DEFINE_CLOCK(uart1_clk, 0, CCM_CGCR2, 14, get_rate_uart, NULL);
|
||||
DEFINE_CLOCK(uart2_clk, 0, CCM_CGCR2, 15, get_rate_uart, NULL);
|
||||
DEFINE_CLOCK(uart3_clk, 0, CCM_CGCR2, 16, get_rate_uart, NULL);
|
||||
DEFINE_CLOCK(uart4_clk, 0, CCM_CGCR2, 17, get_rate_uart, NULL);
|
||||
DEFINE_CLOCK(uart5_clk, 0, CCM_CGCR2, 18, get_rate_uart, NULL);
|
||||
DEFINE_CLOCK(nfc_clk, 0, CCM_CGCR0, 8, get_rate_nfc, NULL);
|
||||
DEFINE_CLOCK(usbotg_clk, 0, CCM_CGCR0, 28, get_rate_otg, NULL);
|
||||
DEFINE_CLOCK(pwm1_clk, 0, CCM_CGCR1, 31, get_rate_ipg, NULL);
|
||||
DEFINE_CLOCK(pwm2_clk, 0, CCM_CGCR2, 0, get_rate_ipg, NULL);
|
||||
DEFINE_CLOCK(pwm3_clk, 0, CCM_CGCR2, 1, get_rate_ipg, NULL);
|
||||
DEFINE_CLOCK(pwm4_clk, 0, CCM_CGCR2, 2, get_rate_ipg, NULL);
|
||||
DEFINE_CLOCK(kpp_clk, 0, CCM_CGCR1, 28, get_rate_ipg, NULL);
|
||||
DEFINE_CLOCK(tsc_clk, 0, CCM_CGCR2, 13, get_rate_ipg, NULL);
|
||||
DEFINE_CLOCK(i2c_clk, 0, CCM_CGCR0, 6, get_rate_i2c, NULL);
|
||||
DEFINE_CLOCK(fec_clk, 0, CCM_CGCR0, 23, get_rate_ipg, NULL);
|
||||
DEFINE_CLOCK(gpt_clk, 0, CCM_CGCR0, 5, get_rate_gpt, NULL, NULL);
|
||||
DEFINE_CLOCK(uart_per_clk, 0, CCM_CGCR0, 15, get_rate_uart, NULL, NULL);
|
||||
DEFINE_CLOCK(cspi1_clk, 0, CCM_CGCR1, 5, get_rate_ipg, NULL, NULL);
|
||||
DEFINE_CLOCK(cspi2_clk, 0, CCM_CGCR1, 6, get_rate_ipg, NULL, NULL);
|
||||
DEFINE_CLOCK(cspi3_clk, 0, CCM_CGCR1, 7, get_rate_ipg, NULL, NULL);
|
||||
DEFINE_CLOCK(fec_ahb_clk, 0, CCM_CGCR0, 23, NULL, NULL, NULL);
|
||||
DEFINE_CLOCK(uart1_clk, 0, CCM_CGCR2, 14, get_rate_uart, NULL, &uart_per_clk);
|
||||
DEFINE_CLOCK(uart2_clk, 0, CCM_CGCR2, 15, get_rate_uart, NULL, &uart_per_clk);
|
||||
DEFINE_CLOCK(uart3_clk, 0, CCM_CGCR2, 16, get_rate_uart, NULL, &uart_per_clk);
|
||||
DEFINE_CLOCK(uart4_clk, 0, CCM_CGCR2, 17, get_rate_uart, NULL, &uart_per_clk);
|
||||
DEFINE_CLOCK(uart5_clk, 0, CCM_CGCR2, 18, get_rate_uart, NULL, &uart_per_clk);
|
||||
DEFINE_CLOCK(nfc_clk, 0, CCM_CGCR0, 8, get_rate_nfc, NULL, NULL);
|
||||
DEFINE_CLOCK(usbotg_clk, 0, CCM_CGCR0, 28, get_rate_otg, NULL, NULL);
|
||||
DEFINE_CLOCK(pwm1_clk, 0, CCM_CGCR1, 31, get_rate_ipg, NULL, NULL);
|
||||
DEFINE_CLOCK(pwm2_clk, 0, CCM_CGCR2, 0, get_rate_ipg, NULL, NULL);
|
||||
DEFINE_CLOCK(pwm3_clk, 0, CCM_CGCR2, 1, get_rate_ipg, NULL, NULL);
|
||||
DEFINE_CLOCK(pwm4_clk, 0, CCM_CGCR2, 2, get_rate_ipg, NULL, NULL);
|
||||
DEFINE_CLOCK(kpp_clk, 0, CCM_CGCR1, 28, get_rate_ipg, NULL, NULL);
|
||||
DEFINE_CLOCK(tsc_clk, 0, CCM_CGCR2, 13, get_rate_ipg, NULL, NULL);
|
||||
DEFINE_CLOCK(i2c_clk, 0, CCM_CGCR0, 6, get_rate_i2c, NULL, NULL);
|
||||
DEFINE_CLOCK(fec_clk, 0, CCM_CGCR1, 15, get_rate_ipg, NULL, &fec_ahb_clk);
|
||||
|
||||
#define _REGISTER_CLOCK(d, n, c) \
|
||||
{ \
|
||||
|
@ -208,13 +216,21 @@ static struct clk_lookup lookups[] = {
|
|||
_REGISTER_CLOCK("fec.0", NULL, fec_clk)
|
||||
};
|
||||
|
||||
int __init mx25_clocks_init(unsigned long fref)
|
||||
int __init mx25_clocks_init(void)
|
||||
{
|
||||
int i;
|
||||
|
||||
for (i = 0; i < ARRAY_SIZE(lookups); i++)
|
||||
clkdev_add(&lookups[i]);
|
||||
|
||||
/* Turn off all clocks except the ones we need to survive, namely:
|
||||
* EMI, GPIO1-3 (CCM_CGCR1[18:16]), GPT1, IOMUXC (CCM_CGCR1[27]), IIM,
|
||||
* SCC
|
||||
*/
|
||||
__raw_writel((1 << 19), CRM_BASE + CCM_CGCR0);
|
||||
__raw_writel((0xf << 16) | (3 << 26), CRM_BASE + CCM_CGCR1);
|
||||
__raw_writel((1 << 5), CRM_BASE + CCM_CGCR2);
|
||||
|
||||
mxc_timer_init(&gpt_clk, MX25_IO_ADDRESS(MX25_GPT1_BASE_ADDR), 54);
|
||||
|
||||
return 0;
|
||||
|
|
|
@ -91,7 +91,7 @@ static void __init mx25pdk_init(void)
|
|||
|
||||
static void __init mx25pdk_timer_init(void)
|
||||
{
|
||||
mx25_clocks_init(26000000);
|
||||
mx25_clocks_init();
|
||||
}
|
||||
|
||||
static struct sys_timer mx25pdk_timer = {
|
||||
|
|
|
@ -173,6 +173,7 @@ static void expio_unmask_irq(u32 irq)
|
|||
}
|
||||
|
||||
static struct irq_chip expio_irq_chip = {
|
||||
.name = "EXPIO(CPLD)",
|
||||
.ack = expio_ack_irq,
|
||||
.mask = expio_mask_irq,
|
||||
.unmask = expio_unmask_irq,
|
||||
|
@ -302,6 +303,7 @@ static struct regulator_init_data ldo1_data = {
|
|||
.min_uV = 2800000,
|
||||
.max_uV = 2800000,
|
||||
.valid_modes_mask = REGULATOR_MODE_NORMAL,
|
||||
.valid_ops_mask = REGULATOR_CHANGE_STATUS,
|
||||
.apply_uV = 1,
|
||||
},
|
||||
};
|
||||
|
@ -322,6 +324,7 @@ static struct regulator_init_data ldo2_data = {
|
|||
.min_uV = 3300000,
|
||||
.max_uV = 3300000,
|
||||
.valid_modes_mask = REGULATOR_MODE_NORMAL,
|
||||
.valid_ops_mask = REGULATOR_CHANGE_STATUS,
|
||||
.apply_uV = 1,
|
||||
},
|
||||
.num_consumer_supplies = ARRAY_SIZE(ldo2_consumers),
|
||||
|
@ -459,6 +462,7 @@ static int mx31_wm8350_init(struct wm8350 *wm8350)
|
|||
|
||||
static struct wm8350_platform_data __initdata mx31_wm8350_pdata = {
|
||||
.init = mx31_wm8350_init,
|
||||
.irq_base = MXC_BOARD_IRQ_START + MXC_MAX_EXP_IO_LINES,
|
||||
};
|
||||
#endif
|
||||
|
||||
|
|
|
@ -214,8 +214,8 @@ int omap1_select_table_rate(struct clk *clk, unsigned long rate)
|
|||
struct mpu_rate * ptr;
|
||||
unsigned long dpll1_rate, ref_rate;
|
||||
|
||||
dpll1_rate = clk_get_rate(ck_dpll1_p);
|
||||
ref_rate = clk_get_rate(ck_ref_p);
|
||||
dpll1_rate = ck_dpll1_p->rate;
|
||||
ref_rate = ck_ref_p->rate;
|
||||
|
||||
for (ptr = omap1_rate_table; ptr->rate; ptr++) {
|
||||
if (ptr->xtal != ref_rate)
|
||||
|
@ -306,7 +306,7 @@ long omap1_round_to_table_rate(struct clk *clk, unsigned long rate)
|
|||
long highest_rate;
|
||||
unsigned long ref_rate;
|
||||
|
||||
ref_rate = clk_get_rate(ck_ref_p);
|
||||
ref_rate = ck_ref_p->rate;
|
||||
|
||||
highest_rate = -EINVAL;
|
||||
|
||||
|
|
|
@ -671,7 +671,6 @@ static struct clk dpll4_m3x2_ck = {
|
|||
.name = "dpll4_m3x2_ck",
|
||||
.ops = &clkops_omap2_dflt_wait,
|
||||
.parent = &dpll4_m3_ck,
|
||||
.init = &omap2_init_clksel_parent,
|
||||
.enable_reg = OMAP_CM_REGADDR(PLL_MOD, CM_CLKEN),
|
||||
.enable_bit = OMAP3430_PWRDN_TV_SHIFT,
|
||||
.flags = INVERT_ENABLE,
|
||||
|
@ -811,7 +810,6 @@ static struct clk dpll4_m6x2_ck = {
|
|||
.name = "dpll4_m6x2_ck",
|
||||
.ops = &clkops_omap2_dflt_wait,
|
||||
.parent = &dpll4_m6_ck,
|
||||
.init = &omap2_init_clksel_parent,
|
||||
.enable_reg = OMAP_CM_REGADDR(PLL_MOD, CM_CLKEN),
|
||||
.enable_bit = OMAP3430_PWRDN_EMU_PERIPH_SHIFT,
|
||||
.flags = INVERT_ENABLE,
|
||||
|
@ -1047,7 +1045,6 @@ static struct clk iva2_ck = {
|
|||
.name = "iva2_ck",
|
||||
.ops = &clkops_omap2_dflt_wait,
|
||||
.parent = &dpll2_m2_ck,
|
||||
.init = &omap2_init_clksel_parent,
|
||||
.enable_reg = OMAP_CM_REGADDR(OMAP3430_IVA2_MOD, CM_FCLKEN),
|
||||
.enable_bit = OMAP3430_CM_FCLKEN_IVA2_EN_IVA2_SHIFT,
|
||||
.clkdm_name = "iva2_clkdm",
|
||||
|
@ -1121,7 +1118,6 @@ static struct clk gfx_l3_ck = {
|
|||
.name = "gfx_l3_ck",
|
||||
.ops = &clkops_omap2_dflt_wait,
|
||||
.parent = &l3_ick,
|
||||
.init = &omap2_init_clksel_parent,
|
||||
.enable_reg = OMAP_CM_REGADDR(GFX_MOD, CM_ICLKEN),
|
||||
.enable_bit = OMAP_EN_GFX_SHIFT,
|
||||
.recalc = &followparent_recalc,
|
||||
|
|
|
@ -346,37 +346,37 @@ static struct clk aess_fclk = {
|
|||
};
|
||||
|
||||
static const struct clksel_rate div31_1to31_rates[] = {
|
||||
{ .div = 1, .val = 0, .flags = RATE_IN_4430 },
|
||||
{ .div = 2, .val = 1, .flags = RATE_IN_4430 },
|
||||
{ .div = 3, .val = 2, .flags = RATE_IN_4430 },
|
||||
{ .div = 4, .val = 3, .flags = RATE_IN_4430 },
|
||||
{ .div = 5, .val = 4, .flags = RATE_IN_4430 },
|
||||
{ .div = 6, .val = 5, .flags = RATE_IN_4430 },
|
||||
{ .div = 7, .val = 6, .flags = RATE_IN_4430 },
|
||||
{ .div = 8, .val = 7, .flags = RATE_IN_4430 },
|
||||
{ .div = 9, .val = 8, .flags = RATE_IN_4430 },
|
||||
{ .div = 10, .val = 9, .flags = RATE_IN_4430 },
|
||||
{ .div = 11, .val = 10, .flags = RATE_IN_4430 },
|
||||
{ .div = 12, .val = 11, .flags = RATE_IN_4430 },
|
||||
{ .div = 13, .val = 12, .flags = RATE_IN_4430 },
|
||||
{ .div = 14, .val = 13, .flags = RATE_IN_4430 },
|
||||
{ .div = 15, .val = 14, .flags = RATE_IN_4430 },
|
||||
{ .div = 16, .val = 15, .flags = RATE_IN_4430 },
|
||||
{ .div = 17, .val = 16, .flags = RATE_IN_4430 },
|
||||
{ .div = 18, .val = 17, .flags = RATE_IN_4430 },
|
||||
{ .div = 19, .val = 18, .flags = RATE_IN_4430 },
|
||||
{ .div = 20, .val = 19, .flags = RATE_IN_4430 },
|
||||
{ .div = 21, .val = 20, .flags = RATE_IN_4430 },
|
||||
{ .div = 22, .val = 21, .flags = RATE_IN_4430 },
|
||||
{ .div = 23, .val = 22, .flags = RATE_IN_4430 },
|
||||
{ .div = 24, .val = 23, .flags = RATE_IN_4430 },
|
||||
{ .div = 25, .val = 24, .flags = RATE_IN_4430 },
|
||||
{ .div = 26, .val = 25, .flags = RATE_IN_4430 },
|
||||
{ .div = 27, .val = 26, .flags = RATE_IN_4430 },
|
||||
{ .div = 28, .val = 27, .flags = RATE_IN_4430 },
|
||||
{ .div = 29, .val = 28, .flags = RATE_IN_4430 },
|
||||
{ .div = 30, .val = 29, .flags = RATE_IN_4430 },
|
||||
{ .div = 31, .val = 30, .flags = RATE_IN_4430 },
|
||||
{ .div = 1, .val = 1, .flags = RATE_IN_4430 },
|
||||
{ .div = 2, .val = 2, .flags = RATE_IN_4430 },
|
||||
{ .div = 3, .val = 3, .flags = RATE_IN_4430 },
|
||||
{ .div = 4, .val = 4, .flags = RATE_IN_4430 },
|
||||
{ .div = 5, .val = 5, .flags = RATE_IN_4430 },
|
||||
{ .div = 6, .val = 6, .flags = RATE_IN_4430 },
|
||||
{ .div = 7, .val = 7, .flags = RATE_IN_4430 },
|
||||
{ .div = 8, .val = 8, .flags = RATE_IN_4430 },
|
||||
{ .div = 9, .val = 9, .flags = RATE_IN_4430 },
|
||||
{ .div = 10, .val = 10, .flags = RATE_IN_4430 },
|
||||
{ .div = 11, .val = 11, .flags = RATE_IN_4430 },
|
||||
{ .div = 12, .val = 12, .flags = RATE_IN_4430 },
|
||||
{ .div = 13, .val = 13, .flags = RATE_IN_4430 },
|
||||
{ .div = 14, .val = 14, .flags = RATE_IN_4430 },
|
||||
{ .div = 15, .val = 15, .flags = RATE_IN_4430 },
|
||||
{ .div = 16, .val = 16, .flags = RATE_IN_4430 },
|
||||
{ .div = 17, .val = 17, .flags = RATE_IN_4430 },
|
||||
{ .div = 18, .val = 18, .flags = RATE_IN_4430 },
|
||||
{ .div = 19, .val = 19, .flags = RATE_IN_4430 },
|
||||
{ .div = 20, .val = 20, .flags = RATE_IN_4430 },
|
||||
{ .div = 21, .val = 21, .flags = RATE_IN_4430 },
|
||||
{ .div = 22, .val = 22, .flags = RATE_IN_4430 },
|
||||
{ .div = 23, .val = 23, .flags = RATE_IN_4430 },
|
||||
{ .div = 24, .val = 24, .flags = RATE_IN_4430 },
|
||||
{ .div = 25, .val = 25, .flags = RATE_IN_4430 },
|
||||
{ .div = 26, .val = 26, .flags = RATE_IN_4430 },
|
||||
{ .div = 27, .val = 27, .flags = RATE_IN_4430 },
|
||||
{ .div = 28, .val = 28, .flags = RATE_IN_4430 },
|
||||
{ .div = 29, .val = 29, .flags = RATE_IN_4430 },
|
||||
{ .div = 30, .val = 30, .flags = RATE_IN_4430 },
|
||||
{ .div = 31, .val = 31, .flags = RATE_IN_4430 },
|
||||
{ .div = 0 },
|
||||
};
|
||||
|
||||
|
|
|
@ -137,7 +137,7 @@ static int omap3_enter_idle(struct cpuidle_device *dev,
|
|||
local_irq_enable();
|
||||
local_fiq_enable();
|
||||
|
||||
return (u32)timespec_to_ns(&ts_idle)/1000;
|
||||
return ts_idle.tv_nsec / NSEC_PER_USEC + ts_idle.tv_sec * USEC_PER_SEC;
|
||||
}
|
||||
|
||||
/**
|
||||
|
|
|
@ -505,7 +505,7 @@ static void __init gpmc_mem_init(void)
|
|||
void __init gpmc_init(void)
|
||||
{
|
||||
u32 l;
|
||||
char *ck;
|
||||
char *ck = NULL;
|
||||
|
||||
if (cpu_is_omap24xx()) {
|
||||
ck = "core_l3_ck";
|
||||
|
@ -521,6 +521,9 @@ void __init gpmc_init(void)
|
|||
l = OMAP44XX_GPMC_BASE;
|
||||
}
|
||||
|
||||
if (WARN_ON(!ck))
|
||||
return;
|
||||
|
||||
gpmc_l3_clk = clk_get(NULL, ck);
|
||||
if (IS_ERR(gpmc_l3_clk)) {
|
||||
printk(KERN_ERR "Could not get GPMC clock %s\n", ck);
|
||||
|
@ -534,6 +537,8 @@ void __init gpmc_init(void)
|
|||
BUG();
|
||||
}
|
||||
|
||||
clk_enable(gpmc_l3_clk);
|
||||
|
||||
l = gpmc_read_reg(GPMC_REVISION);
|
||||
printk(KERN_INFO "GPMC revision %d.%d\n", (l >> 4) & 0x0f, l & 0x0f);
|
||||
/* Set smart idle mode and automatic L3 clock gating */
|
||||
|
|
|
@ -188,6 +188,8 @@ void __init omap3_check_revision(void)
|
|||
u16 hawkeye;
|
||||
u8 rev;
|
||||
|
||||
omap_chip.oc = CHIP_IS_OMAP3430;
|
||||
|
||||
/*
|
||||
* We cannot access revision registers on ES1.0.
|
||||
* If the processor type is Cortex-A8 and the revision is 0x0
|
||||
|
@ -196,6 +198,7 @@ void __init omap3_check_revision(void)
|
|||
cpuid = read_cpuid(CPUID_ID);
|
||||
if ((((cpuid >> 4) & 0xfff) == 0xc08) && ((cpuid & 0xf) == 0x0)) {
|
||||
omap_revision = OMAP3430_REV_ES1_0;
|
||||
omap_chip.oc |= CHIP_IS_OMAP3430ES1;
|
||||
return;
|
||||
}
|
||||
|
||||
|
@ -216,18 +219,28 @@ void __init omap3_check_revision(void)
|
|||
case 0: /* Take care of early samples */
|
||||
case 1:
|
||||
omap_revision = OMAP3430_REV_ES2_0;
|
||||
omap_chip.oc |= CHIP_IS_OMAP3430ES2;
|
||||
break;
|
||||
case 2:
|
||||
omap_revision = OMAP3430_REV_ES2_1;
|
||||
omap_chip.oc |= CHIP_IS_OMAP3430ES2;
|
||||
break;
|
||||
case 3:
|
||||
omap_revision = OMAP3430_REV_ES3_0;
|
||||
omap_chip.oc |= CHIP_IS_OMAP3430ES3_0;
|
||||
break;
|
||||
case 4:
|
||||
omap_revision = OMAP3430_REV_ES3_1;
|
||||
omap_chip.oc |= CHIP_IS_OMAP3430ES3_1;
|
||||
break;
|
||||
case 7:
|
||||
/* FALLTHROUGH */
|
||||
default:
|
||||
/* Use the latest known revision as default */
|
||||
omap_revision = OMAP3430_REV_ES3_1;
|
||||
omap_revision = OMAP3430_REV_ES3_1_2;
|
||||
|
||||
/* REVISIT: Add CHIP_IS_OMAP3430ES3_1_2? */
|
||||
omap_chip.oc |= CHIP_IS_OMAP3430ES3_1;
|
||||
}
|
||||
break;
|
||||
case 0xb868:
|
||||
|
@ -235,14 +248,18 @@ void __init omap3_check_revision(void)
|
|||
*
|
||||
* Set the device to be OMAP3505 here. Actual device
|
||||
* is identified later based on the features.
|
||||
*
|
||||
* REVISIT: AM3505/AM3517 should have their own CHIP_IS
|
||||
*/
|
||||
omap_revision = OMAP3505_REV(rev);
|
||||
omap_chip.oc |= CHIP_IS_OMAP3430ES3_1;
|
||||
break;
|
||||
case 0xb891:
|
||||
/* FALLTHROUGH */
|
||||
default:
|
||||
/* Unknown default to latest silicon rev as default*/
|
||||
omap_revision = OMAP3630_REV_ES1_0;
|
||||
omap_chip.oc |= CHIP_IS_OMAP3630ES1;
|
||||
}
|
||||
}
|
||||
|
||||
|
@ -360,6 +377,7 @@ void __init omap2_check_revision(void)
|
|||
omap3_check_revision();
|
||||
omap3_check_features();
|
||||
omap3_cpuinfo();
|
||||
return;
|
||||
} else if (cpu_is_omap44xx()) {
|
||||
omap4_check_revision();
|
||||
return;
|
||||
|
@ -374,27 +392,14 @@ void __init omap2_check_revision(void)
|
|||
if (cpu_is_omap243x()) {
|
||||
/* Currently only supports 2430ES2.1 and 2430-all */
|
||||
omap_chip.oc |= CHIP_IS_OMAP2430;
|
||||
return;
|
||||
} else if (cpu_is_omap242x()) {
|
||||
/* Currently only supports 2420ES2.1.1 and 2420-all */
|
||||
omap_chip.oc |= CHIP_IS_OMAP2420;
|
||||
} else if (cpu_is_omap3505() || cpu_is_omap3517()) {
|
||||
omap_chip.oc = CHIP_IS_OMAP3430 | CHIP_IS_OMAP3430ES3_1;
|
||||
} else if (cpu_is_omap343x()) {
|
||||
omap_chip.oc = CHIP_IS_OMAP3430;
|
||||
if (omap_rev() == OMAP3430_REV_ES1_0)
|
||||
omap_chip.oc |= CHIP_IS_OMAP3430ES1;
|
||||
else if (omap_rev() >= OMAP3430_REV_ES2_0 &&
|
||||
omap_rev() <= OMAP3430_REV_ES2_1)
|
||||
omap_chip.oc |= CHIP_IS_OMAP3430ES2;
|
||||
else if (omap_rev() == OMAP3430_REV_ES3_0)
|
||||
omap_chip.oc |= CHIP_IS_OMAP3430ES3_0;
|
||||
else if (omap_rev() == OMAP3430_REV_ES3_1)
|
||||
omap_chip.oc |= CHIP_IS_OMAP3430ES3_1;
|
||||
else if (omap_rev() == OMAP3630_REV_ES1_0)
|
||||
omap_chip.oc |= CHIP_IS_OMAP3630ES1;
|
||||
} else {
|
||||
pr_err("Uninitialized omap_chip, please fix!\n");
|
||||
return;
|
||||
}
|
||||
|
||||
pr_err("Uninitialized omap_chip, please fix!\n");
|
||||
}
|
||||
|
||||
/*
|
||||
|
|
|
@ -194,7 +194,7 @@ void __init omap_init_irq(void)
|
|||
int i;
|
||||
|
||||
for (i = 0; i < ARRAY_SIZE(irq_banks); i++) {
|
||||
unsigned long base;
|
||||
unsigned long base = 0;
|
||||
struct omap_irq_bank *bank = irq_banks + i;
|
||||
|
||||
if (cpu_is_omap24xx())
|
||||
|
@ -202,6 +202,8 @@ void __init omap_init_irq(void)
|
|||
else if (cpu_is_omap34xx())
|
||||
base = OMAP34XX_IC_BASE;
|
||||
|
||||
BUG_ON(!base);
|
||||
|
||||
/* Static mapping, never released */
|
||||
bank->base_reg = ioremap(base, SZ_4K);
|
||||
if (!bank->base_reg) {
|
||||
|
@ -274,4 +276,22 @@ void omap_intc_restore_context(void)
|
|||
}
|
||||
/* MIRs are saved and restore with other PRCM registers */
|
||||
}
|
||||
|
||||
void omap3_intc_suspend(void)
|
||||
{
|
||||
/* A pending interrupt would prevent OMAP from entering suspend */
|
||||
omap_ack_irq(0);
|
||||
}
|
||||
|
||||
void omap3_intc_prepare_idle(void)
|
||||
{
|
||||
/* Disable autoidle as it can stall interrupt controller */
|
||||
intc_bank_write_reg(0, &irq_banks[0], INTC_SYSCONFIG);
|
||||
}
|
||||
|
||||
void omap3_intc_resume_idle(void)
|
||||
{
|
||||
/* Re-enable autoidle */
|
||||
intc_bank_write_reg(1, &irq_banks[0], INTC_SYSCONFIG);
|
||||
}
|
||||
#endif /* CONFIG_ARCH_OMAP3 */
|
||||
|
|
|
@ -408,6 +408,7 @@ void __init twl4030_mmc_init(struct twl4030_hsmmc_info *controllers)
|
|||
{
|
||||
struct twl4030_hsmmc_info *c;
|
||||
int nr_hsmmc = ARRAY_SIZE(hsmmc_data);
|
||||
int i;
|
||||
|
||||
if (cpu_is_omap2430()) {
|
||||
control_pbias_offset = OMAP243X_CONTROL_PBIAS_LITE;
|
||||
|
@ -434,7 +435,7 @@ void __init twl4030_mmc_init(struct twl4030_hsmmc_info *controllers)
|
|||
mmc = kzalloc(sizeof(struct omap_mmc_platform_data), GFP_KERNEL);
|
||||
if (!mmc) {
|
||||
pr_err("Cannot allocate memory for mmc device!\n");
|
||||
return;
|
||||
goto done;
|
||||
}
|
||||
|
||||
if (c->name)
|
||||
|
@ -532,6 +533,10 @@ void __init twl4030_mmc_init(struct twl4030_hsmmc_info *controllers)
|
|||
continue;
|
||||
c->dev = mmc->dev;
|
||||
}
|
||||
|
||||
done:
|
||||
for (i = 0; i < nr_hsmmc; i++)
|
||||
kfree(hsmmc_data[i]);
|
||||
}
|
||||
|
||||
#endif
|
||||
|
|
|
@ -51,7 +51,7 @@ struct omap_mux_entry {
|
|||
static unsigned long mux_phys;
|
||||
static void __iomem *mux_base;
|
||||
|
||||
static inline u16 omap_mux_read(u16 reg)
|
||||
u16 omap_mux_read(u16 reg)
|
||||
{
|
||||
if (cpu_is_omap24xx())
|
||||
return __raw_readb(mux_base + reg);
|
||||
|
@ -59,7 +59,7 @@ static inline u16 omap_mux_read(u16 reg)
|
|||
return __raw_readw(mux_base + reg);
|
||||
}
|
||||
|
||||
static inline void omap_mux_write(u16 val, u16 reg)
|
||||
void omap_mux_write(u16 val, u16 reg)
|
||||
{
|
||||
if (cpu_is_omap24xx())
|
||||
__raw_writeb(val, mux_base + reg);
|
||||
|
@ -67,6 +67,14 @@ static inline void omap_mux_write(u16 val, u16 reg)
|
|||
__raw_writew(val, mux_base + reg);
|
||||
}
|
||||
|
||||
void omap_mux_write_array(struct omap_board_mux *board_mux)
|
||||
{
|
||||
while (board_mux->reg_offset != OMAP_MUX_TERMINATOR) {
|
||||
omap_mux_write(board_mux->value, board_mux->reg_offset);
|
||||
board_mux++;
|
||||
}
|
||||
}
|
||||
|
||||
#if defined(CONFIG_ARCH_OMAP24XX) && defined(CONFIG_OMAP_MUX)
|
||||
|
||||
static struct omap_mux_cfg arch_mux_cfg;
|
||||
|
@ -478,7 +486,7 @@ int __init omap_mux_init_signal(char *muxname, int val)
|
|||
static inline void omap_mux_decode(struct seq_file *s, u16 val)
|
||||
{
|
||||
char *flags[OMAP_MUX_MAX_NR_FLAGS];
|
||||
char mode[14];
|
||||
char mode[sizeof("OMAP_MUX_MODE") + 1];
|
||||
int i = -1;
|
||||
|
||||
sprintf(mode, "OMAP_MUX_MODE%d", val & 0x7);
|
||||
|
@ -545,6 +553,7 @@ static int omap_mux_dbg_board_show(struct seq_file *s, void *unused)
|
|||
if (!m0_name)
|
||||
continue;
|
||||
|
||||
/* REVISIT: Needs to be updated if mode0 names get longer */
|
||||
for (i = 0; i < OMAP_MUX_DEFNAME_LEN; i++) {
|
||||
if (m0_name[i] == '\0') {
|
||||
m0_def[i] = m0_name[i];
|
||||
|
@ -833,14 +842,6 @@ static void __init omap_mux_set_cmdline_signals(void)
|
|||
kfree(options);
|
||||
}
|
||||
|
||||
static void __init omap_mux_set_board_signals(struct omap_board_mux *board_mux)
|
||||
{
|
||||
while (board_mux->reg_offset != OMAP_MUX_TERMINATOR) {
|
||||
omap_mux_write(board_mux->value, board_mux->reg_offset);
|
||||
board_mux++;
|
||||
}
|
||||
}
|
||||
|
||||
static int __init omap_mux_copy_names(struct omap_mux *src,
|
||||
struct omap_mux *dst)
|
||||
{
|
||||
|
@ -960,7 +961,12 @@ static void __init omap_mux_init_list(struct omap_mux *superset)
|
|||
while (superset->reg_offset != OMAP_MUX_TERMINATOR) {
|
||||
struct omap_mux *entry;
|
||||
|
||||
#ifndef CONFIG_OMAP_MUX
|
||||
#ifdef CONFIG_OMAP_MUX
|
||||
if (!superset->muxnames || !superset->muxnames[0]) {
|
||||
superset++;
|
||||
continue;
|
||||
}
|
||||
#else
|
||||
/* Skip pins that are not muxed as GPIO by bootloader */
|
||||
if (!OMAP_MODE_GPIO(omap_mux_read(superset->reg_offset))) {
|
||||
superset++;
|
||||
|
@ -998,12 +1004,15 @@ int __init omap_mux_init(u32 mux_pbase, u32 mux_size,
|
|||
omap_mux_package_fixup(package_subset, superset);
|
||||
if (package_balls)
|
||||
omap_mux_package_init_balls(package_balls, superset);
|
||||
omap_mux_set_cmdline_signals();
|
||||
omap_mux_set_board_signals(board_mux);
|
||||
#endif
|
||||
|
||||
omap_mux_init_list(superset);
|
||||
|
||||
#ifdef CONFIG_OMAP_MUX
|
||||
omap_mux_set_cmdline_signals();
|
||||
omap_mux_write_array(board_mux);
|
||||
#endif
|
||||
|
||||
return 0;
|
||||
}
|
||||
|
||||
|
|
|
@ -146,6 +146,30 @@ u16 omap_mux_get_gpio(int gpio);
|
|||
*/
|
||||
void omap_mux_set_gpio(u16 val, int gpio);
|
||||
|
||||
/**
|
||||
* omap_mux_read() - read mux register
|
||||
* @mux_offset: Offset of the mux register
|
||||
*
|
||||
*/
|
||||
u16 omap_mux_read(u16 mux_offset);
|
||||
|
||||
/**
|
||||
* omap_mux_write() - write mux register
|
||||
* @val: New mux register value
|
||||
* @mux_offset: Offset of the mux register
|
||||
*
|
||||
* This should be only needed for dynamic remuxing of non-gpio signals.
|
||||
*/
|
||||
void omap_mux_write(u16 val, u16 mux_offset);
|
||||
|
||||
/**
|
||||
* omap_mux_write_array() - write an array of mux registers
|
||||
* @board_mux: Array of mux registers terminated by MAP_MUX_TERMINATOR
|
||||
*
|
||||
* This should be only needed for dynamic remuxing of non-gpio signals.
|
||||
*/
|
||||
void omap_mux_write_array(struct omap_board_mux *board_mux);
|
||||
|
||||
/**
|
||||
* omap3_mux_init() - initialize mux system with board specific set
|
||||
* @board_mux: Board specific mux table
|
||||
|
|
|
@ -649,6 +649,53 @@ static struct omap_mux __initdata omap3_muxmodes[] = {
|
|||
_OMAP3_MUXENTRY(UART3_TX_IRTX, 166,
|
||||
"uart3_tx_irtx", NULL, NULL, NULL,
|
||||
"gpio_166", NULL, NULL, "safe_mode"),
|
||||
|
||||
/* Only on 3630, see omap36xx_cbp_subset for the signals */
|
||||
_OMAP3_MUXENTRY(GPMC_A11, 0,
|
||||
NULL, NULL, NULL, NULL,
|
||||
NULL, NULL, NULL, NULL),
|
||||
_OMAP3_MUXENTRY(SAD2D_MBUSFLAG, 0,
|
||||
NULL, NULL, NULL, NULL,
|
||||
NULL, NULL, NULL, NULL),
|
||||
_OMAP3_MUXENTRY(SAD2D_MREAD, 0,
|
||||
NULL, NULL, NULL, NULL,
|
||||
NULL, NULL, NULL, NULL),
|
||||
_OMAP3_MUXENTRY(SAD2D_MWRITE, 0,
|
||||
NULL, NULL, NULL, NULL,
|
||||
NULL, NULL, NULL, NULL),
|
||||
_OMAP3_MUXENTRY(SAD2D_SBUSFLAG, 0,
|
||||
NULL, NULL, NULL, NULL,
|
||||
NULL, NULL, NULL, NULL),
|
||||
_OMAP3_MUXENTRY(SAD2D_SREAD, 0,
|
||||
NULL, NULL, NULL, NULL,
|
||||
NULL, NULL, NULL, NULL),
|
||||
_OMAP3_MUXENTRY(SAD2D_SWRITE, 0,
|
||||
NULL, NULL, NULL, NULL,
|
||||
NULL, NULL, NULL, NULL),
|
||||
_OMAP3_MUXENTRY(GPMC_A11, 0,
|
||||
NULL, NULL, NULL, NULL,
|
||||
NULL, NULL, NULL, NULL),
|
||||
_OMAP3_MUXENTRY(SAD2D_MCAD28, 0,
|
||||
NULL, NULL, NULL, NULL,
|
||||
NULL, NULL, NULL, NULL),
|
||||
_OMAP3_MUXENTRY(SAD2D_MCAD29, 0,
|
||||
NULL, NULL, NULL, NULL,
|
||||
NULL, NULL, NULL, NULL),
|
||||
_OMAP3_MUXENTRY(SAD2D_MCAD32, 0,
|
||||
NULL, NULL, NULL, NULL,
|
||||
NULL, NULL, NULL, NULL),
|
||||
_OMAP3_MUXENTRY(SAD2D_MCAD33, 0,
|
||||
NULL, NULL, NULL, NULL,
|
||||
NULL, NULL, NULL, NULL),
|
||||
_OMAP3_MUXENTRY(SAD2D_MCAD34, 0,
|
||||
NULL, NULL, NULL, NULL,
|
||||
NULL, NULL, NULL, NULL),
|
||||
_OMAP3_MUXENTRY(SAD2D_MCAD35, 0,
|
||||
NULL, NULL, NULL, NULL,
|
||||
NULL, NULL, NULL, NULL),
|
||||
_OMAP3_MUXENTRY(SAD2D_MCAD36, 0,
|
||||
NULL, NULL, NULL, NULL,
|
||||
NULL, NULL, NULL, NULL),
|
||||
{ .reg_offset = OMAP_MUX_TERMINATOR },
|
||||
};
|
||||
|
||||
|
|
|
@ -94,7 +94,8 @@ static int _update_sysc_cache(struct omap_hwmod *oh)
|
|||
|
||||
oh->_sysc_cache = omap_hwmod_readl(oh, oh->sysconfig->sysc_offs);
|
||||
|
||||
oh->_int_flags |= _HWMOD_SYSCONFIG_LOADED;
|
||||
if (!(oh->sysconfig->sysc_flags & SYSC_NO_CACHE))
|
||||
oh->_int_flags |= _HWMOD_SYSCONFIG_LOADED;
|
||||
|
||||
return 0;
|
||||
}
|
||||
|
|
|
@ -54,8 +54,6 @@ int omap2_pm_debug;
|
|||
regs[reg_count++].val = \
|
||||
__raw_readl(OMAP2_L4_IO_ADDRESS(0x480fe000 + (off)))
|
||||
|
||||
static int __init pm_dbg_init(void);
|
||||
|
||||
void omap2_pm_dump(int mode, int resume, unsigned int us)
|
||||
{
|
||||
struct reg {
|
||||
|
@ -167,6 +165,8 @@ struct dentry *pm_dbg_dir;
|
|||
|
||||
static int pm_dbg_init_done;
|
||||
|
||||
static int __init pm_dbg_init(void);
|
||||
|
||||
enum {
|
||||
DEBUG_FILE_COUNTERS = 0,
|
||||
DEBUG_FILE_TIMERS,
|
||||
|
@ -488,9 +488,11 @@ int pm_dbg_regset_init(int reg_set)
|
|||
|
||||
static int pwrdm_suspend_get(void *data, u64 *val)
|
||||
{
|
||||
*val = omap3_pm_get_suspend_state((struct powerdomain *)data);
|
||||
int ret;
|
||||
ret = omap3_pm_get_suspend_state((struct powerdomain *)data);
|
||||
*val = ret;
|
||||
|
||||
if (*val >= 0)
|
||||
if (ret >= 0)
|
||||
return 0;
|
||||
return *val;
|
||||
}
|
||||
|
@ -604,6 +606,4 @@ static int __init pm_dbg_init(void)
|
|||
}
|
||||
arch_initcall(pm_dbg_init);
|
||||
|
||||
#else
|
||||
void pm_dbg_update_time(struct powerdomain *pwrdm, int prev) {}
|
||||
#endif
|
||||
|
|
|
@ -32,12 +32,16 @@ extern struct omap_dm_timer *gptimer_wakeup;
|
|||
#ifdef CONFIG_PM_DEBUG
|
||||
extern void omap2_pm_dump(int mode, int resume, unsigned int us);
|
||||
extern int omap2_pm_debug;
|
||||
#else
|
||||
#define omap2_pm_dump(mode, resume, us) do {} while (0);
|
||||
#define omap2_pm_debug 0
|
||||
#endif
|
||||
|
||||
#if defined(CONFIG_PM_DEBUG) && defined(CONFIG_DEBUG_FS)
|
||||
extern void pm_dbg_update_time(struct powerdomain *pwrdm, int prev);
|
||||
extern int pm_dbg_regset_save(int reg_set);
|
||||
extern int pm_dbg_regset_init(int reg_set);
|
||||
#else
|
||||
#define omap2_pm_dump(mode, resume, us) do {} while (0);
|
||||
#define omap2_pm_debug 0
|
||||
#define pm_dbg_update_time(pwrdm, prev) do {} while (0);
|
||||
#define pm_dbg_regset_save(reg_set) do {} while (0);
|
||||
#define pm_dbg_regset_init(reg_set) do {} while (0);
|
||||
|
|
|
@ -26,6 +26,7 @@
|
|||
#include <linux/err.h>
|
||||
#include <linux/gpio.h>
|
||||
#include <linux/clk.h>
|
||||
#include <linux/delay.h>
|
||||
|
||||
#include <plat/sram.h>
|
||||
#include <plat/clockdomain.h>
|
||||
|
@ -126,7 +127,15 @@ static void omap3_core_save_context(void)
|
|||
/* wait for the save to complete */
|
||||
while (!(omap_ctrl_readl(OMAP343X_CONTROL_GENERAL_PURPOSE_STATUS)
|
||||
& PADCONF_SAVE_DONE))
|
||||
;
|
||||
udelay(1);
|
||||
|
||||
/*
|
||||
* Force write last pad into memory, as this can fail in some
|
||||
* cases according to erratas 1.157, 1.185
|
||||
*/
|
||||
omap_ctrl_writel(omap_ctrl_readl(OMAP343X_PADCONF_ETK_D14),
|
||||
OMAP343X_CONTROL_MEM_WKUP + 0x2a0);
|
||||
|
||||
/* Save the Interrupt controller context */
|
||||
omap_intc_save_context();
|
||||
/* Save the GPMC context */
|
||||
|
@ -392,6 +401,7 @@ void omap_sram_idle(void)
|
|||
prm_set_mod_reg_bits(OMAP3430_EN_IO, WKUP_MOD, PM_WKEN);
|
||||
omap3_enable_io_chain();
|
||||
}
|
||||
omap3_intc_prepare_idle();
|
||||
|
||||
/*
|
||||
* On EMU/HS devices ROM code restores a SRDC value
|
||||
|
@ -438,6 +448,7 @@ void omap_sram_idle(void)
|
|||
OMAP3430_GR_MOD,
|
||||
OMAP3_PRM_VOLTCTRL_OFFSET);
|
||||
}
|
||||
omap3_intc_resume_idle();
|
||||
|
||||
/* PER */
|
||||
if (per_next_state < PWRDM_POWER_ON) {
|
||||
|
@ -578,6 +589,8 @@ static int omap3_pm_suspend(void)
|
|||
}
|
||||
|
||||
omap_uart_prepare_suspend();
|
||||
omap3_intc_suspend();
|
||||
|
||||
omap_sram_idle();
|
||||
|
||||
restore:
|
||||
|
@ -835,6 +848,8 @@ static void __init prcm_setup_regs(void)
|
|||
CM_AUTOIDLE);
|
||||
}
|
||||
|
||||
omap_ctrl_writel(OMAP3430_AUTOIDLE, OMAP2_CONTROL_SYSCONFIG);
|
||||
|
||||
/*
|
||||
* Set all plls to autoidle. This is needed until autoidle is
|
||||
* enabled by clockfw
|
||||
|
@ -875,15 +890,23 @@ static void __init prcm_setup_regs(void)
|
|||
prm_write_mod_reg(OMAP3430_IO_EN | OMAP3430_WKUP_EN,
|
||||
OCP_MOD, OMAP3_PRM_IRQENABLE_MPU_OFFSET);
|
||||
|
||||
/* Enable PM_WKEN to support DSS LPR */
|
||||
prm_write_mod_reg(OMAP3430_PM_WKEN_DSS_EN_DSS,
|
||||
OMAP3430_DSS_MOD, PM_WKEN);
|
||||
|
||||
/* Enable wakeups in PER */
|
||||
prm_write_mod_reg(OMAP3430_EN_GPIO2 | OMAP3430_EN_GPIO3 |
|
||||
OMAP3430_EN_GPIO4 | OMAP3430_EN_GPIO5 |
|
||||
OMAP3430_EN_GPIO6 | OMAP3430_EN_UART3,
|
||||
OMAP3430_EN_GPIO6 | OMAP3430_EN_UART3 |
|
||||
OMAP3430_EN_MCBSP2 | OMAP3430_EN_MCBSP3 |
|
||||
OMAP3430_EN_MCBSP4,
|
||||
OMAP3430_PER_MOD, PM_WKEN);
|
||||
/* and allow them to wake up MPU */
|
||||
prm_write_mod_reg(OMAP3430_GRPSEL_GPIO2 | OMAP3430_EN_GPIO3 |
|
||||
OMAP3430_GRPSEL_GPIO4 | OMAP3430_EN_GPIO5 |
|
||||
OMAP3430_GRPSEL_GPIO6 | OMAP3430_EN_UART3,
|
||||
OMAP3430_GRPSEL_GPIO6 | OMAP3430_EN_UART3 |
|
||||
OMAP3430_EN_MCBSP2 | OMAP3430_EN_MCBSP3 |
|
||||
OMAP3430_EN_MCBSP4,
|
||||
OMAP3430_PER_MOD, OMAP3430_PM_MPUGRPSEL);
|
||||
|
||||
/* Don't attach IVA interrupts */
|
||||
|
@ -904,24 +927,6 @@ static void __init prcm_setup_regs(void)
|
|||
/* Clear any pending PRCM interrupts */
|
||||
prm_write_mod_reg(0, OCP_MOD, OMAP3_PRM_IRQSTATUS_MPU_OFFSET);
|
||||
|
||||
/* Don't attach IVA interrupts */
|
||||
prm_write_mod_reg(0, WKUP_MOD, OMAP3430_PM_IVAGRPSEL);
|
||||
prm_write_mod_reg(0, CORE_MOD, OMAP3430_PM_IVAGRPSEL1);
|
||||
prm_write_mod_reg(0, CORE_MOD, OMAP3430ES2_PM_IVAGRPSEL3);
|
||||
prm_write_mod_reg(0, OMAP3430_PER_MOD, OMAP3430_PM_IVAGRPSEL);
|
||||
|
||||
/* Clear any pending 'reset' flags */
|
||||
prm_write_mod_reg(0xffffffff, MPU_MOD, RM_RSTST);
|
||||
prm_write_mod_reg(0xffffffff, CORE_MOD, RM_RSTST);
|
||||
prm_write_mod_reg(0xffffffff, OMAP3430_PER_MOD, RM_RSTST);
|
||||
prm_write_mod_reg(0xffffffff, OMAP3430_EMU_MOD, RM_RSTST);
|
||||
prm_write_mod_reg(0xffffffff, OMAP3430_NEON_MOD, RM_RSTST);
|
||||
prm_write_mod_reg(0xffffffff, OMAP3430_DSS_MOD, RM_RSTST);
|
||||
prm_write_mod_reg(0xffffffff, OMAP3430ES2_USBHOST_MOD, RM_RSTST);
|
||||
|
||||
/* Clear any pending PRCM interrupts */
|
||||
prm_write_mod_reg(0, OCP_MOD, OMAP3_PRM_IRQSTATUS_MPU_OFFSET);
|
||||
|
||||
omap3_iva_idle();
|
||||
omap3_d2d_idle();
|
||||
}
|
||||
|
|
|
@ -44,7 +44,6 @@ struct omap3_prcm_regs {
|
|||
u32 iva2_cm_clksel2;
|
||||
u32 cm_sysconfig;
|
||||
u32 sgx_cm_clksel;
|
||||
u32 wkup_cm_clksel;
|
||||
u32 dss_cm_clksel;
|
||||
u32 cam_cm_clksel;
|
||||
u32 per_cm_clksel;
|
||||
|
@ -53,7 +52,6 @@ struct omap3_prcm_regs {
|
|||
u32 pll_cm_autoidle2;
|
||||
u32 pll_cm_clksel4;
|
||||
u32 pll_cm_clksel5;
|
||||
u32 pll_cm_clken;
|
||||
u32 pll_cm_clken2;
|
||||
u32 cm_polctrl;
|
||||
u32 iva2_cm_fclken;
|
||||
|
@ -77,7 +75,6 @@ struct omap3_prcm_regs {
|
|||
u32 usbhost_cm_iclken;
|
||||
u32 iva2_cm_autiidle2;
|
||||
u32 mpu_cm_autoidle2;
|
||||
u32 pll_cm_autoidle;
|
||||
u32 iva2_cm_clkstctrl;
|
||||
u32 mpu_cm_clkstctrl;
|
||||
u32 core_cm_clkstctrl;
|
||||
|
@ -274,7 +271,6 @@ void omap3_prcm_save_context(void)
|
|||
prcm_context.cm_sysconfig = __raw_readl(OMAP3430_CM_SYSCONFIG);
|
||||
prcm_context.sgx_cm_clksel =
|
||||
cm_read_mod_reg(OMAP3430ES2_SGX_MOD, CM_CLKSEL);
|
||||
prcm_context.wkup_cm_clksel = cm_read_mod_reg(WKUP_MOD, CM_CLKSEL);
|
||||
prcm_context.dss_cm_clksel =
|
||||
cm_read_mod_reg(OMAP3430_DSS_MOD, CM_CLKSEL);
|
||||
prcm_context.cam_cm_clksel =
|
||||
|
@ -291,8 +287,6 @@ void omap3_prcm_save_context(void)
|
|||
cm_read_mod_reg(PLL_MOD, OMAP3430ES2_CM_CLKSEL4);
|
||||
prcm_context.pll_cm_clksel5 =
|
||||
cm_read_mod_reg(PLL_MOD, OMAP3430ES2_CM_CLKSEL5);
|
||||
prcm_context.pll_cm_clken =
|
||||
cm_read_mod_reg(PLL_MOD, CM_CLKEN);
|
||||
prcm_context.pll_cm_clken2 =
|
||||
cm_read_mod_reg(PLL_MOD, OMAP3430ES2_CM_CLKEN2);
|
||||
prcm_context.cm_polctrl = __raw_readl(OMAP3430_CM_POLCTRL);
|
||||
|
@ -338,8 +332,6 @@ void omap3_prcm_save_context(void)
|
|||
cm_read_mod_reg(OMAP3430_IVA2_MOD, CM_AUTOIDLE2);
|
||||
prcm_context.mpu_cm_autoidle2 =
|
||||
cm_read_mod_reg(MPU_MOD, CM_AUTOIDLE2);
|
||||
prcm_context.pll_cm_autoidle =
|
||||
cm_read_mod_reg(PLL_MOD, CM_AUTOIDLE);
|
||||
prcm_context.iva2_cm_clkstctrl =
|
||||
cm_read_mod_reg(OMAP3430_IVA2_MOD, CM_CLKSTCTRL);
|
||||
prcm_context.mpu_cm_clkstctrl =
|
||||
|
@ -431,7 +423,6 @@ void omap3_prcm_restore_context(void)
|
|||
__raw_writel(prcm_context.cm_sysconfig, OMAP3430_CM_SYSCONFIG);
|
||||
cm_write_mod_reg(prcm_context.sgx_cm_clksel, OMAP3430ES2_SGX_MOD,
|
||||
CM_CLKSEL);
|
||||
cm_write_mod_reg(prcm_context.wkup_cm_clksel, WKUP_MOD, CM_CLKSEL);
|
||||
cm_write_mod_reg(prcm_context.dss_cm_clksel, OMAP3430_DSS_MOD,
|
||||
CM_CLKSEL);
|
||||
cm_write_mod_reg(prcm_context.cam_cm_clksel, OMAP3430_CAM_MOD,
|
||||
|
@ -448,7 +439,6 @@ void omap3_prcm_restore_context(void)
|
|||
OMAP3430ES2_CM_CLKSEL4);
|
||||
cm_write_mod_reg(prcm_context.pll_cm_clksel5, PLL_MOD,
|
||||
OMAP3430ES2_CM_CLKSEL5);
|
||||
cm_write_mod_reg(prcm_context.pll_cm_clken, PLL_MOD, CM_CLKEN);
|
||||
cm_write_mod_reg(prcm_context.pll_cm_clken2, PLL_MOD,
|
||||
OMAP3430ES2_CM_CLKEN2);
|
||||
__raw_writel(prcm_context.cm_polctrl, OMAP3430_CM_POLCTRL);
|
||||
|
@ -487,7 +477,6 @@ void omap3_prcm_restore_context(void)
|
|||
cm_write_mod_reg(prcm_context.iva2_cm_autiidle2, OMAP3430_IVA2_MOD,
|
||||
CM_AUTOIDLE2);
|
||||
cm_write_mod_reg(prcm_context.mpu_cm_autoidle2, MPU_MOD, CM_AUTOIDLE2);
|
||||
cm_write_mod_reg(prcm_context.pll_cm_autoidle, PLL_MOD, CM_AUTOIDLE);
|
||||
cm_write_mod_reg(prcm_context.iva2_cm_clkstctrl, OMAP3430_IVA2_MOD,
|
||||
CM_CLKSTCTRL);
|
||||
cm_write_mod_reg(prcm_context.mpu_cm_clkstctrl, MPU_MOD, CM_CLKSTCTRL);
|
||||
|
|
|
@ -24,6 +24,8 @@
|
|||
OMAP2_L4_IO_ADDRESS(OMAP3430_PRM_BASE + (module) + (reg))
|
||||
#define OMAP44XX_PRM_REGADDR(module, reg) \
|
||||
OMAP2_L4_IO_ADDRESS(OMAP4430_PRM_BASE + (module) + (reg))
|
||||
#define OMAP44XX_CHIRONSS_REGADDR(module, reg) \
|
||||
OMAP2_L4_IO_ADDRESS(OMAP4430_CHIRONSS_BASE + (module) + (reg))
|
||||
|
||||
#include "prm44xx.h"
|
||||
|
||||
|
|
|
@ -386,26 +386,26 @@
|
|||
|
||||
|
||||
/* CHIRON_PRCM.CHIRONSS_OCP_SOCKET_PRCM register offsets */
|
||||
#define OMAP4430_REVISION_PRCM OMAP44XX_PRM_REGADDR(OMAP4430_CHIRONSS_CHIRONSS_OCP_SOCKET_PRCM_MOD, 0x0000)
|
||||
#define OMAP4430_REVISION_PRCM OMAP44XX_CHIRONSS_REGADDR(OMAP4430_CHIRONSS_CHIRONSS_OCP_SOCKET_PRCM_MOD, 0x0000)
|
||||
|
||||
/* CHIRON_PRCM.CHIRONSS_DEVICE_PRM register offsets */
|
||||
#define OMAP4430_CHIRON_PRCM_PRM_RSTST OMAP44XX_PRM_REGADDR(OMAP4430_CHIRONSS_CHIRONSS_DEVICE_PRM_MOD, 0x0000)
|
||||
#define OMAP4430_CHIRON_PRCM_PRM_RSTST OMAP44XX_CHIRONSS_REGADDR(OMAP4430_CHIRONSS_CHIRONSS_DEVICE_PRM_MOD, 0x0000)
|
||||
|
||||
/* CHIRON_PRCM.CHIRONSS_CPU0 register offsets */
|
||||
#define OMAP4430_PM_PDA_CPU0_PWRSTCTRL OMAP44XX_PRM_REGADDR(OMAP4430_CHIRONSS_CHIRONSS_CPU0_MOD, 0x0000)
|
||||
#define OMAP4430_PM_PDA_CPU0_PWRSTST OMAP44XX_PRM_REGADDR(OMAP4430_CHIRONSS_CHIRONSS_CPU0_MOD, 0x0004)
|
||||
#define OMAP4430_RM_PDA_CPU0_CPU0_CONTEXT OMAP44XX_PRM_REGADDR(OMAP4430_CHIRONSS_CHIRONSS_CPU0_MOD, 0x0008)
|
||||
#define OMAP4430_RM_PDA_CPU0_CPU0_RSTCTRL OMAP44XX_PRM_REGADDR(OMAP4430_CHIRONSS_CHIRONSS_CPU0_MOD, 0x000c)
|
||||
#define OMAP4430_RM_PDA_CPU0_CPU0_RSTST OMAP44XX_PRM_REGADDR(OMAP4430_CHIRONSS_CHIRONSS_CPU0_MOD, 0x0010)
|
||||
#define OMAP4430_CM_PDA_CPU0_CPU0_CLKCTRL OMAP44XX_PRM_REGADDR(OMAP4430_CHIRONSS_CHIRONSS_CPU0_MOD, 0x0014)
|
||||
#define OMAP4430_CM_PDA_CPU0_CLKSTCTRL OMAP44XX_PRM_REGADDR(OMAP4430_CHIRONSS_CHIRONSS_CPU0_MOD, 0x0018)
|
||||
#define OMAP4430_PM_PDA_CPU0_PWRSTCTRL OMAP44XX_CHIRONSS_REGADDR(OMAP4430_CHIRONSS_CHIRONSS_CPU0_MOD, 0x0000)
|
||||
#define OMAP4430_PM_PDA_CPU0_PWRSTST OMAP44XX_CHIRONSS_REGADDR(OMAP4430_CHIRONSS_CHIRONSS_CPU0_MOD, 0x0004)
|
||||
#define OMAP4430_RM_PDA_CPU0_CPU0_CONTEXT OMAP44XX_CHIRONSS_REGADDR(OMAP4430_CHIRONSS_CHIRONSS_CPU0_MOD, 0x0008)
|
||||
#define OMAP4430_RM_PDA_CPU0_CPU0_RSTCTRL OMAP44XX_CHIRONSS_REGADDR(OMAP4430_CHIRONSS_CHIRONSS_CPU0_MOD, 0x000c)
|
||||
#define OMAP4430_RM_PDA_CPU0_CPU0_RSTST OMAP44XX_CHIRONSS_REGADDR(OMAP4430_CHIRONSS_CHIRONSS_CPU0_MOD, 0x0010)
|
||||
#define OMAP4430_CM_PDA_CPU0_CPU0_CLKCTRL OMAP44XX_CHIRONSS_REGADDR(OMAP4430_CHIRONSS_CHIRONSS_CPU0_MOD, 0x0014)
|
||||
#define OMAP4430_CM_PDA_CPU0_CLKSTCTRL OMAP44XX_CHIRONSS_REGADDR(OMAP4430_CHIRONSS_CHIRONSS_CPU0_MOD, 0x0018)
|
||||
|
||||
/* CHIRON_PRCM.CHIRONSS_CPU1 register offsets */
|
||||
#define OMAP4430_PM_PDA_CPU1_PWRSTCTRL OMAP44XX_PRM_REGADDR(OMAP4430_CHIRONSS_CHIRONSS_CPU1_MOD, 0x0000)
|
||||
#define OMAP4430_PM_PDA_CPU1_PWRSTST OMAP44XX_PRM_REGADDR(OMAP4430_CHIRONSS_CHIRONSS_CPU1_MOD, 0x0004)
|
||||
#define OMAP4430_RM_PDA_CPU1_CPU1_CONTEXT OMAP44XX_PRM_REGADDR(OMAP4430_CHIRONSS_CHIRONSS_CPU1_MOD, 0x0008)
|
||||
#define OMAP4430_RM_PDA_CPU1_CPU1_RSTCTRL OMAP44XX_PRM_REGADDR(OMAP4430_CHIRONSS_CHIRONSS_CPU1_MOD, 0x000c)
|
||||
#define OMAP4430_RM_PDA_CPU1_CPU1_RSTST OMAP44XX_PRM_REGADDR(OMAP4430_CHIRONSS_CHIRONSS_CPU1_MOD, 0x0010)
|
||||
#define OMAP4430_CM_PDA_CPU1_CPU1_CLKCTRL OMAP44XX_PRM_REGADDR(OMAP4430_CHIRONSS_CHIRONSS_CPU1_MOD, 0x0014)
|
||||
#define OMAP4430_CM_PDA_CPU1_CLKSTCTRL OMAP44XX_PRM_REGADDR(OMAP4430_CHIRONSS_CHIRONSS_CPU1_MOD, 0x0018)
|
||||
#define OMAP4430_PM_PDA_CPU1_PWRSTCTRL OMAP44XX_CHIRONSS_REGADDR(OMAP4430_CHIRONSS_CHIRONSS_CPU1_MOD, 0x0000)
|
||||
#define OMAP4430_PM_PDA_CPU1_PWRSTST OMAP44XX_CHIRONSS_REGADDR(OMAP4430_CHIRONSS_CHIRONSS_CPU1_MOD, 0x0004)
|
||||
#define OMAP4430_RM_PDA_CPU1_CPU1_CONTEXT OMAP44XX_CHIRONSS_REGADDR(OMAP4430_CHIRONSS_CHIRONSS_CPU1_MOD, 0x0008)
|
||||
#define OMAP4430_RM_PDA_CPU1_CPU1_RSTCTRL OMAP44XX_CHIRONSS_REGADDR(OMAP4430_CHIRONSS_CHIRONSS_CPU1_MOD, 0x000c)
|
||||
#define OMAP4430_RM_PDA_CPU1_CPU1_RSTST OMAP44XX_CHIRONSS_REGADDR(OMAP4430_CHIRONSS_CHIRONSS_CPU1_MOD, 0x0010)
|
||||
#define OMAP4430_CM_PDA_CPU1_CPU1_CLKCTRL OMAP44XX_CHIRONSS_REGADDR(OMAP4430_CHIRONSS_CHIRONSS_CPU1_MOD, 0x0014)
|
||||
#define OMAP4430_CM_PDA_CPU1_CLKSTCTRL OMAP44XX_CHIRONSS_REGADDR(OMAP4430_CHIRONSS_CHIRONSS_CPU1_MOD, 0x0018)
|
||||
#endif
|
||||
|
|
|
@ -36,7 +36,13 @@
|
|||
#define UART_OMAP_NO_EMPTY_FIFO_READ_IP_REV 0x52
|
||||
#define UART_OMAP_WER 0x17 /* Wake-up enable register */
|
||||
|
||||
#define DEFAULT_TIMEOUT (5 * HZ)
|
||||
/*
|
||||
* NOTE: By default the serial timeout is disabled as it causes lost characters
|
||||
* over the serial ports. This means that the UART clocks will stay on until
|
||||
* disabled via sysfs. This also causes that any deeper omap sleep states are
|
||||
* blocked.
|
||||
*/
|
||||
#define DEFAULT_TIMEOUT 0
|
||||
|
||||
struct omap_uart_state {
|
||||
int num;
|
||||
|
@ -422,7 +428,8 @@ static void omap_uart_idle_init(struct omap_uart_state *uart)
|
|||
uart->timeout = DEFAULT_TIMEOUT;
|
||||
setup_timer(&uart->timer, omap_uart_idle_timer,
|
||||
(unsigned long) uart);
|
||||
mod_timer(&uart->timer, jiffies + uart->timeout);
|
||||
if (uart->timeout)
|
||||
mod_timer(&uart->timer, jiffies + uart->timeout);
|
||||
omap_uart_smart_idle_enable(uart, 0);
|
||||
|
||||
if (cpu_is_omap34xx()) {
|
||||
|
|
|
@ -245,7 +245,8 @@ restore:
|
|||
mov r1, #0 @ set task id for ROM code in r1
|
||||
mov r2, #4 @ set some flags in r2, r6
|
||||
mov r6, #0xff
|
||||
adr r3, write_aux_control_params @ r3 points to parameters
|
||||
ldr r4, scratchpad_base
|
||||
ldr r3, [r4, #0xBC] @ r3 points to parameters
|
||||
mcr p15, 0, r0, c7, c10, 4 @ data write barrier
|
||||
mcr p15, 0, r0, c7, c10, 5 @ data memory barrier
|
||||
.word 0xE1600071 @ call SMI monitor (smi #1)
|
||||
|
@ -253,14 +254,14 @@ restore:
|
|||
b logic_l1_restore
|
||||
l2_inv_api_params:
|
||||
.word 0x1, 0x00
|
||||
write_aux_control_params:
|
||||
.word 0x1, 0x72
|
||||
l2_inv_gp:
|
||||
/* Execute smi to invalidate L2 cache */
|
||||
mov r12, #0x1 @ set up to invalide L2
|
||||
smi: .word 0xE1600070 @ Call SMI monitor (smieq)
|
||||
/* Write to Aux control register to set some bits */
|
||||
mov r0, #0x72
|
||||
ldr r4, scratchpad_base
|
||||
ldr r3, [r4,#0xBC]
|
||||
ldr r0, [r3,#4]
|
||||
mov r12, #0x3
|
||||
.word 0xE1600070 @ Call SMI monitor (smieq)
|
||||
logic_l1_restore:
|
||||
|
@ -271,6 +272,7 @@ logic_l1_restore:
|
|||
|
||||
ldr r4, scratchpad_base
|
||||
ldr r3, [r4,#0xBC]
|
||||
adds r3, r3, #8
|
||||
ldmia r3!, {r4-r6}
|
||||
mov sp, r4
|
||||
msr spsr_cxsf, r5
|
||||
|
@ -387,6 +389,9 @@ usettbr0:
|
|||
save_context_wfi:
|
||||
/*b save_context_wfi*/ @ enable to debug save code
|
||||
mov r8, r0 /* Store SDRAM address in r8 */
|
||||
mrc p15, 0, r5, c1, c0, 1 @ Read Auxiliary Control Register
|
||||
mov r4, #0x1 @ Number of parameters for restore call
|
||||
stmia r8!, {r4-r5}
|
||||
/* Check what that target sleep state is:stored in r1*/
|
||||
/* 1 - Only L1 and logic lost */
|
||||
/* 2 - Only L2 lost */
|
||||
|
|
|
@ -12,6 +12,7 @@
|
|||
|
||||
#include <linux/kernel.h>
|
||||
#include <linux/init.h>
|
||||
#include <linux/delay.h>
|
||||
#include <linux/platform_device.h>
|
||||
#include <linux/pci.h>
|
||||
#include <linux/irq.h>
|
||||
|
@ -32,6 +33,7 @@
|
|||
|
||||
#define DNS323_GPIO_LED_RIGHT_AMBER 1
|
||||
#define DNS323_GPIO_LED_LEFT_AMBER 2
|
||||
#define DNS323_GPIO_SYSTEM_UP 3
|
||||
#define DNS323_GPIO_LED_POWER 5
|
||||
#define DNS323_GPIO_OVERTEMP 6
|
||||
#define DNS323_GPIO_RTC 7
|
||||
|
@ -239,7 +241,7 @@ static struct gpio_led dns323_leds[] = {
|
|||
{
|
||||
.name = "power:blue",
|
||||
.gpio = DNS323_GPIO_LED_POWER,
|
||||
.active_low = 1,
|
||||
.default_state = LEDS_GPIO_DEFSTATE_ON,
|
||||
}, {
|
||||
.name = "right:amber",
|
||||
.gpio = DNS323_GPIO_LED_RIGHT_AMBER,
|
||||
|
@ -334,7 +336,7 @@ static struct orion5x_mpp_mode dns323_mv88f5182_mpp_modes[] __initdata = {
|
|||
{ 0, MPP_UNUSED },
|
||||
{ 1, MPP_GPIO }, /* right amber LED (sata ch0) */
|
||||
{ 2, MPP_GPIO }, /* left amber LED (sata ch1) */
|
||||
{ 3, MPP_UNUSED },
|
||||
{ 3, MPP_GPIO }, /* system up flag */
|
||||
{ 4, MPP_GPIO }, /* power button LED */
|
||||
{ 5, MPP_GPIO }, /* power button LED */
|
||||
{ 6, MPP_GPIO }, /* GMT G751-2f overtemp */
|
||||
|
@ -372,13 +374,23 @@ static struct i2c_board_info __initdata dns323_i2c_devices[] = {
|
|||
},
|
||||
};
|
||||
|
||||
/* DNS-323 specific power off method */
|
||||
static void dns323_power_off(void)
|
||||
/* DNS-323 rev. A specific power off method */
|
||||
static void dns323a_power_off(void)
|
||||
{
|
||||
pr_info("%s: triggering power-off...\n", __func__);
|
||||
gpio_set_value(DNS323_GPIO_POWER_OFF, 1);
|
||||
}
|
||||
|
||||
/* DNS-323 rev B specific power off method */
|
||||
static void dns323b_power_off(void)
|
||||
{
|
||||
pr_info("%s: triggering power-off...\n", __func__);
|
||||
/* Pin has to be changed to 1 and back to 0 to do actual power off. */
|
||||
gpio_set_value(DNS323_GPIO_POWER_OFF, 1);
|
||||
mdelay(100);
|
||||
gpio_set_value(DNS323_GPIO_POWER_OFF, 0);
|
||||
}
|
||||
|
||||
static void __init dns323_init(void)
|
||||
{
|
||||
/* Setup basic Orion functions. Need to be called early. */
|
||||
|
@ -424,11 +436,20 @@ static void __init dns323_init(void)
|
|||
if (dns323_dev_id() == MV88F5182_DEV_ID)
|
||||
orion5x_sata_init(&dns323_sata_data);
|
||||
|
||||
/* register dns323 specific power-off method */
|
||||
/* The 5182 has flag to indicate the system is up. Without this flag
|
||||
* set, power LED will flash and cannot be controlled via leds-gpio.
|
||||
*/
|
||||
if (dns323_dev_id() == MV88F5182_DEV_ID)
|
||||
gpio_set_value(DNS323_GPIO_SYSTEM_UP, 1);
|
||||
|
||||
/* Register dns323 specific power-off method */
|
||||
if (gpio_request(DNS323_GPIO_POWER_OFF, "POWEROFF") != 0 ||
|
||||
gpio_direction_output(DNS323_GPIO_POWER_OFF, 0) != 0)
|
||||
pr_err("DNS323: failed to setup power-off GPIO\n");
|
||||
pm_power_off = dns323_power_off;
|
||||
if (dns323_dev_id() == MV88F5182_DEV_ID)
|
||||
pm_power_off = dns323b_power_off;
|
||||
else
|
||||
pm_power_off = dns323a_power_off;
|
||||
}
|
||||
|
||||
/* Warning: D-Link uses a wrong mach-type (=526) in their bootloader */
|
||||
|
|
|
@ -15,6 +15,9 @@
|
|||
#include <linux/mtd/physmap.h>
|
||||
#include <linux/mv643xx_eth.h>
|
||||
#include <linux/ethtool.h>
|
||||
#include <linux/leds.h>
|
||||
#include <linux/gpio_keys.h>
|
||||
#include <linux/input.h>
|
||||
#include <net/dsa.h>
|
||||
#include <asm/mach-types.h>
|
||||
#include <asm/gpio.h>
|
||||
|
@ -24,6 +27,80 @@
|
|||
#include "common.h"
|
||||
#include "mpp.h"
|
||||
|
||||
/*
|
||||
* LEDs attached to GPIO
|
||||
*/
|
||||
static struct gpio_led wrt350n_v2_led_pins[] = {
|
||||
{
|
||||
.name = "wrt350nv2:green:power",
|
||||
.gpio = 0,
|
||||
.active_low = 1,
|
||||
}, {
|
||||
.name = "wrt350nv2:green:security",
|
||||
.gpio = 1,
|
||||
.active_low = 1,
|
||||
}, {
|
||||
.name = "wrt350nv2:orange:power",
|
||||
.gpio = 5,
|
||||
.active_low = 1,
|
||||
}, {
|
||||
.name = "wrt350nv2:green:usb",
|
||||
.gpio = 6,
|
||||
.active_low = 1,
|
||||
}, {
|
||||
.name = "wrt350nv2:green:wireless",
|
||||
.gpio = 7,
|
||||
.active_low = 1,
|
||||
},
|
||||
};
|
||||
|
||||
static struct gpio_led_platform_data wrt350n_v2_led_data = {
|
||||
.leds = wrt350n_v2_led_pins,
|
||||
.num_leds = ARRAY_SIZE(wrt350n_v2_led_pins),
|
||||
};
|
||||
|
||||
static struct platform_device wrt350n_v2_leds = {
|
||||
.name = "leds-gpio",
|
||||
.id = -1,
|
||||
.dev = {
|
||||
.platform_data = &wrt350n_v2_led_data,
|
||||
},
|
||||
};
|
||||
|
||||
/*
|
||||
* Buttons attached to GPIO
|
||||
*/
|
||||
static struct gpio_keys_button wrt350n_v2_buttons[] = {
|
||||
{
|
||||
.code = KEY_RESTART,
|
||||
.gpio = 3,
|
||||
.desc = "Reset Button",
|
||||
.active_low = 1,
|
||||
}, {
|
||||
.code = KEY_WLAN,
|
||||
.gpio = 2,
|
||||
.desc = "WPS Button",
|
||||
.active_low = 1,
|
||||
},
|
||||
};
|
||||
|
||||
static struct gpio_keys_platform_data wrt350n_v2_button_data = {
|
||||
.buttons = wrt350n_v2_buttons,
|
||||
.nbuttons = ARRAY_SIZE(wrt350n_v2_buttons),
|
||||
};
|
||||
|
||||
static struct platform_device wrt350n_v2_button_device = {
|
||||
.name = "gpio-keys",
|
||||
.id = -1,
|
||||
.num_resources = 0,
|
||||
.dev = {
|
||||
.platform_data = &wrt350n_v2_button_data,
|
||||
},
|
||||
};
|
||||
|
||||
/*
|
||||
* General setup
|
||||
*/
|
||||
static struct orion5x_mpp_mode wrt350n_v2_mpp_modes[] __initdata = {
|
||||
{ 0, MPP_GPIO }, /* Power LED green (0=on) */
|
||||
{ 1, MPP_GPIO }, /* Security LED (0=on) */
|
||||
|
@ -140,6 +217,8 @@ static void __init wrt350n_v2_init(void)
|
|||
orion5x_setup_dev_boot_win(WRT350N_V2_NOR_BOOT_BASE,
|
||||
WRT350N_V2_NOR_BOOT_SIZE);
|
||||
platform_device_register(&wrt350n_v2_nor_flash);
|
||||
platform_device_register(&wrt350n_v2_leds);
|
||||
platform_device_register(&wrt350n_v2_button_device);
|
||||
}
|
||||
|
||||
static int __init wrt350n_v2_pci_map_irq(struct pci_dev *dev, u8 slot, u8 pin)
|
||||
|
|
|
@ -457,6 +457,7 @@ static struct pxaficp_platform_data corgi_ficp_platform_data = {
|
|||
* USB Device Controller
|
||||
*/
|
||||
static struct pxa2xx_udc_mach_info udc_info __initdata = {
|
||||
.gpio_vbus = -1,
|
||||
/* no connect GPIO; corgi can't tell connection status */
|
||||
.gpio_pullup = CORGI_GPIO_USB_PULLUP,
|
||||
};
|
||||
|
|
|
@ -169,7 +169,6 @@
|
|||
#define GPIO86_nSDCS2 MFP_CFG_OUT(GPIO86, AF0, DRIVE_HIGH)
|
||||
#define GPIO87_nSDCS3 MFP_CFG_OUT(GPIO87, AF0, DRIVE_HIGH)
|
||||
#define GPIO88_RDnWR MFP_CFG_OUT(GPIO88, AF0, DRIVE_HIGH)
|
||||
#define GPIO89_nACRESET MFP_CFG_OUT(GPIO89, AF0, DRIVE_HIGH)
|
||||
|
||||
/* USB */
|
||||
#define GPIO9_USB_RCV MFP_CFG_IN(GPIO9, AF1)
|
||||
|
@ -186,6 +185,9 @@
|
|||
#define GPIO30_ASSP_TXD MFP_CFG_OUT(GPIO30, AF3, DRIVE_LOW)
|
||||
#define GPIO31_ASSP_SFRM_IN MFP_CFG_IN(GPIO31, AF1)
|
||||
#define GPIO31_ASSP_SFRM_OUT MFP_CFG_OUT(GPIO31, AF3, DRIVE_LOW)
|
||||
#endif
|
||||
|
||||
/* AC97 */
|
||||
#define GPIO89_AC97_nRESET MFP_CFG_OUT(GPIO89, AF0, DRIVE_HIGH)
|
||||
#endif /* CONFIG_CPU_PXA26x */
|
||||
|
||||
#endif /* __ASM_ARCH_MFP_PXA25X_H */
|
||||
|
|
|
@ -164,8 +164,11 @@ static int pxa_irq_suspend(struct sys_device *dev, pm_message_t state)
|
|||
saved_icmr[i] = _ICMR(irq);
|
||||
_ICMR(irq) = 0;
|
||||
}
|
||||
for (i = 0; i < pxa_internal_irq_nr; i++)
|
||||
saved_ipr[i] = IPR(i);
|
||||
|
||||
if (cpu_is_pxa27x() || cpu_is_pxa3xx()) {
|
||||
for (i = 0; i < pxa_internal_irq_nr; i++)
|
||||
saved_ipr[i] = IPR(i);
|
||||
}
|
||||
|
||||
return 0;
|
||||
}
|
||||
|
@ -174,12 +177,15 @@ static int pxa_irq_resume(struct sys_device *dev)
|
|||
{
|
||||
int i, irq = PXA_IRQ(0);
|
||||
|
||||
if (cpu_is_pxa27x() || cpu_is_pxa3xx()) {
|
||||
for (i = 0; i < pxa_internal_irq_nr; i++)
|
||||
IPR(i) = saved_ipr[i];
|
||||
}
|
||||
|
||||
for (i = 0; irq < PXA_IRQ(pxa_internal_irq_nr); i++, irq += 32) {
|
||||
_ICMR(irq) = saved_icmr[i];
|
||||
_ICLR(irq) = 0;
|
||||
}
|
||||
for (i = 0; i < pxa_internal_irq_nr; i++)
|
||||
IPR(i) = saved_ipr[i];
|
||||
|
||||
ICCR = 1;
|
||||
return 0;
|
||||
|
|
|
@ -334,8 +334,8 @@ static void realview_pbx_reset(char mode)
|
|||
* in the system FPGA
|
||||
*/
|
||||
__raw_writel(REALVIEW_SYS_LOCK_VAL, lock_ctrl);
|
||||
__raw_writel(0x0000, reset_ctrl);
|
||||
__raw_writel(0x0004, reset_ctrl);
|
||||
__raw_writel(0x00F0, reset_ctrl);
|
||||
__raw_writel(0x00F4, reset_ctrl);
|
||||
}
|
||||
|
||||
static void __init realview_pbx_init(void)
|
||||
|
|
|
@ -288,7 +288,7 @@ static struct s3c2410_platform_nand mini2440_nand_info __initdata = {
|
|||
|
||||
/* DM9000AEP 10/100 ethernet controller */
|
||||
|
||||
static struct resource mini2440_dm9k_resource[] __initdata = {
|
||||
static struct resource mini2440_dm9k_resource[] = {
|
||||
[0] = {
|
||||
.start = MACH_MINI2440_DM9K_BASE,
|
||||
.end = MACH_MINI2440_DM9K_BASE + 3,
|
||||
|
@ -310,11 +310,11 @@ static struct resource mini2440_dm9k_resource[] __initdata = {
|
|||
* The DM9000 has no eeprom, and it's MAC address is set by
|
||||
* the bootloader before starting the kernel.
|
||||
*/
|
||||
static struct dm9000_plat_data mini2440_dm9k_pdata __initdata = {
|
||||
static struct dm9000_plat_data mini2440_dm9k_pdata = {
|
||||
.flags = (DM9000_PLATF_16BITONLY | DM9000_PLATF_NO_EEPROM),
|
||||
};
|
||||
|
||||
static struct platform_device mini2440_device_eth __initdata = {
|
||||
static struct platform_device mini2440_device_eth = {
|
||||
.name = "dm9000",
|
||||
.id = -1,
|
||||
.num_resources = ARRAY_SIZE(mini2440_dm9k_resource),
|
||||
|
@ -341,7 +341,7 @@ static struct platform_device mini2440_device_eth __initdata = {
|
|||
* | | +----+ +----+
|
||||
* .....
|
||||
*/
|
||||
static struct gpio_keys_button mini2440_buttons[] __initdata = {
|
||||
static struct gpio_keys_button mini2440_buttons[] = {
|
||||
{
|
||||
.gpio = S3C2410_GPG(0), /* K1 */
|
||||
.code = KEY_F1,
|
||||
|
@ -384,12 +384,12 @@ static struct gpio_keys_button mini2440_buttons[] __initdata = {
|
|||
#endif
|
||||
};
|
||||
|
||||
static struct gpio_keys_platform_data mini2440_button_data __initdata = {
|
||||
static struct gpio_keys_platform_data mini2440_button_data = {
|
||||
.buttons = mini2440_buttons,
|
||||
.nbuttons = ARRAY_SIZE(mini2440_buttons),
|
||||
};
|
||||
|
||||
static struct platform_device mini2440_button_device __initdata = {
|
||||
static struct platform_device mini2440_button_device = {
|
||||
.name = "gpio-keys",
|
||||
.id = -1,
|
||||
.dev = {
|
||||
|
@ -399,41 +399,41 @@ static struct platform_device mini2440_button_device __initdata = {
|
|||
|
||||
/* LEDS */
|
||||
|
||||
static struct s3c24xx_led_platdata mini2440_led1_pdata __initdata = {
|
||||
static struct s3c24xx_led_platdata mini2440_led1_pdata = {
|
||||
.name = "led1",
|
||||
.gpio = S3C2410_GPB(5),
|
||||
.flags = S3C24XX_LEDF_ACTLOW | S3C24XX_LEDF_TRISTATE,
|
||||
.def_trigger = "heartbeat",
|
||||
};
|
||||
|
||||
static struct s3c24xx_led_platdata mini2440_led2_pdata __initdata = {
|
||||
static struct s3c24xx_led_platdata mini2440_led2_pdata = {
|
||||
.name = "led2",
|
||||
.gpio = S3C2410_GPB(6),
|
||||
.flags = S3C24XX_LEDF_ACTLOW | S3C24XX_LEDF_TRISTATE,
|
||||
.def_trigger = "nand-disk",
|
||||
};
|
||||
|
||||
static struct s3c24xx_led_platdata mini2440_led3_pdata __initdata = {
|
||||
static struct s3c24xx_led_platdata mini2440_led3_pdata = {
|
||||
.name = "led3",
|
||||
.gpio = S3C2410_GPB(7),
|
||||
.flags = S3C24XX_LEDF_ACTLOW | S3C24XX_LEDF_TRISTATE,
|
||||
.def_trigger = "mmc0",
|
||||
};
|
||||
|
||||
static struct s3c24xx_led_platdata mini2440_led4_pdata __initdata = {
|
||||
static struct s3c24xx_led_platdata mini2440_led4_pdata = {
|
||||
.name = "led4",
|
||||
.gpio = S3C2410_GPB(8),
|
||||
.flags = S3C24XX_LEDF_ACTLOW | S3C24XX_LEDF_TRISTATE,
|
||||
.def_trigger = "",
|
||||
};
|
||||
|
||||
static struct s3c24xx_led_platdata mini2440_led_backlight_pdata __initdata = {
|
||||
static struct s3c24xx_led_platdata mini2440_led_backlight_pdata = {
|
||||
.name = "backlight",
|
||||
.gpio = S3C2410_GPG(4),
|
||||
.def_trigger = "backlight",
|
||||
};
|
||||
|
||||
static struct platform_device mini2440_led1 __initdata = {
|
||||
static struct platform_device mini2440_led1 = {
|
||||
.name = "s3c24xx_led",
|
||||
.id = 1,
|
||||
.dev = {
|
||||
|
@ -441,7 +441,7 @@ static struct platform_device mini2440_led1 __initdata = {
|
|||
},
|
||||
};
|
||||
|
||||
static struct platform_device mini2440_led2 __initdata = {
|
||||
static struct platform_device mini2440_led2 = {
|
||||
.name = "s3c24xx_led",
|
||||
.id = 2,
|
||||
.dev = {
|
||||
|
@ -449,7 +449,7 @@ static struct platform_device mini2440_led2 __initdata = {
|
|||
},
|
||||
};
|
||||
|
||||
static struct platform_device mini2440_led3 __initdata = {
|
||||
static struct platform_device mini2440_led3 = {
|
||||
.name = "s3c24xx_led",
|
||||
.id = 3,
|
||||
.dev = {
|
||||
|
@ -457,7 +457,7 @@ static struct platform_device mini2440_led3 __initdata = {
|
|||
},
|
||||
};
|
||||
|
||||
static struct platform_device mini2440_led4 __initdata = {
|
||||
static struct platform_device mini2440_led4 = {
|
||||
.name = "s3c24xx_led",
|
||||
.id = 4,
|
||||
.dev = {
|
||||
|
@ -465,7 +465,7 @@ static struct platform_device mini2440_led4 __initdata = {
|
|||
},
|
||||
};
|
||||
|
||||
static struct platform_device mini2440_led_backlight __initdata = {
|
||||
static struct platform_device mini2440_led_backlight = {
|
||||
.name = "s3c24xx_led",
|
||||
.id = 5,
|
||||
.dev = {
|
||||
|
@ -475,14 +475,14 @@ static struct platform_device mini2440_led_backlight __initdata = {
|
|||
|
||||
/* AUDIO */
|
||||
|
||||
static struct s3c24xx_uda134x_platform_data mini2440_audio_pins __initdata = {
|
||||
static struct s3c24xx_uda134x_platform_data mini2440_audio_pins = {
|
||||
.l3_clk = S3C2410_GPB(4),
|
||||
.l3_mode = S3C2410_GPB(2),
|
||||
.l3_data = S3C2410_GPB(3),
|
||||
.model = UDA134X_UDA1341
|
||||
};
|
||||
|
||||
static struct platform_device mini2440_audio __initdata = {
|
||||
static struct platform_device mini2440_audio = {
|
||||
.name = "s3c24xx_uda134x",
|
||||
.id = 0,
|
||||
.dev = {
|
||||
|
|
|
@ -82,7 +82,7 @@ static int hmt_bl_init(struct device *dev)
|
|||
return ret;
|
||||
}
|
||||
|
||||
static int hmt_bl_notify(int brightness)
|
||||
static int hmt_bl_notify(struct device *dev, int brightness)
|
||||
{
|
||||
/*
|
||||
* translate from CIELUV/CIELAB L*->brightness, E.G. from
|
||||
|
|
|
@ -211,6 +211,7 @@ static struct fixed_voltage_config smdk6410_b_pwr_5v_pdata = {
|
|||
.supply_name = "B_PWR_5V",
|
||||
.microvolts = 5000000,
|
||||
.init_data = &smdk6410_b_pwr_5v_data,
|
||||
.gpio = -EINVAL,
|
||||
};
|
||||
|
||||
static struct platform_device smdk6410_b_pwr_5v = {
|
||||
|
|
|
@ -11,6 +11,7 @@
|
|||
* it under the terms of the GNU General Public License version 2 as
|
||||
* published by the Free Software Foundation.
|
||||
*/
|
||||
#include <linux/moduleparam.h>
|
||||
#include <linux/compiler.h>
|
||||
#include <linux/kernel.h>
|
||||
#include <linux/errno.h>
|
||||
|
@ -77,6 +78,8 @@ static unsigned long ai_dword;
|
|||
static unsigned long ai_multi;
|
||||
static int ai_usermode;
|
||||
|
||||
core_param(alignment, ai_usermode, int, 0600);
|
||||
|
||||
#define UM_WARN (1 << 0)
|
||||
#define UM_FIXUP (1 << 1)
|
||||
#define UM_SIGNAL (1 << 2)
|
||||
|
|
|
@ -1067,4 +1067,6 @@ void setup_mm_for_reboot(char mode)
|
|||
pmd[1] = __pmd(pmdval + (1 << (PGDIR_SHIFT - 1)));
|
||||
flush_pmd_entry(pmd);
|
||||
}
|
||||
|
||||
local_flush_tlb_all();
|
||||
}
|
||||
|
|
|
@ -41,7 +41,7 @@ ENTRY(cpu_arm7_dcache_clean_area)
|
|||
ENTRY(cpu_arm7_data_abort)
|
||||
mrc p15, 0, r1, c5, c0, 0 @ get FSR
|
||||
mrc p15, 0, r0, c6, c0, 0 @ get FAR
|
||||
ldr r8, [r0] @ read arm instruction
|
||||
ldr r8, [r2] @ read arm instruction
|
||||
tst r8, #1 << 20 @ L = 0 -> write?
|
||||
orreq r1, r1, #1 << 11 @ yes.
|
||||
and r7, r8, #15 << 24
|
||||
|
|
|
@ -59,8 +59,6 @@ ENTRY(cpu_v6_proc_fin)
|
|||
* to what would be the reset vector.
|
||||
*
|
||||
* - loc - location to jump to for soft reset
|
||||
*
|
||||
* It is assumed that:
|
||||
*/
|
||||
.align 5
|
||||
ENTRY(cpu_v6_reset)
|
||||
|
|
|
@ -45,7 +45,14 @@ ENTRY(cpu_v7_proc_init)
|
|||
ENDPROC(cpu_v7_proc_init)
|
||||
|
||||
ENTRY(cpu_v7_proc_fin)
|
||||
mov pc, lr
|
||||
stmfd sp!, {lr}
|
||||
cpsid if @ disable interrupts
|
||||
bl v7_flush_kern_cache_all
|
||||
mrc p15, 0, r0, c1, c0, 0 @ ctrl register
|
||||
bic r0, r0, #0x1000 @ ...i............
|
||||
bic r0, r0, #0x0006 @ .............ca.
|
||||
mcr p15, 0, r0, c1, c0, 0 @ disable caches
|
||||
ldmfd sp!, {pc}
|
||||
ENDPROC(cpu_v7_proc_fin)
|
||||
|
||||
/*
|
||||
|
@ -56,8 +63,6 @@ ENDPROC(cpu_v7_proc_fin)
|
|||
* to what would be the reset vector.
|
||||
*
|
||||
* - loc - location to jump to for soft reset
|
||||
*
|
||||
* It is assumed that:
|
||||
*/
|
||||
.align 5
|
||||
ENTRY(cpu_v7_reset)
|
||||
|
|
|
@ -23,6 +23,7 @@
|
|||
#include <linux/err.h>
|
||||
#include <linux/io.h>
|
||||
#include <linux/clk.h>
|
||||
#include <linux/debugfs.h>
|
||||
#include <mach/audmux.h>
|
||||
#include <mach/hardware.h>
|
||||
|
||||
|
@ -32,6 +33,140 @@ static void __iomem *audmux_base;
|
|||
#define MXC_AUDMUX_V2_PTCR(x) ((x) * 8)
|
||||
#define MXC_AUDMUX_V2_PDCR(x) ((x) * 8 + 4)
|
||||
|
||||
#ifdef CONFIG_DEBUG_FS
|
||||
static struct dentry *audmux_debugfs_root;
|
||||
|
||||
static int audmux_open_file(struct inode *inode, struct file *file)
|
||||
{
|
||||
file->private_data = inode->i_private;
|
||||
return 0;
|
||||
}
|
||||
|
||||
/* There is an annoying discontinuity in the SSI numbering with regard
|
||||
* to the Linux number of the devices */
|
||||
static const char *audmux_port_string(int port)
|
||||
{
|
||||
switch (port) {
|
||||
case MX31_AUDMUX_PORT1_SSI0:
|
||||
return "imx-ssi.0";
|
||||
case MX31_AUDMUX_PORT2_SSI1:
|
||||
return "imx-ssi.1";
|
||||
case MX31_AUDMUX_PORT3_SSI_PINS_3:
|
||||
return "SSI3";
|
||||
case MX31_AUDMUX_PORT4_SSI_PINS_4:
|
||||
return "SSI4";
|
||||
case MX31_AUDMUX_PORT5_SSI_PINS_5:
|
||||
return "SSI5";
|
||||
case MX31_AUDMUX_PORT6_SSI_PINS_6:
|
||||
return "SSI6";
|
||||
default:
|
||||
return "UNKNOWN";
|
||||
}
|
||||
}
|
||||
|
||||
static ssize_t audmux_read_file(struct file *file, char __user *user_buf,
|
||||
size_t count, loff_t *ppos)
|
||||
{
|
||||
ssize_t ret;
|
||||
char *buf = kmalloc(PAGE_SIZE, GFP_KERNEL);
|
||||
int port = (int)file->private_data;
|
||||
u32 pdcr, ptcr;
|
||||
|
||||
if (!buf)
|
||||
return -ENOMEM;
|
||||
|
||||
if (audmux_clk)
|
||||
clk_enable(audmux_clk);
|
||||
|
||||
ptcr = readl(audmux_base + MXC_AUDMUX_V2_PTCR(port));
|
||||
pdcr = readl(audmux_base + MXC_AUDMUX_V2_PDCR(port));
|
||||
|
||||
if (audmux_clk)
|
||||
clk_disable(audmux_clk);
|
||||
|
||||
ret = snprintf(buf, PAGE_SIZE, "PDCR: %08x\nPTCR: %08x\n",
|
||||
pdcr, ptcr);
|
||||
|
||||
if (ptcr & MXC_AUDMUX_V2_PTCR_TFSDIR)
|
||||
ret += snprintf(buf + ret, PAGE_SIZE - ret,
|
||||
"TxFS output from %s, ",
|
||||
audmux_port_string((ptcr >> 27) & 0x7));
|
||||
else
|
||||
ret += snprintf(buf + ret, PAGE_SIZE - ret,
|
||||
"TxFS input, ");
|
||||
|
||||
if (ptcr & MXC_AUDMUX_V2_PTCR_TCLKDIR)
|
||||
ret += snprintf(buf + ret, PAGE_SIZE - ret,
|
||||
"TxClk output from %s",
|
||||
audmux_port_string((ptcr >> 22) & 0x7));
|
||||
else
|
||||
ret += snprintf(buf + ret, PAGE_SIZE - ret,
|
||||
"TxClk input");
|
||||
|
||||
ret += snprintf(buf + ret, PAGE_SIZE - ret, "\n");
|
||||
|
||||
if (ptcr & MXC_AUDMUX_V2_PTCR_SYN) {
|
||||
ret += snprintf(buf + ret, PAGE_SIZE - ret,
|
||||
"Port is symmetric");
|
||||
} else {
|
||||
if (ptcr & MXC_AUDMUX_V2_PTCR_RFSDIR)
|
||||
ret += snprintf(buf + ret, PAGE_SIZE - ret,
|
||||
"RxFS output from %s, ",
|
||||
audmux_port_string((ptcr >> 17) & 0x7));
|
||||
else
|
||||
ret += snprintf(buf + ret, PAGE_SIZE - ret,
|
||||
"RxFS input, ");
|
||||
|
||||
if (ptcr & MXC_AUDMUX_V2_PTCR_RCLKDIR)
|
||||
ret += snprintf(buf + ret, PAGE_SIZE - ret,
|
||||
"RxClk output from %s",
|
||||
audmux_port_string((ptcr >> 12) & 0x7));
|
||||
else
|
||||
ret += snprintf(buf + ret, PAGE_SIZE - ret,
|
||||
"RxClk input");
|
||||
}
|
||||
|
||||
ret += snprintf(buf + ret, PAGE_SIZE - ret,
|
||||
"\nData received from %s\n",
|
||||
audmux_port_string((pdcr >> 13) & 0x7));
|
||||
|
||||
ret = simple_read_from_buffer(user_buf, count, ppos, buf, ret);
|
||||
|
||||
kfree(buf);
|
||||
|
||||
return ret;
|
||||
}
|
||||
|
||||
static const struct file_operations audmux_debugfs_fops = {
|
||||
.open = audmux_open_file,
|
||||
.read = audmux_read_file,
|
||||
};
|
||||
|
||||
static void audmux_debugfs_init(void)
|
||||
{
|
||||
int i;
|
||||
char buf[20];
|
||||
|
||||
audmux_debugfs_root = debugfs_create_dir("audmux", NULL);
|
||||
if (!audmux_debugfs_root) {
|
||||
pr_warning("Failed to create AUDMUX debugfs root\n");
|
||||
return;
|
||||
}
|
||||
|
||||
for (i = 1; i < 8; i++) {
|
||||
snprintf(buf, sizeof(buf), "ssi%d", i);
|
||||
if (!debugfs_create_file(buf, 0444, audmux_debugfs_root,
|
||||
(void *)i, &audmux_debugfs_fops))
|
||||
pr_warning("Failed to create AUDMUX port %d debugfs file\n",
|
||||
i);
|
||||
}
|
||||
}
|
||||
#else
|
||||
static inline void audmux_debugfs_init(void)
|
||||
{
|
||||
}
|
||||
#endif
|
||||
|
||||
int mxc_audmux_v2_configure_port(unsigned int port, unsigned int ptcr,
|
||||
unsigned int pdcr)
|
||||
{
|
||||
|
@ -68,6 +203,8 @@ static int mxc_audmux_v2_init(void)
|
|||
if (cpu_is_mx31() || cpu_is_mx35())
|
||||
audmux_base = IO_ADDRESS(AUDMUX_BASE_ADDR);
|
||||
|
||||
audmux_debugfs_init();
|
||||
|
||||
return 0;
|
||||
}
|
||||
|
||||
|
|
|
@ -25,7 +25,7 @@
|
|||
|
||||
#ifndef __ASSEMBLY__
|
||||
|
||||
enum mx31lilly_boards {
|
||||
enum mx31lite_boards {
|
||||
MX31LITE_NOBOARD = 0,
|
||||
MX31LITE_DB = 1,
|
||||
};
|
||||
|
|
|
@ -32,7 +32,7 @@ extern void mxc91231_init_irq(void);
|
|||
extern void mxc_timer_init(struct clk *timer_clk, void __iomem *, int);
|
||||
extern int mx1_clocks_init(unsigned long fref);
|
||||
extern int mx21_clocks_init(unsigned long lref, unsigned long fref);
|
||||
extern int mx25_clocks_init(unsigned long fref);
|
||||
extern int mx25_clocks_init(void);
|
||||
extern int mx27_clocks_init(unsigned long fref);
|
||||
extern int mx31_clocks_init(unsigned long fref);
|
||||
extern int mx35_clocks_init(void);
|
||||
|
|
|
@ -671,7 +671,7 @@
|
|||
#define MX35_PAD_LD8__SDMA_SDMA_DEBUG_PC_8 IOMUX_PAD(0x634, 0x1d0, 6, 0x0, 0, NO_PAD_CTRL)
|
||||
|
||||
#define MX35_PAD_LD9__IPU_DISPB_DAT_9 IOMUX_PAD(0x638, 0x1d4, 0, 0x0, 0, NO_PAD_CTRL)
|
||||
#define MX35_PAD_LD9__GPIO2_9 IOMUX_PAD(0x638, 0x1d4, 5, 0x8e4 0, NO_PAD_CTRL)
|
||||
#define MX35_PAD_LD9__GPIO2_9 IOMUX_PAD(0x638, 0x1d4, 5, 0x8e4, 0, NO_PAD_CTRL)
|
||||
#define MX35_PAD_LD9__SDMA_SDMA_DEBUG_PC_9 IOMUX_PAD(0x638, 0x1d4, 6, 0x0, 0, NO_PAD_CTRL)
|
||||
|
||||
#define MX35_PAD_LD10__IPU_DISPB_DAT_10 IOMUX_PAD(0x63c, 0x1d8, 0, 0x0, 0, NO_PAD_CTRL)
|
||||
|
|
|
@ -37,7 +37,12 @@
|
|||
* within sensible limits.
|
||||
*/
|
||||
#define MXC_BOARD_IRQ_START (MXC_INTERNAL_IRQS + MXC_GPIO_IRQS)
|
||||
|
||||
#ifdef CONFIG_MACH_MX31ADS_WM1133_EV1
|
||||
#define MXC_BOARD_IRQS 80
|
||||
#else
|
||||
#define MXC_BOARD_IRQS 16
|
||||
#endif
|
||||
|
||||
#define MXC_IPU_IRQ_START (MXC_BOARD_IRQ_START + MXC_BOARD_IRQS)
|
||||
|
||||
|
|
|
@ -60,7 +60,9 @@ static void putc(int ch)
|
|||
UART(TXR) = ch;
|
||||
}
|
||||
|
||||
#define flush() do { } while (0)
|
||||
static inline void flush(void)
|
||||
{
|
||||
}
|
||||
|
||||
#define MX1_UART1_BASE_ADDR 0x00206000
|
||||
#define MX25_UART1_BASE_ADDR 0x43f90000
|
||||
|
|
|
@ -391,7 +391,7 @@ static struct dentry *clk_debugfs_root;
|
|||
static int clk_debugfs_register_one(struct clk *c)
|
||||
{
|
||||
int err;
|
||||
struct dentry *d, *child;
|
||||
struct dentry *d, *child, *child_tmp;
|
||||
struct clk *pa = c->parent;
|
||||
char s[255];
|
||||
char *p = s;
|
||||
|
@ -423,7 +423,7 @@ static int clk_debugfs_register_one(struct clk *c)
|
|||
|
||||
err_out:
|
||||
d = c->dent;
|
||||
list_for_each_entry(child, &d->d_subdirs, d_u.d_child)
|
||||
list_for_each_entry_safe(child, child_tmp, &d->d_subdirs, d_u.d_child)
|
||||
debugfs_remove(child);
|
||||
debugfs_remove(c->dent);
|
||||
return err;
|
||||
|
|
|
@ -172,6 +172,32 @@ unsigned long long sched_clock(void)
|
|||
clocksource_32k.mult, clocksource_32k.shift);
|
||||
}
|
||||
|
||||
/**
|
||||
* read_persistent_clock - Return time from a persistent clock.
|
||||
*
|
||||
* Reads the time from a source which isn't disabled during PM, the
|
||||
* 32k sync timer. Convert the cycles elapsed since last read into
|
||||
* nsecs and adds to a monotonically increasing timespec.
|
||||
*/
|
||||
static struct timespec persistent_ts;
|
||||
static cycles_t cycles, last_cycles;
|
||||
void read_persistent_clock(struct timespec *ts)
|
||||
{
|
||||
unsigned long long nsecs;
|
||||
cycles_t delta;
|
||||
struct timespec *tsp = &persistent_ts;
|
||||
|
||||
last_cycles = cycles;
|
||||
cycles = clocksource_32k.read(&clocksource_32k);
|
||||
delta = cycles - last_cycles;
|
||||
|
||||
nsecs = clocksource_cyc2ns(delta,
|
||||
clocksource_32k.mult, clocksource_32k.shift);
|
||||
|
||||
timespec_add_ns(tsp, nsecs);
|
||||
*ts = *tsp;
|
||||
}
|
||||
|
||||
static int __init omap_init_clocksource_32k(void)
|
||||
{
|
||||
static char err[] __initdata = KERN_ERR
|
||||
|
|
|
@ -1183,7 +1183,7 @@ void omap_dma_unlink_lch(int lch_head, int lch_queue)
|
|||
}
|
||||
|
||||
if ((dma_chan[lch_head].flags & OMAP_DMA_ACTIVE) ||
|
||||
(dma_chan[lch_head].flags & OMAP_DMA_ACTIVE)) {
|
||||
(dma_chan[lch_queue].flags & OMAP_DMA_ACTIVE)) {
|
||||
printk(KERN_ERR "omap_dma: You need to stop the DMA channels "
|
||||
"before unlinking\n");
|
||||
dump_stack();
|
||||
|
|
|
@ -551,6 +551,19 @@ void omap_dm_timer_stop(struct omap_dm_timer *timer)
|
|||
if (l & OMAP_TIMER_CTRL_ST) {
|
||||
l &= ~0x1;
|
||||
omap_dm_timer_write_reg(timer, OMAP_TIMER_CTRL_REG, l);
|
||||
#if defined(CONFIG_ARCH_OMAP2) || defined(CONFIG_ARCH_OMAP3) || \
|
||||
defined(CONFIG_ARCH_OMAP4)
|
||||
/* Readback to make sure write has completed */
|
||||
omap_dm_timer_read_reg(timer, OMAP_TIMER_CTRL_REG);
|
||||
/*
|
||||
* Wait for functional clock period x 3.5 to make sure that
|
||||
* timer is stopped
|
||||
*/
|
||||
udelay(3500000 / clk_get_rate(timer->fclk) + 1);
|
||||
/* Ack possibly pending interrupt */
|
||||
omap_dm_timer_write_reg(timer, OMAP_TIMER_STAT_REG,
|
||||
OMAP_TIMER_INT_OVERFLOW);
|
||||
#endif
|
||||
}
|
||||
}
|
||||
EXPORT_SYMBOL_GPL(omap_dm_timer_stop);
|
||||
|
|
|
@ -750,6 +750,7 @@ static inline void set_24xx_gpio_triggering(struct gpio_bank *bank, int gpio,
|
|||
}
|
||||
#endif
|
||||
|
||||
#ifdef CONFIG_ARCH_OMAP1
|
||||
/*
|
||||
* This only applies to chips that can't do both rising and falling edge
|
||||
* detection at once. For all other chips, this function is a noop.
|
||||
|
@ -760,11 +761,9 @@ static void _toggle_gpio_edge_triggering(struct gpio_bank *bank, int gpio)
|
|||
u32 l = 0;
|
||||
|
||||
switch (bank->method) {
|
||||
#ifdef CONFIG_ARCH_OMAP1
|
||||
case METHOD_MPUIO:
|
||||
reg += OMAP_MPUIO_GPIO_INT_EDGE;
|
||||
break;
|
||||
#endif
|
||||
#ifdef CONFIG_ARCH_OMAP15XX
|
||||
case METHOD_GPIO_1510:
|
||||
reg += OMAP1510_GPIO_INT_CONTROL;
|
||||
|
@ -787,6 +786,7 @@ static void _toggle_gpio_edge_triggering(struct gpio_bank *bank, int gpio)
|
|||
|
||||
__raw_writel(l, reg);
|
||||
}
|
||||
#endif
|
||||
|
||||
static int _set_gpio_triggering(struct gpio_bank *bank, int gpio, int trigger)
|
||||
{
|
||||
|
|
|
@ -434,6 +434,7 @@ IS_OMAP_TYPE(3517, 0x3517)
|
|||
#define OMAP3430_REV_ES2_1 0x34302034
|
||||
#define OMAP3430_REV_ES3_0 0x34303034
|
||||
#define OMAP3430_REV_ES3_1 0x34304034
|
||||
#define OMAP3430_REV_ES3_1_2 0x34305034
|
||||
|
||||
#define OMAP3630_REV_ES1_0 0x36300034
|
||||
|
||||
|
|
|
@ -499,6 +499,9 @@ extern void omap_init_irq(void);
|
|||
extern int omap_irq_pending(void);
|
||||
void omap_intc_save_context(void);
|
||||
void omap_intc_restore_context(void);
|
||||
void omap3_intc_suspend(void);
|
||||
void omap3_intc_prepare_idle(void);
|
||||
void omap3_intc_resume_idle(void);
|
||||
#endif
|
||||
|
||||
#include <mach/hardware.h>
|
||||
|
|
|
@ -227,6 +227,7 @@ struct omap_hwmod_ocp_if {
|
|||
#define SYSC_HAS_SIDLEMODE (1 << 5)
|
||||
#define SYSC_HAS_MIDLEMODE (1 << 6)
|
||||
#define SYSS_MISSING (1 << 7)
|
||||
#define SYSC_NO_CACHE (1 << 8) /* XXX SW flag, belongs elsewhere */
|
||||
|
||||
/* omap_hwmod_sysconfig.clockact flags */
|
||||
#define CLOCKACT_TEST_BOTH 0x0
|
||||
|
|
|
@ -89,16 +89,6 @@
|
|||
#define USE_WAKEUP_LAT 0
|
||||
#define IGNORE_WAKEUP_LAT 1
|
||||
|
||||
/* XXX this should be moved into a separate file */
|
||||
#if defined(CONFIG_ARCH_OMAP2420)
|
||||
# define OMAP_32KSYNCT_BASE 0x48004000
|
||||
#elif defined(CONFIG_ARCH_OMAP2430)
|
||||
# define OMAP_32KSYNCT_BASE 0x49020000
|
||||
#elif defined(CONFIG_ARCH_OMAP3430)
|
||||
# define OMAP_32KSYNCT_BASE 0x48320000
|
||||
#else
|
||||
# error Unknown OMAP device
|
||||
#endif
|
||||
|
||||
/* Private functions */
|
||||
|
||||
|
|
|
@ -132,6 +132,12 @@ static void __init orion_pcie_setup_wins(void __iomem *base,
|
|||
size += cs->size;
|
||||
}
|
||||
|
||||
/*
|
||||
* Round up 'size' to the nearest power of two.
|
||||
*/
|
||||
if ((size & (size - 1)) != 0)
|
||||
size = 1 << fls(size);
|
||||
|
||||
/*
|
||||
* Setup BAR[1] to all DRAM banks.
|
||||
*/
|
||||
|
|
|
@ -58,8 +58,8 @@ static int __init s3c_nand_copy_set(struct s3c2410_nand_set *set)
|
|||
return -ENOMEM;
|
||||
}
|
||||
|
||||
size = sizeof(int) * set->nr_chips;
|
||||
if (size) {
|
||||
if (set->nr_map && set->nr_chips) {
|
||||
size = sizeof(int) * set->nr_chips;
|
||||
ptr = kmemdup(set->nr_map, size, GFP_KERNEL);
|
||||
set->nr_map = ptr;
|
||||
|
||||
|
|
|
@ -12,7 +12,7 @@
|
|||
#
|
||||
# http://www.arm.linux.org.uk/developer/machines/?action=new
|
||||
#
|
||||
# Last update: Wed Dec 16 20:06:34 2009
|
||||
# Last update: Sat Feb 20 14:16:15 2010
|
||||
#
|
||||
# machine_is_xxx CONFIG_xxxx MACH_TYPE_xxx number
|
||||
#
|
||||
|
@ -2257,7 +2257,7 @@ oratisalog MACH_ORATISALOG ORATISALOG 2268
|
|||
oratismadi MACH_ORATISMADI ORATISMADI 2269
|
||||
oratisot16 MACH_ORATISOT16 ORATISOT16 2270
|
||||
oratisdesk MACH_ORATISDESK ORATISDESK 2271
|
||||
v2_ca9 MACH_V2P_CA9 V2P_CA9 2272
|
||||
vexpress MACH_VEXPRESS VEXPRESS 2272
|
||||
sintexo MACH_SINTEXO SINTEXO 2273
|
||||
cm3389 MACH_CM3389 CM3389 2274
|
||||
omap3_cio MACH_OMAP3_CIO OMAP3_CIO 2275
|
||||
|
@ -2536,6 +2536,7 @@ davinci_dm6467tevm MACH_DAVINCI_DM6467TEVM DAVINCI_DM6467TEVM 2548
|
|||
c3ax03 MACH_C3AX03 C3AX03 2549
|
||||
mxt_td60 MACH_MXT_TD60 MXT_TD60 2550
|
||||
esyx MACH_ESYX ESYX 2551
|
||||
dove_db2 MACH_DOVE_DB2 DOVE_DB2 2552
|
||||
bulldog MACH_BULLDOG BULLDOG 2553
|
||||
derell_me2000 MACH_DERELL_ME2000 DERELL_ME2000 2554
|
||||
bcmring_base MACH_BCMRING_BASE BCMRING_BASE 2555
|
||||
|
@ -2555,6 +2556,7 @@ iseo MACH_ISEO ISEO 2568
|
|||
cezanne MACH_CEZANNE CEZANNE 2569
|
||||
lucca MACH_LUCCA LUCCA 2570
|
||||
supersmart MACH_SUPERSMART SUPERSMART 2571
|
||||
arm11_board MACH_CS_MISANO CS_MISANO 2572
|
||||
magnolia2 MACH_MAGNOLIA2 MAGNOLIA2 2573
|
||||
emxx MACH_EMXX EMXX 2574
|
||||
outlaw MACH_OUTLAW OUTLAW 2575
|
||||
|
@ -2578,3 +2580,101 @@ glacier MACH_GLACIER GLACIER 2592
|
|||
phrazer_bulldog MACH_PHRAZER_BULLDOG PHRAZER_BULLDOG 2593
|
||||
omap3_bulldog MACH_OMAP3_BULLDOG OMAP3_BULLDOG 2594
|
||||
pca101 MACH_PCA101 PCA101 2595
|
||||
buzzc MACH_BUZZC BUZZC 2596
|
||||
sasie2 MACH_SASIE2 SASIE2 2597
|
||||
davinci_cio MACH_DAVINCI_CIO DAVINCI_CIO 2598
|
||||
smartmeter_dl MACH_SMARTMETER_DL SMARTMETER_DL 2599
|
||||
wzl6410 MACH_WZL6410 WZL6410 2600
|
||||
wzl6410m MACH_WZL6410M WZL6410M 2601
|
||||
wzl6410f MACH_WZL6410F WZL6410F 2602
|
||||
wzl6410i MACH_WZL6410I WZL6410I 2603
|
||||
spacecom1 MACH_SPACECOM1 SPACECOM1 2604
|
||||
pingu920 MACH_PINGU920 PINGU920 2605
|
||||
bravoc MACH_BRAVOC BRAVOC 2606
|
||||
cybo2440 MACH_CYBO2440 CYBO2440 2607
|
||||
vdssw MACH_VDSSW VDSSW 2608
|
||||
romulus MACH_ROMULUS ROMULUS 2609
|
||||
omap_magic MACH_OMAP_MAGIC OMAP_MAGIC 2610
|
||||
eltd100 MACH_ELTD100 ELTD100 2611
|
||||
capc7117 MACH_CAPC7117 CAPC7117 2612
|
||||
swan MACH_SWAN SWAN 2613
|
||||
veu MACH_VEU VEU 2614
|
||||
rm2 MACH_RM2 RM2 2615
|
||||
tt2100 MACH_TT2100 TT2100 2616
|
||||
venice MACH_VENICE VENICE 2617
|
||||
pc7323 MACH_PC7323 PC7323 2618
|
||||
masp MACH_MASP MASP 2619
|
||||
fujitsu_tvstbsoc0 MACH_FUJITSU_TVSTBSOC FUJITSU_TVSTBSOC 2620
|
||||
fujitsu_tvstbsoc1 MACH_FUJITSU_TVSTBSOC1 FUJITSU_TVSTBSOC1 2621
|
||||
lexikon MACH_LEXIKON LEXIKON 2622
|
||||
mini2440v2 MACH_MINI2440V2 MINI2440V2 2623
|
||||
icontrol MACH_ICONTROL ICONTROL 2624
|
||||
sheevad MACH_SHEEVAD SHEEVAD 2625
|
||||
qsd8x50a_st1_1 MACH_QSD8X50A_ST1_1 QSD8X50A_ST1_1 2626
|
||||
qsd8x50a_st1_5 MACH_QSD8X50A_ST1_5 QSD8X50A_ST1_5 2627
|
||||
bee MACH_BEE BEE 2628
|
||||
mx23evk MACH_MX23EVK MX23EVK 2629
|
||||
ap4evb MACH_AP4EVB AP4EVB 2630
|
||||
stockholm MACH_STOCKHOLM STOCKHOLM 2631
|
||||
lpc_h3131 MACH_LPC_H3131 LPC_H3131 2632
|
||||
stingray MACH_STINGRAY STINGRAY 2633
|
||||
kraken MACH_KRAKEN KRAKEN 2634
|
||||
gw2388 MACH_GW2388 GW2388 2635
|
||||
jadecpu MACH_JADECPU JADECPU 2636
|
||||
carlisle MACH_CARLISLE CARLISLE 2637
|
||||
lux_sf9 MACH_LUX_SFT9 LUX_SFT9 2638
|
||||
nemid_tb MACH_NEMID_TB NEMID_TB 2639
|
||||
terrier MACH_TERRIER TERRIER 2640
|
||||
turbot MACH_TURBOT TURBOT 2641
|
||||
sanddab MACH_SANDDAB SANDDAB 2642
|
||||
mx35_cicada MACH_MX35_CICADA MX35_CICADA 2643
|
||||
ghi2703d MACH_GHI2703D GHI2703D 2644
|
||||
lux_sfx9 MACH_LUX_SFX9 LUX_SFX9 2645
|
||||
lux_sf9g MACH_LUX_SF9G LUX_SF9G 2646
|
||||
lux_edk9 MACH_LUX_EDK9 LUX_EDK9 2647
|
||||
hw90240 MACH_HW90240 HW90240 2648
|
||||
dm365_leopard MACH_DM365_LEOPARD DM365_LEOPARD 2649
|
||||
mityomapl138 MACH_MITYOMAPL138 MITYOMAPL138 2650
|
||||
scat110 MACH_SCAT110 SCAT110 2651
|
||||
acer_a1 MACH_ACER_A1 ACER_A1 2652
|
||||
cmcontrol MACH_CMCONTROL CMCONTROL 2653
|
||||
pelco_lamar MACH_PELCO_LAMAR PELCO_LAMAR 2654
|
||||
rfp43 MACH_RFP43 RFP43 2655
|
||||
sk86r0301 MACH_SK86R0301 SK86R0301 2656
|
||||
ctpxa MACH_CTPXA CTPXA 2657
|
||||
epb_arm9_a MACH_EPB_ARM9_A EPB_ARM9_A 2658
|
||||
guruplug MACH_GURUPLUG GURUPLUG 2659
|
||||
spear310 MACH_SPEAR310 SPEAR310 2660
|
||||
spear320 MACH_SPEAR320 SPEAR320 2661
|
||||
robotx MACH_ROBOTX ROBOTX 2662
|
||||
lsxhl MACH_LSXHL LSXHL 2663
|
||||
smartlite MACH_SMARTLITE SMARTLITE 2664
|
||||
cws2 MACH_CWS2 CWS2 2665
|
||||
m619 MACH_M619 M619 2666
|
||||
smartview MACH_SMARTVIEW SMARTVIEW 2667
|
||||
lsa_salsa MACH_LSA_SALSA LSA_SALSA 2668
|
||||
kizbox MACH_KIZBOX KIZBOX 2669
|
||||
htccharmer MACH_HTCCHARMER HTCCHARMER 2670
|
||||
guf_neso_lt MACH_GUF_NESO_LT GUF_NESO_LT 2671
|
||||
pm9g45 MACH_PM9G45 PM9G45 2672
|
||||
htcpanther MACH_HTCPANTHER HTCPANTHER 2673
|
||||
htcpanther_cdma MACH_HTCPANTHER_CDMA HTCPANTHER_CDMA 2674
|
||||
reb01 MACH_REB01 REB01 2675
|
||||
aquila MACH_AQUILA AQUILA 2676
|
||||
spark_sls_hw2 MACH_SPARK_SLS_HW2 SPARK_SLS_HW2 2677
|
||||
sheeva_esata MACH_ESATA_SHEEVAPLUG ESATA_SHEEVAPLUG 2678
|
||||
surf7x30 MACH_SURF7X30 SURF7X30 2679
|
||||
micro2440 MACH_MICRO2440 MICRO2440 2680
|
||||
am2440 MACH_AM2440 AM2440 2681
|
||||
tq2440 MACH_TQ2440 TQ2440 2682
|
||||
lpc2478oem MACH_LPC2478OEM LPC2478OEM 2683
|
||||
ak880x MACH_AK880X AK880X 2684
|
||||
cobra3530 MACH_COBRA3530 COBRA3530 2685
|
||||
pmppb MACH_PMPPB PMPPB 2686
|
||||
u6715 MACH_U6715 U6715 2687
|
||||
axar1500_sender MACH_AXAR1500_SENDER AXAR1500_SENDER 2688
|
||||
g30_dvb MACH_G30_DVB G30_DVB 2689
|
||||
vc088x MACH_VC088X VC088X 2690
|
||||
mioa702 MACH_MIOA702 MIOA702 2691
|
||||
hpmin MACH_HPMIN HPMIN 2692
|
||||
ak880xak MACH_AK880XAK AK880XAK 2693
|
||||
|
|
|
@ -197,10 +197,13 @@ static void vfp_raise_exceptions(u32 exceptions, u32 inst, u32 fpscr, struct pt_
|
|||
}
|
||||
|
||||
/*
|
||||
* Update the FPSCR with the additional exception flags.
|
||||
* If any of the status flags are set, update the FPSCR.
|
||||
* Comparison instructions always return at least one of
|
||||
* these flags set.
|
||||
*/
|
||||
if (exceptions & (FPSCR_N|FPSCR_Z|FPSCR_C|FPSCR_V))
|
||||
fpscr &= ~(FPSCR_N|FPSCR_Z|FPSCR_C|FPSCR_V);
|
||||
|
||||
fpscr |= exceptions;
|
||||
|
||||
fmxr(FPSCR, fpscr);
|
||||
|
|
|
@ -1325,7 +1325,7 @@ struct platform_device *__init
|
|||
at32_add_device_mci(unsigned int id, struct mci_platform_data *data)
|
||||
{
|
||||
struct platform_device *pdev;
|
||||
struct mci_dma_slave *slave;
|
||||
struct mci_dma_data *slave;
|
||||
u32 pioa_mask;
|
||||
u32 piob_mask;
|
||||
|
||||
|
@ -1344,7 +1344,9 @@ at32_add_device_mci(unsigned int id, struct mci_platform_data *data)
|
|||
ARRAY_SIZE(atmel_mci0_resource)))
|
||||
goto fail;
|
||||
|
||||
slave = kzalloc(sizeof(struct mci_dma_slave), GFP_KERNEL);
|
||||
slave = kzalloc(sizeof(struct mci_dma_data), GFP_KERNEL);
|
||||
if (!slave)
|
||||
goto fail;
|
||||
|
||||
slave->sdata.dma_dev = &dw_dmac0_device.dev;
|
||||
slave->sdata.reg_width = DW_DMA_SLAVE_WIDTH_32BIT;
|
||||
|
@ -1357,7 +1359,7 @@ at32_add_device_mci(unsigned int id, struct mci_platform_data *data)
|
|||
|
||||
if (platform_device_add_data(pdev, data,
|
||||
sizeof(struct mci_platform_data)))
|
||||
goto fail;
|
||||
goto fail_free;
|
||||
|
||||
/* CLK line is common to both slots */
|
||||
pioa_mask = 1 << 10;
|
||||
|
@ -1381,7 +1383,7 @@ at32_add_device_mci(unsigned int id, struct mci_platform_data *data)
|
|||
/* Slot is unused */
|
||||
break;
|
||||
default:
|
||||
goto fail;
|
||||
goto fail_free;
|
||||
}
|
||||
|
||||
select_peripheral(PIOA, pioa_mask, PERIPH_A, 0);
|
||||
|
@ -1408,7 +1410,7 @@ at32_add_device_mci(unsigned int id, struct mci_platform_data *data)
|
|||
break;
|
||||
default:
|
||||
if (!data->slot[0].bus_width)
|
||||
goto fail;
|
||||
goto fail_free;
|
||||
|
||||
data->slot[1].bus_width = 0;
|
||||
break;
|
||||
|
@ -1419,9 +1421,10 @@ at32_add_device_mci(unsigned int id, struct mci_platform_data *data)
|
|||
platform_device_add(pdev);
|
||||
return pdev;
|
||||
|
||||
fail_free:
|
||||
kfree(slave);
|
||||
fail:
|
||||
data->dma_slave = NULL;
|
||||
kfree(slave);
|
||||
platform_device_put(pdev);
|
||||
return NULL;
|
||||
}
|
||||
|
|
|
@ -94,6 +94,7 @@ ia64_acpi_release_global_lock (unsigned int *lock)
|
|||
#define acpi_noirq 0 /* ACPI always enabled on IA64 */
|
||||
#define acpi_pci_disabled 0 /* ACPI PCI always enabled on IA64 */
|
||||
#define acpi_strict 1 /* no ACPI spec workarounds on IA64 */
|
||||
#define acpi_ht 0 /* no HT-only mode on IA64 */
|
||||
#endif
|
||||
#define acpi_processor_cstate_check(x) (x) /* no idle limits on IA64 :) */
|
||||
static inline void disable_acpi(void) { }
|
||||
|
|
|
@ -201,7 +201,9 @@ extern void ia64_elf_core_copy_regs (struct pt_regs *src, elf_gregset_t dst);
|
|||
relevant until we have real hardware to play with... */
|
||||
#define ELF_PLATFORM NULL
|
||||
|
||||
#define SET_PERSONALITY(ex) set_personality(PER_LINUX)
|
||||
#define SET_PERSONALITY(ex) \
|
||||
set_personality((current->personality & ~PER_MASK) | PER_LINUX)
|
||||
|
||||
#define elf_read_implies_exec(ex, executable_stack) \
|
||||
((executable_stack!=EXSTACK_DISABLE_X) && ((ex).e_flags & EF_IA_64_LINUX_EXECUTABLE_STACK) != 0)
|
||||
|
||||
|
|
|
@ -71,7 +71,7 @@ EXPORT_SYMBOL(sn_rtc_cycles_per_second);
|
|||
DEFINE_PER_CPU(struct sn_hub_info_s, __sn_hub_info);
|
||||
EXPORT_PER_CPU_SYMBOL(__sn_hub_info);
|
||||
|
||||
DEFINE_PER_CPU(short [MAX_COMPACT_NODES], __sn_cnodeid_to_nasid);
|
||||
DEFINE_PER_CPU(short, __sn_cnodeid_to_nasid[MAX_COMPACT_NODES]);
|
||||
EXPORT_PER_CPU_SYMBOL(__sn_cnodeid_to_nasid);
|
||||
|
||||
DEFINE_PER_CPU(struct nodepda_s *, __sn_nodepda);
|
||||
|
|
|
@ -146,7 +146,6 @@ static struct clocksource pit_clk = {
|
|||
.read = pit_read_clk,
|
||||
.shift = 20,
|
||||
.mask = CLOCKSOURCE_MASK(32),
|
||||
.flags = CLOCK_SOURCE_IS_CONTINUOUS,
|
||||
};
|
||||
|
||||
/***************************************************************************/
|
||||
|
|
|
@ -90,7 +90,7 @@ source "arch/microblaze/platform/Kconfig.platform"
|
|||
|
||||
menu "Processor type and features"
|
||||
|
||||
source kernel/time/Kconfig
|
||||
source "kernel/time/Kconfig"
|
||||
|
||||
source "kernel/Kconfig.preempt"
|
||||
|
||||
|
|
|
@ -1,7 +1,7 @@
|
|||
#
|
||||
# Automatically generated make config: don't edit
|
||||
# Linux kernel version: 2.6.31
|
||||
# Thu Sep 24 10:28:50 2009
|
||||
# Linux kernel version: 2.6.33-rc6
|
||||
# Wed Feb 3 10:02:59 2010
|
||||
#
|
||||
CONFIG_MICROBLAZE=y
|
||||
# CONFIG_SWAP is not set
|
||||
|
@ -19,8 +19,12 @@ CONFIG_GENERIC_CLOCKEVENTS=y
|
|||
CONFIG_GENERIC_HARDIRQS_NO__DO_IRQ=y
|
||||
CONFIG_GENERIC_GPIO=y
|
||||
CONFIG_GENERIC_CSUM=y
|
||||
CONFIG_STACKTRACE_SUPPORT=y
|
||||
CONFIG_LOCKDEP_SUPPORT=y
|
||||
CONFIG_HAVE_LATENCYTOP_SUPPORT=y
|
||||
# CONFIG_PCI is not set
|
||||
CONFIG_NO_DMA=y
|
||||
CONFIG_DTC=y
|
||||
CONFIG_DEFCONFIG_LIST="/lib/modules/$UNAME_RELEASE/.config"
|
||||
CONFIG_CONSTRUCTORS=y
|
||||
|
||||
|
@ -44,6 +48,7 @@ CONFIG_SYSVIPC_SYSCTL=y
|
|||
#
|
||||
CONFIG_TREE_RCU=y
|
||||
# CONFIG_TREE_PREEMPT_RCU is not set
|
||||
# CONFIG_TINY_RCU is not set
|
||||
# CONFIG_RCU_TRACE is not set
|
||||
CONFIG_RCU_FANOUT=32
|
||||
# CONFIG_RCU_FANOUT_EXACT is not set
|
||||
|
@ -64,10 +69,12 @@ CONFIG_INITRAMFS_ROOT_GID=0
|
|||
CONFIG_RD_GZIP=y
|
||||
# CONFIG_RD_BZIP2 is not set
|
||||
# CONFIG_RD_LZMA is not set
|
||||
# CONFIG_RD_LZO is not set
|
||||
# CONFIG_INITRAMFS_COMPRESSION_NONE is not set
|
||||
CONFIG_INITRAMFS_COMPRESSION_GZIP=y
|
||||
# CONFIG_INITRAMFS_COMPRESSION_BZIP2 is not set
|
||||
# CONFIG_INITRAMFS_COMPRESSION_LZMA is not set
|
||||
# CONFIG_INITRAMFS_COMPRESSION_LZO is not set
|
||||
# CONFIG_CC_OPTIMIZE_FOR_SIZE is not set
|
||||
CONFIG_SYSCTL=y
|
||||
CONFIG_ANON_INODES=y
|
||||
|
@ -90,21 +97,20 @@ CONFIG_EVENTFD=y
|
|||
CONFIG_AIO=y
|
||||
|
||||
#
|
||||
# Performance Counters
|
||||
# Kernel Performance Events And Counters
|
||||
#
|
||||
CONFIG_VM_EVENT_COUNTERS=y
|
||||
# CONFIG_STRIP_ASM_SYMS is not set
|
||||
CONFIG_COMPAT_BRK=y
|
||||
CONFIG_SLAB=y
|
||||
# CONFIG_SLUB is not set
|
||||
# CONFIG_SLOB is not set
|
||||
# CONFIG_PROFILING is not set
|
||||
# CONFIG_MARKERS is not set
|
||||
CONFIG_HAVE_OPROFILE=y
|
||||
|
||||
#
|
||||
# GCOV-based kernel profiling
|
||||
#
|
||||
# CONFIG_SLOW_WORK is not set
|
||||
CONFIG_SLOW_WORK=y
|
||||
# CONFIG_HAVE_GENERIC_DMA_COHERENT is not set
|
||||
CONFIG_SLABINFO=y
|
||||
CONFIG_BASE_SMALL=1
|
||||
|
@ -123,14 +129,41 @@ CONFIG_LBDAF=y
|
|||
# IO Schedulers
|
||||
#
|
||||
CONFIG_IOSCHED_NOOP=y
|
||||
CONFIG_IOSCHED_AS=y
|
||||
CONFIG_IOSCHED_DEADLINE=y
|
||||
CONFIG_IOSCHED_CFQ=y
|
||||
# CONFIG_DEFAULT_AS is not set
|
||||
# CONFIG_DEFAULT_DEADLINE is not set
|
||||
CONFIG_DEFAULT_CFQ=y
|
||||
# CONFIG_DEFAULT_NOOP is not set
|
||||
CONFIG_DEFAULT_IOSCHED="cfq"
|
||||
# CONFIG_INLINE_SPIN_TRYLOCK is not set
|
||||
# CONFIG_INLINE_SPIN_TRYLOCK_BH is not set
|
||||
# CONFIG_INLINE_SPIN_LOCK is not set
|
||||
# CONFIG_INLINE_SPIN_LOCK_BH is not set
|
||||
# CONFIG_INLINE_SPIN_LOCK_IRQ is not set
|
||||
# CONFIG_INLINE_SPIN_LOCK_IRQSAVE is not set
|
||||
# CONFIG_INLINE_SPIN_UNLOCK is not set
|
||||
# CONFIG_INLINE_SPIN_UNLOCK_BH is not set
|
||||
# CONFIG_INLINE_SPIN_UNLOCK_IRQ is not set
|
||||
# CONFIG_INLINE_SPIN_UNLOCK_IRQRESTORE is not set
|
||||
# CONFIG_INLINE_READ_TRYLOCK is not set
|
||||
# CONFIG_INLINE_READ_LOCK is not set
|
||||
# CONFIG_INLINE_READ_LOCK_BH is not set
|
||||
# CONFIG_INLINE_READ_LOCK_IRQ is not set
|
||||
# CONFIG_INLINE_READ_LOCK_IRQSAVE is not set
|
||||
# CONFIG_INLINE_READ_UNLOCK is not set
|
||||
# CONFIG_INLINE_READ_UNLOCK_BH is not set
|
||||
# CONFIG_INLINE_READ_UNLOCK_IRQ is not set
|
||||
# CONFIG_INLINE_READ_UNLOCK_IRQRESTORE is not set
|
||||
# CONFIG_INLINE_WRITE_TRYLOCK is not set
|
||||
# CONFIG_INLINE_WRITE_LOCK is not set
|
||||
# CONFIG_INLINE_WRITE_LOCK_BH is not set
|
||||
# CONFIG_INLINE_WRITE_LOCK_IRQ is not set
|
||||
# CONFIG_INLINE_WRITE_LOCK_IRQSAVE is not set
|
||||
# CONFIG_INLINE_WRITE_UNLOCK is not set
|
||||
# CONFIG_INLINE_WRITE_UNLOCK_BH is not set
|
||||
# CONFIG_INLINE_WRITE_UNLOCK_IRQ is not set
|
||||
# CONFIG_INLINE_WRITE_UNLOCK_IRQRESTORE is not set
|
||||
# CONFIG_MUTEX_SPIN_ON_OWNER is not set
|
||||
# CONFIG_FREEZER is not set
|
||||
|
||||
#
|
||||
|
@ -139,11 +172,6 @@ CONFIG_DEFAULT_IOSCHED="cfq"
|
|||
CONFIG_PLATFORM_GENERIC=y
|
||||
CONFIG_OPT_LIB_FUNCTION=y
|
||||
CONFIG_OPT_LIB_ASM=y
|
||||
CONFIG_ALLOW_EDIT_AUTO=y
|
||||
|
||||
#
|
||||
# Automatic platform settings from Kconfig.auto
|
||||
#
|
||||
|
||||
#
|
||||
# Definitions for MICROBLAZE0
|
||||
|
@ -203,12 +231,11 @@ CONFIG_FLATMEM_MANUAL=y
|
|||
CONFIG_FLATMEM=y
|
||||
CONFIG_FLAT_NODE_MEM_MAP=y
|
||||
CONFIG_PAGEFLAGS_EXTENDED=y
|
||||
CONFIG_SPLIT_PTLOCK_CPUS=4
|
||||
CONFIG_SPLIT_PTLOCK_CPUS=999999
|
||||
# CONFIG_PHYS_ADDR_T_64BIT is not set
|
||||
CONFIG_ZONE_DMA_FLAG=0
|
||||
CONFIG_VIRT_TO_BUS=y
|
||||
CONFIG_HAVE_MLOCK=y
|
||||
CONFIG_HAVE_MLOCKED_PAGE_BIT=y
|
||||
# CONFIG_KSM is not set
|
||||
CONFIG_DEFAULT_MMAP_MIN_ADDR=4096
|
||||
|
||||
#
|
||||
|
@ -289,7 +316,13 @@ CONFIG_DEFAULT_TCP_CONG="cubic"
|
|||
# CONFIG_IRDA is not set
|
||||
# CONFIG_BT is not set
|
||||
# CONFIG_AF_RXRPC is not set
|
||||
# CONFIG_WIRELESS is not set
|
||||
CONFIG_WIRELESS=y
|
||||
# CONFIG_CFG80211 is not set
|
||||
# CONFIG_LIB80211 is not set
|
||||
|
||||
#
|
||||
# CFG80211 needs to be enabled for MAC80211
|
||||
#
|
||||
# CONFIG_WIMAX is not set
|
||||
# CONFIG_RFKILL is not set
|
||||
# CONFIG_NET_9P is not set
|
||||
|
@ -313,6 +346,10 @@ CONFIG_OF_DEVICE=y
|
|||
CONFIG_BLK_DEV=y
|
||||
# CONFIG_BLK_DEV_COW_COMMON is not set
|
||||
# CONFIG_BLK_DEV_LOOP is not set
|
||||
|
||||
#
|
||||
# DRBD disabled because PROC_FS, INET or CONNECTOR not selected
|
||||
#
|
||||
# CONFIG_BLK_DEV_NBD is not set
|
||||
CONFIG_BLK_DEV_RAM=y
|
||||
CONFIG_BLK_DEV_RAM_COUNT=16
|
||||
|
@ -349,7 +386,6 @@ CONFIG_NETDEVICES=y
|
|||
# CONFIG_PHYLIB is not set
|
||||
CONFIG_NET_ETHERNET=y
|
||||
# CONFIG_MII is not set
|
||||
# CONFIG_ETHOC is not set
|
||||
# CONFIG_DNET is not set
|
||||
# CONFIG_IBM_NEW_EMAC_ZMII is not set
|
||||
# CONFIG_IBM_NEW_EMAC_RGMII is not set
|
||||
|
@ -359,12 +395,12 @@ CONFIG_NET_ETHERNET=y
|
|||
# CONFIG_IBM_NEW_EMAC_MAL_CLR_ICINTSTAT is not set
|
||||
# CONFIG_IBM_NEW_EMAC_MAL_COMMON_ERR is not set
|
||||
# CONFIG_KS8842 is not set
|
||||
# CONFIG_KS8851_MLL is not set
|
||||
CONFIG_XILINX_EMACLITE=y
|
||||
CONFIG_NETDEV_1000=y
|
||||
CONFIG_NETDEV_10000=y
|
||||
CONFIG_WLAN=y
|
||||
# CONFIG_WLAN_PRE80211 is not set
|
||||
# CONFIG_WLAN_80211 is not set
|
||||
# CONFIG_HOSTAP is not set
|
||||
|
||||
#
|
||||
# Enable WiMAX (Networking options) to see the WiMAX drivers
|
||||
|
@ -408,6 +444,7 @@ CONFIG_SERIAL_UARTLITE=y
|
|||
CONFIG_SERIAL_UARTLITE_CONSOLE=y
|
||||
CONFIG_SERIAL_CORE=y
|
||||
CONFIG_SERIAL_CORE_CONSOLE=y
|
||||
# CONFIG_SERIAL_GRLIB_GAISLER_APBUART is not set
|
||||
CONFIG_UNIX98_PTYS=y
|
||||
# CONFIG_DEVPTS_MULTIPLE_INSTANCES is not set
|
||||
CONFIG_LEGACY_PTYS=y
|
||||
|
@ -433,7 +470,6 @@ CONFIG_ARCH_WANT_OPTIONAL_GPIOLIB=y
|
|||
# CONFIG_POWER_SUPPLY is not set
|
||||
# CONFIG_HWMON is not set
|
||||
# CONFIG_THERMAL is not set
|
||||
# CONFIG_THERMAL_HWMON is not set
|
||||
# CONFIG_WATCHDOG is not set
|
||||
|
||||
#
|
||||
|
@ -526,8 +562,6 @@ CONFIG_PROC_FS=y
|
|||
CONFIG_PROC_SYSCTL=y
|
||||
CONFIG_PROC_PAGE_MONITOR=y
|
||||
CONFIG_SYSFS=y
|
||||
CONFIG_TMPFS=y
|
||||
# CONFIG_TMPFS_POSIX_ACL is not set
|
||||
# CONFIG_HUGETLB_PAGE is not set
|
||||
# CONFIG_CONFIGFS_FS is not set
|
||||
CONFIG_MISC_FILESYSTEMS=y
|
||||
|
@ -638,11 +672,13 @@ CONFIG_NLS_DEFAULT="iso8859-1"
|
|||
#
|
||||
# Kernel hacking
|
||||
#
|
||||
CONFIG_TRACE_IRQFLAGS_SUPPORT=y
|
||||
# CONFIG_PRINTK_TIME is not set
|
||||
CONFIG_ENABLE_WARN_DEPRECATED=y
|
||||
CONFIG_ENABLE_MUST_CHECK=y
|
||||
CONFIG_FRAME_WARN=1024
|
||||
# CONFIG_MAGIC_SYSRQ is not set
|
||||
# CONFIG_STRIP_ASM_SYMS is not set
|
||||
# CONFIG_UNUSED_SYMBOLS is not set
|
||||
# CONFIG_DEBUG_FS is not set
|
||||
# CONFIG_HEADERS_CHECK is not set
|
||||
|
@ -662,6 +698,9 @@ CONFIG_DEBUG_SLAB=y
|
|||
# CONFIG_DEBUG_SLAB_LEAK is not set
|
||||
CONFIG_DEBUG_SPINLOCK=y
|
||||
# CONFIG_DEBUG_MUTEXES is not set
|
||||
# CONFIG_DEBUG_LOCK_ALLOC is not set
|
||||
# CONFIG_PROVE_LOCKING is not set
|
||||
# CONFIG_LOCK_STAT is not set
|
||||
# CONFIG_DEBUG_SPINLOCK_SLEEP is not set
|
||||
# CONFIG_DEBUG_LOCKING_API_SELFTESTS is not set
|
||||
# CONFIG_DEBUG_KOBJECT is not set
|
||||
|
@ -680,10 +719,29 @@ CONFIG_DEBUG_INFO=y
|
|||
# CONFIG_DEBUG_BLOCK_EXT_DEVT is not set
|
||||
# CONFIG_DEBUG_FORCE_WEAK_PER_CPU is not set
|
||||
# CONFIG_FAULT_INJECTION is not set
|
||||
# CONFIG_LATENCYTOP is not set
|
||||
# CONFIG_SYSCTL_SYSCALL_CHECK is not set
|
||||
# CONFIG_PAGE_POISONING is not set
|
||||
CONFIG_HAVE_FUNCTION_TRACER=y
|
||||
CONFIG_HAVE_FUNCTION_GRAPH_TRACER=y
|
||||
CONFIG_HAVE_FUNCTION_TRACE_MCOUNT_TEST=y
|
||||
CONFIG_HAVE_DYNAMIC_FTRACE=y
|
||||
CONFIG_HAVE_FTRACE_MCOUNT_RECORD=y
|
||||
CONFIG_TRACING_SUPPORT=y
|
||||
CONFIG_FTRACE=y
|
||||
# CONFIG_FUNCTION_TRACER is not set
|
||||
# CONFIG_IRQSOFF_TRACER is not set
|
||||
# CONFIG_SCHED_TRACER is not set
|
||||
# CONFIG_ENABLE_DEFAULT_TRACERS is not set
|
||||
# CONFIG_BOOT_TRACER is not set
|
||||
CONFIG_BRANCH_PROFILE_NONE=y
|
||||
# CONFIG_PROFILE_ANNOTATED_BRANCHES is not set
|
||||
# CONFIG_PROFILE_ALL_BRANCHES is not set
|
||||
# CONFIG_STACK_TRACER is not set
|
||||
# CONFIG_KMEMTRACE is not set
|
||||
# CONFIG_WORKQUEUE_TRACER is not set
|
||||
# CONFIG_BLK_DEV_IO_TRACE is not set
|
||||
# CONFIG_SAMPLES is not set
|
||||
# CONFIG_KMEMCHECK is not set
|
||||
CONFIG_EARLY_PRINTK=y
|
||||
# CONFIG_HEART_BEAT is not set
|
||||
CONFIG_DEBUG_BOOTMEM=y
|
||||
|
@ -694,7 +752,11 @@ CONFIG_DEBUG_BOOTMEM=y
|
|||
# CONFIG_KEYS is not set
|
||||
# CONFIG_SECURITY is not set
|
||||
# CONFIG_SECURITYFS is not set
|
||||
# CONFIG_SECURITY_FILE_CAPABILITIES is not set
|
||||
# CONFIG_DEFAULT_SECURITY_SELINUX is not set
|
||||
# CONFIG_DEFAULT_SECURITY_SMACK is not set
|
||||
# CONFIG_DEFAULT_SECURITY_TOMOYO is not set
|
||||
CONFIG_DEFAULT_SECURITY_DAC=y
|
||||
CONFIG_DEFAULT_SECURITY=""
|
||||
CONFIG_CRYPTO=y
|
||||
|
||||
#
|
||||
|
|
|
@ -1,7 +1,7 @@
|
|||
#
|
||||
# Automatically generated make config: don't edit
|
||||
# Linux kernel version: 2.6.31
|
||||
# Thu Sep 24 10:29:43 2009
|
||||
# Linux kernel version: 2.6.33-rc6
|
||||
# Wed Feb 3 10:03:21 2010
|
||||
#
|
||||
CONFIG_MICROBLAZE=y
|
||||
# CONFIG_SWAP is not set
|
||||
|
@ -19,8 +19,12 @@ CONFIG_GENERIC_CLOCKEVENTS=y
|
|||
CONFIG_GENERIC_HARDIRQS_NO__DO_IRQ=y
|
||||
CONFIG_GENERIC_GPIO=y
|
||||
CONFIG_GENERIC_CSUM=y
|
||||
CONFIG_STACKTRACE_SUPPORT=y
|
||||
CONFIG_LOCKDEP_SUPPORT=y
|
||||
CONFIG_HAVE_LATENCYTOP_SUPPORT=y
|
||||
# CONFIG_PCI is not set
|
||||
CONFIG_NO_DMA=y
|
||||
CONFIG_DTC=y
|
||||
CONFIG_DEFCONFIG_LIST="/lib/modules/$UNAME_RELEASE/.config"
|
||||
CONFIG_CONSTRUCTORS=y
|
||||
|
||||
|
@ -46,6 +50,7 @@ CONFIG_BSD_PROCESS_ACCT_V3=y
|
|||
#
|
||||
CONFIG_TREE_RCU=y
|
||||
# CONFIG_TREE_PREEMPT_RCU is not set
|
||||
# CONFIG_TINY_RCU is not set
|
||||
# CONFIG_RCU_TRACE is not set
|
||||
CONFIG_RCU_FANOUT=32
|
||||
# CONFIG_RCU_FANOUT_EXACT is not set
|
||||
|
@ -81,16 +86,16 @@ CONFIG_EVENTFD=y
|
|||
CONFIG_AIO=y
|
||||
|
||||
#
|
||||
# Performance Counters
|
||||
# Kernel Performance Events And Counters
|
||||
#
|
||||
CONFIG_VM_EVENT_COUNTERS=y
|
||||
# CONFIG_STRIP_ASM_SYMS is not set
|
||||
CONFIG_COMPAT_BRK=y
|
||||
CONFIG_SLAB=y
|
||||
# CONFIG_SLUB is not set
|
||||
# CONFIG_SLOB is not set
|
||||
# CONFIG_MMAP_ALLOW_UNINITIALIZED is not set
|
||||
# CONFIG_PROFILING is not set
|
||||
# CONFIG_MARKERS is not set
|
||||
CONFIG_HAVE_OPROFILE=y
|
||||
|
||||
#
|
||||
# GCOV-based kernel profiling
|
||||
|
@ -116,14 +121,41 @@ CONFIG_LBDAF=y
|
|||
# IO Schedulers
|
||||
#
|
||||
CONFIG_IOSCHED_NOOP=y
|
||||
CONFIG_IOSCHED_AS=y
|
||||
CONFIG_IOSCHED_DEADLINE=y
|
||||
CONFIG_IOSCHED_CFQ=y
|
||||
# CONFIG_DEFAULT_AS is not set
|
||||
# CONFIG_DEFAULT_DEADLINE is not set
|
||||
CONFIG_DEFAULT_CFQ=y
|
||||
# CONFIG_DEFAULT_NOOP is not set
|
||||
CONFIG_DEFAULT_IOSCHED="cfq"
|
||||
# CONFIG_INLINE_SPIN_TRYLOCK is not set
|
||||
# CONFIG_INLINE_SPIN_TRYLOCK_BH is not set
|
||||
# CONFIG_INLINE_SPIN_LOCK is not set
|
||||
# CONFIG_INLINE_SPIN_LOCK_BH is not set
|
||||
# CONFIG_INLINE_SPIN_LOCK_IRQ is not set
|
||||
# CONFIG_INLINE_SPIN_LOCK_IRQSAVE is not set
|
||||
CONFIG_INLINE_SPIN_UNLOCK=y
|
||||
# CONFIG_INLINE_SPIN_UNLOCK_BH is not set
|
||||
CONFIG_INLINE_SPIN_UNLOCK_IRQ=y
|
||||
# CONFIG_INLINE_SPIN_UNLOCK_IRQRESTORE is not set
|
||||
# CONFIG_INLINE_READ_TRYLOCK is not set
|
||||
# CONFIG_INLINE_READ_LOCK is not set
|
||||
# CONFIG_INLINE_READ_LOCK_BH is not set
|
||||
# CONFIG_INLINE_READ_LOCK_IRQ is not set
|
||||
# CONFIG_INLINE_READ_LOCK_IRQSAVE is not set
|
||||
CONFIG_INLINE_READ_UNLOCK=y
|
||||
# CONFIG_INLINE_READ_UNLOCK_BH is not set
|
||||
CONFIG_INLINE_READ_UNLOCK_IRQ=y
|
||||
# CONFIG_INLINE_READ_UNLOCK_IRQRESTORE is not set
|
||||
# CONFIG_INLINE_WRITE_TRYLOCK is not set
|
||||
# CONFIG_INLINE_WRITE_LOCK is not set
|
||||
# CONFIG_INLINE_WRITE_LOCK_BH is not set
|
||||
# CONFIG_INLINE_WRITE_LOCK_IRQ is not set
|
||||
# CONFIG_INLINE_WRITE_LOCK_IRQSAVE is not set
|
||||
CONFIG_INLINE_WRITE_UNLOCK=y
|
||||
# CONFIG_INLINE_WRITE_UNLOCK_BH is not set
|
||||
CONFIG_INLINE_WRITE_UNLOCK_IRQ=y
|
||||
# CONFIG_INLINE_WRITE_UNLOCK_IRQRESTORE is not set
|
||||
# CONFIG_MUTEX_SPIN_ON_OWNER is not set
|
||||
# CONFIG_FREEZER is not set
|
||||
|
||||
#
|
||||
|
@ -132,7 +164,10 @@ CONFIG_DEFAULT_IOSCHED="cfq"
|
|||
CONFIG_PLATFORM_GENERIC=y
|
||||
# CONFIG_SELFMOD is not set
|
||||
# CONFIG_OPT_LIB_FUNCTION is not set
|
||||
# CONFIG_ALLOW_EDIT_AUTO is not set
|
||||
|
||||
#
|
||||
# Definitions for MICROBLAZE0
|
||||
#
|
||||
CONFIG_KERNEL_BASE_ADDR=0x90000000
|
||||
CONFIG_XILINX_MICROBLAZE0_FAMILY="virtex5"
|
||||
CONFIG_XILINX_MICROBLAZE0_USE_MSR_INSTR=1
|
||||
|
@ -190,7 +225,6 @@ CONFIG_SPLIT_PTLOCK_CPUS=4
|
|||
# CONFIG_PHYS_ADDR_T_64BIT is not set
|
||||
CONFIG_ZONE_DMA_FLAG=0
|
||||
CONFIG_VIRT_TO_BUS=y
|
||||
CONFIG_DEFAULT_MMAP_MIN_ADDR=4096
|
||||
CONFIG_NOMMU_INITIAL_TRIM_EXCESS=1
|
||||
|
||||
#
|
||||
|
@ -274,9 +308,6 @@ CONFIG_DEFAULT_TCP_CONG="cubic"
|
|||
# CONFIG_AF_RXRPC is not set
|
||||
CONFIG_WIRELESS=y
|
||||
# CONFIG_CFG80211 is not set
|
||||
CONFIG_CFG80211_DEFAULT_PS_VALUE=0
|
||||
CONFIG_WIRELESS_OLD_REGULATORY=y
|
||||
# CONFIG_WIRELESS_EXT is not set
|
||||
# CONFIG_LIB80211 is not set
|
||||
|
||||
#
|
||||
|
@ -301,9 +332,9 @@ CONFIG_STANDALONE=y
|
|||
# CONFIG_CONNECTOR is not set
|
||||
CONFIG_MTD=y
|
||||
# CONFIG_MTD_DEBUG is not set
|
||||
# CONFIG_MTD_TESTS is not set
|
||||
CONFIG_MTD_CONCAT=y
|
||||
CONFIG_MTD_PARTITIONS=y
|
||||
# CONFIG_MTD_TESTS is not set
|
||||
# CONFIG_MTD_REDBOOT_PARTS is not set
|
||||
CONFIG_MTD_CMDLINE_PARTS=y
|
||||
# CONFIG_MTD_OF_PARTS is not set
|
||||
|
@ -387,6 +418,10 @@ CONFIG_OF_DEVICE=y
|
|||
CONFIG_BLK_DEV=y
|
||||
# CONFIG_BLK_DEV_COW_COMMON is not set
|
||||
# CONFIG_BLK_DEV_LOOP is not set
|
||||
|
||||
#
|
||||
# DRBD disabled because PROC_FS, INET or CONNECTOR not selected
|
||||
#
|
||||
CONFIG_BLK_DEV_NBD=y
|
||||
CONFIG_BLK_DEV_RAM=y
|
||||
CONFIG_BLK_DEV_RAM_COUNT=16
|
||||
|
@ -423,7 +458,6 @@ CONFIG_NETDEVICES=y
|
|||
# CONFIG_PHYLIB is not set
|
||||
CONFIG_NET_ETHERNET=y
|
||||
# CONFIG_MII is not set
|
||||
# CONFIG_ETHOC is not set
|
||||
# CONFIG_DNET is not set
|
||||
# CONFIG_IBM_NEW_EMAC_ZMII is not set
|
||||
# CONFIG_IBM_NEW_EMAC_RGMII is not set
|
||||
|
@ -433,12 +467,12 @@ CONFIG_NET_ETHERNET=y
|
|||
# CONFIG_IBM_NEW_EMAC_MAL_CLR_ICINTSTAT is not set
|
||||
# CONFIG_IBM_NEW_EMAC_MAL_COMMON_ERR is not set
|
||||
# CONFIG_KS8842 is not set
|
||||
# CONFIG_KS8851_MLL is not set
|
||||
# CONFIG_XILINX_EMACLITE is not set
|
||||
CONFIG_NETDEV_1000=y
|
||||
CONFIG_NETDEV_10000=y
|
||||
CONFIG_WLAN=y
|
||||
# CONFIG_WLAN_PRE80211 is not set
|
||||
# CONFIG_WLAN_80211 is not set
|
||||
# CONFIG_HOSTAP is not set
|
||||
|
||||
#
|
||||
# Enable WiMAX (Networking options) to see the WiMAX drivers
|
||||
|
@ -482,6 +516,7 @@ CONFIG_SERIAL_UARTLITE=y
|
|||
CONFIG_SERIAL_UARTLITE_CONSOLE=y
|
||||
CONFIG_SERIAL_CORE=y
|
||||
CONFIG_SERIAL_CORE_CONSOLE=y
|
||||
# CONFIG_SERIAL_GRLIB_GAISLER_APBUART is not set
|
||||
CONFIG_UNIX98_PTYS=y
|
||||
# CONFIG_DEVPTS_MULTIPLE_INSTANCES is not set
|
||||
CONFIG_LEGACY_PTYS=y
|
||||
|
@ -508,7 +543,6 @@ CONFIG_ARCH_WANT_OPTIONAL_GPIOLIB=y
|
|||
# CONFIG_POWER_SUPPLY is not set
|
||||
# CONFIG_HWMON is not set
|
||||
# CONFIG_THERMAL is not set
|
||||
# CONFIG_THERMAL_HWMON is not set
|
||||
# CONFIG_WATCHDOG is not set
|
||||
|
||||
#
|
||||
|
@ -616,7 +650,6 @@ CONFIG_INOTIFY_USER=y
|
|||
CONFIG_PROC_FS=y
|
||||
CONFIG_PROC_SYSCTL=y
|
||||
CONFIG_SYSFS=y
|
||||
# CONFIG_TMPFS is not set
|
||||
# CONFIG_HUGETLB_PAGE is not set
|
||||
# CONFIG_CONFIGFS_FS is not set
|
||||
CONFIG_MISC_FILESYSTEMS=y
|
||||
|
@ -672,11 +705,13 @@ CONFIG_MSDOS_PARTITION=y
|
|||
#
|
||||
# Kernel hacking
|
||||
#
|
||||
CONFIG_TRACE_IRQFLAGS_SUPPORT=y
|
||||
# CONFIG_PRINTK_TIME is not set
|
||||
CONFIG_ENABLE_WARN_DEPRECATED=y
|
||||
CONFIG_ENABLE_MUST_CHECK=y
|
||||
CONFIG_FRAME_WARN=1024
|
||||
# CONFIG_MAGIC_SYSRQ is not set
|
||||
# CONFIG_STRIP_ASM_SYMS is not set
|
||||
CONFIG_UNUSED_SYMBOLS=y
|
||||
CONFIG_DEBUG_FS=y
|
||||
# CONFIG_HEADERS_CHECK is not set
|
||||
|
@ -695,12 +730,16 @@ CONFIG_DEBUG_OBJECTS=y
|
|||
CONFIG_DEBUG_OBJECTS_SELFTEST=y
|
||||
CONFIG_DEBUG_OBJECTS_FREE=y
|
||||
CONFIG_DEBUG_OBJECTS_TIMERS=y
|
||||
# CONFIG_DEBUG_OBJECTS_WORK is not set
|
||||
CONFIG_DEBUG_OBJECTS_ENABLE_DEFAULT=1
|
||||
# CONFIG_DEBUG_SLAB is not set
|
||||
# CONFIG_DEBUG_RT_MUTEXES is not set
|
||||
# CONFIG_RT_MUTEX_TESTER is not set
|
||||
# CONFIG_DEBUG_SPINLOCK is not set
|
||||
# CONFIG_DEBUG_MUTEXES is not set
|
||||
# CONFIG_DEBUG_LOCK_ALLOC is not set
|
||||
# CONFIG_PROVE_LOCKING is not set
|
||||
# CONFIG_LOCK_STAT is not set
|
||||
# CONFIG_DEBUG_SPINLOCK_SLEEP is not set
|
||||
# CONFIG_DEBUG_LOCKING_API_SELFTESTS is not set
|
||||
# CONFIG_DEBUG_KOBJECT is not set
|
||||
|
@ -720,8 +759,28 @@ CONFIG_DEBUG_SG=y
|
|||
# CONFIG_DEBUG_BLOCK_EXT_DEVT is not set
|
||||
# CONFIG_DEBUG_FORCE_WEAK_PER_CPU is not set
|
||||
# CONFIG_FAULT_INJECTION is not set
|
||||
# CONFIG_LATENCYTOP is not set
|
||||
CONFIG_SYSCTL_SYSCALL_CHECK=y
|
||||
# CONFIG_PAGE_POISONING is not set
|
||||
CONFIG_HAVE_FUNCTION_TRACER=y
|
||||
CONFIG_HAVE_FUNCTION_GRAPH_TRACER=y
|
||||
CONFIG_HAVE_FUNCTION_TRACE_MCOUNT_TEST=y
|
||||
CONFIG_HAVE_DYNAMIC_FTRACE=y
|
||||
CONFIG_HAVE_FTRACE_MCOUNT_RECORD=y
|
||||
CONFIG_TRACING_SUPPORT=y
|
||||
CONFIG_FTRACE=y
|
||||
# CONFIG_FUNCTION_TRACER is not set
|
||||
# CONFIG_IRQSOFF_TRACER is not set
|
||||
# CONFIG_SCHED_TRACER is not set
|
||||
# CONFIG_ENABLE_DEFAULT_TRACERS is not set
|
||||
# CONFIG_BOOT_TRACER is not set
|
||||
CONFIG_BRANCH_PROFILE_NONE=y
|
||||
# CONFIG_PROFILE_ANNOTATED_BRANCHES is not set
|
||||
# CONFIG_PROFILE_ALL_BRANCHES is not set
|
||||
# CONFIG_STACK_TRACER is not set
|
||||
# CONFIG_KMEMTRACE is not set
|
||||
# CONFIG_WORKQUEUE_TRACER is not set
|
||||
# CONFIG_BLK_DEV_IO_TRACE is not set
|
||||
# CONFIG_DYNAMIC_DEBUG is not set
|
||||
# CONFIG_SAMPLES is not set
|
||||
CONFIG_EARLY_PRINTK=y
|
||||
|
@ -734,7 +793,11 @@ CONFIG_EARLY_PRINTK=y
|
|||
# CONFIG_KEYS is not set
|
||||
# CONFIG_SECURITY is not set
|
||||
# CONFIG_SECURITYFS is not set
|
||||
# CONFIG_SECURITY_FILE_CAPABILITIES is not set
|
||||
# CONFIG_DEFAULT_SECURITY_SELINUX is not set
|
||||
# CONFIG_DEFAULT_SECURITY_SMACK is not set
|
||||
# CONFIG_DEFAULT_SECURITY_TOMOYO is not set
|
||||
CONFIG_DEFAULT_SECURITY_DAC=y
|
||||
CONFIG_DEFAULT_SECURITY=""
|
||||
CONFIG_CRYPTO=y
|
||||
|
||||
#
|
||||
|
|
|
@ -217,7 +217,7 @@ static inline void __iomem *__ioremap(phys_addr_t address, unsigned long size,
|
|||
* Little endian
|
||||
*/
|
||||
|
||||
#define out_le32(a, v) __raw_writel(__cpu_to_le32(v), (a));
|
||||
#define out_le32(a, v) __raw_writel(__cpu_to_le32(v), (a))
|
||||
#define out_le16(a, v) __raw_writew(__cpu_to_le16(v), (a))
|
||||
|
||||
#define in_le32(a) __le32_to_cpu(__raw_readl(a))
|
||||
|
|
|
@ -54,6 +54,7 @@ struct pt_regs {
|
|||
int pt_mode;
|
||||
};
|
||||
|
||||
#ifdef __KERNEL__
|
||||
#define kernel_mode(regs) ((regs)->pt_mode)
|
||||
#define user_mode(regs) (!kernel_mode(regs))
|
||||
|
||||
|
@ -62,6 +63,19 @@ struct pt_regs {
|
|||
|
||||
void show_regs(struct pt_regs *);
|
||||
|
||||
#else /* __KERNEL__ */
|
||||
|
||||
/* pt_regs offsets used by gdbserver etc in ptrace syscalls */
|
||||
#define PT_GPR(n) ((n) * sizeof(microblaze_reg_t))
|
||||
#define PT_PC (32 * sizeof(microblaze_reg_t))
|
||||
#define PT_MSR (33 * sizeof(microblaze_reg_t))
|
||||
#define PT_EAR (34 * sizeof(microblaze_reg_t))
|
||||
#define PT_ESR (35 * sizeof(microblaze_reg_t))
|
||||
#define PT_FSR (36 * sizeof(microblaze_reg_t))
|
||||
#define PT_KERNEL_MODE (37 * sizeof(microblaze_reg_t))
|
||||
|
||||
#endif /* __KERNEL */
|
||||
|
||||
#endif /* __ASSEMBLY__ */
|
||||
|
||||
#endif /* _ASM_MICROBLAZE_PTRACE_H */
|
||||
|
|
|
@ -377,13 +377,14 @@
|
|||
#define __NR_shutdown 359 /* new */
|
||||
#define __NR_sendmsg 360 /* new */
|
||||
#define __NR_recvmsg 361 /* new */
|
||||
#define __NR_accept04 362 /* new */
|
||||
#define __NR_accept4 362 /* new */
|
||||
#define __NR_preadv 363 /* new */
|
||||
#define __NR_pwritev 364 /* new */
|
||||
#define __NR_rt_tgsigqueueinfo 365 /* new */
|
||||
#define __NR_perf_event_open 366 /* new */
|
||||
#define __NR_recvmmsg 367 /* new */
|
||||
|
||||
#define __NR_syscalls 367
|
||||
#define __NR_syscalls 368
|
||||
|
||||
#ifdef __KERNEL__
|
||||
#ifndef __ASSEMBLY__
|
||||
|
|
|
@ -172,16 +172,15 @@ do { \
|
|||
/* It is used only first parameter for OP - for wic, wdc */
|
||||
#define CACHE_RANGE_LOOP_1(start, end, line_length, op) \
|
||||
do { \
|
||||
int step = -line_length; \
|
||||
int count = end - start; \
|
||||
BUG_ON(count <= 0); \
|
||||
int volatile temp; \
|
||||
BUG_ON(end - start <= 0); \
|
||||
\
|
||||
__asm__ __volatile__ (" 1: addk %0, %0, %1; \
|
||||
" #op " %0, r0; \
|
||||
bgtid %1, 1b; \
|
||||
addk %1, %1, %2; \
|
||||
" : : "r" (start), "r" (count), \
|
||||
"r" (step) : "memory"); \
|
||||
__asm__ __volatile__ (" 1: " #op " %1, r0; \
|
||||
cmpu %0, %1, %2; \
|
||||
bgtid %0, 1b; \
|
||||
addk %1, %1, %3; \
|
||||
" : : "r" (temp), "r" (start), "r" (end),\
|
||||
"r" (line_length) : "memory"); \
|
||||
} while (0);
|
||||
|
||||
static void __flush_icache_range_msr_irq(unsigned long start, unsigned long end)
|
||||
|
@ -313,16 +312,6 @@ static void __invalidate_dcache_all_wb(void)
|
|||
pr_debug("%s\n", __func__);
|
||||
CACHE_ALL_LOOP2(cpuinfo.dcache_size, cpuinfo.dcache_line_length,
|
||||
wdc.clear)
|
||||
|
||||
#if 0
|
||||
unsigned int i;
|
||||
|
||||
pr_debug("%s\n", __func__);
|
||||
|
||||
/* Just loop through cache size and invalidate it */
|
||||
for (i = 0; i < cpuinfo.dcache_size; i += cpuinfo.dcache_line_length)
|
||||
__invalidate_dcache(0, i);
|
||||
#endif
|
||||
}
|
||||
|
||||
static void __invalidate_dcache_range_wb(unsigned long start,
|
||||
|
|
|
@ -122,7 +122,7 @@ ENTRY(_interrupt)
|
|||
|
||||
ret_from_intr:
|
||||
lwi r11, r1, PT_MODE
|
||||
bneid r11, 3f
|
||||
bneid r11, no_intr_resched
|
||||
|
||||
lwi r6, r31, TS_THREAD_INFO /* get thread info */
|
||||
lwi r19, r6, TI_FLAGS /* get flags in thread info */
|
||||
|
@ -133,16 +133,18 @@ ret_from_intr:
|
|||
bralid r15, schedule
|
||||
nop
|
||||
1: andi r11, r19, _TIF_SIGPENDING
|
||||
beqid r11, no_intr_reshed
|
||||
beqid r11, no_intr_resched
|
||||
addk r5, r1, r0
|
||||
addk r7, r0, r0
|
||||
bralid r15, do_signal
|
||||
addk r6, r0, r0
|
||||
|
||||
no_intr_reshed:
|
||||
no_intr_resched:
|
||||
/* Disable interrupts, we are now committed to the state restore */
|
||||
disable_irq
|
||||
|
||||
/* save mode indicator */
|
||||
lwi r11, r1, PT_MODE
|
||||
3:
|
||||
swi r11, r0, PER_CPU(KM)
|
||||
|
||||
/* save r31 */
|
||||
|
|
|
@ -256,7 +256,7 @@ int of_irq_map_pci(struct pci_dev *pdev, struct of_irq *out_irq)
|
|||
if (ppdev == NULL) {
|
||||
struct pci_controller *host;
|
||||
host = pci_bus_to_host(pdev->bus);
|
||||
ppnode = host ? host->arch_data : NULL;
|
||||
ppnode = host ? host->dn : NULL;
|
||||
/* No node for host bridge ? give up */
|
||||
if (ppnode == NULL)
|
||||
return -EINVAL;
|
||||
|
|
|
@ -54,6 +54,7 @@ void __init setup_arch(char **cmdline_p)
|
|||
|
||||
microblaze_cache_init();
|
||||
|
||||
invalidate_dcache();
|
||||
enable_dcache();
|
||||
|
||||
invalidate_icache();
|
||||
|
|
|
@ -366,7 +366,7 @@ ENTRY(sys_call_table)
|
|||
.long sys_shutdown
|
||||
.long sys_sendmsg /* 360 */
|
||||
.long sys_recvmsg
|
||||
.long sys_ni_syscall
|
||||
.long sys_accept4
|
||||
.long sys_ni_syscall
|
||||
.long sys_ni_syscall
|
||||
.long sys_rt_tgsigqueueinfo /* 365 */
|
||||
|
|
|
@ -1311,6 +1311,7 @@ config SYS_SUPPORTS_ZBOOT
|
|||
select HAVE_KERNEL_GZIP
|
||||
select HAVE_KERNEL_BZIP2
|
||||
select HAVE_KERNEL_LZMA
|
||||
select HAVE_KERNEL_LZO
|
||||
|
||||
config SYS_SUPPORTS_ZBOOT_UART16550
|
||||
bool
|
||||
|
|
|
@ -412,8 +412,11 @@ u32 au1xxx_dbdma_ring_alloc(u32 chanid, int entries)
|
|||
if (desc_base == 0)
|
||||
return 0;
|
||||
|
||||
ctp->cdb_membase = desc_base;
|
||||
desc_base = ALIGN_ADDR(desc_base, sizeof(au1x_ddma_desc_t));
|
||||
}
|
||||
} else
|
||||
ctp->cdb_membase = desc_base;
|
||||
|
||||
dp = (au1x_ddma_desc_t *)desc_base;
|
||||
|
||||
/* Keep track of the base descriptor. */
|
||||
|
@ -831,7 +834,7 @@ void au1xxx_dbdma_chan_free(u32 chanid)
|
|||
|
||||
au1xxx_dbdma_stop(chanid);
|
||||
|
||||
kfree((void *)ctp->chan_desc_base);
|
||||
kfree((void *)ctp->cdb_membase);
|
||||
|
||||
stp->dev_flags &= ~DEV_FLAGS_INUSE;
|
||||
dtp->dev_flags &= ~DEV_FLAGS_INUSE;
|
||||
|
|
|
@ -202,7 +202,7 @@ static struct resource usb_res[] = {
|
|||
.name = "mem",
|
||||
.flags = IORESOURCE_MEM,
|
||||
.start = 0x03400000,
|
||||
.end = 0x034001fff,
|
||||
.end = 0x03401fff,
|
||||
},
|
||||
};
|
||||
|
||||
|
|
|
@ -141,6 +141,14 @@ static __init void prom_init_mem(void)
|
|||
break;
|
||||
}
|
||||
|
||||
/* Ignoring the last page when ddr size is 128M. Cached
|
||||
* accesses to last page is causing the processor to prefetch
|
||||
* using address above 128M stepping out of the ddr address
|
||||
* space.
|
||||
*/
|
||||
if (mem == 0x8000000)
|
||||
mem -= 0x1000;
|
||||
|
||||
add_memory_region(0, mem, BOOT_MEM_RAM);
|
||||
}
|
||||
|
||||
|
|
Some files were not shown because too many files have changed in this diff Show more
Loading…
Reference in a new issue