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Devicetree fixes for 5.4:
Fix a ref count, memory leak, and Risc-V cpu schema warnings. -----BEGIN PGP SIGNATURE----- iQJEBAABCgAuFiEEktVUI4SxYhzZyEuo+vtdtY28YcMFAl2wtukQHHJvYmhAa2Vy bmVsLm9yZwAKCRD6+121jbxhwyTdD/4lVzqzzip1CH6yQ4PrNQiSYqMIYhYwnZCJ uqaq0OdOQGrLFtM4/YbsU+oeTeV+tBHen5k/C3XtwAowH49TQwPZcgFas43eWVqW /FoWqDPwyB94JjgkAsTbpnieHII7ZSKwMGEuCcHPf6ppOZe2Y9VLgsJWG576kwYe bZUFJQ7EV+rCaFxWlEYq7kJ1KDPKPIVEqAsULi5TYLRTPPiKUKaYoM525IS+2M0U NDn9Szvqoy4+ZC2yBn9bBuG6gdwPp0ZlxhRRY/hyjXYn4keC9x0e1rKpvs1DLE+L Uxbb0OZ7mFWyqLdzptSD1WfghxkhjdGhgwYRJccjkPG+iVDHNAsTTdgPsEBSa4x1 YDnwfkcxkqoYh2tK/TaG7ZGpG5dv7nVhek8IL+bpuvvc9ZdT8mEL6Q86GsKTAEw1 yBzNrEGryZZV62a3xeaNQKQ8v1b3KJXT110UQyZA0yOT/q7k3QcCJ4tfBB4lNdUS 9YLig/llunwyJI+vBMu2M3GuiQy0ClsEPemsm1CIvKEZ5uVMiIzhI5MWu5P/KDJ4 LOYcSYVBtNPhUxMwU0PvIDROJKDTe3g0bVUzarQq+lvsR7muDmmRGvDJT0J6Ziyz qqMEqRPYsbJoWiE5PgDQIDBaw1wObZ4mjuBvclffyrUiFX2MHk0O0IydzTwM54I/ BEm1DnQGbg== =vXnQ -----END PGP SIGNATURE----- Merge tag 'devicetree-fixes-for-5.4-2' of git://git.kernel.org/pub/scm/linux/kernel/git/robh/linux Pull Devicetree fixes from Rob Herring: "A couple more DT fixes for 5.4: fix a ref count, memory leak, and Risc-V cpu schema warnings" * tag 'devicetree-fixes-for-5.4-2' of git://git.kernel.org/pub/scm/linux/kernel/git/robh/linux: of: reserved_mem: add missing of_node_put() for proper ref-counting of: unittest: fix memory leak in unittest_data_add dt-bindings: riscv: Fix CPU schema errors
This commit is contained in:
commit
39a38bcba4
3 changed files with 17 additions and 17 deletions
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@ -24,15 +24,17 @@ description: |
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properties:
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compatible:
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items:
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- enum:
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- sifive,rocket0
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- sifive,e5
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- sifive,e51
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- sifive,u54-mc
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- sifive,u54
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- sifive,u5
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- const: riscv
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oneOf:
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- items:
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- enum:
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- sifive,rocket0
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- sifive,e5
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- sifive,e51
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- sifive,u54-mc
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- sifive,u54
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- sifive,u5
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- const: riscv
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- const: riscv # Simulator only
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description:
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Identifies that the hart uses the RISC-V instruction set
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and identifies the type of the hart.
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@ -66,12 +68,8 @@ properties:
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insensitive, letters in the riscv,isa string must be all
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lowercase to simplify parsing.
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timebase-frequency:
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type: integer
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minimum: 1
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description:
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Specifies the clock frequency of the system timer in Hz.
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This value is common to all harts on a single system image.
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# RISC-V requires 'timebase-frequency' in /cpus, so disallow it here
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timebase-frequency: false
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interrupt-controller:
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type: object
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@ -93,7 +91,6 @@ properties:
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required:
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- riscv,isa
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- timebase-frequency
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- interrupt-controller
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examples:
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@ -324,8 +324,10 @@ int of_reserved_mem_device_init_by_idx(struct device *dev,
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if (!target)
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return -ENODEV;
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if (!of_device_is_available(target))
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if (!of_device_is_available(target)) {
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of_node_put(target);
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return 0;
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}
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rmem = __find_rmem(target);
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of_node_put(target);
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@ -1207,6 +1207,7 @@ static int __init unittest_data_add(void)
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of_fdt_unflatten_tree(unittest_data, NULL, &unittest_data_node);
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if (!unittest_data_node) {
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pr_warn("%s: No tree to attach; not running tests\n", __func__);
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kfree(unittest_data);
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return -ENODATA;
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}
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