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iommu/tegra: smmu: debugfs for TLB/PTC statistics
Add debugfs entries to collect TLB/PTC statistics. $ echo "reset" > /sys/kernel/debug/smmu/mc/{tlb,ptc} $ echo "on" > /sys/kernel/debug/smmu/mc/{tlb,ptc} $ echo "off" > /sys/kernel/debug/smmu/mc/{tlb,ptc} $ cat /sys/kernel/debug/smmu/mc/{tlb,ptc} hit:0014910c miss:00014d22 The above format is: hit:<HIT count><SPC>miss:<MISS count><SPC><CR+LF> fscanf(fp, "hit:%lx miss:%lx", &hit, &miss); Signed-off-by: Hiroshi Doyu <hdoyu@nvidia.com> Signed-off-by: Joerg Roedel <joerg.roedel@amd.com>
This commit is contained in:
parent
0d7614f09c
commit
39abf8aa7d
1 changed files with 190 additions and 12 deletions
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@ -32,6 +32,8 @@
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#include <linux/io.h>
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#include <linux/of.h>
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#include <linux/of_iommu.h>
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#include <linux/debugfs.h>
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#include <linux/seq_file.h>
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#include <asm/page.h>
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#include <asm/cacheflush.h>
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@ -47,16 +49,29 @@
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#define SMMU_CONFIG_DISABLE 0
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#define SMMU_CONFIG_ENABLE 1
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#define SMMU_TLB_CONFIG 0x14
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#define SMMU_TLB_CONFIG_STATS__MASK (1 << 31)
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#define SMMU_TLB_CONFIG_STATS__ENABLE (1 << 31)
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/* REVISIT: To support multiple MCs */
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enum {
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_MC = 0,
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};
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enum {
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_TLB = 0,
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_PTC,
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};
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#define SMMU_CACHE_CONFIG_BASE 0x14
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#define __SMMU_CACHE_CONFIG(mc, cache) (SMMU_CACHE_CONFIG_BASE + 4 * cache)
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#define SMMU_CACHE_CONFIG(cache) __SMMU_CACHE_CONFIG(_MC, cache)
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#define SMMU_CACHE_CONFIG_STATS_SHIFT 31
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#define SMMU_CACHE_CONFIG_STATS_ENABLE (1 << SMMU_CACHE_CONFIG_STATS_SHIFT)
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#define SMMU_CACHE_CONFIG_STATS_TEST_SHIFT 30
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#define SMMU_CACHE_CONFIG_STATS_TEST (1 << SMMU_CACHE_CONFIG_STATS_TEST_SHIFT)
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#define SMMU_TLB_CONFIG_HIT_UNDER_MISS__ENABLE (1 << 29)
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#define SMMU_TLB_CONFIG_ACTIVE_LINES__VALUE 0x10
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#define SMMU_TLB_CONFIG_RESET_VAL 0x20000010
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#define SMMU_PTC_CONFIG 0x18
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#define SMMU_PTC_CONFIG_STATS__MASK (1 << 31)
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#define SMMU_PTC_CONFIG_STATS__ENABLE (1 << 31)
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#define SMMU_PTC_CONFIG_CACHE__ENABLE (1 << 29)
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#define SMMU_PTC_CONFIG_INDEX_MAP__PATTERN 0x3f
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#define SMMU_PTC_CONFIG_RESET_VAL 0x2000003f
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@ -86,10 +101,10 @@
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#define SMMU_ASID_SECURITY 0x38
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#define SMMU_STATS_TLB_HIT_COUNT 0x1f0
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#define SMMU_STATS_TLB_MISS_COUNT 0x1f4
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#define SMMU_STATS_PTC_HIT_COUNT 0x1f8
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#define SMMU_STATS_PTC_MISS_COUNT 0x1fc
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#define SMMU_STATS_CACHE_COUNT_BASE 0x1f0
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#define SMMU_STATS_CACHE_COUNT(mc, cache, hitmiss) \
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(SMMU_STATS_CACHE_COUNT_BASE + 8 * cache + 4 * hitmiss)
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#define SMMU_TRANSLATION_ENABLE_0 0x228
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#define SMMU_TRANSLATION_ENABLE_1 0x22c
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@ -251,6 +266,8 @@ struct smmu_device {
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unsigned long translation_enable_2;
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unsigned long asid_security;
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struct dentry *debugfs_root;
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struct device_node *ahb;
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int num_as;
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@ -412,8 +429,8 @@ static int smmu_setup_regs(struct smmu_device *smmu)
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smmu_write(smmu, smmu->translation_enable_1, SMMU_TRANSLATION_ENABLE_1);
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smmu_write(smmu, smmu->translation_enable_2, SMMU_TRANSLATION_ENABLE_2);
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smmu_write(smmu, smmu->asid_security, SMMU_ASID_SECURITY);
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smmu_write(smmu, SMMU_TLB_CONFIG_RESET_VAL, SMMU_TLB_CONFIG);
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smmu_write(smmu, SMMU_PTC_CONFIG_RESET_VAL, SMMU_PTC_CONFIG);
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smmu_write(smmu, SMMU_TLB_CONFIG_RESET_VAL, SMMU_CACHE_CONFIG(_TLB));
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smmu_write(smmu, SMMU_PTC_CONFIG_RESET_VAL, SMMU_CACHE_CONFIG(_PTC));
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smmu_flush_regs(smmu, 1);
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@ -892,6 +909,164 @@ static struct iommu_ops smmu_iommu_ops = {
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.pgsize_bitmap = SMMU_IOMMU_PGSIZES,
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};
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/* Should be in the order of enum */
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static const char * const smmu_debugfs_mc[] = { "mc", };
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static const char * const smmu_debugfs_cache[] = { "tlb", "ptc", };
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static ssize_t smmu_debugfs_stats_write(struct file *file,
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const char __user *buffer,
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size_t count, loff_t *pos)
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{
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struct smmu_device *smmu;
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struct dentry *dent;
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int i, cache, mc;
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enum {
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_OFF = 0,
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_ON,
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_RESET,
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};
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const char * const command[] = {
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[_OFF] = "off",
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[_ON] = "on",
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[_RESET] = "reset",
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};
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char str[] = "reset";
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u32 val;
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size_t offs;
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count = min_t(size_t, count, sizeof(str));
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if (copy_from_user(str, buffer, count))
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return -EINVAL;
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for (i = 0; i < ARRAY_SIZE(command); i++)
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if (strncmp(str, command[i],
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strlen(command[i])) == 0)
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break;
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if (i == ARRAY_SIZE(command))
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return -EINVAL;
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dent = file->f_dentry;
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cache = (int)dent->d_inode->i_private;
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mc = (int)dent->d_parent->d_inode->i_private;
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smmu = dent->d_parent->d_parent->d_inode->i_private;
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offs = SMMU_CACHE_CONFIG(cache);
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val = smmu_read(smmu, offs);
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switch (i) {
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case _OFF:
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val &= ~SMMU_CACHE_CONFIG_STATS_ENABLE;
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val &= ~SMMU_CACHE_CONFIG_STATS_TEST;
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smmu_write(smmu, val, offs);
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break;
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case _ON:
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val |= SMMU_CACHE_CONFIG_STATS_ENABLE;
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val &= ~SMMU_CACHE_CONFIG_STATS_TEST;
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smmu_write(smmu, val, offs);
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break;
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case _RESET:
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val |= SMMU_CACHE_CONFIG_STATS_TEST;
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smmu_write(smmu, val, offs);
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val &= ~SMMU_CACHE_CONFIG_STATS_TEST;
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smmu_write(smmu, val, offs);
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break;
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default:
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BUG();
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break;
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}
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dev_dbg(smmu->dev, "%s() %08x, %08x @%08x\n", __func__,
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val, smmu_read(smmu, offs), offs);
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return count;
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}
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static int smmu_debugfs_stats_show(struct seq_file *s, void *v)
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{
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struct smmu_device *smmu;
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struct dentry *dent;
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int i, cache, mc;
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const char * const stats[] = { "hit", "miss", };
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dent = d_find_alias(s->private);
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cache = (int)dent->d_inode->i_private;
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mc = (int)dent->d_parent->d_inode->i_private;
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smmu = dent->d_parent->d_parent->d_inode->i_private;
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for (i = 0; i < ARRAY_SIZE(stats); i++) {
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u32 val;
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size_t offs;
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offs = SMMU_STATS_CACHE_COUNT(mc, cache, i);
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val = smmu_read(smmu, offs);
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seq_printf(s, "%s:%08x ", stats[i], val);
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dev_dbg(smmu->dev, "%s() %s %08x @%08x\n", __func__,
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stats[i], val, offs);
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}
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seq_printf(s, "\n");
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return 0;
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}
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static int smmu_debugfs_stats_open(struct inode *inode, struct file *file)
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{
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return single_open(file, smmu_debugfs_stats_show, inode);
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}
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static const struct file_operations smmu_debugfs_stats_fops = {
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.open = smmu_debugfs_stats_open,
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.read = seq_read,
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.llseek = seq_lseek,
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.release = single_release,
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.write = smmu_debugfs_stats_write,
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};
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static void smmu_debugfs_delete(struct smmu_device *smmu)
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{
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debugfs_remove_recursive(smmu->debugfs_root);
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}
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static void smmu_debugfs_create(struct smmu_device *smmu)
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{
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int i;
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struct dentry *root;
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root = debugfs_create_file(dev_name(smmu->dev),
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S_IFDIR | S_IRWXU | S_IRUGO | S_IXUGO,
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NULL, smmu, NULL);
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if (!root)
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goto err_out;
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smmu->debugfs_root = root;
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for (i = 0; i < ARRAY_SIZE(smmu_debugfs_mc); i++) {
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int j;
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struct dentry *mc;
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mc = debugfs_create_file(smmu_debugfs_mc[i],
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S_IFDIR | S_IRWXU | S_IRUGO | S_IXUGO,
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root, (void *)i, NULL);
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if (!mc)
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goto err_out;
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for (j = 0; j < ARRAY_SIZE(smmu_debugfs_cache); j++) {
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struct dentry *cache;
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cache = debugfs_create_file(smmu_debugfs_cache[j],
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S_IWUGO | S_IRUGO, mc,
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(void *)j,
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&smmu_debugfs_stats_fops);
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if (!cache)
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goto err_out;
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}
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}
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return;
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err_out:
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smmu_debugfs_delete(smmu);
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}
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static int tegra_smmu_suspend(struct device *dev)
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{
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struct smmu_device *smmu = dev_get_drvdata(dev);
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@ -996,6 +1171,7 @@ static int tegra_smmu_probe(struct platform_device *pdev)
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if (!smmu->avp_vector_page)
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return -ENOMEM;
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smmu_debugfs_create(smmu);
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smmu_handle = smmu;
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return 0;
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}
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struct smmu_device *smmu = platform_get_drvdata(pdev);
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int i;
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smmu_debugfs_delete(smmu);
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smmu_write(smmu, SMMU_CONFIG_DISABLE, SMMU_CONFIG);
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for (i = 0; i < smmu->num_as; i++)
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free_pdir(&smmu->as[i]);
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