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MIPS: Octeon: Run IPI code with interrupts disabled.
In mm/slab.c the function do_ccupdate_local requires that interrupts be disabled. If they are not, we panic with CONFIG_DEBUG_SLAB. So we disable interrupts while processing IPIs. Also these are not shared irqs, so get rid of the IRQF_SHARED flag. Signed-off-by: David Daney <ddaney@caviumnetworks.com> Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
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1 changed files with 2 additions and 2 deletions
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@ -194,11 +194,11 @@ static void octeon_init_secondary(void)
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void octeon_prepare_cpus(unsigned int max_cpus)
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void octeon_prepare_cpus(unsigned int max_cpus)
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{
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{
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cvmx_write_csr(CVMX_CIU_MBOX_CLRX(cvmx_get_core_num()), 0xffffffff);
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cvmx_write_csr(CVMX_CIU_MBOX_CLRX(cvmx_get_core_num()), 0xffffffff);
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if (request_irq(OCTEON_IRQ_MBOX0, mailbox_interrupt, IRQF_SHARED,
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if (request_irq(OCTEON_IRQ_MBOX0, mailbox_interrupt, IRQF_DISABLED,
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"mailbox0", mailbox_interrupt)) {
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"mailbox0", mailbox_interrupt)) {
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panic("Cannot request_irq(OCTEON_IRQ_MBOX0)\n");
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panic("Cannot request_irq(OCTEON_IRQ_MBOX0)\n");
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}
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}
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if (request_irq(OCTEON_IRQ_MBOX1, mailbox_interrupt, IRQF_SHARED,
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if (request_irq(OCTEON_IRQ_MBOX1, mailbox_interrupt, IRQF_DISABLED,
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"mailbox1", mailbox_interrupt)) {
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"mailbox1", mailbox_interrupt)) {
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panic("Cannot request_irq(OCTEON_IRQ_MBOX1)\n");
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panic("Cannot request_irq(OCTEON_IRQ_MBOX1)\n");
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}
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}
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